2025-12-15 03:30:27.708 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.144.20:5700'
2025-12-15 03:30:27.708 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.144.20:5802)
2025-12-15 03:30:27.708 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.144.20:5801)
2025-12-15 03:30:27.708 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.144.22:6700'
2025-12-15 03:30:27.708 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.144.22:6802)
2025-12-15 03:30:27.708 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.144.22:6801)
2025-12-15 03:30:27.708 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.144.20:5700/1'
2025-12-15 03:30:27.708 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.144.20:5804)
2025-12-15 03:30:27.708 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.144.20:5803)
2025-12-15 03:30:27.708 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.144.20:5700/2'
2025-12-15 03:30:27.708 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.144.20:5806)
2025-12-15 03:30:27.708 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.144.20:5805)
2025-12-15 03:30:27.708 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.144.20:5700/3'
2025-12-15 03:30:27.708 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.144.20:5808)
2025-12-15 03:30:27.708 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.144.20:5807)
2025-12-15 03:30:27.708 [INFO] fake_trx.py:424 Init complete
2025-12-15 03:30:27.708 [INFO] fake_trx.py:455 Setting real time process scheduler to SCHED_RR, priority 30
2025-12-15 03:30:28.288 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:30:28.288 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:30:28.288 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:30:28.288 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:30:28.288 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:30:28.288 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:30:32.310 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:30:32.311 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:30:32.311 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:30:32.311 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:30:32.311 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 0 -> 1
2025-12-15 03:30:32.315 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:30:32.315 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:30:32.316 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:30:32.316 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:30:32.316 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:30:32.316 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:30:32.316 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:30:32.316 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 0 -> 1
2025-12-15 03:30:32.320 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:30:32.320 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:30:32.320 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:30:32.320 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:30:32.320 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:30:32.320 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:30:32.321 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:30:32.321 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 0 -> 1
2025-12-15 03:30:32.324 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:30:32.324 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:30:32.324 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:30:32.324 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:30:32.324 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:30:32.324 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:30:32.324 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:30:32.324 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 0 -> 1
2025-12-15 03:30:32.327 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:30:32.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:30:32.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:30:32.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:30:32.327 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:30:32.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:30:32.327 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:30:32.327 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:30:32.327 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:30:32.327 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:30:32.327 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:30:32.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:30:32.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:30:32.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:30:32.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:30:32.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:30:32.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:30:32.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:30:32.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:30:32.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:30:32.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:30:32.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:30:32.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:30:32.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:30:32.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:30:32.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:30:32.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:30:32.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:30:32.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:30:32.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:30:32.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:30:32.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:30:32.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:30:32.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:30:32.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:30:32.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:30:32.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:30:32.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:30:32.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:30:32.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:30:32.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:30:32.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:30:32.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:30:32.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:30:32.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:30:32.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:30:32.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:30:32.332 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:30:32.801 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:30:32.869 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:30:32.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:32.871 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:30:32.872 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:30:32.897 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:32.897 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:32.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:30:32.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:32.902 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:32.903 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:32.903 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:30:32.903 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:30:32.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:33.073 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:33.073 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:33.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:33.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:33.272 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:30:33.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:30:33.332 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:30:33.332 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:30:33.333 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:30:33.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:33.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:33.474 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:33.474 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:33.493 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:33.493 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:33.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:30:33.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:33.495 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:33.495 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:33.495 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:30:33.495 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:30:33.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:33.567 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:33.567 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:33.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:33.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:33.742 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:30:33.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:33.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:33.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:33.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:33.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:33.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:33.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:30:33.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:33.984 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:33.984 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:33.984 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:30:33.984 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:30:34.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:34.212 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:30:34.245 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:34.245 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:34.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:34.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:34.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:30:34.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:30:34.334 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:30:34.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:30:34.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:34.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:34.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:34.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:34.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:34.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:34.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:30:34.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:34.665 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:34.665 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:34.665 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:30:34.665 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:30:34.682 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:30:34.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:34.743 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:34.744 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:34.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:34.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:35.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:35.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:35.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:35.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:35.152 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:30:35.158 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:35.158 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:35.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:30:35.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:35.160 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:35.160 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:35.160 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:30:35.160 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:30:35.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:35.335 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:30:35.335 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:30:35.335 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:30:35.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:30:35.422 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:35.422 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:35.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:35.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:35.624 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:30:36.094 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:30:36.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:36.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:36.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:36.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:36.175 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:36.175 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:36.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:30:36.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:36.176 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:36.176 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:36.176 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:30:36.176 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:30:36.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:36.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:30:36.336 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:30:36.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:30:36.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:30:36.365 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:36.365 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:36.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:36.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:36.565 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:30:37.041 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:30:37.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:37.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:37.188 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:37.188 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:37.206 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:37.206 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:37.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:30:37.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:37.208 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:37.208 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:37.208 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:30:37.208 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:30:37.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:37.314 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:37.314 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:37.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:37.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:37.519 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:30:37.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:37.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:37.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:37.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:37.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:37.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:37.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:30:37.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:37.751 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:37.751 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:37.751 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:30:37.751 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:30:37.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:30:37.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:37.995 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:30:38.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:38.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:38.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:38.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:38.469 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:30:38.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:38.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:38.761 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:38.761 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:38.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:38.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:38.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:30:38.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:38.778 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:38.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:38.778 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:30:38.778 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:30:38.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:38.946 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:30:38.983 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:38.983 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:38.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:38.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:39.425 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:30:39.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:39.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:39.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:39.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:39.816 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:39.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:39.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:30:39.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:39.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:39.817 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:39.817 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:30:39.817 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:30:39.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:30:39.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:39.903 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:30:39.939 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:39.939 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:39.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:39.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:40.380 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:30:40.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:40.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:40.713 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:40.713 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:40.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:40.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:40.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:30:40.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:40.731 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:40.731 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:40.731 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:30:40.731 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:30:40.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:40.858 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:30:40.895 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:40.896 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:40.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:40.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:41.337 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:30:41.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:41.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:41.686 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:41.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:41.705 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:41.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:41.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:30:41.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:41.706 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:41.706 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:41.706 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:30:41.706 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:30:41.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:41.816 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 03:30:41.852 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:41.852 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:41.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:41.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:42.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:42.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:42.234 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:42.234 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:42.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:42.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:42.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:30:42.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:42.253 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:42.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:42.253 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:30:42.253 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:30:42.294 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 03:30:42.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:42.357 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:42.358 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:42.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:42.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:42.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:42.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:42.454 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:42.454 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:42.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:42.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:42.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:30:42.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:42.473 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:42.473 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:42.473 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:30:42.473 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:30:42.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:42.565 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:42.566 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:42.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:42.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:42.770 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 03:30:42.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:42.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:42.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:42.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:42.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:42.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:42.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:30:42.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:42.970 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:42.970 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:42.970 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:30:42.970 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:30:43.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:43.069 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:43.069 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:43.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:43.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:43.248 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 03:30:43.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:43.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:43.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:43.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:43.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:43.463 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:43.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:30:43.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:43.465 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:43.465 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:43.465 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:30:43.465 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:30:43.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:43.566 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:43.567 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:43.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:43.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:43.725 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 03:30:43.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:43.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:43.941 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:43.941 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:43.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:43.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:43.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:30:43.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:43.962 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:43.962 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:43.962 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:30:43.962 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:30:44.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:44.202 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 03:30:44.240 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:44.240 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:44.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:44.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:44.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:44.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:44.593 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:44.593 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:44.598 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:44.598 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:44.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:30:44.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:44.599 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:44.599 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:44.599 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:30:44.599 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:30:44.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:44.674 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 03:30:44.710 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:44.710 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:44.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:44.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:45.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:45.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:45.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:45.088 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:45.102 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:45.102 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:45.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:30:45.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:45.104 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:45.104 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:45.104 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:30:45.104 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:30:45.152 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 03:30:45.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:45.216 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:45.216 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:45.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:45.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:45.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:45.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:45.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:45.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:45.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:45.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:45.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:30:45.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:45.605 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:45.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:45.606 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:30:45.606 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:30:45.630 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 03:30:45.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:45.695 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:30:45.695 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:30:45.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:45.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:46.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:30:46.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:46.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:46.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:46.090 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:30:46.090 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:30:46.090 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:30:46.090 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:30:46.091 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:30:46.091 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:30:46.091 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:30:46.092 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:30:46.092 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:30:46.092 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:30:46.092 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:30:51.096 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:30:51.096 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:30:51.097 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:30:51.098 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:30:51.099 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:30:51.100 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:30:51.112 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:30:51.112 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:30:51.112 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:30:51.113 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:30:51.113 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:30:51.114 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:30:51.115 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:30:51.115 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:30:51.115 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:30:51.115 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:30:51.115 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:30:51.115 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:30:51.115 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:30:51.117 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:30:51.117 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:30:51.117 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:30:51.117 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:30:51.117 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:30:51.117 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:30:51.117 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:30:51.117 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:30:51.119 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:30:51.119 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:30:51.119 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:30:51.119 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:30:51.119 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:30:51.119 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:30:51.119 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:30:51.119 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:30:51.122 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:30:51.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:30:51.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:30:51.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:30:51.122 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:30:51.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:30:51.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:30:51.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:30:51.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:30:51.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:30:51.123 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:30:51.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:30:51.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:30:51.123 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:30:51.123 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:30:51.123 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:30:51.123 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:30:51.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:30:51.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:30:51.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:30:51.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:30:51.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:30:51.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:30:51.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:30:51.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:30:51.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:30:51.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:30:51.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:30:51.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:30:51.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:30:51.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:30:51.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:30:51.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:30:51.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:30:51.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:30:51.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:30:51.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:30:51.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:30:51.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:30:51.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:30:51.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:30:51.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:30:51.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:30:51.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:30:51.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:30:51.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:30:51.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:30:51.128 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:30:51.597 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:30:51.652 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:30:51.655 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:30:51.657 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:30:51.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.672 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:51.672 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:51.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:30:51.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:51.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
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2025-12-15 03:30:52.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.067 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:30:52.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
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2025-12-15 03:30:52.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
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2025-12-15 03:30:52.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.125 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:30:52.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:30:52.126 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:30:52.126 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:30:52.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
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2025-12-15 03:30:52.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
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2025-12-15 03:30:52.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
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2025-12-15 03:30:52.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
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2025-12-15 03:30:52.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
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2025-12-15 03:30:52.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
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2025-12-15 03:30:52.537 [DEBUG] clck_gen.py:113 IND CLOCK 306
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2025-12-15 03:30:52.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:52.631 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:30:52.631 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:30:52.631 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:30:52.631 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:30:52.632 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:30:52.632 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:30:52.632 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:30:52.632 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:30:52.632 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:30:52.632 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:30:52.632 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:30:52.632 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=329 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:30:52.632 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=329 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:30:52.632 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=329 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:30:52.632 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=329 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:30:52.632 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=329 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:30:52.632 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=329 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:30:52.632 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=329 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:30:57.638 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:30:57.638 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:30:57.638 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:30:57.639 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:30:57.640 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:30:57.641 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:30:57.651 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:30:57.652 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:30:57.652 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:30:57.652 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:30:57.652 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:30:57.656 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:30:57.656 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:30:57.656 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:30:57.656 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:30:57.656 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:30:57.657 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:30:57.657 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:30:57.657 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:30:57.660 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:30:57.660 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:30:57.660 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:30:57.660 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:30:57.660 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:30:57.661 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:30:57.661 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:30:57.661 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:30:57.664 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:30:57.664 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:30:57.664 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:30:57.664 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:30:57.664 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:30:57.665 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:30:57.665 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:30:57.665 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:30:57.669 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:30:57.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:30:57.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:30:57.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:30:57.669 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:30:57.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:30:57.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:30:57.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:30:57.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:30:57.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:30:57.669 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:30:57.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:30:57.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:30:57.669 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:30:57.669 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:30:57.669 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:30:57.670 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:30:57.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:30:57.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:30:57.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:30:57.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:30:57.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:30:57.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:30:57.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:30:57.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:30:57.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:30:57.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:30:57.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:30:57.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:30:57.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:30:57.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:30:57.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:30:57.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:30:57.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:30:57.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:30:57.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:30:57.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:30:57.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:30:57.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:30:57.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:30:57.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:30:57.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:30:57.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:30:57.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:30:57.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:30:57.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:30:57.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:30:57.674 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:30:58.152 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:30:58.185 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:30:58.186 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:30:58.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:58.186 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:30:58.191 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:30:58.191 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:30:58.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:30:58.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:58.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:30:58.202 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:30:58.202 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:30:58.202 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:30:58.202 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:30:58.206 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:30:58.206 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:30:58.207 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:30:58.207 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:30:58.207 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:30:58.207 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:30:58.207 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:30:58.207 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=115 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:30:58.207 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=115 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:30:58.207 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:30:58.208 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:30:58.208 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:30:58.208 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:30:58.208 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:30:58.208 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:31:03.208 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:31:03.209 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:31:03.213 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:31:03.217 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:31:03.220 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:31:03.222 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:31:03.239 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:31:03.240 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:31:03.240 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:31:03.240 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:31:03.241 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:31:03.245 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:31:03.245 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:31:03.245 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:31:03.245 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:31:03.245 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:31:03.246 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:31:03.246 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:31:03.246 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:31:03.252 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:31:03.252 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:31:03.253 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:31:03.253 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:31:03.253 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:31:03.253 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:31:03.253 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:31:03.253 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:31:03.265 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:31:03.265 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:31:03.266 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:31:03.266 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:31:03.266 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:31:03.266 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:31:03.266 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:31:03.266 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:31:03.277 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:31:03.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:31:03.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:31:03.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:31:03.278 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:31:03.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:31:03.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:31:03.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:31:03.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:31:03.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:31:03.279 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:31:03.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:31:03.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:31:03.279 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:31:03.279 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:31:03.279 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:31:03.279 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:31:03.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:31:03.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:31:03.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:31:03.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:31:03.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:31:03.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:31:03.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:31:03.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:31:03.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:31:03.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:31:03.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:31:03.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:31:03.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:31:03.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:31:03.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:31:03.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:31:03.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:31:03.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:31:03.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:31:03.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:31:03.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:31:03.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:31:03.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:31:03.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:31:03.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:31:03.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:31:03.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:31:03.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:31:03.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:31:03.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:31:03.284 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:31:03.758 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:31:03.807 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:31:03.807 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:31:03.809 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:31:03.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:31:03.824 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:31:03.824 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:31:03.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:31:03.867 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:31:03.868 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:31:03.868 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:31:03.868 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:31:03.873 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:31:03.873 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:31:03.873 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:31:03.873 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:31:03.873 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:31:03.874 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:31:03.874 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:31:03.874 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=128 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:31:03.874 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=128 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:31:03.874 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=128 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:31:03.874 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=128 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:31:03.875 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=128 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:31:03.875 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:31:08.873 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:31:08.873 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:31:08.881 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:31:08.884 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:31:08.885 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:31:08.886 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:31:08.902 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:31:08.903 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:31:08.903 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:31:08.903 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:31:08.903 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:31:08.906 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:31:08.906 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:31:08.906 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:31:08.906 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:31:08.906 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:31:08.906 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:31:08.907 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:31:08.907 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:31:08.909 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:31:08.909 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:31:08.909 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:31:08.909 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:31:08.909 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:31:08.909 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:31:08.909 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:31:08.909 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:31:08.911 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:31:08.911 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:31:08.912 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:31:08.912 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:31:08.912 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:31:08.912 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:31:08.912 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:31:08.912 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:31:08.915 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:31:08.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:31:08.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:31:08.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:31:08.915 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:31:08.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:31:08.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:31:08.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:31:08.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:31:08.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:31:08.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:31:08.916 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:31:08.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:31:08.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:31:08.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:31:08.916 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:31:08.916 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:31:08.916 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:31:08.916 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:31:08.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:31:08.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:31:08.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:31:08.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:31:08.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:31:08.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:31:08.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:31:08.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:31:08.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:31:08.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:31:08.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:31:08.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:31:08.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:31:08.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:31:08.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:31:08.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:31:08.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:31:08.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:31:08.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:31:08.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:31:08.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:31:08.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:31:08.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:31:08.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:31:08.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:31:08.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:31:08.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:31:08.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:31:08.920 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:31:09.394 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:31:09.434 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:31:09.435 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:31:09.436 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:31:09.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:31:09.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:31:09.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:31:09.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:31:09.465 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:31:09.465 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:31:09.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:31:09.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:31:09.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:31:09.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:31:09.479 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:31:09.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:31:09.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:31:09.486 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:31:09.486 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:31:09.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:31:09.494 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:31:09.494 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:31:09.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:31:09.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:31:09.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:31:09.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:31:09.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:31:09.510 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:31:09.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:31:09.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:31:09.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:31:09.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:31:09.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:31:09.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:31:09.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:31:09.532 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:31:09.532 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:31:09.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:31:09.540 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:31:09.540 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:31:09.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:31:09.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:31:09.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:31:09.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:31:09.551 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:31:09.552 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:31:09.552 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:31:09.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:31:09.553 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:31:09.553 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:31:09.553 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:31:09.553 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:31:09.554 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:31:09.554 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:31:09.554 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:31:09.554 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=138 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:31:09.554 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=138 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:31:09.554 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=138 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:31:09.554 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=138 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:31:09.554 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=138 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:31:09.554 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=138 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:31:14.558 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:31:14.558 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:31:14.563 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:31:14.567 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:31:14.570 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:31:14.573 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:31:14.587 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:31:14.588 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:31:14.588 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:31:14.588 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:31:14.588 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:31:14.591 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:31:14.591 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:31:14.592 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:31:14.592 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:31:14.592 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:31:14.592 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:31:14.592 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:31:14.592 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:31:14.595 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:31:14.595 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:31:14.596 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:31:14.596 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:31:14.596 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:31:14.596 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:31:14.596 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:31:14.596 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:31:14.600 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:31:14.600 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:31:14.600 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:31:14.600 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:31:14.600 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:31:14.600 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:31:14.600 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:31:14.600 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:31:14.606 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:31:14.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:31:14.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:31:14.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:31:14.606 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:31:14.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:31:14.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:31:14.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:31:14.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:31:14.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:31:14.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:31:14.607 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:31:14.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:31:14.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:31:14.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:31:14.607 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:31:14.607 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:31:14.607 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:31:14.608 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:31:14.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:31:14.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:31:14.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:31:14.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:31:14.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:31:14.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:31:14.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:31:14.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:31:14.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:31:14.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:31:14.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:31:14.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:31:14.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:31:14.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:31:14.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:31:14.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:31:14.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:31:14.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:31:14.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:31:14.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:31:14.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:31:14.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:31:14.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:31:14.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:31:14.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:31:14.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:31:14.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:31:14.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:31:14.612 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:31:15.083 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:31:15.137 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:31:15.138 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:31:15.139 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:31:15.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:31:15.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:31:15.163 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:31:15.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:31:15.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:15.167 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:31:15.167 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:31:15.167 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:31:15.167 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:31:15.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:31:15.186 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:31:15.186 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:31:15.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:15.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:15.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:31:15.558 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:31:15.612 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:31:15.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:31:15.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:31:15.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:31:16.036 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:31:16.514 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:31:16.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:31:16.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:31:16.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:31:16.616 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:31:16.992 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:31:17.471 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:31:17.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:31:17.615 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:31:17.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:31:17.617 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:31:17.948 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:31:18.425 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:31:18.615 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:31:18.615 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:31:18.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:31:18.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:31:18.903 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:31:19.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:31:19.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:19.289 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:31:19.289 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:31:19.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:31:19.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:31:19.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:31:19.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:19.299 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:31:19.299 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:31:19.299 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:31:19.299 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:31:19.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:31:19.326 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:31:19.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:31:19.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:19.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:19.380 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:31:19.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:31:19.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:31:19.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:31:19.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:31:19.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:31:19.854 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:31:20.323 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:31:20.798 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:31:21.276 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:31:21.754 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:31:22.223 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:31:22.697 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:31:23.172 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:31:23.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:31:23.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:23.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:31:23.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:31:23.620 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:31:23.620 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:31:23.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:31:23.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:23.621 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:31:23.621 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:31:23.622 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:31:23.622 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:31:23.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:31:23.637 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:31:23.637 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:31:23.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:23.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:23.648 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:31:24.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:31:24.120 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 03:31:24.591 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 03:31:25.064 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 03:31:25.542 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 03:31:26.020 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 03:31:26.499 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 03:31:26.977 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 03:31:27.456 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 03:31:27.934 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 03:31:28.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:31:28.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:28.090 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:31:28.090 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:31:28.105 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:31:28.105 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:31:28.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:31:28.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:28.107 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:31:28.107 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:31:28.107 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:31:28.107 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:31:28.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:31:28.117 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:31:28.117 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:31:28.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:28.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:28.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:31:28.411 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 03:31:28.890 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 03:31:29.367 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 03:31:29.845 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 03:31:30.323 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 03:31:30.802 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 03:31:31.280 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 03:31:31.759 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 03:31:32.237 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 03:31:32.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:31:32.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:32.395 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:31:32.395 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:31:32.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:31:32.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:31:32.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:31:32.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:32.419 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:31:32.419 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:31:32.419 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:31:32.419 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:31:32.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:31:32.481 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:31:32.482 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:31:32.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:32.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:32.715 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 03:31:33.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:31:33.193 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 03:31:33.672 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 03:31:34.151 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 03:31:34.629 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 03:31:35.108 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 03:31:35.587 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 03:31:36.066 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 03:31:36.544 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 03:31:37.023 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 03:31:37.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:31:37.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:37.064 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:31:37.064 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:31:37.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:31:37.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:31:37.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:31:37.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:37.084 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:31:37.084 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:31:37.084 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:31:37.084 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:31:37.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:31:37.122 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:31:37.122 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:31:37.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:37.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:37.501 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 03:31:37.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:31:37.979 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 03:31:38.456 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 03:31:38.933 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 03:31:39.412 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 03:31:39.890 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 03:31:40.362 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 03:31:40.833 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 03:31:41.308 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 03:31:41.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:31:41.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:41.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:31:41.519 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:31:41.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:31:41.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:31:41.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:31:41.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:41.538 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:31:41.538 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:31:41.538 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:31:41.538 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:31:41.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:31:41.542 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:31:41.542 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:31:41.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:41.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:41.786 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 03:31:41.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:31:42.264 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 03:31:42.743 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 03:31:43.221 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-15 03:31:43.700 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-15 03:31:44.178 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-15 03:31:44.656 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-15 03:31:45.134 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-15 03:31:45.613 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-15 03:31:45.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:31:45.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:45.948 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:31:45.948 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:31:45.965 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:31:45.965 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:31:45.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:31:45.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:45.966 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:31:45.966 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:31:45.967 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:31:45.967 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:31:45.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:31:45.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:31:45.989 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:31:45.989 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:31:45.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:45.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:46.090 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-15 03:31:46.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:31:46.565 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-15 03:31:47.042 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-15 03:31:47.521 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-15 03:31:48.000 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-15 03:31:48.479 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-15 03:31:48.958 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-15 03:31:49.437 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-15 03:31:49.915 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-15 03:31:50.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:31:50.394 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-15 03:31:50.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:50.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:31:50.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:31:50.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:31:50.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:31:50.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:31:50.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:50.415 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:31:50.415 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:31:50.415 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:31:50.415 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:31:50.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:31:50.449 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:31:50.449 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:31:50.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:50.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:50.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:31:50.871 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-15 03:31:51.349 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-15 03:31:51.827 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-15 03:31:52.305 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-15 03:31:52.784 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-15 03:31:53.262 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-15 03:31:53.739 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-15 03:31:54.218 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-15 03:31:54.697 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-15 03:31:54.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:31:54.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:54.842 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:31:54.842 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:31:54.859 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:31:54.859 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:31:54.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:31:54.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:54.861 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:31:54.861 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:31:54.861 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:31:54.861 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:31:54.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:31:54.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:31:54.888 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:31:54.888 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:31:54.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:54.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:55.172 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-15 03:31:55.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:31:55.647 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-15 03:31:56.126 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-15 03:31:56.604 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2025-12-15 03:31:57.082 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2025-12-15 03:31:57.561 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2025-12-15 03:31:58.040 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2025-12-15 03:31:58.518 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2025-12-15 03:31:58.997 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2025-12-15 03:31:59.476 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2025-12-15 03:31:59.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:31:59.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:59.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:31:59.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:31:59.667 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:31:59.667 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:31:59.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:31:59.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:59.668 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:31:59.668 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:31:59.668 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:31:59.668 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:31:59.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:31:59.719 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:31:59.720 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:31:59.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:59.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:31:59.953 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2025-12-15 03:32:00.430 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2025-12-15 03:32:00.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:00.908 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2025-12-15 03:32:01.386 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2025-12-15 03:32:01.865 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2025-12-15 03:32:02.343 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2025-12-15 03:32:02.821 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2025-12-15 03:32:03.300 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2025-12-15 03:32:03.773 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2025-12-15 03:32:04.246 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2025-12-15 03:32:04.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:04.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:04.533 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:04.533 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:04.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:04.550 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:04.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:32:04.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:04.551 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:04.551 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:04.552 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:32:04.552 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:32:04.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:04.572 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:04.572 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:04.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:04.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:04.723 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2025-12-15 03:32:04.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:05.201 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2025-12-15 03:32:05.678 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2025-12-15 03:32:06.157 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2025-12-15 03:32:06.635 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2025-12-15 03:32:07.115 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2025-12-15 03:32:07.593 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2025-12-15 03:32:08.071 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2025-12-15 03:32:08.549 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2025-12-15 03:32:08.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:08.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:08.970 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:08.970 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:08.988 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:08.988 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:08.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:32:08.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:08.989 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:08.990 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:08.990 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:32:08.990 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:32:09.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:09.027 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2025-12-15 03:32:09.029 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:09.029 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:09.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:09.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:09.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:09.506 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2025-12-15 03:32:09.978 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2025-12-15 03:32:10.454 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2025-12-15 03:32:10.932 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2025-12-15 03:32:11.411 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2025-12-15 03:32:11.889 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2025-12-15 03:32:12.367 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2025-12-15 03:32:12.846 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2025-12-15 03:32:13.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:13.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:13.189 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:13.189 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:13.206 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:13.206 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:13.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:32:13.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:13.208 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:13.208 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:13.208 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:32:13.208 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:32:13.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:13.218 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:13.218 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:13.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:13.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:13.323 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2025-12-15 03:32:13.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:13.801 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2025-12-15 03:32:14.280 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2025-12-15 03:32:14.758 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2025-12-15 03:32:15.236 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2025-12-15 03:32:15.715 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2025-12-15 03:32:16.193 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2025-12-15 03:32:16.671 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2025-12-15 03:32:17.150 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2025-12-15 03:32:17.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:17.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:17.503 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:17.503 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:17.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:17.519 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:17.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:32:17.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:17.521 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:17.521 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:17.521 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:32:17.521 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:32:17.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:17.578 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:17.578 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:17.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:17.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:17.628 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2025-12-15 03:32:17.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:18.106 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2025-12-15 03:32:18.583 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2025-12-15 03:32:19.061 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2025-12-15 03:32:19.539 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2025-12-15 03:32:20.017 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2025-12-15 03:32:20.494 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2025-12-15 03:32:20.972 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2025-12-15 03:32:21.450 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2025-12-15 03:32:21.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:21.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:21.821 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:21.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:21.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:21.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:21.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:32:21.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:21.828 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:21.828 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:21.828 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:32:21.828 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:32:21.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:21.868 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:21.868 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:21.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:21.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:21.922 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2025-12-15 03:32:22.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:22.394 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2025-12-15 03:32:22.870 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2025-12-15 03:32:23.347 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2025-12-15 03:32:23.825 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2025-12-15 03:32:24.303 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2025-12-15 03:32:24.781 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2025-12-15 03:32:25.259 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2025-12-15 03:32:25.737 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2025-12-15 03:32:26.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:26.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:26.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:26.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:26.154 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:26.154 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:26.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:32:26.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:26.155 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:26.155 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:26.155 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:32:26.155 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:32:26.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:26.216 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2025-12-15 03:32:26.217 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:26.218 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:26.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:26.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:26.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:26.694 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2025-12-15 03:32:27.172 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2025-12-15 03:32:27.650 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2025-12-15 03:32:28.128 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2025-12-15 03:32:28.605 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2025-12-15 03:32:29.081 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2025-12-15 03:32:29.550 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2025-12-15 03:32:30.027 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2025-12-15 03:32:30.504 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2025-12-15 03:32:30.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:30.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:30.614 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:30.614 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:30.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:30.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:30.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:32:30.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:30.628 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:30.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:30.628 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:32:30.628 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:32:30.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:30.641 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:30.641 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:30.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:30.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:30.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:30.981 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2025-12-15 03:32:31.458 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2025-12-15 03:32:31.935 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2025-12-15 03:32:32.414 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2025-12-15 03:32:32.893 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2025-12-15 03:32:33.369 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2025-12-15 03:32:33.841 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2025-12-15 03:32:34.316 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2025-12-15 03:32:34.795 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2025-12-15 03:32:34.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:34.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:34.921 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:34.921 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:34.941 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:34.941 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:34.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:32:34.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:34.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:34.943 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:34.943 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:32:34.943 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:32:34.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:34.988 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:34.989 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:34.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:34.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:35.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:35.268 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2025-12-15 03:32:35.740 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2025-12-15 03:32:36.209 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2025-12-15 03:32:36.682 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2025-12-15 03:32:37.161 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2025-12-15 03:32:37.639 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2025-12-15 03:32:38.117 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2025-12-15 03:32:38.593 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2025-12-15 03:32:39.071 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2025-12-15 03:32:39.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:39.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:39.228 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:39.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:39.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:39.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:39.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:32:39.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:39.248 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:39.248 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:39.248 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:32:39.248 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:32:39.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:39.254 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:39.254 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:39.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:39.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:39.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:39.548 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2025-12-15 03:32:40.026 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2025-12-15 03:32:40.504 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2025-12-15 03:32:40.982 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2025-12-15 03:32:41.460 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2025-12-15 03:32:41.939 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2025-12-15 03:32:42.417 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2025-12-15 03:32:42.895 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2025-12-15 03:32:43.374 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2025-12-15 03:32:43.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:43.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:43.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:43.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:43.537 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:32:43.537 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:32:43.538 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:32:43.538 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:32:43.540 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:32:43.540 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:32:43.540 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:32:43.540 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:32:43.540 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:32:43.540 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:32:43.540 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:32:43.541 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=19010 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:32:43.541 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=19010 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:32:48.544 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:32:48.544 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:32:48.545 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:32:48.545 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:32:48.546 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:32:48.546 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:32:48.562 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:32:48.563 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:32:48.563 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:32:48.563 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:32:48.563 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:32:48.565 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:32:48.565 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:32:48.565 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:32:48.565 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:32:48.565 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:32:48.565 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:32:48.565 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:32:48.565 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:32:48.567 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:32:48.567 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:32:48.567 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:32:48.567 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:32:48.567 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:32:48.567 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:32:48.567 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:32:48.567 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:32:48.569 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:32:48.569 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:32:48.570 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:32:48.570 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:32:48.570 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:32:48.570 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:32:48.570 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:32:48.570 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:32:48.573 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:32:48.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:32:48.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:32:48.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:32:48.573 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:32:48.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:32:48.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:32:48.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:32:48.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:32:48.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:32:48.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:32:48.573 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:32:48.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:32:48.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:32:48.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:32:48.574 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:32:48.574 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:32:48.574 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:32:48.574 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:32:48.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:32:48.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:32:48.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:32:48.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:32:48.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:32:48.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:32:48.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:32:48.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:32:48.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:32:48.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:32:48.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:32:48.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:32:48.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:32:48.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:32:48.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:32:48.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:32:48.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:32:48.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:32:48.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:32:48.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:32:48.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:32:48.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:32:48.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:32:48.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:32:48.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:32:48.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:32:48.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:32:48.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:32:48.576 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:32:48.576 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:32:48.576 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:32:48.576 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:32:48.576 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:32:48.576 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:32:48.576 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:32:53.580 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:32:53.580 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:32:53.581 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:32:53.581 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:32:53.581 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:32:53.582 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:32:53.599 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:32:53.600 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:32:53.600 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:32:53.600 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:32:53.600 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:32:53.606 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:32:53.606 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:32:53.607 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:32:53.607 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:32:53.607 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:32:53.607 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:32:53.607 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:32:53.607 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:32:53.617 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:32:53.618 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:32:53.618 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:32:53.618 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:32:53.618 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:32:53.619 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:32:53.619 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:32:53.619 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:32:53.624 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:32:53.624 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:32:53.624 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:32:53.624 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:32:53.625 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:32:53.625 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:32:53.625 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:32:53.625 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:32:53.632 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:32:53.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:32:53.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:32:53.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:32:53.632 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:32:53.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:32:53.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:32:53.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:32:53.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:32:53.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:32:53.633 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:32:53.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:32:53.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:32:53.633 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:32:53.633 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:32:53.633 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:32:53.633 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:32:53.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:32:53.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:32:53.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:32:53.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:32:53.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:32:53.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:32:53.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:32:53.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:32:53.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:32:53.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:32:53.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:32:53.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:32:53.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:32:53.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:32:53.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:32:53.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:32:53.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:32:53.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:32:53.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:32:53.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:32:53.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:32:53.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:32:53.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:32:53.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:32:53.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:32:53.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:32:53.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:32:53.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:32:53.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:32:53.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:32:53.638 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:32:54.114 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:32:54.164 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:32:54.166 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:32:54.167 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:32:54.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:54.183 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:54.183 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:54.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:32:54.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:54.189 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:54.189 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:54.189 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:32:54.189 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:32:54.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:54.220 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:54.221 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:54.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:54.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:54.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:54.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:54.319 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:54.319 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:54.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:54.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:54.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:32:54.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:54.338 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:54.338 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:54.338 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:32:54.338 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:32:54.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:54.390 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:54.390 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:54.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:54.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:54.590 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:32:54.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:32:54.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:32:54.638 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:32:54.640 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:32:54.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:54.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:54.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:54.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:54.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:54.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:54.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:32:54.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:54.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:54.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:54.835 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:32:54.835 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:32:54.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:54.882 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:54.883 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:54.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:54.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:55.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:55.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:55.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:55.032 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:55.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:55.050 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:55.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:32:55.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:55.052 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:55.052 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:55.052 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:32:55.052 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:32:55.068 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:32:55.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:55.100 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:55.100 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:55.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:55.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:55.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:55.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:55.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:55.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:55.544 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:55.544 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:55.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:32:55.546 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:32:55.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:55.546 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:55.546 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:55.546 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:32:55.546 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:32:55.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:55.599 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:55.599 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:55.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:55.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:55.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:32:55.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:32:55.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:32:55.641 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:32:56.023 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:32:56.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:56.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:56.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:56.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:56.083 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:56.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:56.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:32:56.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:56.085 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:56.085 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:56.085 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:32:56.085 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:32:56.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:56.136 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:56.136 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:56.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:56.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:56.501 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:32:56.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:56.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:56.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:56.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:56.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:56.631 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:56.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:32:56.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:56.634 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:56.634 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:56.634 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:32:56.634 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:32:56.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:32:56.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:32:56.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:32:56.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:56.640 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:56.640 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:56.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:56.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:56.641 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:32:56.976 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:32:57.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:57.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:57.150 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:57.150 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:57.166 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:57.166 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:57.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:32:57.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:57.168 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:57.168 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:57.168 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:32:57.168 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:32:57.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:32:57.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:57.219 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:57.219 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:57.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:57.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:57.448 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:32:57.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:32:57.640 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:32:57.640 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:32:57.642 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:32:57.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:57.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:57.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:57.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:57.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:57.713 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:57.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:32:57.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:57.715 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:57.715 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:57.715 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:32:57.715 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:32:57.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:57.767 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:57.768 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:57.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:57.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:57.926 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:32:58.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:58.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:58.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:58.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:58.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:58.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:58.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:32:58.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:58.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:58.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:58.261 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:32:58.261 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:32:58.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:32:58.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:58.311 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:58.312 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:58.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:58.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:58.403 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:32:58.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:32:58.644 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:32:58.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:32:58.645 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:32:58.879 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:32:59.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:59.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:59.156 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:59.156 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:59.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:59.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:59.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:32:59.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:59.174 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:59.174 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:59.174 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:32:59.174 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:32:59.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:59.228 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:59.228 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:59.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:59.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:59.356 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:32:59.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:59.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:59.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:59.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:59.656 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:32:59.656 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:32:59.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:32:59.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:59.658 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:59.658 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:59.658 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:32:59.658 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:32:59.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:32:59.706 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:32:59.706 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:32:59.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:59.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:32:59.832 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:33:00.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:00.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:00.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:00.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:00.203 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:00.203 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:00.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:33:00.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:00.205 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:00.205 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:00.205 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:33:00.205 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:33:00.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:00.250 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:00.250 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:00.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:00.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:00.309 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:33:00.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:00.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:00.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:00.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:00.486 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:00.486 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:00.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:33:00.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:00.488 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:00.488 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:00.488 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:33:00.488 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:33:00.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:00.534 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:00.534 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:00.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:00.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:00.787 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:33:00.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:00.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:00.965 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:00.965 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:00.985 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:00.985 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:00.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:33:00.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:00.987 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:00.987 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:00.987 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:33:00.987 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:33:01.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:01.039 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:01.039 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:01.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:01.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:01.261 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:33:01.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:01.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:01.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:01.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:01.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:01.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:01.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:33:01.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:01.475 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:01.475 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:01.475 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:33:01.475 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:33:01.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:01.527 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:01.527 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:01.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:01.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:01.739 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:33:01.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:01.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:01.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:01.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:01.974 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:01.974 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:01.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:33:01.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:01.977 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:01.977 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:01.977 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:33:01.977 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:33:02.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:02.027 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:02.027 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:02.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:02.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:02.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:02.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:02.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:02.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:02.150 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:02.150 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:02.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:33:02.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:02.152 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:02.152 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:02.153 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:33:02.153 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:33:02.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:02.203 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:02.203 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:02.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:02.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:02.215 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:33:02.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:02.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:02.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:02.631 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:02.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:02.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:02.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:33:02.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:02.653 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:02.653 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:02.653 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:33:02.653 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:33:02.688 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:33:02.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:02.703 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:02.704 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:02.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:02.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:03.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:03.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:03.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:03.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:03.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:03.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:03.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:33:03.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:03.143 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:03.143 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:03.143 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:33:03.143 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:33:03.166 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 03:33:03.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:03.191 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:03.191 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:03.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:03.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:03.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:03.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:03.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:03.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:03.629 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:33:03.629 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:33:03.629 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:33:03.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:33:03.634 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:33:03.635 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:33:03.635 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:33:03.635 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:33:03.635 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:33:03.635 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:33:03.635 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:33:08.632 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:33:08.632 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:33:08.634 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:33:08.634 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:33:08.635 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:33:08.635 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:33:08.645 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:33:08.646 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:33:08.646 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:33:08.647 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:33:08.647 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:33:08.651 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:33:08.652 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:33:08.652 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:33:08.652 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:33:08.652 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:33:08.652 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:33:08.652 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:33:08.652 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:33:08.656 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:33:08.657 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:33:08.657 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:33:08.657 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:33:08.657 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:33:08.657 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:33:08.657 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:33:08.657 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:33:08.661 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:33:08.661 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:33:08.661 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:33:08.661 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:33:08.661 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:33:08.661 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:33:08.661 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:33:08.661 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:33:08.667 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:33:08.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:33:08.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:33:08.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:33:08.667 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:33:08.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:33:08.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:33:08.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:33:08.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:33:08.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:33:08.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:33:08.668 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:33:08.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:33:08.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:33:08.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:33:08.668 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:33:08.668 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:33:08.668 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:33:08.668 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:33:08.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:33:08.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:33:08.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:33:08.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:33:08.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:33:08.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:33:08.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:33:08.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:33:08.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:33:08.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:33:08.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:33:08.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:33:08.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:33:08.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:33:08.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:33:08.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:33:08.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:33:08.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:33:08.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:33:08.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:33:08.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:33:08.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:33:08.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:33:08.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:33:08.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:33:08.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:33:08.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:33:08.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:33:08.673 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:33:09.148 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:33:09.197 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:33:09.199 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:33:09.200 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:33:09.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:09.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:09.215 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:09.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:33:09.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:09.219 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:09.219 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:09.219 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:33:09.219 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:33:09.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:09.250 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:09.250 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:09.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:09.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:09.625 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:33:09.672 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:33:09.672 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:33:09.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:33:09.673 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:33:09.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:09.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:10.103 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:33:10.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:10.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:10.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:10.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:10.327 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:10.327 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:10.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:33:10.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:10.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:10.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:10.329 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:33:10.329 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:33:10.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:10.379 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:10.379 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:10.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:10.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:10.580 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:33:10.673 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:33:10.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:33:10.674 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:33:10.674 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:33:11.058 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:33:11.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:11.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:11.535 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:33:11.674 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:33:11.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:33:11.675 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:33:11.675 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:33:11.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:11.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:11.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:11.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:11.780 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:11.780 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:11.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:33:11.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:11.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:11.783 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:11.783 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:33:11.783 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:33:11.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:11.836 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:11.836 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:11.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:11.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:12.013 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:33:12.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:12.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:12.485 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:33:12.675 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:33:12.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:33:12.676 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:33:12.676 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:33:12.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:12.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:12.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:12.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:12.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:12.944 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:12.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:33:12.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:12.946 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:12.946 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:12.946 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:33:12.946 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:33:12.955 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:33:12.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:12.998 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:12.999 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:12.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:12.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:13.433 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:33:13.676 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:33:13.676 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:33:13.677 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:33:13.677 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:33:13.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:13.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:13.911 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:33:14.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:14.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:14.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:14.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:14.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:14.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:14.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:33:14.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:14.388 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:14.388 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:14.388 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:33:14.388 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:33:14.388 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:33:14.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:14.443 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:14.443 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:14.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:14.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:14.866 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:33:15.343 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:33:15.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:15.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:15.821 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:33:15.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:15.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:15.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:15.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:15.968 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:15.968 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:15.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:33:15.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:15.970 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:15.970 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:15.970 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:33:15.970 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:33:16.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:16.018 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:16.018 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:16.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:16.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:16.298 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:33:16.775 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:33:16.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:16.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:17.253 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:33:17.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:17.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:17.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:17.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:17.489 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:17.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:17.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:33:17.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:17.491 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:17.491 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:17.491 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:33:17.491 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:33:17.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:17.542 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:17.542 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:17.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:17.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:17.731 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:33:18.209 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 03:33:18.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:18.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:18.686 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 03:33:18.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:18.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:18.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:18.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:19.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:19.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:19.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:33:19.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:19.015 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:19.015 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:19.015 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:33:19.015 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:33:19.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:33:19.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:19.066 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:19.066 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:19.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:19.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:19.164 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 03:33:19.642 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 03:33:20.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:20.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:20.120 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 03:33:20.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:20.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:20.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:20.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:20.534 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:20.534 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:20.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:33:20.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:20.536 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:20.536 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:20.536 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:33:20.536 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:33:20.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:20.597 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:20.597 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:20.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:20.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:20.598 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 03:33:21.076 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 03:33:21.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:21.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:21.555 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 03:33:22.031 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 03:33:22.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:22.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:22.038 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:22.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:22.056 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:22.056 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:22.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:33:22.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:22.059 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:22.059 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:22.059 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:33:22.059 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:33:22.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:33:22.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:22.107 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:22.107 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:22.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:22.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:22.509 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 03:33:22.987 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 03:33:23.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:23.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:23.463 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 03:33:23.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:23.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:23.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:23.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:23.938 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:23.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:23.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:33:23.940 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 03:33:23.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:23.940 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:23.940 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:23.940 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:33:23.940 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:33:23.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:23.995 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:23.995 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:23.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:23.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:24.416 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 03:33:24.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:24.894 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 03:33:24.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:25.371 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 03:33:25.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:25.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:25.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:25.389 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:25.407 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:25.407 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:25.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:33:25.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:25.409 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:25.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:25.409 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:33:25.409 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:33:25.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:25.458 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:25.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:25.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:25.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:25.845 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 03:33:26.316 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 03:33:26.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:26.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:26.785 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 03:33:26.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:26.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:26.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:26.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:26.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:26.907 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:26.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:33:26.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:26.910 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:26.910 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:26.910 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:33:26.910 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:33:26.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:26.959 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:26.960 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:26.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:26.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:27.256 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 03:33:27.733 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 03:33:27.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:27.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:28.210 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 03:33:28.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:28.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:28.372 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:28.373 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:28.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:28.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:28.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:33:28.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:28.387 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:28.387 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:28.387 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:33:28.387 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:33:28.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:28.434 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:28.435 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:28.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:28.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:28.686 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 03:33:29.161 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 03:33:29.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:29.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:29.634 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 03:33:29.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:29.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:29.811 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:29.811 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:29.827 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:29.827 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:29.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:33:29.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:29.829 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:29.829 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:29.829 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:33:29.829 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:33:29.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:29.880 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:29.880 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:29.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:29.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:30.104 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 03:33:30.575 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 03:33:30.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:30.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:31.045 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 03:33:31.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:31.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:31.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:31.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:31.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:31.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:31.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:33:31.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:31.262 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:31.263 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:31.263 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:33:31.263 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:33:31.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:31.315 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:31.316 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:31.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:31.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:31.519 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 03:33:31.997 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 03:33:32.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:32.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:32.469 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 03:33:32.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:32.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:32.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:32.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:32.701 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:32.701 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:32.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:33:32.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:32.704 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:32.704 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:32.704 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:33:32.704 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:33:32.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:32.755 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:32.755 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:32.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:32.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:32.941 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 03:33:33.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:33.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:33.410 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 03:33:33.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:33.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:33.805 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:33.805 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:33.823 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:33.823 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:33.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:33:33.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:33.825 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:33.825 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:33.825 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:33:33.825 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:33:33.881 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 03:33:33.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:33.892 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:33.892 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:33.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:33.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:34.352 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 03:33:34.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:34.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:34.824 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 03:33:35.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:35.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:35.235 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:35.235 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:35.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:35.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:35.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:33:35.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:35.254 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:35.254 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:35.254 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:33:35.254 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:33:35.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:35.301 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 03:33:35.303 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:35.303 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:35.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:35.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:35.773 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 03:33:36.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:36.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:36.250 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 03:33:36.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:36.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:36.682 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:36.682 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:36.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:36.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:36.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:33:36.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:36.701 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:36.701 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:36.701 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:33:36.701 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:33:36.728 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 03:33:36.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:36.754 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:36.755 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:36.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:36.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:37.205 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-15 03:33:37.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:37.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:37.684 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-15 03:33:38.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:38.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:38.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:38.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:38.151 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:33:38.151 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:33:38.151 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:33:38.151 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:33:38.153 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:33:38.153 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:33:38.153 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:33:38.153 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:33:38.153 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:33:38.154 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:33:38.154 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:33:43.156 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:33:43.156 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:33:43.158 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:33:43.158 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:33:43.158 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:33:43.159 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:33:43.180 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:33:43.181 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:33:43.181 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:33:43.181 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:33:43.181 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:33:43.183 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:33:43.183 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:33:43.183 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:33:43.183 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:33:43.183 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:33:43.183 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:33:43.183 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:33:43.183 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:33:43.187 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:33:43.187 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:33:43.187 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:33:43.187 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:33:43.187 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:33:43.187 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:33:43.187 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:33:43.187 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:33:43.191 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:33:43.191 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:33:43.191 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:33:43.191 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:33:43.191 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:33:43.192 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:33:43.192 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:33:43.192 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:33:43.197 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:33:43.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:33:43.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:33:43.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:33:43.197 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:33:43.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:33:43.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:33:43.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:33:43.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:33:43.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:33:43.198 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:33:43.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:33:43.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:33:43.198 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:33:43.198 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:33:43.198 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:33:43.198 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:33:43.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:33:43.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:33:43.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:33:43.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:33:43.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:33:43.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:33:43.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:33:43.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:33:43.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:33:43.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:33:43.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:33:43.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:33:43.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:33:43.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:33:43.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:33:43.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:33:43.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:33:43.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:33:43.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:33:43.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:33:43.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:33:43.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:33:43.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:33:43.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:33:43.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:33:43.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:33:43.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:33:43.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:33:43.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:33:43.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:33:43.203 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:33:43.681 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:33:43.720 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:33:43.721 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:33:43.723 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:33:43.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:43.742 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:43.742 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:43.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:33:43.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:43.749 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:43.749 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:43.749 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:33:43.749 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:33:43.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:43.780 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:43.781 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:43.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:43.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:44.158 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:33:44.201 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:33:44.202 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:33:44.202 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:33:44.203 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:33:44.636 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:33:45.114 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:33:45.202 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:33:45.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:33:45.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:33:45.203 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:33:45.592 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:33:46.064 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:33:46.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:33:46.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:33:46.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:33:46.204 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:33:46.537 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:33:47.006 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:33:47.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:33:47.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:33:47.206 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:33:47.206 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:33:47.477 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:33:47.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:47.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:47.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:47.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:47.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:47.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:47.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:33:47.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:47.699 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:47.699 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:47.699 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:33:47.699 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:33:47.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:47.747 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:47.747 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:47.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:47.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:47.949 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:33:48.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:33:48.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:33:48.207 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:33:48.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:33:48.422 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:33:48.900 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:33:49.378 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:33:49.856 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:33:50.334 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:33:50.812 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:33:51.290 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:33:51.768 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:33:51.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:51.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:51.993 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:51.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:52.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:52.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:52.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:33:52.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:52.012 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:52.012 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:52.012 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:33:52.012 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:33:52.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:52.062 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:52.062 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:52.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:52.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:52.245 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:33:52.722 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 03:33:53.200 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 03:33:53.678 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 03:33:54.155 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 03:33:54.633 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 03:33:55.111 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 03:33:55.589 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 03:33:56.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:56.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:56.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:56.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:56.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:33:56.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:33:56.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:33:56.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:56.050 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:56.050 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:56.050 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:33:56.050 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:33:56.058 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 03:33:56.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:33:56.099 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:33:56.100 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:33:56.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:56.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:33:56.536 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 03:33:57.014 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 03:33:57.491 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 03:33:57.969 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 03:33:58.446 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 03:33:58.923 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 03:33:59.400 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 03:33:59.877 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 03:34:00.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:34:00.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:00.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:34:00.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:34:00.353 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 03:34:00.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:34:00.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:34:00.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:34:00.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:00.358 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:34:00.358 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:34:00.358 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:34:00.358 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:34:00.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:34:00.407 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:34:00.408 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:34:00.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:00.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:00.829 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 03:34:01.308 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 03:34:01.785 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 03:34:02.262 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 03:34:02.741 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 03:34:03.219 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 03:34:03.696 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 03:34:04.175 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 03:34:04.653 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 03:34:05.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:34:05.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:05.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:34:05.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:34:05.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:34:05.078 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:34:05.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:34:05.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:05.081 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:34:05.081 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:34:05.081 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:34:05.081 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:34:05.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:34:05.130 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:34:05.130 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:34:05.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:05.130 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 03:34:05.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:05.605 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 03:34:06.082 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 03:34:06.561 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 03:34:07.038 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 03:34:07.516 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 03:34:07.988 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 03:34:08.459 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 03:34:08.930 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 03:34:09.409 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 03:34:09.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:34:09.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:09.490 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:34:09.490 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:34:09.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:34:09.505 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:34:09.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:34:09.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:09.508 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:34:09.508 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:34:09.508 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:34:09.508 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:34:09.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:34:09.559 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:34:09.560 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:34:09.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:09.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:09.885 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 03:34:10.364 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 03:34:10.842 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 03:34:11.320 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 03:34:11.799 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-15 03:34:12.277 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-15 03:34:12.756 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-15 03:34:13.234 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-15 03:34:13.710 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-15 03:34:13.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:34:13.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:13.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:34:13.935 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:34:13.951 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:34:13.951 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:34:13.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:34:13.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:13.953 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:34:13.953 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:34:13.953 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:34:13.953 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:34:13.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:34:13.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:34:14.003 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:34:14.003 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:34:14.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:14.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:14.189 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-15 03:34:14.664 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-15 03:34:15.143 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-15 03:34:15.621 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-15 03:34:16.099 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-15 03:34:16.577 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-15 03:34:17.056 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-15 03:34:17.534 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-15 03:34:18.013 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-15 03:34:18.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:34:18.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:18.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:34:18.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:34:18.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:34:18.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:34:18.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:34:18.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:18.400 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:34:18.400 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:34:18.400 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:34:18.400 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:34:18.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:34:18.447 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:34:18.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:34:18.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:18.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:18.490 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-15 03:34:18.969 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-15 03:34:19.447 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-15 03:34:19.925 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-15 03:34:20.403 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-15 03:34:20.882 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-15 03:34:21.361 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-15 03:34:21.836 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-15 03:34:22.314 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-15 03:34:22.792 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-15 03:34:22.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:34:22.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:22.827 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:34:22.827 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:34:22.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:34:22.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:34:22.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:34:22.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:22.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:34:22.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:34:22.834 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:34:22.834 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:34:22.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:34:22.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:34:22.891 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:34:22.891 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:34:22.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:22.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:23.267 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-15 03:34:23.745 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-15 03:34:24.223 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-15 03:34:24.701 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-15 03:34:25.175 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2025-12-15 03:34:25.654 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2025-12-15 03:34:26.132 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2025-12-15 03:34:26.610 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2025-12-15 03:34:27.088 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2025-12-15 03:34:27.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:34:27.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:27.151 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:34:27.151 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:34:27.167 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:34:27.167 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:34:27.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:34:27.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:27.170 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:34:27.170 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:34:27.170 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:34:27.170 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:34:27.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:34:27.223 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:34:27.223 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:34:27.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:27.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:27.560 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2025-12-15 03:34:28.035 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2025-12-15 03:34:28.512 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2025-12-15 03:34:28.991 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2025-12-15 03:34:29.469 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2025-12-15 03:34:29.947 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2025-12-15 03:34:30.421 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2025-12-15 03:34:30.897 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2025-12-15 03:34:31.376 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2025-12-15 03:34:31.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:34:31.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:31.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:34:31.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:34:31.538 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:34:31.538 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:34:31.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:34:31.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:31.541 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:34:31.541 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:34:31.541 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:34:31.541 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:34:31.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:34:31.591 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:34:31.592 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:34:31.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:31.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:31.854 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2025-12-15 03:34:32.332 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2025-12-15 03:34:32.810 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2025-12-15 03:34:33.282 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2025-12-15 03:34:33.753 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2025-12-15 03:34:34.226 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2025-12-15 03:34:34.700 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2025-12-15 03:34:35.169 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2025-12-15 03:34:35.641 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2025-12-15 03:34:35.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:34:35.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:35.928 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:34:35.928 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:34:35.937 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:34:35.937 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:34:35.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:34:35.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:35.940 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:34:35.940 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:34:35.940 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:34:35.940 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:34:35.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:34:35.987 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:34:35.987 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:34:35.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:35.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:36.118 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2025-12-15 03:34:36.595 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2025-12-15 03:34:37.074 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2025-12-15 03:34:37.551 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2025-12-15 03:34:38.030 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2025-12-15 03:34:38.508 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2025-12-15 03:34:38.985 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2025-12-15 03:34:39.463 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2025-12-15 03:34:39.940 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2025-12-15 03:34:40.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:34:40.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:40.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:34:40.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:34:40.108 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:34:40.108 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:34:40.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:34:40.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:40.110 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:34:40.110 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:34:40.110 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:34:40.110 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:34:40.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:34:40.159 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:34:40.159 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:34:40.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:40.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:40.417 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2025-12-15 03:34:40.895 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2025-12-15 03:34:41.373 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2025-12-15 03:34:41.851 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2025-12-15 03:34:42.328 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2025-12-15 03:34:42.805 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2025-12-15 03:34:43.283 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2025-12-15 03:34:43.762 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2025-12-15 03:34:44.240 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2025-12-15 03:34:44.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:34:44.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:44.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:34:44.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:34:44.440 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:34:44.440 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:34:44.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:34:44.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:44.442 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:34:44.442 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:34:44.443 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:34:44.443 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:34:44.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:34:44.511 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:34:44.511 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:34:44.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:44.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:44.716 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2025-12-15 03:34:45.195 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2025-12-15 03:34:45.672 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2025-12-15 03:34:46.150 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2025-12-15 03:34:46.627 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2025-12-15 03:34:47.104 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2025-12-15 03:34:47.581 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2025-12-15 03:34:48.059 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2025-12-15 03:34:48.537 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2025-12-15 03:34:48.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:34:48.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:48.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:34:48.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:34:48.751 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:34:48.751 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:34:48.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:34:48.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:48.754 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:34:48.754 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:34:48.754 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:34:48.754 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:34:48.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:34:48.802 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:34:48.802 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:34:48.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:48.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:49.015 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2025-12-15 03:34:49.493 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2025-12-15 03:34:49.972 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2025-12-15 03:34:50.450 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2025-12-15 03:34:50.927 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2025-12-15 03:34:51.405 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2025-12-15 03:34:51.883 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2025-12-15 03:34:52.361 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2025-12-15 03:34:52.839 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2025-12-15 03:34:53.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:34:53.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:53.055 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:34:53.055 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:34:53.073 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:34:53.073 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:34:53.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:34:53.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:53.076 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:34:53.076 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:34:53.076 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:34:53.076 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:34:53.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:34:53.127 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:34:53.127 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:34:53.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:53.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:53.315 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2025-12-15 03:34:53.793 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2025-12-15 03:34:54.271 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2025-12-15 03:34:54.749 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2025-12-15 03:34:55.227 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2025-12-15 03:34:55.705 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2025-12-15 03:34:56.182 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2025-12-15 03:34:56.659 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2025-12-15 03:34:57.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:34:57.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:57.056 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:34:57.056 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:34:57.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:34:57.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:34:57.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:34:57.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:57.076 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:34:57.076 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:34:57.076 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:34:57.076 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:34:57.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:34:57.136 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:34:57.136 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2025-12-15 03:34:57.136 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:34:57.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:57.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:34:57.614 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2025-12-15 03:34:58.092 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2025-12-15 03:34:58.571 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2025-12-15 03:34:59.048 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2025-12-15 03:34:59.521 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2025-12-15 03:35:00.000 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2025-12-15 03:35:00.478 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2025-12-15 03:35:00.955 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2025-12-15 03:35:01.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:35:01.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:01.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:35:01.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:35:01.388 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:35:01.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:35:01.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:35:01.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:01.392 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:35:01.392 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:35:01.392 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:35:01.392 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:35:01.432 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2025-12-15 03:35:01.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:35:01.442 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:35:01.443 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:35:01.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:01.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:01.908 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2025-12-15 03:35:02.384 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2025-12-15 03:35:02.863 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2025-12-15 03:35:03.340 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2025-12-15 03:35:03.818 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2025-12-15 03:35:04.296 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2025-12-15 03:35:04.774 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2025-12-15 03:35:05.252 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2025-12-15 03:35:05.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:35:05.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:05.686 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:35:05.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:35:05.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:35:05.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:35:05.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:35:05.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:05.706 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:35:05.706 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:35:05.706 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:35:05.706 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:35:05.730 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2025-12-15 03:35:05.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:35:05.755 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:35:05.755 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:35:05.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:05.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:06.208 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2025-12-15 03:35:06.685 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2025-12-15 03:35:07.163 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2025-12-15 03:35:07.640 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2025-12-15 03:35:08.118 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2025-12-15 03:35:08.595 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2025-12-15 03:35:09.073 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2025-12-15 03:35:09.551 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2025-12-15 03:35:09.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:35:10.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:10.002 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:35:10.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:35:10.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:35:10.016 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:35:10.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:35:10.016 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:35:10.022 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:35:10.022 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:35:10.022 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:35:10.022 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:35:10.023 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:35:10.023 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:35:10.023 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:35:15.020 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:35:15.020 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:35:15.020 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:35:15.021 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:35:15.021 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:35:15.022 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:35:15.038 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:35:15.038 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:35:15.038 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:35:15.038 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:35:15.038 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:35:15.040 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:35:15.040 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:35:15.040 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:35:15.040 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:35:15.040 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:35:15.040 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:35:15.040 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:35:15.040 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:35:15.044 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:35:15.044 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:35:15.045 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:35:15.045 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:35:15.045 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:35:15.045 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:35:15.045 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:35:15.045 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:35:15.047 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:35:15.047 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:35:15.047 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:35:15.047 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:35:15.047 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:35:15.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:35:15.047 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:35:15.047 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:35:15.050 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:35:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:35:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:35:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:35:15.051 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:35:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:35:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:35:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:35:15.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:35:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:35:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:35:15.051 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:35:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:35:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:35:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:35:15.051 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:35:15.051 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:35:15.051 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:35:15.051 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:35:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:35:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:35:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:35:15.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:35:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:35:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:35:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:35:15.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:35:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:35:15.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:35:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:35:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:35:15.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:35:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:35:15.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:35:15.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:35:15.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:35:15.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:35:15.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:35:15.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:35:15.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:35:15.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:35:15.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:35:15.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:35:15.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:35:15.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:35:15.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:35:15.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:35:15.053 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:35:15.053 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:35:15.053 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:35:15.053 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:35:15.053 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:35:15.053 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:35:15.053 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:35:20.059 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:35:20.059 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:35:20.063 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:35:20.067 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:35:20.070 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:35:20.072 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:35:20.087 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:35:20.089 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:35:20.089 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:35:20.089 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:35:20.089 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:35:20.093 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:35:20.094 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:35:20.094 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:35:20.094 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:35:20.094 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:35:20.094 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:35:20.094 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:35:20.094 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:35:20.098 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:35:20.099 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:35:20.099 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:35:20.099 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:35:20.099 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:35:20.099 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:35:20.099 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:35:20.099 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:35:20.101 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:35:20.102 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:35:20.102 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:35:20.102 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:35:20.102 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:35:20.102 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:35:20.102 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:35:20.102 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:35:20.105 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:35:20.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:35:20.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:35:20.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:35:20.105 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:35:20.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:35:20.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:35:20.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:35:20.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:35:20.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:35:20.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:35:20.106 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:35:20.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:35:20.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:35:20.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:35:20.106 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:35:20.106 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:35:20.106 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:35:20.106 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:35:20.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:35:20.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:35:20.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:35:20.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:35:20.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:35:20.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:35:20.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:35:20.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:35:20.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:35:20.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:35:20.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:35:20.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:35:20.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:35:20.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:35:20.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:35:20.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:35:20.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:35:20.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:35:20.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:35:20.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:35:20.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:35:20.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:35:20.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:35:20.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:35:20.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:35:20.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:35:20.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:35:20.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:35:20.111 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:35:20.579 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:35:20.631 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:35:20.633 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:35:20.635 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:35:20.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:35:20.654 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:35:20.654 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:35:20.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:35:20.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:20.658 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:35:20.658 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:35:20.658 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:35:20.658 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:35:20.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:35:20.677 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:35:20.677 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:35:20.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:20.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:21.051 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:35:21.109 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:35:21.109 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:35:21.109 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:35:21.109 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:35:21.523 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:35:22.002 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:35:22.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:35:22.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:35:22.110 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:35:22.110 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:35:22.480 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:35:22.958 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:35:23.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:35:23.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:35:23.111 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:35:23.111 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:35:23.435 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:35:23.910 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:35:24.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:35:24.112 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:35:24.112 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:35:24.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:35:24.387 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:35:24.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:35:24.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:24.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:35:24.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:35:24.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:35:24.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:35:24.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:35:24.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:24.743 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:35:24.743 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:35:24.743 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:35:24.743 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:35:24.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:35:24.790 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:35:24.790 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:35:24.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:24.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:24.861 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:35:25.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:35:25.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:35:25.113 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:35:25.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:35:25.339 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:35:25.814 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:35:26.289 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:35:26.767 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:35:27.245 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:35:27.722 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:35:28.200 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:35:28.678 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:35:29.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:35:29.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:29.034 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:35:29.034 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:35:29.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:35:29.050 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:35:29.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:35:29.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:29.052 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:35:29.052 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:35:29.052 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:35:29.052 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:35:29.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:35:29.106 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:35:29.106 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:35:29.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:29.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:29.151 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:35:29.626 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 03:35:30.102 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 03:35:30.578 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 03:35:31.054 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 03:35:31.533 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 03:35:32.010 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 03:35:32.488 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 03:35:32.967 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 03:35:33.445 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 03:35:33.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:35:33.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:33.538 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:35:33.538 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:35:33.539 [WARNING] transceiver.py:250 (MS@172.18.144.22:6700) RX TRXD message (fn=2878 tn=3 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:35:33.539 [WARNING] transceiver.py:250 (MS@172.18.144.22:6700) RX TRXD message (fn=2878 tn=4 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:35:33.539 [WARNING] transceiver.py:250 (MS@172.18.144.22:6700) RX TRXD message (fn=2878 tn=5 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:35:33.554 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:35:33.554 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:35:33.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:35:33.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:33.556 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:35:33.556 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:35:33.556 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:35:33.556 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:35:33.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:35:33.603 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:35:33.604 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:35:33.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:33.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:33.922 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 03:35:34.400 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 03:35:34.877 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 03:35:35.355 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 03:35:35.834 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 03:35:36.311 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 03:35:36.788 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 03:35:37.266 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 03:35:37.745 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 03:35:37.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:35:37.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:37.860 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:35:37.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:35:37.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:35:37.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:35:37.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:35:37.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:37.878 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:35:37.878 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:35:37.878 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:35:37.878 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:35:37.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:35:37.930 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:35:37.931 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:35:37.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:37.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:38.220 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 03:35:38.696 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 03:35:39.175 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 03:35:39.653 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 03:35:40.131 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 03:35:40.609 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 03:35:41.087 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 03:35:41.565 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 03:35:42.040 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 03:35:42.519 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 03:35:42.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:35:42.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:42.539 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:35:42.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:35:42.557 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:35:42.557 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:35:42.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:35:42.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:42.559 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:35:42.559 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:35:42.559 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:35:42.559 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:35:42.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:35:42.607 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:35:42.607 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:35:42.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:42.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:42.997 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 03:35:43.472 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 03:35:43.946 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 03:35:44.424 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 03:35:44.902 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 03:35:45.381 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 03:35:45.858 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 03:35:46.334 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 03:35:46.813 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 03:35:46.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:35:46.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:46.981 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:35:46.981 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:35:46.998 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:35:46.998 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:35:46.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:35:47.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:47.001 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:35:47.001 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:35:47.001 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:35:47.001 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:35:47.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:35:47.056 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:35:47.056 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:35:47.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:47.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:47.291 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 03:35:47.763 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 03:35:48.234 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 03:35:48.709 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-15 03:35:49.187 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-15 03:35:49.661 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-15 03:35:50.135 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-15 03:35:50.612 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-15 03:35:51.091 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-15 03:35:51.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:35:51.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:51.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:35:51.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:35:51.429 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:35:51.429 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:35:51.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:35:51.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:51.432 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:35:51.432 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:35:51.432 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:35:51.432 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:35:51.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:35:51.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:35:51.480 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:35:51.481 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:35:51.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:51.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:51.569 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-15 03:35:52.041 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-15 03:35:52.512 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-15 03:35:52.982 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-15 03:35:53.454 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-15 03:35:53.929 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-15 03:35:54.407 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-15 03:35:54.884 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-15 03:35:55.363 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-15 03:35:55.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:35:55.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:55.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:35:55.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:35:55.841 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-15 03:35:55.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:35:55.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:35:55.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:35:55.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:55.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:35:55.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:35:55.853 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:35:55.853 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:35:55.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:35:55.902 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:35:55.903 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:35:55.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:55.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:35:56.320 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-15 03:35:56.798 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-15 03:35:57.277 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-15 03:35:57.755 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-15 03:35:58.234 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-15 03:35:58.713 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-15 03:35:59.191 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-15 03:35:59.669 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-15 03:36:00.147 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-15 03:36:00.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:36:00.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:00.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:36:00.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:36:00.280 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:36:00.280 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:36:00.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:36:00.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:00.282 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:36:00.282 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:36:00.282 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:36:00.282 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:36:00.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:36:00.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:36:00.339 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:36:00.339 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:36:00.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:00.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:00.625 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-15 03:36:01.104 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-15 03:36:01.582 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-15 03:36:02.060 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2025-12-15 03:36:02.538 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2025-12-15 03:36:03.016 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2025-12-15 03:36:03.494 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2025-12-15 03:36:03.967 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2025-12-15 03:36:04.438 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2025-12-15 03:36:04.909 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2025-12-15 03:36:05.381 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2025-12-15 03:36:05.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:36:05.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:05.573 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:36:05.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:36:05.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:36:05.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:36:05.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:36:05.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:05.592 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:36:05.592 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:36:05.592 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:36:05.592 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:36:05.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:36:05.639 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:36:05.639 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:36:05.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:05.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:05.855 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2025-12-15 03:36:06.333 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2025-12-15 03:36:06.806 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2025-12-15 03:36:07.285 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2025-12-15 03:36:07.763 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2025-12-15 03:36:08.241 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2025-12-15 03:36:08.719 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2025-12-15 03:36:09.197 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2025-12-15 03:36:09.675 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2025-12-15 03:36:10.153 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2025-12-15 03:36:10.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:36:10.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:10.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:36:10.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:36:10.431 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:36:10.431 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:36:10.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:36:10.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:10.434 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:36:10.434 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:36:10.434 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:36:10.434 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:36:10.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:36:10.487 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:36:10.488 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:36:10.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:10.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:10.631 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2025-12-15 03:36:11.108 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2025-12-15 03:36:11.586 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2025-12-15 03:36:12.065 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2025-12-15 03:36:12.544 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2025-12-15 03:36:13.023 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2025-12-15 03:36:13.501 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2025-12-15 03:36:13.980 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2025-12-15 03:36:14.459 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2025-12-15 03:36:14.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:36:14.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:14.859 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:36:14.859 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:36:14.874 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:36:14.874 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:36:14.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:36:14.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:14.876 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:36:14.876 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:36:14.876 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:36:14.876 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:36:14.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:36:14.937 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:36:14.937 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:36:14.937 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2025-12-15 03:36:14.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:14.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:15.415 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2025-12-15 03:36:15.890 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2025-12-15 03:36:16.369 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2025-12-15 03:36:16.847 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2025-12-15 03:36:17.320 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2025-12-15 03:36:17.796 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2025-12-15 03:36:18.274 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2025-12-15 03:36:18.753 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2025-12-15 03:36:19.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:36:19.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:19.046 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:36:19.046 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:36:19.064 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:36:19.064 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:36:19.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:36:19.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:19.066 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:36:19.066 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:36:19.066 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:36:19.066 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:36:19.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:36:19.114 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:36:19.115 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:36:19.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:19.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:19.231 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2025-12-15 03:36:19.709 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2025-12-15 03:36:20.188 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2025-12-15 03:36:20.665 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2025-12-15 03:36:21.143 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2025-12-15 03:36:21.620 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2025-12-15 03:36:22.098 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2025-12-15 03:36:22.570 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2025-12-15 03:36:23.043 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2025-12-15 03:36:23.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:36:23.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:23.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:36:23.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:36:23.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:36:23.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:36:23.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:36:23.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:23.371 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:36:23.371 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:36:23.371 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:36:23.371 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:36:23.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:36:23.422 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:36:23.422 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:36:23.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:23.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:23.517 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2025-12-15 03:36:23.995 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2025-12-15 03:36:24.473 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2025-12-15 03:36:24.951 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2025-12-15 03:36:25.429 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2025-12-15 03:36:25.907 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2025-12-15 03:36:26.386 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2025-12-15 03:36:26.864 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2025-12-15 03:36:27.342 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2025-12-15 03:36:27.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:36:27.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:27.672 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:36:27.672 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:36:27.688 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:36:27.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:36:27.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:36:27.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:27.690 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:36:27.690 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:36:27.690 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:36:27.690 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:36:27.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:36:27.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:36:27.739 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:36:27.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:27.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:27.819 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2025-12-15 03:36:28.296 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2025-12-15 03:36:28.774 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2025-12-15 03:36:29.252 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2025-12-15 03:36:29.730 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2025-12-15 03:36:30.208 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2025-12-15 03:36:30.686 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2025-12-15 03:36:31.164 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2025-12-15 03:36:31.642 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2025-12-15 03:36:31.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:36:31.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:31.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:36:31.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:36:32.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:36:32.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:36:32.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:36:32.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:32.006 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:36:32.006 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:36:32.006 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:36:32.006 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:36:32.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:36:32.059 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:36:32.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:36:32.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:32.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:32.119 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2025-12-15 03:36:32.597 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2025-12-15 03:36:33.074 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2025-12-15 03:36:33.552 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2025-12-15 03:36:34.029 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2025-12-15 03:36:34.507 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2025-12-15 03:36:34.985 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2025-12-15 03:36:35.463 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2025-12-15 03:36:35.941 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2025-12-15 03:36:36.418 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2025-12-15 03:36:36.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:36:36.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:36.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:36:36.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:36:36.489 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:36:36.490 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:36:36.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:36:36.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:36.492 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:36:36.492 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:36:36.492 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:36:36.492 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:36:36.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:36:36.547 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:36:36.547 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:36:36.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:36.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:36.896 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2025-12-15 03:36:37.374 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2025-12-15 03:36:37.851 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2025-12-15 03:36:38.329 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2025-12-15 03:36:38.807 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2025-12-15 03:36:39.285 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2025-12-15 03:36:39.757 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2025-12-15 03:36:40.228 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2025-12-15 03:36:40.699 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2025-12-15 03:36:40.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:36:40.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:40.789 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:36:40.789 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:36:40.805 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:36:40.805 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:36:40.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:36:40.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:40.807 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:36:40.807 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:36:40.808 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:36:40.808 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:36:40.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:36:40.856 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:36:40.856 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:36:40.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:40.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:41.174 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2025-12-15 03:36:41.652 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2025-12-15 03:36:42.131 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2025-12-15 03:36:42.609 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2025-12-15 03:36:43.087 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2025-12-15 03:36:43.565 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2025-12-15 03:36:44.043 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2025-12-15 03:36:44.521 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2025-12-15 03:36:44.999 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2025-12-15 03:36:45.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:36:45.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:45.086 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:36:45.086 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:36:45.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:36:45.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:36:45.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:36:45.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:45.103 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:36:45.103 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:36:45.103 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:36:45.103 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:36:45.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:36:45.186 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:36:45.186 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:36:45.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:45.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:45.475 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2025-12-15 03:36:45.953 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2025-12-15 03:36:46.431 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2025-12-15 03:36:46.909 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2025-12-15 03:36:47.387 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2025-12-15 03:36:47.864 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2025-12-15 03:36:48.342 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2025-12-15 03:36:48.821 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2025-12-15 03:36:49.299 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2025-12-15 03:36:49.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:36:49.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:36:49.405 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:36:49.405 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:36:49.412 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:36:49.412 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:36:49.412 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:36:49.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:36:49.414 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:36:49.414 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:36:49.414 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:36:49.414 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:36:49.414 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:36:49.414 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:36:49.414 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:36:54.416 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:36:54.417 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:36:54.418 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:36:54.419 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:36:54.419 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:36:54.420 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:36:54.432 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:36:54.433 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:36:54.433 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:36:54.433 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:36:54.433 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:36:54.435 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:36:54.435 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:36:54.436 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:36:54.436 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:36:54.436 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:36:54.436 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:36:54.436 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:36:54.436 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:36:54.438 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:36:54.438 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:36:54.438 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:36:54.438 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:36:54.438 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:36:54.438 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:36:54.438 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:36:54.438 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:36:54.440 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:36:54.440 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:36:54.440 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:36:54.440 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:36:54.440 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:36:54.440 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:36:54.440 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:36:54.440 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:36:54.443 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:36:54.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:36:54.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:36:54.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:36:54.443 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:36:54.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:36:54.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:36:54.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:36:54.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:36:54.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:36:54.444 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:36:54.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:36:54.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:36:54.444 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:36:54.444 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:36:54.444 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:36:54.444 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:36:54.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:36:54.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:36:54.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:36:54.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:36:54.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:36:54.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:36:54.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:36:54.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:36:54.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:36:54.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:36:54.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:36:54.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:36:54.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:36:54.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:36:54.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:36:54.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:36:54.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:36:54.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:36:54.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:36:54.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:36:54.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:36:54.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:36:54.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:36:54.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:36:54.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:36:54.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:36:54.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:36:54.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:36:54.445 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:36:54.445 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:36:54.445 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:36:54.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:36:54.446 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:36:54.446 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:36:54.446 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:36:54.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:36:59.449 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:36:59.450 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:36:59.452 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:36:59.454 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:36:59.457 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:36:59.461 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:36:59.482 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:36:59.484 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:36:59.484 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:36:59.484 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:36:59.484 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:36:59.490 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:36:59.491 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:36:59.491 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:36:59.491 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:36:59.491 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:36:59.491 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:36:59.491 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:36:59.491 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:36:59.498 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:36:59.498 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:36:59.498 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:36:59.498 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:36:59.498 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:36:59.498 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:36:59.498 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:36:59.498 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:36:59.501 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:36:59.501 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:36:59.501 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:36:59.501 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:36:59.502 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:36:59.502 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:36:59.502 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:36:59.502 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:36:59.506 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:36:59.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:36:59.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:36:59.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:36:59.506 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:36:59.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:36:59.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:36:59.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:36:59.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:36:59.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:36:59.506 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:36:59.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:36:59.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:36:59.507 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:36:59.507 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:36:59.507 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:36:59.507 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:36:59.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:36:59.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:36:59.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:36:59.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:36:59.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:36:59.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:36:59.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:36:59.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:36:59.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:36:59.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:36:59.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:36:59.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:36:59.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:36:59.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:36:59.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:36:59.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:36:59.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:36:59.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:36:59.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:36:59.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:36:59.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:36:59.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:36:59.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:36:59.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:36:59.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:36:59.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:36:59.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:36:59.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:36:59.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:36:59.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:36:59.512 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:36:59.983 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:37:00.039 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:37:00.041 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:37:00.043 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:37:00.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:00.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:00.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:00.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:37:00.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:00.069 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:00.069 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:00.069 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:37:00.069 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:37:00.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:00.092 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:00.092 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:00.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:00.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:00.458 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:37:00.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:37:00.511 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:37:00.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:37:00.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:37:00.935 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:37:01.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:01.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:01.141 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:01.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:01.161 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:01.161 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:01.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:37:01.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:01.164 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:01.164 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:01.164 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:37:01.164 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:37:01.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:01.210 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:01.210 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:01.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:01.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:01.412 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:37:01.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:37:01.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:37:01.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:37:01.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:37:01.890 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:37:02.368 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:37:02.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:37:02.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:37:02.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:37:02.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:37:02.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:02.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:02.593 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:02.593 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:02.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:02.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:02.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:37:02.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:02.614 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:02.615 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:02.615 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:37:02.615 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:37:02.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:02.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:02.663 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:02.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:02.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:02.846 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:37:03.323 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:37:03.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:37:03.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:37:03.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:37:03.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:37:03.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:03.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:03.765 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:03.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:03.789 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:03.789 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:03.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:37:03.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:03.793 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:03.793 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:03.793 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:37:03.793 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:37:03.800 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:37:03.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:03.854 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:03.854 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:03.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:03.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:04.277 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:37:04.517 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:37:04.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:37:04.517 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:37:04.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:37:04.755 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:37:05.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:05.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:05.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:05.215 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:05.230 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:05.230 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:05.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:37:05.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:05.232 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:05.232 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:05.232 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:37:05.232 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:37:05.233 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:37:05.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:05.286 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:05.287 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:05.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:05.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:05.711 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:37:06.189 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:37:06.667 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:37:06.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:06.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:06.800 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:06.800 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:06.817 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:06.817 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:06.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:37:06.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:06.819 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:06.819 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:06.819 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:37:06.819 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:37:06.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:06.871 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:06.872 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:06.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:06.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:07.145 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:37:07.623 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:37:08.101 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:37:08.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:08.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:08.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:08.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:08.341 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:08.341 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:08.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:37:08.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:08.345 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:08.345 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:08.345 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:37:08.345 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:37:08.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:08.395 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:08.395 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:08.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:08.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:08.578 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:37:09.055 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 03:37:09.533 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 03:37:09.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:09.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:09.841 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:09.841 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:09.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:09.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:09.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:37:09.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:09.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:09.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:09.853 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:37:09.853 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:37:09.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:37:09.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:09.905 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:09.906 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:09.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:09.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:10.011 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 03:37:10.489 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 03:37:10.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:10.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:10.877 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:10.877 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:10.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:10.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:10.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:37:10.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:10.894 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:10.894 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:10.894 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:37:10.894 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:37:10.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:10.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:10.943 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:10.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:10.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:10.967 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 03:37:11.446 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 03:37:11.924 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 03:37:12.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:12.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:12.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:12.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:12.398 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:12.398 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:12.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:37:12.399 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 03:37:12.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:12.400 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:12.400 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:12.400 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:37:12.400 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:37:12.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:37:12.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:12.446 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:12.446 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:12.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:12.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:12.870 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 03:37:13.341 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 03:37:13.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:13.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:13.783 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:13.783 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:13.798 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:13.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:13.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:37:13.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:13.801 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:13.801 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:13.801 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:37:13.801 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:37:13.814 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 03:37:13.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:13.850 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:13.851 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:13.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:13.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:14.291 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 03:37:14.770 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 03:37:15.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:15.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:15.238 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:15.238 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:15.248 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 03:37:15.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:15.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:15.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:37:15.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:15.257 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:15.257 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:15.257 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:37:15.257 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:37:15.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:15.311 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:15.312 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:15.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:15.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:15.727 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 03:37:16.205 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 03:37:16.683 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 03:37:16.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:16.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:16.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:16.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:16.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:16.784 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:16.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:37:16.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:16.787 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:16.787 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:16.787 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:37:16.787 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:37:16.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:16.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:16.835 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:16.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:16.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:17.161 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 03:37:17.639 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 03:37:18.117 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 03:37:18.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:18.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:18.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:18.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:18.295 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:18.295 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:18.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:37:18.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:18.297 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:18.297 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:18.297 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:37:18.297 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:37:18.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:18.359 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:18.359 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:18.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:18.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:18.594 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 03:37:19.071 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 03:37:19.548 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 03:37:19.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:19.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:19.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:19.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:19.746 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:19.746 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:19.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:37:19.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:19.749 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:19.749 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:19.749 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:37:19.749 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:37:19.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:19.799 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:19.799 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:19.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:19.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:20.025 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 03:37:20.503 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 03:37:20.981 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 03:37:21.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:21.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:21.178 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:21.178 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:21.194 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:21.194 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:21.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:37:21.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:21.197 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:21.197 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:21.197 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:37:21.197 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:37:21.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:21.251 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:21.251 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:21.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:21.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:21.458 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 03:37:21.937 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 03:37:22.414 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 03:37:22.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:22.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:22.630 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:22.630 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:22.644 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:22.644 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:22.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:37:22.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:22.647 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:22.647 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:22.647 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:37:22.647 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:37:22.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:22.703 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:22.704 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:22.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:22.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:22.892 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 03:37:23.370 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 03:37:23.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:23.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:23.765 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:23.765 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:23.780 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:23.780 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:23.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:37:23.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:23.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:23.783 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:23.783 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:37:23.783 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:37:23.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:23.830 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:23.830 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:23.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:23.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:23.842 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 03:37:24.314 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 03:37:24.784 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 03:37:25.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:25.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:25.196 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:25.197 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:25.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:25.215 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:25.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:37:25.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:25.218 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:25.218 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:25.218 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:37:25.218 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:37:25.255 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 03:37:25.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:25.266 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:25.267 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:25.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:25.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:25.733 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 03:37:26.211 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 03:37:26.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:26.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:26.644 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:26.644 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:26.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:26.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:26.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:37:26.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:26.665 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:26.665 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:26.665 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:37:26.665 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:37:26.689 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 03:37:26.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:26.715 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:26.715 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:26.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:26.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:27.166 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 03:37:27.644 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 03:37:28.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:28.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:28.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:28.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:28.107 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:37:28.107 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:37:28.107 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:37:28.107 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:37:28.109 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:37:28.109 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:37:28.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:37:28.109 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:37:28.109 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:37:28.109 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:37:28.109 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:37:33.111 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:37:33.111 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:37:33.113 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:37:33.113 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:37:33.114 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:37:33.115 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:37:33.128 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:37:33.129 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:37:33.129 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:37:33.129 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:37:33.129 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:37:33.131 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:37:33.131 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:37:33.131 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:37:33.131 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:37:33.131 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:37:33.131 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:37:33.131 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:37:33.131 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:37:33.133 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:37:33.133 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:37:33.133 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:37:33.133 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:37:33.133 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:37:33.133 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:37:33.133 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:37:33.133 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:37:33.136 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:37:33.136 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:37:33.136 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:37:33.136 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:37:33.136 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:37:33.136 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:37:33.137 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:37:33.137 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:37:33.141 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:37:33.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:37:33.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:37:33.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:37:33.142 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:37:33.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:37:33.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:37:33.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:37:33.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:37:33.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:37:33.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:37:33.142 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:37:33.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:37:33.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:37:33.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:37:33.142 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:37:33.142 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:37:33.142 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:37:33.142 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:37:33.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:37:33.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:37:33.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:37:33.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:37:33.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:37:33.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:37:33.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:37:33.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:37:33.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:37:33.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:37:33.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:37:33.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:37:33.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:37:33.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:37:33.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:37:33.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:37:33.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:37:33.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:37:33.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:37:33.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:37:33.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:37:33.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:37:33.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:37:33.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:37:33.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:37:33.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:37:33.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:37:33.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:37:33.147 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:37:33.630 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:37:33.656 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:37:33.656 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:37:33.657 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:37:33.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:33.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:33.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:33.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:37:33.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:33.666 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:33.666 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:33.666 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:37:33.666 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:37:33.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:37:33.678 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:33.678 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:33.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:33.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:34.102 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:37:34.145 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:37:34.145 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:37:34.145 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:37:34.145 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:37:34.577 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:37:35.055 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:37:35.145 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:37:35.146 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:37:35.146 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:37:35.146 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:37:35.532 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:37:36.011 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:37:36.146 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:37:36.146 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:37:36.146 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:37:36.146 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:37:36.485 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:37:36.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:36.963 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:37:37.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:37:37.147 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:37:37.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:37:37.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:37:37.442 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:37:37.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:37.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:37.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:37.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:37.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:37:37.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:37.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:37.519 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:37.519 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:37:37.520 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:37:37.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:37:37.537 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:37.537 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:37.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:37.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:37.920 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:37:38.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:37:38.148 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:37:38.148 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:37:38.149 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:37:38.398 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:37:38.876 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:37:39.354 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:37:39.831 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:37:40.301 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:37:40.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:40.779 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:37:41.257 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:37:41.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:41.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:41.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:41.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:41.425 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:41.425 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:41.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:37:41.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:41.427 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:41.427 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:41.427 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:37:41.427 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:37:41.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:37:41.475 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:41.475 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:41.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:41.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:41.734 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:37:42.212 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:37:42.689 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 03:37:43.167 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 03:37:43.646 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 03:37:44.125 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 03:37:44.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:44.603 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 03:37:45.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:45.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:45.058 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:45.058 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:45.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:37:45.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:45.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:45.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:45.060 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:37:45.060 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:37:45.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:37:45.077 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:45.078 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:45.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:45.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:45.081 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 03:37:45.558 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 03:37:46.035 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 03:37:46.513 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 03:37:46.991 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 03:37:47.470 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 03:37:47.948 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 03:37:48.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:48.427 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 03:37:48.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:48.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:48.478 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:48.478 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:48.496 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:48.496 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:48.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:37:48.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:48.498 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:48.498 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:48.498 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:37:48.498 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:37:48.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:37:48.546 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:48.547 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:48.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:48.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:48.904 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 03:37:49.382 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 03:37:49.860 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 03:37:50.337 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 03:37:50.816 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 03:37:51.293 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 03:37:51.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:51.766 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 03:37:52.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:52.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:52.204 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:52.204 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:52.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:37:52.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:52.205 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:52.205 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:52.206 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:37:52.206 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:37:52.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:37:52.236 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 03:37:52.238 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:52.238 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:52.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:52.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:52.707 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 03:37:53.178 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 03:37:53.650 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 03:37:54.128 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 03:37:54.606 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 03:37:55.084 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 03:37:55.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:55.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:55.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:55.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:55.527 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:55.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:55.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:55.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:37:55.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:55.550 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:55.550 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:55.550 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:37:55.550 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:37:55.561 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 03:37:55.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:37:55.614 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:55.614 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:55.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:55.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:56.039 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 03:37:56.517 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 03:37:56.995 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 03:37:57.473 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 03:37:57.952 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 03:37:58.430 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 03:37:58.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:58.909 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 03:37:59.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:37:59.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:59.303 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:37:59.303 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:37:59.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:37:59.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:59.303 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:59.303 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:59.303 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:37:59.303 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:37:59.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:37:59.331 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:37:59.331 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:37:59.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:59.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:37:59.383 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 03:37:59.861 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 03:38:00.338 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 03:38:00.815 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 03:38:01.287 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 03:38:01.765 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-15 03:38:02.242 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-15 03:38:02.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:38:02.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:38:02.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:02.638 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:38:02.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:38:02.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:38:02.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:38:02.651 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:38:02.651 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:38:02.657 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:38:02.657 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:38:02.657 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:38:02.657 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:38:02.658 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:38:02.658 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:38:02.658 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:38:02.658 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6314 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:38:02.659 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6314 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:38:02.659 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6314 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:38:02.659 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6314 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:38:02.659 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6314 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:38:02.659 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6314 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:38:02.659 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6314 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:38:02.659 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6314 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:38:07.655 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:38:07.656 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:38:07.658 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:38:07.659 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:38:07.659 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:38:07.660 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:38:07.668 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:38:07.669 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:38:07.669 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:38:07.669 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:38:07.669 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:38:07.672 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:38:07.672 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:38:07.673 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:38:07.673 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:38:07.673 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:38:07.673 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:38:07.674 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:38:07.674 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:38:07.677 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:38:07.677 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:38:07.677 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:38:07.677 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:38:07.677 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:38:07.678 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:38:07.678 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:38:07.678 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:38:07.682 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:38:07.682 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:38:07.682 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:38:07.682 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:38:07.682 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:38:07.683 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:38:07.683 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:38:07.683 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:38:07.688 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:38:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:38:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:38:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:38:07.688 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:38:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:38:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:38:07.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:38:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:38:07.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:38:07.689 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:38:07.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:38:07.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:38:07.689 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:38:07.689 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:38:07.689 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:38:07.689 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:38:07.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:38:07.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:38:07.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:38:07.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:38:07.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:38:07.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:38:07.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:38:07.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:38:07.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:38:07.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:38:07.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:38:07.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:38:07.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:38:07.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:38:07.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:38:07.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:38:07.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:38:07.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:38:07.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:38:07.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:38:07.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:38:07.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:38:07.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:38:07.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:38:07.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:38:07.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:38:07.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:38:07.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:38:07.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:38:07.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:38:07.694 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:38:08.172 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:38:08.218 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:38:08.220 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:38:08.222 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:38:08.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:38:08.242 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:38:08.242 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:38:08.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:38:08.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:08.246 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:38:08.246 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:38:08.246 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:38:08.246 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:38:08.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:38:08.274 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:38:08.275 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:38:08.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:08.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:08.649 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:38:08.693 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:38:08.693 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:38:08.693 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:38:08.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:38:09.127 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:38:09.605 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:38:09.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:38:09.694 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:38:09.694 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:38:09.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:38:10.084 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:38:10.563 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:38:10.695 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:38:10.695 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:38:10.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:38:10.698 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:38:11.041 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:38:11.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:38:11.520 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:38:11.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:38:11.697 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:38:11.697 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:38:11.699 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:38:11.998 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:38:12.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:38:12.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:12.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:38:12.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:38:12.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:38:12.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:12.076 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:38:12.076 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:38:12.076 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:38:12.076 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:38:12.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:38:12.093 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:38:12.093 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:38:12.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:12.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:12.476 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:38:12.698 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:38:12.698 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:38:12.698 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:38:12.700 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:38:12.954 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:38:13.432 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:38:13.911 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:38:14.389 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:38:14.868 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:38:15.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:38:15.346 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:38:15.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:38:15.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:15.487 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:38:15.487 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:38:15.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:38:15.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:15.488 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:38:15.488 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:38:15.488 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:38:15.488 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:38:15.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:38:15.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:38:15.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:38:15.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:15.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:15.824 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:38:16.303 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:38:16.781 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:38:17.258 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 03:38:17.736 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 03:38:18.214 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 03:38:18.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:38:18.691 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 03:38:19.170 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 03:38:19.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:38:19.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:19.385 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:38:19.385 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:38:19.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:38:19.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:19.386 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:38:19.386 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:38:19.387 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:38:19.387 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:38:19.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:38:19.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:38:19.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:38:19.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:19.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:19.648 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 03:38:19.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:38:20.126 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 03:38:20.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:38:20.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:20.358 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:38:20.358 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:38:20.359 [WARNING] transceiver.py:250 (MS@172.18.144.22:6700) RX TRXD message (fn=2704 tn=4 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:38:20.376 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:38:20.376 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:38:20.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:38:20.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:20.378 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:38:20.378 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:38:20.378 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:38:20.378 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:38:20.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:38:20.427 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:38:20.427 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:38:20.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:20.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:20.604 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 03:38:21.082 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 03:38:21.560 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 03:38:22.038 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 03:38:22.516 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 03:38:22.995 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 03:38:23.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:38:23.472 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 03:38:23.949 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 03:38:24.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:38:24.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:24.016 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:38:24.016 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:38:24.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:38:24.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:24.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:38:24.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:38:24.016 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:38:24.016 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:38:24.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:38:24.044 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:38:24.044 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:38:24.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:24.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:24.427 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 03:38:24.904 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 03:38:25.375 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 03:38:25.853 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 03:38:26.331 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 03:38:26.808 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 03:38:27.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:38:27.285 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 03:38:27.764 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 03:38:27.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:38:27.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:27.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:38:27.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:38:27.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:38:27.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:27.907 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:38:27.908 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:38:27.908 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:38:27.908 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:38:27.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:38:27.946 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:38:27.946 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:38:27.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:27.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:28.241 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 03:38:28.720 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 03:38:29.197 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 03:38:29.675 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 03:38:30.154 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 03:38:30.629 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 03:38:30.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:38:31.103 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 03:38:31.582 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 03:38:31.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:38:31.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:31.798 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:38:31.798 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:38:31.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:38:31.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:31.799 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:38:31.799 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:38:31.799 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:38:31.799 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:38:31.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:38:31.820 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:38:31.821 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:38:31.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:31.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:32.060 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 03:38:32.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:38:32.534 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 03:38:32.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:38:32.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:32.765 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:38:32.765 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:38:32.783 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:38:32.783 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:38:32.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:38:32.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:32.786 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:38:32.786 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:38:32.786 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:38:32.786 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:38:32.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:38:32.838 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:38:32.839 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:38:32.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:32.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:33.007 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 03:38:33.486 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 03:38:33.964 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 03:38:34.441 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 03:38:34.920 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 03:38:35.399 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 03:38:35.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:38:35.872 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 03:38:36.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:38:36.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:36.311 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:38:36.311 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:38:36.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:38:36.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:36.312 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:38:36.312 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:38:36.312 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:38:36.312 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:38:36.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:38:36.341 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-15 03:38:36.343 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:38:36.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:38:36.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:36.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:36.819 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-15 03:38:37.294 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-15 03:38:37.771 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-15 03:38:38.249 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-15 03:38:38.727 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-15 03:38:39.205 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-15 03:38:39.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:38:39.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:38:39.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:39.646 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:38:39.646 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:38:39.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:38:39.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:39.647 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:38:39.647 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:38:39.647 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:38:39.647 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:38:39.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:38:39.678 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:38:39.678 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:38:39.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:39.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:39.683 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-15 03:38:40.159 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-15 03:38:40.636 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-15 03:38:41.115 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-15 03:38:41.593 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-15 03:38:42.071 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-15 03:38:42.549 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-15 03:38:42.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:38:42.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:38:42.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:42.989 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:38:42.989 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:38:42.989 [WARNING] transceiver.py:250 (MS@172.18.144.22:6700) RX TRXD message (fn=7543 tn=3 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:38:42.989 [WARNING] transceiver.py:250 (MS@172.18.144.22:6700) RX TRXD message (fn=7543 tn=4 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:38:42.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:38:42.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:42.990 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:38:42.990 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:38:42.990 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:38:42.990 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:38:43.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:38:43.023 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:38:43.023 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:38:43.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:43.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:43.027 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-15 03:38:43.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:38:43.505 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-15 03:38:43.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:38:43.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:43.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:38:43.946 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:38:43.964 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:38:43.964 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:38:43.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:38:43.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:43.967 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:38:43.967 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:38:43.967 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:38:43.967 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:38:43.982 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-15 03:38:44.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:38:44.014 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:38:44.014 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:38:44.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:44.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:44.456 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-15 03:38:44.934 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-15 03:38:45.412 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-15 03:38:45.891 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-15 03:38:46.369 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-15 03:38:46.847 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-15 03:38:47.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:38:47.325 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-15 03:38:47.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:38:47.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:47.720 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:38:47.720 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:38:47.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:38:47.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:47.721 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:38:47.721 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:38:47.721 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:38:47.721 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:38:47.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:38:47.748 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:38:47.748 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:38:47.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:47.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:47.800 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-15 03:38:48.277 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-15 03:38:48.755 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-15 03:38:49.233 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-15 03:38:49.712 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2025-12-15 03:38:50.190 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2025-12-15 03:38:50.669 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2025-12-15 03:38:50.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:38:51.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:38:51.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:51.064 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:38:51.064 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:38:51.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:38:51.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:51.065 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:38:51.065 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:38:51.065 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:38:51.065 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:38:51.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:38:51.090 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:38:51.091 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:38:51.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:51.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:51.147 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2025-12-15 03:38:51.619 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2025-12-15 03:38:52.090 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2025-12-15 03:38:52.560 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2025-12-15 03:38:53.033 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2025-12-15 03:38:53.510 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2025-12-15 03:38:53.989 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2025-12-15 03:38:54.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:38:54.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:38:54.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:54.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:38:54.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:38:54.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:38:54.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:54.384 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:38:54.385 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:38:54.385 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:38:54.385 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:38:54.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:38:54.415 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:38:54.415 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:38:54.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:54.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:54.466 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2025-12-15 03:38:54.942 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2025-12-15 03:38:55.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:38:55.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:38:55.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:38:55.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:38:55.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:38:55.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:38:55.349 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:38:55.349 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:38:55.350 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:38:55.351 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:38:55.351 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:38:55.351 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:38:55.351 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:38:55.351 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:38:55.351 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:38:55.352 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:39:00.354 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:39:00.354 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:39:00.356 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:39:00.359 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:39:00.361 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:39:00.365 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:39:00.378 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:39:00.379 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:39:00.379 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:39:00.379 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:39:00.379 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:39:00.381 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:39:00.381 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:39:00.382 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:39:00.382 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:39:00.382 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:39:00.382 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:39:00.382 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:39:00.382 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:39:00.384 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:39:00.384 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:39:00.384 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:39:00.385 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:39:00.385 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:39:00.385 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:39:00.385 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:39:00.385 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:39:00.387 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:39:00.387 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:39:00.387 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:39:00.387 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:39:00.387 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:39:00.387 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:39:00.388 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:39:00.388 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:39:00.391 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:39:00.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:39:00.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:39:00.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:39:00.391 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:39:00.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:39:00.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:39:00.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:39:00.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:39:00.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:39:00.392 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:39:00.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:39:00.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:39:00.392 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:39:00.392 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:39:00.392 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:39:00.392 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:39:00.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:39:00.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:39:00.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:39:00.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:39:00.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:39:00.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:39:00.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:39:00.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:39:00.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:39:00.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:39:00.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:39:00.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:39:00.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:39:00.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:39:00.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:39:00.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:39:00.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:39:00.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:39:00.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:39:00.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:39:00.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:39:00.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:39:00.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:39:00.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:39:00.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:39:00.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:39:00.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:39:00.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:39:00.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:39:00.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:39:00.397 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:39:00.874 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:39:00.913 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:39:00.913 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:39:00.914 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:39:00.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:39:00.918 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:39:00.918 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:39:00.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:39:00.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:39:00.919 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:39:00.919 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:39:00.919 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:39:00.919 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:39:01.351 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:39:01.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:39:01.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:39:01.395 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:39:01.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:39:01.824 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:39:02.299 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:39:02.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:39:02.396 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:39:02.396 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:39:02.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:39:02.773 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:39:03.245 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:39:03.397 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:39:03.397 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:39:03.397 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:39:03.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:39:03.716 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:39:04.190 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:39:04.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:39:04.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:39:04.398 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:39:04.398 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:39:04.661 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:39:05.134 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:39:05.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:39:05.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:39:05.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:39:05.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:39:05.607 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:39:06.084 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:39:06.562 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:39:07.039 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:39:07.511 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:39:07.984 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:39:08.459 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:39:08.931 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:39:09.403 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:39:09.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:39:09.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:39:09.768 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:39:09.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:39:09.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:39:09.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:39:09.774 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:39:09.774 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:39:09.774 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:39:09.774 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:39:09.774 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:39:09.774 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:39:09.775 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:39:09.775 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2020 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:09.775 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2020 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:09.775 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2020 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:09.775 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2020 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:09.775 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2020 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:09.775 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2020 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:09.775 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2021 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:09.775 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2021 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:09.776 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2021 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:09.776 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2021 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:09.776 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2021 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:09.776 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2021 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:09.776 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2021 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:09.776 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2021 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:14.774 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:39:14.774 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:39:14.775 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:39:14.776 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:39:14.777 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:39:14.777 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:39:14.790 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:39:14.790 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:39:14.790 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:39:14.790 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:39:14.790 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:39:14.792 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:39:14.792 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:39:14.792 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:39:14.793 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:39:14.793 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:39:14.793 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:39:14.793 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:39:14.793 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:39:14.794 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:39:14.794 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:39:14.794 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:39:14.794 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:39:14.794 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:39:14.794 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:39:14.794 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:39:14.794 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:39:14.796 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:39:14.796 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:39:14.796 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:39:14.796 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:39:14.796 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:39:14.797 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:39:14.797 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:39:14.797 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:39:14.799 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:39:14.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:39:14.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:39:14.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:39:14.799 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:39:14.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:39:14.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:39:14.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:39:14.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:39:14.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:39:14.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:39:14.800 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:39:14.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:39:14.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:39:14.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:39:14.800 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:39:14.800 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:39:14.800 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:39:14.800 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:39:14.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:39:14.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:39:14.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:39:14.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:39:14.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:39:14.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:39:14.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:39:14.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:39:14.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:39:14.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:39:14.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:39:14.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:39:14.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:39:14.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:39:14.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:39:14.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:39:14.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:39:14.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:39:14.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:39:14.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:39:14.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:39:14.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:39:14.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:39:14.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:39:14.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:39:14.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:39:14.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:39:14.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:39:14.805 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:39:15.289 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:39:15.315 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:39:15.315 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:39:15.316 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:39:15.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:39:15.317 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:39:15.317 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:39:15.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:39:15.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:39:15.317 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:39:15.317 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:39:15.318 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:39:15.318 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:39:15.763 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:39:15.804 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:39:15.804 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:39:15.804 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:39:15.805 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:39:16.239 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:39:16.714 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:39:16.805 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:39:16.805 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:39:16.805 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:39:16.805 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:39:17.189 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:39:17.665 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:39:17.806 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:39:17.806 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:39:17.807 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:39:17.807 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:39:18.140 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:39:18.611 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:39:18.807 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:39:18.807 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:39:18.807 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:39:18.807 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:39:19.085 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:39:19.564 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:39:19.808 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:39:19.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:39:19.808 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:39:19.808 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:39:20.040 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:39:20.512 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:39:20.986 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:39:21.457 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:39:21.928 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:39:22.402 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:39:22.879 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:39:23.353 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:39:23.822 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:39:24.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:39:24.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:39:24.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:39:24.154 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:39:24.155 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:39:24.155 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:39:24.160 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:39:24.161 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:39:24.161 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:39:24.161 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:39:24.161 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:39:24.161 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:39:24.161 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:39:24.162 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2013 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:24.162 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2013 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:24.162 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2013 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:24.162 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2013 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:24.162 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2013 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:24.162 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2013 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:29.161 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:39:29.161 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:39:29.162 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:39:29.162 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:39:29.163 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:39:29.164 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:39:29.173 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:39:29.174 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:39:29.174 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:39:29.174 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:39:29.174 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:39:29.177 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:39:29.178 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:39:29.178 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:39:29.178 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:39:29.179 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:39:29.179 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:39:29.179 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:39:29.179 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:39:29.184 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:39:29.184 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:39:29.184 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:39:29.184 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:39:29.185 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:39:29.185 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:39:29.185 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:39:29.185 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:39:29.188 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:39:29.188 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:39:29.188 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:39:29.188 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:39:29.188 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:39:29.189 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:39:29.189 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:39:29.189 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:39:29.193 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:39:29.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:39:29.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:39:29.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:39:29.193 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:39:29.194 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:39:29.194 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:39:29.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:39:29.194 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:39:29.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:39:29.194 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:39:29.194 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:39:29.194 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:39:29.194 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:39:29.194 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:39:29.194 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:39:29.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:39:29.195 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:39:29.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:39:29.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:39:29.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:39:29.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:39:29.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:39:29.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:39:29.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:39:29.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:39:29.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:39:29.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:39:29.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:39:29.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:39:29.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:39:29.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:39:29.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:39:29.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:39:29.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:39:29.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:39:29.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:39:29.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:39:29.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:39:29.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:39:29.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:39:29.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:39:29.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:39:29.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:39:29.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:39:29.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:39:29.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:39:29.199 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:39:29.677 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:39:29.724 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:39:29.727 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:39:29.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:39:29.729 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:39:29.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:39:29.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:39:29.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:39:30.156 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:39:30.199 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:39:30.199 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:39:30.199 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:39:30.199 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:39:30.635 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:39:30.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:39:30.736 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:39:30.737 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:39:30.737 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:39:30.737 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:39:31.113 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:39:31.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:39:31.200 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:39:31.200 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:39:31.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:39:31.585 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:39:32.058 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:39:32.201 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:39:32.201 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:39:32.201 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:39:32.202 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:39:32.529 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:39:33.004 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:39:33.202 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:39:33.202 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:39:33.202 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:39:33.203 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:39:33.476 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:39:33.947 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:39:34.203 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:39:34.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:39:34.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:39:34.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:39:34.419 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:39:34.893 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:39:35.370 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:39:35.848 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:39:36.322 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:39:36.794 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:39:37.269 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:39:37.739 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:39:38.216 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:39:38.688 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 03:39:39.161 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 03:39:39.636 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 03:39:40.114 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 03:39:40.592 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 03:39:41.070 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 03:39:41.548 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 03:39:42.025 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 03:39:42.503 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 03:39:42.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:39:42.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:39:42.594 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:39:42.594 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:39:42.594 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:39:42.594 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:39:42.599 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:39:42.599 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:39:42.600 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:39:42.600 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:39:42.600 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:39:42.600 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:39:42.601 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:39:47.599 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:39:47.599 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:39:47.600 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:39:47.601 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:39:47.602 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:39:47.602 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:39:47.611 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:39:47.612 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:39:47.612 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:39:47.612 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:39:47.612 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:39:47.615 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:39:47.615 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:39:47.615 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:39:47.615 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:39:47.616 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:39:47.616 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:39:47.616 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:39:47.616 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:39:47.618 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:39:47.619 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:39:47.619 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:39:47.619 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:39:47.619 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:39:47.619 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:39:47.619 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:39:47.619 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:39:47.622 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:39:47.622 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:39:47.622 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:39:47.622 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:39:47.622 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:39:47.622 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:39:47.622 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:39:47.622 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:39:47.626 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:39:47.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:39:47.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:39:47.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:39:47.627 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:39:47.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:39:47.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:39:47.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:39:47.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:39:47.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:39:47.627 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:39:47.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:39:47.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:39:47.627 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:39:47.627 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:39:47.627 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:39:47.627 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:39:47.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:39:47.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:39:47.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:39:47.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:39:47.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:39:47.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:39:47.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:39:47.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:39:47.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:39:47.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:39:47.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:39:47.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:39:47.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:39:47.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:39:47.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:39:47.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:39:47.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:39:47.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:39:47.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:39:47.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:39:47.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:39:47.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:39:47.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:39:47.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:39:47.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:39:47.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:39:47.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:39:47.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:39:47.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:39:47.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:39:47.632 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:39:48.116 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:39:48.152 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:39:48.154 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:39:48.155 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:39:48.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:39:48.157 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:39:48.158 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:39:48.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:39:48.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:39:48.158 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:39:48.158 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:39:48.159 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:39:48.159 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:39:48.593 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:39:48.631 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:39:48.631 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:39:48.632 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:39:48.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:39:49.072 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:39:49.206 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:39:49.549 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:39:49.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:39:49.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:39:49.633 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:39:49.633 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:39:49.749 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:39:50.023 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:39:50.268 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:39:50.501 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:39:50.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:39:50.634 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:39:50.634 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:39:50.634 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:39:50.979 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:39:51.456 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:39:51.635 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:39:51.635 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:39:51.635 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:39:51.635 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:39:51.934 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:39:52.294 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:39:52.411 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:39:52.636 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:39:52.636 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:39:52.636 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:39:52.636 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:39:52.802 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:39:52.888 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:39:53.325 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:39:53.365 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:39:53.841 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:39:53.849 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:39:54.317 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:39:54.787 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:39:55.256 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:39:55.727 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:39:55.874 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:39:56.205 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:39:56.684 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:39:57.161 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 03:39:57.639 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 03:39:57.909 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:39:57.909 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:39:57.915 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:39:57.916 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:39:57.916 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:39:57.916 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:39:57.922 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:39:57.923 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:39:57.923 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:39:57.923 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:39:57.923 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:39:57.923 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:39:57.923 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:39:57.923 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2203 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:57.924 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2203 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:57.924 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2203 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:57.924 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2203 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:57.924 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2203 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:57.924 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2203 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:57.924 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2204 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:57.924 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2204 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:57.924 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2204 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:57.924 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2204 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:57.925 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2204 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:57.925 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2204 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:57.925 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2204 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:57.925 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2204 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:57.925 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2205 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:57.925 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2205 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:57.925 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2205 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:57.925 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2205 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:57.925 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2205 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:57.925 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2205 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:57.925 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2205 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:39:57.926 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2205 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:40:02.921 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:40:02.922 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:40:02.929 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:40:02.932 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:40:02.933 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:40:02.935 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:40:02.949 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:40:02.951 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:40:02.951 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:40:02.951 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:40:02.952 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:40:02.955 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:40:02.955 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:40:02.956 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:40:02.956 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:40:02.956 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:40:02.956 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:40:02.956 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:40:02.956 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:40:02.960 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:40:02.961 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:40:02.961 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:40:02.961 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:40:02.961 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:40:02.961 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:40:02.962 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:40:02.962 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:40:02.965 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:40:02.966 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:40:02.966 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:40:02.966 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:40:02.966 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:40:02.966 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:40:02.966 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:40:02.966 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:40:02.972 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:40:02.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:40:02.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:40:02.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:40:02.973 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:40:02.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:40:02.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:40:02.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:40:02.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:02.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:40:02.973 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:40:02.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:02.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:02.974 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:40:02.974 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:40:02.974 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:40:02.974 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:40:02.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:02.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:02.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:02.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:40:02.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:02.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:02.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:02.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:02.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:02.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:02.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:02.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:02.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:02.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:02.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:02.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:02.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:02.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:02.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:02.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:02.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:02.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:02.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:02.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:02.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:02.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:02.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:02.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:02.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:02.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:02.979 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:40:03.456 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:40:03.503 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:40:03.505 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:40:03.506 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:40:03.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:03.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:03.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:03.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:40:03.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:03.531 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:03.532 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:03.532 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:40:03.532 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:40:03.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:40:03.559 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:03.559 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:03.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:03.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:03.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:03.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:03.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:03.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:03.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:03.645 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:03.645 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:03.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:40:03.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:03.647 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:03.647 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:03.647 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:40:03.647 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:40:03.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:40:03.699 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:03.699 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:03.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:03.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:03.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:03.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:03.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:03.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:03.882 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:03.898 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:03.898 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:03.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:40:03.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:03.900 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:03.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:03.900 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:40:03.900 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:40:03.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:40:03.933 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:40:03.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:03.936 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:03.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:03.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:03.977 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:40:03.978 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:40:03.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:40:03.978 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:40:04.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:04.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:04.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.170 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:04.170 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:04.186 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:04.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:04.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:40:04.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.187 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:04.187 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:04.187 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:40:04.187 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:40:04.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:40:04.220 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:04.220 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:04.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:04.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:04.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:04.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:04.411 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:40:04.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:04.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:04.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:40:04.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.422 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:04.422 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:04.422 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:40:04.422 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:40:04.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:40:04.465 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:04.466 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:04.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:04.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:04.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.475 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:04.475 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:04.489 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:04.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:04.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:40:04.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.490 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:04.490 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:04.490 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:40:04.490 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:40:04.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:40:04.502 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:04.502 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:04.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:04.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:04.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.507 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:04.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:04.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:04.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:04.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:40:04.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.516 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:04.516 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:04.516 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:40:04.516 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:40:04.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:40:04.557 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:04.557 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:04.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:04.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:04.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.569 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:04.569 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:04.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:04.580 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:04.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:40:04.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.581 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:04.581 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:04.581 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:40:04.581 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:40:04.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:04.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:40:04.596 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:04.596 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:04.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:04.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:04.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:04.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:04.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:04.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:04.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:40:04.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.635 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:04.635 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:04.635 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:40:04.635 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:40:04.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:40:04.644 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:04.645 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:04.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:04.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:04.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:04.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:04.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:04.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:04.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:40:04.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.667 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:04.667 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:04.667 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:40:04.667 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:40:04.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:04.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:40:04.696 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:04.696 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:04.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:04.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:04.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:04.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:04.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:04.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:04.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:40:04.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:04.717 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:04.717 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:40:04.717 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:40:04.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:40:04.741 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:04.741 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:04.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:04.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:04.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:04.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:04.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:04.773 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:04.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:40:04.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.774 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:04.774 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:04.774 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:40:04.774 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:40:04.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:40:04.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:04.783 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:04.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:04.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:04.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:04.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:04.809 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:04.809 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:04.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:40:04.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.810 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:04.810 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:04.810 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:40:04.810 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:40:04.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:40:04.835 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:04.835 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:04.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.881 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:40:04.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:04.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:04.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.948 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:04.948 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:04.965 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:04.965 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:04.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:40:04.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:04.967 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:04.967 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:04.967 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:40:04.967 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:40:04.979 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:40:04.979 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:40:04.979 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:40:04.979 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:40:05.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:40:05.025 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:05.026 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:05.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:05.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:05.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:05.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:05.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:05.202 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:05.202 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:05.217 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:05.217 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:05.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:40:05.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:05.218 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:05.218 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:05.219 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:40:05.219 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:40:05.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:40:05.262 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:05.262 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:05.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:05.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:05.354 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:40:05.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:05.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:05.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:05.461 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:05.461 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:05.478 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:05.478 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:05.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:40:05.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:05.480 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:05.480 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:05.480 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:40:05.480 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:40:05.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:40:05.491 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:05.491 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:05.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:05.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:05.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:05.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:05.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:05.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:05.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:05.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:05.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:05.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:40:05.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:05.735 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:05.735 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:05.735 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:40:05.735 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:40:05.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:40:05.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:05.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:05.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:05.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:05.828 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:40:05.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:05.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:05.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:05.970 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:05.970 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:05.970 [WARNING] transceiver.py:250 (MS@172.18.144.22:6700) RX TRXD message (fn=645 tn=4 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:40:05.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:40:05.980 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:40:05.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:40:05.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:40:05.986 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:05.986 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:05.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:40:05.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:05.987 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:05.987 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:05.987 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:40:05.987 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:40:06.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:40:06.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:06.017 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:06.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:06.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:06.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:06.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:06.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:06.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:06.222 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:06.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:06.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:06.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:40:06.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:06.233 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:06.233 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:06.233 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:40:06.233 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:40:06.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:40:06.243 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:06.243 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:06.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:06.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:06.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:06.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:06.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:06.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:06.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:06.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:06.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:06.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:40:06.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:06.254 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:06.254 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:06.254 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:40:06.254 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:40:06.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:40:06.304 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:40:06.304 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:06.304 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:06.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:06.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:06.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:06.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:06.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:06.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:06.503 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:06.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:40:06.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:40:06.513 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:40:06.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:40:06.514 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:40:06.514 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:40:06.514 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:40:06.514 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:40:06.514 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:40:06.514 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:40:06.514 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:40:11.517 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:40:11.517 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:40:11.521 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:40:11.526 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:40:11.529 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:40:11.534 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:40:11.540 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:40:11.541 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:40:11.541 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:40:11.541 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:40:11.541 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:40:11.546 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:40:11.547 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:40:11.547 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:40:11.547 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:40:11.547 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:40:11.547 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:40:11.547 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:40:11.547 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:40:11.553 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:40:11.554 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:40:11.554 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:40:11.554 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:40:11.554 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:40:11.554 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:40:11.554 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:40:11.554 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:40:11.558 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:40:11.558 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:40:11.558 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:40:11.558 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:40:11.559 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:40:11.559 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:40:11.559 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:40:11.559 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:40:11.564 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:40:11.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:40:11.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:40:11.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:40:11.564 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:40:11.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:40:11.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:40:11.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:40:11.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:11.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:40:11.565 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:40:11.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:11.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:11.565 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:40:11.565 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:40:11.565 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:40:11.566 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:40:11.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:11.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:11.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:11.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:40:11.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:11.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:11.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:11.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:11.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:11.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:11.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:11.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:11.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:11.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:11.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:11.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:11.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:11.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:11.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:11.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:11.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:11.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:11.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:11.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:11.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:11.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:11.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:11.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:11.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:11.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:11.570 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:40:12.048 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:40:12.089 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:40:12.091 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:40:12.092 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:40:12.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:12.107 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:12.107 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:12.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:40:12.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:12.110 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:12.110 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:12.110 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:40:12.111 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:40:12.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 03:40:12.151 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:12.151 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:12.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:12.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:12.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:12.524 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:40:12.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:40:12.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:40:12.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:40:12.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:40:13.003 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:40:13.481 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:40:13.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:40:13.572 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:40:13.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:40:13.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:40:13.959 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:40:14.207 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:14.207 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:14.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:40:14.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:40:14.209 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:40:14.209 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:40:14.210 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:40:14.210 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:40:14.210 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:40:14.210 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:40:14.210 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:40:14.210 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:40:14.210 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:40:19.213 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:40:19.213 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:40:19.215 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:40:19.216 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:40:19.216 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:40:19.217 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:40:19.223 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:40:19.224 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:40:19.224 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:40:19.224 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:40:19.224 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:40:19.225 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:40:19.225 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:40:19.225 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:40:19.225 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:40:19.226 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:40:19.226 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:40:19.226 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:40:19.226 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:40:19.228 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:40:19.228 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:40:19.229 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:40:19.229 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:40:19.229 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:40:19.229 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:40:19.229 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:40:19.229 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:40:19.232 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:40:19.232 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:40:19.232 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:40:19.232 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:40:19.232 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:40:19.232 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:40:19.232 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:40:19.232 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:40:19.235 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:40:19.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:40:19.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:40:19.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:40:19.235 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:40:19.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:40:19.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:40:19.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:40:19.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:19.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:40:19.236 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:40:19.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:19.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:19.236 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:40:19.236 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:40:19.236 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:40:19.236 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:40:19.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:19.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:19.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:19.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:40:19.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:19.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:19.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:19.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:19.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:19.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:19.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:19.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:19.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:19.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:19.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:19.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:19.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:19.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:19.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:19.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:19.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:19.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:19.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:19.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:19.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:19.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:19.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:19.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:19.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:19.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:19.238 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:40:19.238 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:40:19.238 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:40:19.238 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:40:19.238 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:40:19.238 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:40:19.238 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:40:24.244 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:40:24.244 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:40:24.246 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:40:24.247 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:40:24.247 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:40:24.248 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:40:24.262 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:40:24.263 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:40:24.263 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:40:24.264 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:40:24.264 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:40:24.269 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:40:24.269 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:40:24.269 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:40:24.270 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:40:24.270 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:40:24.270 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:40:24.271 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:40:24.271 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:40:24.274 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:40:24.275 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:40:24.275 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:40:24.275 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:40:24.275 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:40:24.275 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:40:24.275 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:40:24.275 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:40:24.280 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:40:24.280 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:40:24.280 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:40:24.280 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:40:24.280 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:40:24.280 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:40:24.280 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:40:24.280 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:40:24.286 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:40:24.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:40:24.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:40:24.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:40:24.286 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:40:24.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:40:24.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:40:24.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:40:24.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:24.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:40:24.286 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:40:24.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:24.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:24.286 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:40:24.286 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:40:24.286 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:40:24.286 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:40:24.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:24.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:24.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:24.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:40:24.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:24.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:24.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:24.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:24.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:24.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:24.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:24.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:24.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:24.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:24.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:24.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:24.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:24.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:24.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:24.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:24.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:24.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:24.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:24.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:24.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:24.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:24.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:24.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:24.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:24.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:24.291 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:40:24.763 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:40:24.799 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:40:24.800 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:40:24.800 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:40:24.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:25.238 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:40:25.289 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:40:25.289 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:40:25.290 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:40:25.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:40:25.716 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:40:26.194 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:40:26.290 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:40:26.290 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:40:26.290 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:40:26.291 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:40:26.673 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:40:27.150 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:40:27.291 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:40:27.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:40:27.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:40:27.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:40:27.626 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:40:28.101 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:40:28.292 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:40:28.292 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:40:28.292 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:40:28.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:40:28.579 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:40:29.057 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:40:29.292 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:40:29.293 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:40:29.293 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:40:29.293 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:40:29.529 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:40:30.005 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:40:30.308 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:40:30.308 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:40:30.308 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:40:30.308 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:40:30.313 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:40:30.313 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:40:30.313 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:40:30.313 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:40:30.313 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:40:30.314 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:40:30.314 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:40:30.314 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1292 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:40:35.313 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:40:35.313 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:40:35.313 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:40:35.314 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:40:35.315 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:40:35.316 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:40:35.324 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:40:35.325 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:40:35.325 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:40:35.325 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:40:35.325 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:40:35.328 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:40:35.328 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:40:35.328 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:40:35.328 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:40:35.329 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:40:35.329 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:40:35.329 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:40:35.329 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:40:35.331 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:40:35.331 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:40:35.331 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:40:35.331 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:40:35.332 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:40:35.332 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:40:35.332 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:40:35.332 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:40:35.334 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:40:35.334 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:40:35.334 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:40:35.334 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:40:35.334 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:40:35.334 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:40:35.334 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:40:35.335 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:40:35.338 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:40:35.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:40:35.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:40:35.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:40:35.338 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:40:35.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:40:35.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:40:35.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:40:35.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:35.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:40:35.338 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:40:35.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:35.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:35.339 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:40:35.339 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:40:35.339 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:40:35.339 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:40:35.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:35.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:35.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:35.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:40:35.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:35.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:35.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:35.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:35.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:35.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:35.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:35.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:35.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:35.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:35.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:35.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:35.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:35.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:35.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:35.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:35.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:35.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:35.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:35.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:35.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:35.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:35.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:35.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:35.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:35.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:35.343 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:40:35.828 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:40:35.855 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:40:35.856 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:40:35.857 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:40:35.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:36.305 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:40:36.342 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:40:36.342 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:40:36.342 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:40:36.342 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:40:36.783 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:40:37.261 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:40:37.343 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:40:37.344 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:40:37.344 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:40:37.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:40:37.739 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:40:38.217 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:40:38.345 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:40:38.345 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:40:38.345 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:40:38.345 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:40:38.690 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:40:39.168 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:40:39.346 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:40:39.346 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:40:39.346 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:40:39.347 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:40:39.645 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:40:40.123 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:40:40.347 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:40:40.348 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:40:40.348 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:40:40.348 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:40:40.599 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:40:40.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:40:40.870 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:40:40.870 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:40:40.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:40:40.875 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:40:40.876 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:40:40.876 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:40:40.876 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:40:40.876 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:40:40.876 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:40:40.877 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:40:40.877 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1184 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:40:40.877 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1184 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:40:40.877 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1184 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:40:40.877 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1184 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:40:40.877 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1184 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:40:40.877 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1184 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:40:40.878 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1184 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:40:40.878 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1184 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:40:45.875 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:40:45.875 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:40:45.879 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:40:45.884 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:40:45.887 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:40:45.889 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:40:45.901 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:40:45.902 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:40:45.902 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:40:45.902 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:40:45.902 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:40:45.907 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:40:45.907 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:40:45.907 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:40:45.907 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:40:45.908 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:40:45.908 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:40:45.908 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:40:45.908 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:40:45.910 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:40:45.911 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:40:45.911 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:40:45.911 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:40:45.911 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:40:45.911 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:40:45.911 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:40:45.911 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:40:45.914 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:40:45.914 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:40:45.914 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:40:45.914 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:40:45.914 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:40:45.915 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:40:45.915 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:40:45.915 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:40:45.918 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:40:45.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:40:45.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:40:45.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:40:45.918 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:40:45.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:40:45.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:40:45.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:40:45.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:45.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:40:45.919 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:40:45.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:45.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:45.919 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:40:45.919 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:40:45.919 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:40:45.919 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:40:45.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:45.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:45.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:45.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:40:45.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:45.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:45.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:45.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:45.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:45.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:45.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:45.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:45.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:45.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:45.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:45.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:45.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:45.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:45.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:45.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:45.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:45.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:45.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:45.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:45.921 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:40:45.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:45.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:45.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:45.921 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:40:45.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:45.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:45.922 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:40:45.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:45.922 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:40:45.922 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:40:45.922 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:40:45.922 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:40:50.927 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:40:50.927 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:40:50.929 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:40:50.930 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:40:50.931 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:40:50.931 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:40:50.939 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:40:50.940 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:40:50.940 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:40:50.940 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:40:50.940 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:40:50.943 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:40:50.943 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:40:50.943 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:40:50.943 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:40:50.943 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:40:50.943 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:40:50.943 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:40:50.944 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:40:50.946 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:40:50.946 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:40:50.947 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:40:50.947 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:40:50.947 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:40:50.947 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:40:50.947 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:40:50.947 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:40:50.950 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:40:50.950 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:40:50.951 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:40:50.951 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:40:50.951 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:40:50.951 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:40:50.951 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:40:50.951 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:40:50.955 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:40:50.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:40:50.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:40:50.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:40:50.955 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:40:50.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:40:50.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:40:50.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:40:50.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:50.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:40:50.955 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:40:50.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:50.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:50.956 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:40:50.956 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:40:50.956 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:40:50.956 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:40:50.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:50.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:50.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:50.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:40:50.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:50.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:50.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:50.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:50.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:50.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:50.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:50.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:50.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:50.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:50.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:50.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:50.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:50.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:50.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:50.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:40:50.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:50.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:50.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:50.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:50.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:50.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:40:50.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:50.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:40:50.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:50.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:40:50.960 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:40:51.438 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:40:51.469 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:40:51.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:40:51.470 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:40:51.471 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:40:51.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:40:51.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:40:51.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:40:51.916 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:40:51.959 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:40:51.959 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:40:51.959 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:40:51.959 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:40:52.393 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:40:52.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:40:52.474 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:40:52.474 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:40:52.474 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:40:52.474 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:40:52.870 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:40:52.959 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:40:52.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:40:52.960 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:40:52.960 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:40:53.349 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:40:53.825 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:40:53.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:40:53.961 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:40:53.961 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:40:53.961 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:40:54.303 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:40:54.776 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:40:54.962 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:40:54.962 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:40:54.962 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:40:54.962 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:40:55.252 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:40:55.726 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:40:55.963 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:40:55.964 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:40:55.964 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:40:55.964 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:40:56.201 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:40:56.676 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:40:57.155 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:40:57.628 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:40:58.104 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:40:58.580 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:40:59.058 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:40:59.530 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:41:00.001 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:41:00.474 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 03:41:00.948 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 03:41:01.422 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 03:41:01.901 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 03:41:02.379 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 03:41:02.856 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 03:41:03.334 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 03:41:03.812 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 03:41:04.289 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 03:41:04.766 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 03:41:05.243 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 03:41:05.718 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 03:41:06.195 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 03:41:06.320 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:41:06.321 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:41:06.324 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:41:06.324 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:41:06.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:41:06.324 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:41:06.325 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:41:06.325 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:41:06.325 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:41:06.325 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:41:06.325 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:41:06.325 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:41:06.325 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:41:06.325 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:41:06.325 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:41:06.325 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:41:06.325 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:41:06.325 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:41:06.325 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:41:11.331 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:41:11.331 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:41:11.331 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:41:11.332 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:41:11.333 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:41:11.334 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:41:11.343 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:41:11.344 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:41:11.344 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:41:11.344 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:41:11.344 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:41:11.347 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:41:11.347 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:41:11.347 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:41:11.347 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:41:11.347 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:41:11.348 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:41:11.348 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:41:11.348 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:41:11.351 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:41:11.351 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:41:11.351 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:41:11.351 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:41:11.352 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:41:11.352 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:41:11.352 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:41:11.352 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:41:11.355 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:41:11.355 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:41:11.355 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:41:11.355 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:41:11.355 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:41:11.355 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:41:11.355 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:41:11.355 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:41:11.359 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:41:11.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:41:11.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:41:11.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:41:11.359 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:41:11.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:41:11.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:41:11.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:41:11.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:41:11.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:41:11.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:41:11.360 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:41:11.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:41:11.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:41:11.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:41:11.360 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:41:11.360 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:41:11.360 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:41:11.360 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:41:11.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:41:11.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:41:11.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:41:11.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:41:11.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:41:11.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:41:11.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:41:11.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:41:11.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:41:11.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:41:11.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:41:11.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:41:11.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:41:11.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:41:11.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:41:11.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:41:11.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:41:11.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:41:11.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:41:11.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:41:11.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:41:11.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:41:11.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:41:11.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:41:11.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:41:11.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:41:11.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:41:11.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:41:11.365 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:41:11.841 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:41:11.884 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:41:11.885 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:41:11.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:41:11.886 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:41:11.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:41:11.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:41:11.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:41:11.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:41:11.895 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:41:11.895 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:41:11.895 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:41:11.895 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:41:11.934 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:41:11.938 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:41:11.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:41:11.949 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:41:11.950 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:41:11.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:41:11.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:41:12.317 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:41:12.363 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:41:12.363 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:41:12.364 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:41:12.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:41:12.795 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:41:12.817 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:41:12.817 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:41:12.818 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:41:12.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:41:12.818 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:41:12.818 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:41:12.819 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:41:12.819 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:41:12.819 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:41:12.819 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:41:12.819 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:41:12.819 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:41:12.820 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:41:12.820 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=313 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:41:12.820 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=313 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:41:12.820 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=313 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:41:12.820 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=313 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:41:12.820 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=313 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:41:12.820 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=313 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:41:12.820 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=313 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:41:12.820 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=313 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:41:17.824 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:41:17.824 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:41:17.825 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:41:17.826 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:41:17.826 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:41:17.827 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:41:17.835 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:41:17.836 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:41:17.836 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:41:17.836 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:41:17.836 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:41:17.842 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:41:17.842 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:41:17.843 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:41:17.843 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:41:17.843 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:41:17.844 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:41:17.844 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:41:17.844 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:41:17.857 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:41:17.857 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:41:17.858 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:41:17.858 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:41:17.859 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:41:17.859 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:41:17.860 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:41:17.860 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:41:17.864 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:41:17.865 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:41:17.865 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:41:17.865 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:41:17.866 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:41:17.866 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:41:17.866 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:41:17.866 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:41:17.872 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:41:17.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:41:17.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:41:17.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:41:17.872 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:41:17.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:41:17.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:41:17.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:41:17.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:41:17.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:41:17.873 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:41:17.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:41:17.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:41:17.873 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:41:17.873 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:41:17.873 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:41:17.873 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:41:17.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:41:17.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:41:17.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:41:17.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:41:17.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:41:17.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:41:17.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:41:17.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:41:17.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:41:17.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:41:17.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:41:17.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:41:17.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:41:17.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:41:17.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:41:17.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:41:17.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:41:17.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:41:17.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:41:17.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:41:17.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:41:17.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:41:17.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:41:17.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:41:17.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:41:17.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:41:17.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:41:17.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:41:17.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:41:17.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:41:17.878 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:41:18.362 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:41:18.396 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:41:18.397 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:41:18.397 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:41:18.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:41:18.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:41:18.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:41:18.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:41:18.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:41:18.411 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:41:18.411 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:41:18.411 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:41:18.411 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:41:18.456 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:41:18.457 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:41:18.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:41:18.470 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:41:18.470 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:41:18.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:41:18.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:41:18.837 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:41:18.879 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:41:18.879 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:41:18.879 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:41:18.881 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:41:19.315 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:41:19.791 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:41:19.880 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:41:19.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:41:19.880 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:41:19.881 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:41:20.267 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:41:20.746 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:41:20.880 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:41:20.881 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:41:20.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:41:20.882 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:41:21.223 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:41:21.701 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:41:21.882 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:41:21.882 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:41:21.883 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:41:21.883 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:41:22.180 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:41:22.658 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:41:22.884 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:41:22.884 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:41:22.884 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:41:22.884 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:41:23.135 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:41:23.611 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:41:24.089 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:41:24.567 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:41:25.044 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:41:25.522 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:41:25.999 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:41:26.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:41:26.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:41:26.477 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:41:26.478 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:41:26.478 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:41:26.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:41:26.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:41:26.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:41:26.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:41:26.497 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:41:26.497 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:41:26.497 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:41:26.497 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:41:26.498 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:41:26.498 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:41:26.498 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:41:31.498 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:41:31.498 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:41:31.498 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:41:31.499 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:41:31.500 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:41:31.501 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:41:31.508 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:41:31.509 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:41:31.509 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:41:31.509 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:41:31.509 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:41:31.512 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:41:31.512 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:41:31.512 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:41:31.512 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:41:31.512 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:41:31.513 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:41:31.513 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:41:31.513 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:41:31.515 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:41:31.515 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:41:31.515 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:41:31.515 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:41:31.515 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:41:31.515 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:41:31.515 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:41:31.515 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:41:31.518 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:41:31.518 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:41:31.518 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:41:31.518 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:41:31.518 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:41:31.518 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:41:31.518 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:41:31.518 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:41:31.521 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:41:31.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:41:31.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:41:31.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:41:31.522 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:41:31.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:41:31.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:41:31.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:41:31.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:41:31.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:41:31.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:41:31.522 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:41:31.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:41:31.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:41:31.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:41:31.522 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:41:31.522 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:41:31.522 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:41:31.522 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:41:31.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:41:31.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:41:31.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:41:31.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:41:31.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:41:31.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:41:31.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:41:31.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:41:31.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:41:31.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:41:31.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:41:31.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:41:31.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:41:31.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:41:31.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:41:31.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:41:31.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:41:31.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:41:31.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:41:31.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:41:31.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:41:31.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:41:31.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:41:31.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:41:31.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:41:31.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:41:31.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:41:31.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:41:31.527 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:41:32.005 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:41:32.043 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:41:32.045 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:41:32.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:41:32.047 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:41:32.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:41:32.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:41:32.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:41:32.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:41:32.071 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:41:32.071 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:41:32.071 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:41:32.071 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:41:32.097 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:41:32.101 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:41:32.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:41:32.116 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:41:32.116 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:41:32.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:41:32.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:41:32.481 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:41:32.525 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:41:32.525 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:41:32.525 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:41:32.525 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:41:32.958 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:41:33.435 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:41:33.525 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:41:33.526 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:41:33.526 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:41:33.526 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:41:33.911 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:41:34.390 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:41:34.526 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:41:34.526 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:41:34.527 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:41:34.527 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:41:34.868 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:41:35.346 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:41:35.527 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:41:35.527 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:41:35.527 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:41:35.528 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:41:35.824 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:41:36.303 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:41:36.528 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:41:36.528 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:41:36.529 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:41:36.529 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:41:36.780 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:41:37.257 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:41:37.736 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:41:38.214 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:41:38.691 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:41:39.168 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:41:39.644 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:41:40.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:41:40.122 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:41:40.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:41:40.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:41:40.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:41:40.150 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:41:40.150 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:41:40.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:41:40.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:41:40.153 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:41:40.153 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:41:40.153 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:41:40.153 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:41:40.165 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:41:40.167 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:41:40.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:41:40.172 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:41:40.172 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:41:40.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:41:40.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:41:40.598 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:41:41.077 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 03:41:41.555 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 03:41:42.033 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 03:41:42.511 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 03:41:42.990 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 03:41:43.468 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 03:41:43.945 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 03:41:44.424 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 03:41:44.902 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 03:41:45.381 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 03:41:45.858 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 03:41:46.332 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 03:41:46.811 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 03:41:47.290 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 03:41:47.768 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 03:41:48.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:41:48.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:41:48.178 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:41:48.178 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:41:48.189 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:41:48.189 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:41:48.189 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:41:48.189 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:41:48.191 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:41:48.191 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:41:48.191 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:41:48.191 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:41:48.191 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:41:48.191 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:41:48.191 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:41:48.191 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3561 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:41:48.191 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3561 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:41:48.191 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3561 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:41:48.191 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3561 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:41:53.200 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:41:53.200 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:41:53.203 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:41:53.206 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:41:53.207 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:41:53.209 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:41:53.219 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:41:53.221 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:41:53.221 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:41:53.222 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:41:53.222 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:41:53.227 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:41:53.227 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:41:53.228 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:41:53.228 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:41:53.228 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:41:53.229 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:41:53.229 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:41:53.229 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:41:53.232 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:41:53.232 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:41:53.233 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:41:53.233 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:41:53.233 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:41:53.233 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:41:53.233 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:41:53.234 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:41:53.237 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:41:53.237 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:41:53.237 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:41:53.237 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:41:53.237 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:41:53.237 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:41:53.238 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:41:53.238 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:41:53.242 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:41:53.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:41:53.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:41:53.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:41:53.242 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:41:53.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:41:53.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:41:53.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:41:53.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:41:53.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:41:53.243 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:41:53.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:41:53.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:41:53.243 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:41:53.243 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:41:53.243 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:41:53.244 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:41:53.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:41:53.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:41:53.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:41:53.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:41:53.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:41:53.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:41:53.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:41:53.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:41:53.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:41:53.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:41:53.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:41:53.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:41:53.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:41:53.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:41:53.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:41:53.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:41:53.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:41:53.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:41:53.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:41:53.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:41:53.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:41:53.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:41:53.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:41:53.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:41:53.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:41:53.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:41:53.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:41:53.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:41:53.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:41:53.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:41:53.248 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:41:53.729 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:41:53.768 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:41:53.769 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:41:53.770 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:41:53.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:41:53.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:41:53.790 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:41:53.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:41:53.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:41:53.797 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:41:53.797 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:41:53.798 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:41:53.798 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:41:53.821 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:41:53.825 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:41:53.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:41:53.836 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:41:53.837 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:41:53.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:41:53.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:41:54.204 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:41:54.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:41:54.247 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:41:54.247 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:41:54.248 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:41:54.682 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:41:55.158 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:41:55.247 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:41:55.248 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:41:55.248 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:41:55.249 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:41:55.637 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:41:56.115 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:41:56.249 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:41:56.249 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:41:56.249 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:41:56.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:41:56.593 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:41:57.070 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:41:57.250 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:41:57.250 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:41:57.250 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:41:57.250 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:41:57.544 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:41:58.022 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:41:58.251 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:41:58.251 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:41:58.252 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:41:58.252 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:41:58.500 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:41:58.978 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:41:59.456 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:41:59.934 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:42:00.412 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:42:00.889 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:42:01.368 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:42:01.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:42:01.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:42:01.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:42:01.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:42:01.846 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:42:01.861 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:42:01.861 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:42:01.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:42:01.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:42:01.864 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:42:01.864 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:42:01.864 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:42:01.864 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:42:01.891 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:42:01.895 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:42:01.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:42:01.906 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:42:01.906 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:42:01.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:42:01.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:42:02.323 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:42:02.800 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 03:42:03.273 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 03:42:03.752 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 03:42:04.229 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 03:42:04.707 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 03:42:05.186 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 03:42:05.665 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 03:42:06.143 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 03:42:06.619 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 03:42:07.097 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 03:42:07.575 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 03:42:08.054 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 03:42:08.530 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 03:42:09.007 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 03:42:09.485 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 03:42:09.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:42:09.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:42:09.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:42:09.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:42:09.925 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:42:09.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:42:09.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:42:09.925 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:42:09.930 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:42:09.930 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:42:09.930 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:42:09.930 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:42:09.931 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:42:09.931 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:42:09.931 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:42:09.931 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3566 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:42:09.931 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3566 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:42:09.931 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3566 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:42:09.931 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3566 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:42:09.932 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3566 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:42:09.932 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3566 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:42:14.930 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:42:14.930 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:42:14.931 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:42:14.931 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:42:14.932 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:42:14.933 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:42:14.941 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:42:14.943 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:42:14.943 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:42:14.944 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:42:14.944 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:42:14.949 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:42:14.949 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:42:14.949 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:42:14.950 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:42:14.950 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:42:14.950 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:42:14.950 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:42:14.950 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:42:14.954 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:42:14.955 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:42:14.955 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:42:14.955 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:42:14.955 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:42:14.955 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:42:14.955 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:42:14.955 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:42:14.959 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:42:14.959 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:42:14.959 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:42:14.959 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:42:14.960 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:42:14.960 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:42:14.960 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:42:14.960 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:42:14.965 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:42:14.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:42:14.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:42:14.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:42:14.965 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:42:14.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:42:14.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:42:14.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:42:14.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:42:14.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:42:14.966 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:42:14.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:42:14.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:42:14.966 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:42:14.966 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:42:14.966 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:42:14.966 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:42:14.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:42:14.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:42:14.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:42:14.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:42:14.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:42:14.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:42:14.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:42:14.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:42:14.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:42:14.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:42:14.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:42:14.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:42:14.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:42:14.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:42:14.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:42:14.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:42:14.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:42:14.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:42:14.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:42:14.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:42:14.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:42:14.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:42:14.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:42:14.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:42:14.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:42:14.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:42:14.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:42:14.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:42:14.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:42:14.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:42:14.971 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:42:15.450 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:42:15.481 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:42:15.482 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:42:15.482 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:42:15.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:42:15.490 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:42:15.490 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:42:15.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:42:15.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:42:15.492 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:42:15.492 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:42:15.492 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:42:15.492 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:42:15.493 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:42:15.493 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:42:15.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:42:15.531 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:42:15.532 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:42:15.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:42:15.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:42:15.925 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:42:15.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:42:15.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:42:15.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:42:15.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:42:16.403 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:42:16.881 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:42:16.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:42:16.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:42:16.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:42:16.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:42:17.359 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:42:17.836 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:42:17.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:42:17.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:42:17.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:42:17.974 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:42:18.314 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:42:18.791 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:42:18.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:42:18.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:42:18.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:42:18.975 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:42:19.269 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:42:19.746 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:42:19.973 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:42:19.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:42:19.974 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:42:19.976 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:42:20.221 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:42:20.699 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:42:21.178 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:42:21.656 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:42:22.134 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:42:22.613 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:42:23.091 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:42:23.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:42:23.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:42:23.539 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:42:23.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:42:23.559 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:42:23.559 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:42:23.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:42:23.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:42:23.562 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:42:23.562 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:42:23.562 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:42:23.562 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:42:23.567 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:42:23.613 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:42:23.615 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:42:23.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:42:23.627 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:42:23.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:42:23.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:42:23.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:42:24.044 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:42:24.522 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 03:42:25.000 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 03:42:25.477 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 03:42:25.954 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 03:42:26.433 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 03:42:26.910 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 03:42:27.379 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 03:42:27.857 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 03:42:28.336 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 03:42:28.814 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 03:42:29.287 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 03:42:29.766 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 03:42:30.244 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 03:42:30.722 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 03:42:31.200 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 03:42:31.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:42:31.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:42:31.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:42:31.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:42:31.646 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:42:31.646 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:42:31.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:42:31.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:42:31.648 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:42:31.648 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:42:31.648 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:42:31.648 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:42:31.648 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:42:31.648 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:42:31.648 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:42:31.648 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3566 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:42:31.648 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3566 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:42:31.648 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3566 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:42:31.648 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3566 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:42:31.648 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3566 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:42:31.648 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3566 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:42:36.653 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:42:36.653 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:42:36.654 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:42:36.655 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:42:36.656 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:42:36.657 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:42:36.670 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:42:36.670 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:42:36.670 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:42:36.670 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:42:36.670 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:42:36.672 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:42:36.672 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:42:36.672 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:42:36.672 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:42:36.672 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:42:36.673 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:42:36.673 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:42:36.673 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:42:36.674 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:42:36.674 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:42:36.674 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:42:36.674 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:42:36.674 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:42:36.674 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:42:36.674 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:42:36.674 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:42:36.676 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:42:36.676 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:42:36.676 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:42:36.676 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:42:36.676 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:42:36.676 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:42:36.676 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:42:36.676 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:42:36.679 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:42:36.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:42:36.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:42:36.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:42:36.679 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:42:36.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:42:36.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:42:36.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:42:36.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:42:36.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:42:36.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:42:36.679 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:42:36.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:42:36.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:42:36.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:42:36.680 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:42:36.680 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:42:36.680 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:42:36.680 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:42:36.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:42:36.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:42:36.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:42:36.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:42:36.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:42:36.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:42:36.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:42:36.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:42:36.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:42:36.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:42:36.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:42:36.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:42:36.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:42:36.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:42:36.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:42:36.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:42:36.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:42:36.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:42:36.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:42:36.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:42:36.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:42:36.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:42:36.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:42:36.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:42:36.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:42:36.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:42:36.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:42:36.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:42:36.684 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:42:37.166 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:42:37.194 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:42:37.195 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:42:37.195 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:42:37.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:42:37.205 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:42:37.205 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:42:37.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:42:37.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:42:37.208 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:42:37.208 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:42:37.208 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:42:37.208 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:42:37.258 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:42:37.262 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:42:37.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:42:37.277 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:42:37.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:42:37.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:42:37.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:42:37.644 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:42:37.684 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:42:37.684 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:42:37.684 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:42:37.684 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:42:38.122 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:42:38.145 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:42:38.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:42:38.150 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:42:38.151 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:42:38.151 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:42:38.151 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:42:38.153 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:42:38.153 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:42:38.153 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:42:38.153 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:42:38.153 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:42:38.153 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:42:38.153 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:42:38.153 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=314 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:42:38.153 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=314 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:42:38.153 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=314 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:42:38.153 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=314 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:42:43.157 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:42:43.157 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:42:43.162 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:42:43.166 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:42:43.169 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:42:43.171 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:42:43.179 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:42:43.180 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:42:43.180 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:42:43.181 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:42:43.181 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:42:43.184 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:42:43.184 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:42:43.184 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:42:43.184 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:42:43.185 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:42:43.185 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:42:43.185 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:42:43.185 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:42:43.188 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:42:43.188 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:42:43.188 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:42:43.188 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:42:43.188 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:42:43.188 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:42:43.189 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:42:43.189 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:42:43.191 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:42:43.191 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:42:43.191 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:42:43.191 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:42:43.192 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:42:43.192 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:42:43.192 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:42:43.192 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:42:43.195 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:42:43.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:42:43.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:42:43.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:42:43.196 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:42:43.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:42:43.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:42:43.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:42:43.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:42:43.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:42:43.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:42:43.196 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:42:43.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:42:43.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:42:43.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:42:43.196 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:42:43.196 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:42:43.196 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:42:43.196 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:42:43.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:42:43.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:42:43.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:42:43.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:42:43.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:42:43.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:42:43.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:42:43.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:42:43.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:42:43.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:42:43.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:42:43.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:42:43.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:42:43.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:42:43.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:42:43.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:42:43.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:42:43.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:42:43.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:42:43.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:42:43.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:42:43.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:42:43.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:42:43.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:42:43.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:42:43.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:42:43.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:42:43.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:42:43.201 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:42:43.679 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:42:43.711 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:42:43.711 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:42:43.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:42:43.712 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:42:43.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:42:43.719 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:42:43.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:42:43.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:42:43.721 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:42:43.721 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:42:43.721 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:42:43.721 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:42:43.771 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:42:43.776 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:42:43.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:42:43.790 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:42:43.791 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:42:43.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:42:43.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:42:44.156 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:42:44.201 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:42:44.201 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:42:44.201 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:42:44.201 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:42:44.634 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:42:45.111 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:42:45.202 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:42:45.202 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:42:45.202 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:42:45.202 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:42:45.589 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:42:46.067 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:42:46.203 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:42:46.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:42:46.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:42:46.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:42:46.546 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:42:47.025 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:42:47.204 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:42:47.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:42:47.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:42:47.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:42:47.499 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:42:47.970 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:42:48.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:42:48.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:42:48.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:42:48.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:42:48.443 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:42:48.921 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:42:49.400 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:42:49.880 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:42:50.359 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:42:50.837 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:42:51.315 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:42:51.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:42:51.793 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:42:51.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:42:51.796 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:42:51.796 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:42:51.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:42:51.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:42:51.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:42:51.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:42:51.816 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:42:51.816 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:42:51.816 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:42:51.816 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:42:51.839 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:42:51.843 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:42:51.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:42:51.855 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:42:51.855 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:42:51.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:42:51.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:42:52.271 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:42:52.750 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 03:42:53.226 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 03:42:53.704 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 03:42:54.182 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 03:42:54.660 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 03:42:55.138 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 03:42:55.617 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 03:42:56.095 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 03:42:56.572 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 03:42:57.050 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 03:42:57.529 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 03:42:58.007 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 03:42:58.485 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 03:42:58.963 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 03:42:59.442 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 03:42:59.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:42:59.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:42:59.856 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:42:59.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:42:59.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:42:59.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:42:59.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:42:59.858 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:42:59.859 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:42:59.859 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:42:59.859 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:42:59.859 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:42:59.859 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:42:59.859 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:42:59.859 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:42:59.859 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3560 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:42:59.859 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3560 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:43:04.864 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:43:04.864 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:43:04.866 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:43:04.867 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:43:04.868 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:43:04.870 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:43:04.877 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:43:04.878 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:43:04.878 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:43:04.878 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:43:04.878 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:43:04.879 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:43:04.880 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:43:04.880 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:43:04.880 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:43:04.880 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:43:04.880 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:43:04.880 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:43:04.881 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:43:04.882 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:43:04.882 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:43:04.882 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:43:04.882 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:43:04.882 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:43:04.882 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:43:04.882 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:43:04.882 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:43:04.884 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:43:04.884 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:43:04.884 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:43:04.884 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:43:04.884 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:43:04.884 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:43:04.884 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:43:04.884 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:43:04.887 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:43:04.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:43:04.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:43:04.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:43:04.887 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:43:04.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:43:04.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:43:04.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:43:04.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:43:04.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:43:04.887 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:43:04.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:43:04.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:43:04.887 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:43:04.887 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:43:04.887 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:43:04.888 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:43:04.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:43:04.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:43:04.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:43:04.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:43:04.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:43:04.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:43:04.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:43:04.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:43:04.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:43:04.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:43:04.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:43:04.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:43:04.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:43:04.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:43:04.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:43:04.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:43:04.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:43:04.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:43:04.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:43:04.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:43:04.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:43:04.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:43:04.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:43:04.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:43:04.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:43:04.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:43:04.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:43:04.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:43:04.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:43:04.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:43:04.892 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:43:05.376 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:43:05.401 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:43:05.402 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:43:05.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:43:05.402 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:43:05.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:43:05.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:43:05.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:43:05.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:43:05.415 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:43:05.415 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:43:05.415 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:43:05.415 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:43:05.421 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:43:05.423 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:43:05.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:43:05.456 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:43:05.457 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:43:05.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:43:05.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:43:05.853 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:43:05.891 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:43:05.891 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:43:05.891 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:43:05.891 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:43:06.331 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:43:06.809 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:43:06.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:43:06.892 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:43:06.892 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:43:06.892 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:43:07.287 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:43:07.764 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:43:07.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:43:07.893 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:43:07.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:43:07.893 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:43:08.241 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:43:08.719 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:43:08.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:43:08.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:43:08.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:43:08.894 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:43:09.196 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:43:09.673 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:43:09.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:43:09.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:43:09.896 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:43:09.896 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:43:10.150 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:43:10.628 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:43:11.106 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:43:11.584 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:43:12.062 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:43:12.540 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:43:13.018 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:43:13.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:43:13.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:43:13.458 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:43:13.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:43:13.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:43:13.466 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:43:13.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:43:13.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:43:13.468 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:43:13.468 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:43:13.468 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:43:13.468 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:43:13.485 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:43:13.486 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:43:13.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:43:13.488 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:43:13.488 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:43:13.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:43:13.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:43:13.493 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:43:13.961 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:43:14.432 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 03:43:14.904 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 03:43:15.375 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 03:43:15.845 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 03:43:16.314 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 03:43:16.784 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 03:43:17.254 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 03:43:17.723 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 03:43:18.192 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 03:43:18.662 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 03:43:19.133 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 03:43:19.602 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 03:43:20.071 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 03:43:20.541 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 03:43:21.015 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 03:43:21.489 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 03:43:21.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:43:21.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:43:21.495 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:43:21.496 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:43:21.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:43:21.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:43:21.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:43:21.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:43:21.516 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:43:21.516 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:43:21.516 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:43:21.516 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:43:21.532 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:43:21.534 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:43:21.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:43:21.542 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:43:21.542 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:43:21.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:43:21.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:43:21.964 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 03:43:22.437 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 03:43:22.907 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 03:43:23.379 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 03:43:23.849 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 03:43:24.319 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 03:43:24.788 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 03:43:25.259 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 03:43:25.726 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 03:43:26.197 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 03:43:26.668 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 03:43:27.138 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 03:43:27.609 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 03:43:28.079 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 03:43:28.548 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 03:43:29.019 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 03:43:29.489 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 03:43:29.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:43:29.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:43:29.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:43:29.543 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:43:29.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:43:29.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:43:29.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:43:29.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:43:29.550 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:43:29.550 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:43:29.550 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:43:29.550 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:43:29.576 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:43:29.577 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:43:29.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:43:29.580 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:43:29.580 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:43:29.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:43:29.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:43:29.958 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 03:43:30.429 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 03:43:30.900 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 03:43:31.370 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 03:43:31.841 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 03:43:32.312 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 03:43:32.780 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 03:43:33.250 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-15 03:43:33.720 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-15 03:43:34.190 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-15 03:43:34.661 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-15 03:43:35.132 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-15 03:43:35.603 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-15 03:43:36.074 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-15 03:43:36.545 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-15 03:43:37.015 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-15 03:43:37.486 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-15 03:43:37.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:43:37.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:43:37.581 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:43:37.581 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:43:37.583 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:43:37.583 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:43:37.583 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:43:37.583 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:43:37.584 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:43:37.584 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:43:37.584 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:43:37.584 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:43:37.584 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:43:37.585 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:43:37.585 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:43:42.589 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:43:42.590 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:43:42.594 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:43:42.597 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:43:42.599 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:43:42.600 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:43:42.611 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:43:42.613 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:43:42.613 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:43:42.614 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:43:42.614 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:43:42.622 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:43:42.623 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:43:42.623 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:43:42.623 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:43:42.624 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:43:42.624 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:43:42.625 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:43:42.625 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:43:42.628 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:43:42.629 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:43:42.629 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:43:42.629 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:43:42.629 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:43:42.630 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:43:42.630 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:43:42.630 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:43:42.634 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:43:42.634 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:43:42.634 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:43:42.634 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:43:42.635 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:43:42.635 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:43:42.635 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:43:42.635 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:43:42.640 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:43:42.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:43:42.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:43:42.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:43:42.640 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:43:42.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:43:42.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:43:42.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:43:42.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:43:42.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:43:42.641 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:43:42.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:43:42.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:43:42.641 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:43:42.641 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:43:42.641 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:43:42.641 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:43:42.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:43:42.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:43:42.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:43:42.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:43:42.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:43:42.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:43:42.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:43:42.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:43:42.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:43:42.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:43:42.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:43:42.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:43:42.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:43:42.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:43:42.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:43:42.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:43:42.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:43:42.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:43:42.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:43:42.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:43:42.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:43:42.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:43:42.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:43:42.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:43:42.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:43:42.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:43:42.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:43:42.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:43:42.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:43:42.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:43:42.646 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:43:43.129 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:43:43.168 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:43:43.170 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:43:43.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:43:43.173 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:43:43.197 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:43:43.197 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:43:43.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:43:43.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:43:43.203 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:43:43.204 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:43:43.204 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:43:43.204 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:43:43.222 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:43:43.225 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:43:43.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:43:43.236 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:43:43.236 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:43:43.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:43:43.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:43:43.607 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:43:43.645 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:43:43.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:43:43.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:43:43.647 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:43:44.085 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:43:44.563 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:43:44.646 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:43:44.646 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:43:44.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:43:44.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:43:45.041 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:43:45.518 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:43:45.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:43:45.647 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:43:45.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:43:45.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:43:45.997 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:43:46.475 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:43:46.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:43:46.648 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:43:46.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:43:46.650 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:43:46.953 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:43:47.431 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:43:47.649 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:43:47.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:43:47.649 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:43:47.650 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:43:47.909 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:43:48.386 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:43:48.864 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:43:49.342 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:43:49.820 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:43:50.298 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:43:50.776 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:43:51.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:43:51.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:43:51.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:43:51.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:43:51.254 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:43:51.262 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:43:51.262 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:43:51.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:43:51.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:43:51.264 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:43:51.264 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:43:51.264 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:43:51.264 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:43:51.300 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:43:51.306 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:43:51.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:43:51.313 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:43:51.314 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:43:51.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:43:51.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:43:51.732 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:43:52.210 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 03:43:52.689 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 03:43:53.167 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 03:43:53.644 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 03:43:54.123 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 03:43:54.601 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 03:43:55.079 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 03:43:55.556 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 03:43:56.033 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 03:43:56.512 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 03:43:56.991 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 03:43:57.469 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 03:43:57.947 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 03:43:58.426 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 03:43:58.904 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 03:43:59.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:43:59.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:43:59.319 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:43:59.319 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:43:59.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:43:59.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:43:59.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:43:59.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:43:59.340 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:43:59.340 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:43:59.340 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:43:59.340 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:43:59.375 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:43:59.378 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:43:59.382 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 03:43:59.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:43:59.389 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:43:59.389 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:43:59.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:43:59.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:43:59.860 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 03:44:00.337 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 03:44:00.816 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 03:44:01.294 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 03:44:01.772 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 03:44:02.250 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 03:44:02.728 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 03:44:03.206 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 03:44:03.684 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 03:44:04.162 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 03:44:04.640 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 03:44:05.119 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 03:44:05.597 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 03:44:06.075 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 03:44:06.553 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 03:44:07.031 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 03:44:07.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:44:07.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:44:07.395 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:44:07.395 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:44:07.413 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:44:07.413 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:44:07.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:44:07.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:44:07.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:44:07.416 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:44:07.416 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:44:07.416 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:44:07.451 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:44:07.456 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:44:07.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:44:07.464 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:44:07.465 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:44:07.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:44:07.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:44:07.509 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 03:44:07.987 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 03:44:08.465 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 03:44:08.942 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 03:44:09.420 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 03:44:09.898 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 03:44:10.375 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 03:44:10.853 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 03:44:11.330 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-15 03:44:11.808 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-15 03:44:12.286 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-15 03:44:12.764 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-15 03:44:13.242 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-15 03:44:13.719 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-15 03:44:14.197 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-15 03:44:14.675 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-15 03:44:15.153 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-15 03:44:15.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:44:15.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:44:15.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:44:15.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:44:15.486 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:44:15.486 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:44:15.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:44:15.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:44:15.488 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:44:15.488 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:44:15.488 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:44:15.488 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:44:15.527 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:44:15.531 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:44:15.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:44:15.542 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:44:15.542 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:44:15.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:44:15.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:44:15.631 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-15 03:44:16.108 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-15 03:44:16.586 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-15 03:44:17.065 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-15 03:44:17.543 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-15 03:44:18.021 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-15 03:44:18.499 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-15 03:44:18.977 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-15 03:44:19.456 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-15 03:44:19.933 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-15 03:44:20.412 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-15 03:44:20.890 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-15 03:44:21.369 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-15 03:44:21.848 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-15 03:44:22.325 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-15 03:44:22.803 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-15 03:44:23.281 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-15 03:44:23.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:44:23.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:44:23.549 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:44:23.549 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:44:23.567 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:44:23.567 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:44:23.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:44:23.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:44:23.569 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:44:23.569 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:44:23.569 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:44:23.569 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:44:23.608 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:44:23.613 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:44:23.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:44:23.621 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:44:23.621 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:44:23.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:44:23.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:44:23.758 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-15 03:44:24.234 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-15 03:44:24.713 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2025-12-15 03:44:25.191 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2025-12-15 03:44:25.669 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2025-12-15 03:44:26.147 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2025-12-15 03:44:26.626 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2025-12-15 03:44:27.104 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2025-12-15 03:44:27.582 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2025-12-15 03:44:28.060 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2025-12-15 03:44:28.538 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2025-12-15 03:44:29.016 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2025-12-15 03:44:29.494 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2025-12-15 03:44:29.973 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2025-12-15 03:44:30.451 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2025-12-15 03:44:30.930 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2025-12-15 03:44:31.407 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2025-12-15 03:44:31.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:44:31.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:44:31.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:44:31.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:44:31.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:44:31.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:44:31.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:44:31.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:44:31.638 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:44:31.638 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:44:31.638 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:44:31.638 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:44:31.639 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:44:31.640 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:44:31.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:44:31.642 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:44:31.642 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:44:31.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:44:31.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:44:31.884 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2025-12-15 03:44:32.363 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2025-12-15 03:44:32.841 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2025-12-15 03:44:33.319 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2025-12-15 03:44:33.798 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2025-12-15 03:44:34.276 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2025-12-15 03:44:34.753 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2025-12-15 03:44:35.231 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2025-12-15 03:44:35.709 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2025-12-15 03:44:36.187 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2025-12-15 03:44:36.665 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2025-12-15 03:44:37.143 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2025-12-15 03:44:37.622 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2025-12-15 03:44:38.100 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2025-12-15 03:44:38.577 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2025-12-15 03:44:39.054 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2025-12-15 03:44:39.533 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2025-12-15 03:44:39.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:44:39.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:44:39.648 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:44:39.648 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:44:39.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:44:39.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:44:39.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:44:39.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:44:39.668 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:44:39.668 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:44:39.668 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:44:39.668 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:44:39.717 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:44:39.722 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:44:39.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:44:39.731 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:44:39.731 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:44:39.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:44:39.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:44:40.010 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2025-12-15 03:44:40.488 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2025-12-15 03:44:40.967 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2025-12-15 03:44:41.445 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2025-12-15 03:44:41.923 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2025-12-15 03:44:42.400 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2025-12-15 03:44:42.878 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2025-12-15 03:44:43.356 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2025-12-15 03:44:43.834 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2025-12-15 03:44:44.312 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2025-12-15 03:44:44.790 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2025-12-15 03:44:45.268 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2025-12-15 03:44:45.746 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2025-12-15 03:44:46.224 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2025-12-15 03:44:46.702 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2025-12-15 03:44:47.180 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2025-12-15 03:44:47.658 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2025-12-15 03:44:47.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:44:47.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:44:47.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:44:47.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:44:47.751 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:44:47.751 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:44:47.752 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:44:47.752 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:44:47.753 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:44:47.754 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:44:47.754 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:44:47.754 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:44:47.754 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:44:47.754 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:44:47.754 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:44:47.754 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=13894 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:44:47.754 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=13894 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:44:47.754 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=13894 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:44:47.754 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=13894 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:44:47.754 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=13894 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:44:47.754 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=13894 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:44:47.754 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=13894 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:44:52.758 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:44:52.758 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:44:52.762 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:44:52.766 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:44:52.770 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:44:52.771 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:44:52.784 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:44:52.785 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:44:52.785 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:44:52.786 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:44:52.786 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:44:52.789 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:44:52.789 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:44:52.789 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:44:52.790 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:44:52.790 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:44:52.790 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:44:52.790 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:44:52.790 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:44:52.792 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:44:52.792 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:44:52.792 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:44:52.792 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:44:52.792 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:44:52.792 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:44:52.793 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:44:52.793 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:44:52.794 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:44:52.794 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:44:52.794 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:44:52.794 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:44:52.794 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:44:52.794 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:44:52.794 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:44:52.794 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:44:52.797 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:44:52.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:44:52.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:44:52.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:44:52.797 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:44:52.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:44:52.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:44:52.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:44:52.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:44:52.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:44:52.797 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:44:52.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:44:52.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:44:52.797 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:44:52.797 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:44:52.797 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:44:52.797 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:44:52.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:44:52.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:44:52.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:44:52.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:44:52.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:44:52.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:44:52.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:44:52.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:44:52.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:44:52.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:44:52.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:44:52.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:44:52.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:44:52.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:44:52.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:44:52.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:44:52.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:44:52.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:44:52.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:44:52.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:44:52.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:44:52.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:44:52.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:44:52.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:44:52.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:44:52.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:44:52.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:44:52.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:44:52.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:44:52.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:44:52.802 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:44:53.287 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:44:53.312 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:44:53.313 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:44:53.314 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:44:53.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:44:53.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:44:53.331 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:44:53.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:44:53.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:44:53.338 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:44:53.339 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:44:53.339 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:44:53.339 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:44:53.379 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:44:53.383 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:44:53.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:44:53.398 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:44:53.398 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:44:53.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:44:53.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:44:53.764 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:44:53.800 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:44:53.800 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:44:53.800 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:44:53.800 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:44:54.243 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:44:54.722 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:44:54.801 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:44:54.801 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:44:54.802 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:44:54.802 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:44:55.201 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:44:55.680 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:44:55.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:44:55.803 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:44:55.803 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:44:55.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:44:56.158 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:44:56.637 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:44:56.803 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:44:56.804 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:44:56.804 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:44:56.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:44:57.114 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:44:57.592 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:44:57.805 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:44:57.805 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:44:57.806 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:44:57.806 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:44:58.070 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:44:58.549 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:44:59.027 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:44:59.506 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:44:59.985 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:45:00.463 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:45:00.942 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:45:01.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:45:01.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:45:01.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:45:01.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:45:01.420 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:45:01.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:45:01.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:45:01.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:45:01.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:45:01.423 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:45:01.423 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:45:01.423 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:45:01.423 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:45:01.466 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:45:01.470 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:45:01.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:45:01.482 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:45:01.482 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:45:01.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:45:01.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:45:01.899 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:45:02.377 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 03:45:02.855 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 03:45:03.334 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 03:45:03.812 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 03:45:04.290 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 03:45:04.769 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 03:45:05.247 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 03:45:05.725 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 03:45:06.204 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 03:45:06.683 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 03:45:07.161 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 03:45:07.639 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 03:45:08.118 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 03:45:08.595 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 03:45:09.073 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 03:45:09.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:45:09.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:45:09.488 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:45:09.488 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:45:09.499 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:45:09.499 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:45:09.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:45:09.499 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:45:09.501 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:45:09.501 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:45:09.501 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:45:09.501 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:45:09.501 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:45:09.501 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:45:09.501 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:45:14.504 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:45:14.505 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:45:14.506 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:45:14.507 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:45:14.508 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:45:14.508 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:45:14.517 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:45:14.519 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:45:14.519 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:45:14.519 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:45:14.519 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:45:14.522 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:45:14.523 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:45:14.523 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:45:14.523 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:45:14.523 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:45:14.524 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:45:14.524 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:45:14.524 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:45:14.526 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:45:14.526 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:45:14.526 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:45:14.526 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:45:14.527 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:45:14.527 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:45:14.527 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:45:14.527 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:45:14.529 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:45:14.529 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:45:14.529 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:45:14.529 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:45:14.529 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:45:14.529 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:45:14.529 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:45:14.529 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:45:14.533 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:45:14.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:45:14.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:45:14.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:45:14.533 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:45:14.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:45:14.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:45:14.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:45:14.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:45:14.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:45:14.533 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:45:14.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:45:14.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:45:14.533 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:45:14.533 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:45:14.533 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:45:14.533 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:45:14.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:45:14.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:45:14.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:45:14.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:45:14.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:45:14.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:45:14.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:45:14.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:45:14.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:45:14.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:45:14.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:45:14.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:45:14.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:45:14.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:45:14.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:45:14.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:45:14.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:45:14.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:45:14.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:45:14.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:45:14.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:45:14.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:45:14.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:45:14.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:45:14.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:45:14.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:45:14.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:45:14.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:45:14.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:45:14.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:45:14.538 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:45:15.021 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:45:15.059 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:45:15.061 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:45:15.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:45:15.063 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:45:15.089 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:45:15.089 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:45:15.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:45:15.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:45:15.091 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:45:15.091 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:45:15.091 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:45:15.091 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:45:15.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:45:15.125 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:45:15.126 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:45:15.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:45:15.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:45:15.498 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:45:15.537 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:45:15.537 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:45:15.537 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:45:15.537 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:45:15.977 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:45:16.455 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:45:16.538 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:45:16.538 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:45:16.538 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:45:16.538 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:45:16.934 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:45:17.412 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:45:17.538 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:45:17.539 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:45:17.539 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:45:17.539 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:45:17.890 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:45:18.369 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:45:18.539 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:45:18.539 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:45:18.539 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:45:18.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:45:18.847 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:45:19.326 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:45:19.540 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:45:19.540 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:45:19.540 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:45:19.541 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:45:19.804 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:45:20.283 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:45:20.761 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:45:21.239 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:45:21.717 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:45:22.196 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:45:22.674 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:45:23.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:45:23.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:45:23.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:45:23.137 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:45:23.152 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:45:23.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:45:23.155 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:45:23.155 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:45:23.155 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:45:23.156 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:45:23.156 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:45:23.156 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:45:23.156 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:45:23.156 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:45:23.156 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:45:23.156 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:45:28.160 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:45:28.160 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:45:28.162 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:45:28.163 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:45:28.163 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:45:28.164 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:45:28.173 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:45:28.174 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:45:28.174 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:45:28.175 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:45:28.175 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:45:28.178 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:45:28.178 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:45:28.179 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:45:28.179 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:45:28.179 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:45:28.179 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:45:28.180 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:45:28.180 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:45:28.182 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:45:28.182 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:45:28.182 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:45:28.182 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:45:28.182 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:45:28.182 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:45:28.183 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:45:28.183 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:45:28.185 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:45:28.185 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:45:28.185 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:45:28.185 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:45:28.185 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:45:28.185 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:45:28.185 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:45:28.185 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:45:28.189 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:45:28.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:45:28.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:45:28.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:45:28.189 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:45:28.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:45:28.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:45:28.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:45:28.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:45:28.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:45:28.189 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:45:28.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:45:28.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:45:28.189 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:45:28.189 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:45:28.189 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:45:28.189 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:45:28.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:45:28.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:45:28.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:45:28.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:45:28.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:45:28.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:45:28.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:45:28.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:45:28.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:45:28.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:45:28.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:45:28.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:45:28.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:45:28.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:45:28.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:45:28.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:45:28.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:45:28.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:45:28.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:45:28.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:45:28.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:45:28.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:45:28.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:45:28.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:45:28.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:45:28.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:45:28.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:45:28.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:45:28.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:45:28.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:45:28.194 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:45:28.676 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:45:28.713 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:45:28.714 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:45:28.716 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:45:28.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:45:28.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:45:28.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:45:28.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:45:28.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:45:28.738 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:45:28.739 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:45:28.739 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:45:28.739 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:45:28.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:45:28.778 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:45:28.779 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:45:28.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:45:28.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:45:29.154 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:45:29.193 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:45:29.194 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:45:29.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:45:29.194 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:45:29.632 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:45:30.111 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:45:30.194 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:45:30.195 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:45:30.195 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:45:30.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:45:30.589 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:45:31.067 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:45:31.195 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:45:31.195 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:45:31.196 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:45:31.196 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:45:31.545 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:45:32.023 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:45:32.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:45:32.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:45:32.197 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:45:32.197 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:45:32.501 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:45:32.979 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:45:33.197 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:45:33.197 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:45:33.198 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:45:33.198 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:45:33.457 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:45:33.935 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:45:34.413 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:45:34.892 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:45:35.370 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:45:35.848 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:45:36.327 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:45:36.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:45:36.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:45:36.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:45:36.790 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:45:36.805 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:45:36.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:45:36.808 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:45:36.808 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:45:36.808 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:45:36.809 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:45:36.809 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:45:36.809 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:45:36.809 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:45:36.809 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:45:36.809 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:45:36.809 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:45:41.814 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:45:41.814 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:45:41.814 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:45:41.815 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:45:41.816 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:45:41.817 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:45:41.822 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:45:41.824 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:45:41.824 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:45:41.824 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:45:41.824 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:45:41.834 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:45:41.834 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:45:41.834 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:45:41.834 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:45:41.834 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:45:41.834 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:45:41.835 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:45:41.835 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:45:41.837 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:45:41.837 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:45:41.837 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:45:41.837 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:45:41.837 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:45:41.837 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:45:41.837 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:45:41.837 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:45:41.839 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:45:41.839 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:45:41.839 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:45:41.840 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:45:41.840 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:45:41.840 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:45:41.840 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:45:41.840 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:45:41.842 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:45:41.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:45:41.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:45:41.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:45:41.842 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:45:41.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:45:41.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:45:41.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:45:41.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:45:41.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:45:41.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:45:41.843 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:45:41.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:45:41.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:45:41.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:45:41.843 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:45:41.843 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:45:41.843 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:45:41.843 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:45:41.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:45:41.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:45:41.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:45:41.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:45:41.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:45:41.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:45:41.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:45:41.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:45:41.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:45:41.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:45:41.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:45:41.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:45:41.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:45:41.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:45:41.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:45:41.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:45:41.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:45:41.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:45:41.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:45:41.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:45:41.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:45:41.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:45:41.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:45:41.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:45:41.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:45:41.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:45:41.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:45:41.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:45:41.848 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:45:42.332 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:45:42.360 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:45:42.361 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:45:42.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:45:42.363 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:45:42.382 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:45:42.382 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:45:42.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:45:42.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:45:42.388 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:45:42.388 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:45:42.389 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:45:42.389 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:45:42.809 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:45:42.846 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:45:42.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:45:42.846 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:45:42.846 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:45:43.287 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:45:43.764 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:45:43.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:45:43.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:45:43.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:45:43.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:45:44.242 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:45:44.720 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:45:44.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:45:44.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:45:44.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:45:44.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:45:45.197 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:45:45.675 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:45:45.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:45:45.849 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:45:45.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:45:45.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:45:46.153 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:45:46.631 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:45:46.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:45:46.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:45:46.850 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:45:46.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:45:47.109 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:45:47.587 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:45:48.065 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:45:48.543 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:45:48.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:45:48.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:45:48.889 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:45:48.889 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:45:48.889 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:45:48.889 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:45:48.890 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:45:48.890 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:45:48.890 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:45:48.890 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:45:48.890 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:45:48.890 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:45:48.891 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1505 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:45:48.891 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:45:48.891 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1505 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:45:48.891 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1505 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:45:53.896 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:45:53.896 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:45:53.898 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:45:53.899 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:45:53.899 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:45:53.900 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:45:53.908 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:45:53.909 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:45:53.909 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:45:53.909 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:45:53.909 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:45:53.911 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:45:53.911 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:45:53.912 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:45:53.912 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:45:53.912 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:45:53.912 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:45:53.912 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:45:53.913 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:45:53.914 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:45:53.914 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:45:53.914 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:45:53.914 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:45:53.915 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:45:53.915 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:45:53.915 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:45:53.915 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:45:53.917 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:45:53.917 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:45:53.917 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:45:53.917 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:45:53.917 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:45:53.918 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:45:53.918 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:45:53.918 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:45:53.921 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:45:53.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:45:53.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:45:53.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:45:53.921 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:45:53.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:45:53.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:45:53.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:45:53.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:45:53.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:45:53.922 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:45:53.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:45:53.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:45:53.922 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:45:53.922 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:45:53.922 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:45:53.922 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:45:53.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:45:53.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:45:53.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:45:53.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:45:53.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:45:53.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:45:53.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:45:53.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:45:53.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:45:53.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:45:53.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:45:53.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:45:53.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:45:53.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:45:53.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:45:53.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:45:53.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:45:53.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:45:53.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:45:53.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:45:53.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:45:53.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:45:53.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:45:53.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:45:53.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:45:53.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:45:53.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:45:53.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:45:53.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:45:53.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:45:53.927 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:45:54.408 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:45:54.448 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:45:54.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:45:54.449 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:45:54.450 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:45:54.469 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:45:54.469 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:45:54.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:45:54.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:45:54.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:45:54.479 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:45:54.479 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:45:54.479 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:45:54.885 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:45:54.926 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:45:54.926 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:45:54.926 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:45:54.926 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:45:55.363 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:45:55.840 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:45:55.927 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:45:55.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:45:55.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:45:55.927 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:45:56.318 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:45:56.796 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:45:56.928 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:45:56.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:45:56.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:45:56.928 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:45:57.274 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:45:57.751 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:45:57.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:45:57.929 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:45:57.929 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:45:57.929 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:45:58.229 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:45:58.707 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:45:58.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:45:58.930 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:45:58.930 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:45:58.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:45:58.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:45:58.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:45:58.966 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:45:58.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:45:58.967 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:45:58.967 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:45:58.967 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:45:58.967 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:45:58.967 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:45:58.967 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:45:59.186 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:45:59.673 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:46:00.160 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:46:00.646 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:46:01.131 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:46:01.617 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:46:02.104 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:46:02.590 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:46:03.077 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:46:03.564 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 03:46:03.971 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:46:03.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:46:03.972 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:46:03.973 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:46:03.973 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:46:03.974 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:46:03.975 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:46:03.975 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:46:03.976 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:46:03.983 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:46:03.984 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:46:03.984 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:46:03.984 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:46:03.984 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:46:03.985 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:46:03.986 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:46:03.986 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:46:03.986 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:46:03.986 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:46:03.986 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:46:03.986 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:46:03.986 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:46:03.988 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:46:03.989 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:46:03.989 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:46:03.989 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:46:03.989 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:46:03.989 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:46:03.989 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:46:03.989 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:46:03.991 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:46:03.991 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:46:03.991 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:46:03.991 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:46:03.991 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:46:03.991 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:46:03.991 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:46:03.991 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:46:03.994 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:46:03.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:46:03.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:46:03.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:46:03.994 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:46:03.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:46:03.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:46:03.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:46:03.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:46:03.994 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:46:03.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:03.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:03.994 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:46:03.994 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:46:03.994 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:46:03.994 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:46:03.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:03.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:03.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:03.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:46:03.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:03.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:03.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:03.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:03.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:03.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:03.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:03.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:03.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:03.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:03.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:03.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:03.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:03.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:03.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:03.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:03.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:03.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:03.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:03.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:03.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:03.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:03.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:03.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:03.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:03.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:03.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:03.996 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:46:03.996 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:46:03.996 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:46:03.996 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:46:03.996 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:46:03.996 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:46:03.996 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:46:09.002 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:46:09.002 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:46:09.004 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:46:09.004 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:46:09.005 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:46:09.006 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:46:09.015 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:46:09.016 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:46:09.016 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:46:09.016 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:46:09.016 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:46:09.019 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:46:09.019 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:46:09.019 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:46:09.019 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:46:09.019 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:46:09.019 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:46:09.019 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:46:09.019 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:46:09.022 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:46:09.022 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:46:09.023 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:46:09.023 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:46:09.023 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:46:09.023 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:46:09.023 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:46:09.023 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:46:09.026 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:46:09.026 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:46:09.026 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:46:09.026 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:46:09.026 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:46:09.026 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:46:09.026 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:46:09.026 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:46:09.030 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:46:09.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:46:09.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:46:09.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:46:09.030 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:46:09.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:46:09.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:46:09.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:46:09.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:09.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:46:09.031 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:46:09.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:09.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:09.031 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:46:09.031 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:46:09.031 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:46:09.031 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:46:09.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:09.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:09.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:09.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:46:09.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:09.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:09.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:09.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:09.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:09.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:09.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:09.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:09.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:09.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:09.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:09.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:09.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:09.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:09.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:09.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:09.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:09.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:09.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:09.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:09.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:09.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:09.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:09.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:09.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:09.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:09.035 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:46:09.519 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:46:09.548 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:46:09.549 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:46:09.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:46:09.550 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:46:09.567 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:46:09.568 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:46:09.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:46:09.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:46:09.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:46:09.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:46:09.577 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:46:09.577 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:46:09.997 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:46:10.033 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:46:10.034 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:46:10.034 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:46:10.034 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:46:10.475 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:46:10.953 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:46:11.034 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:46:11.034 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:46:11.035 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:46:11.035 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:46:11.431 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:46:11.909 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:46:12.035 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:46:12.035 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:46:12.035 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:46:12.035 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:46:12.387 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:46:12.865 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:46:13.036 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:46:13.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:46:13.036 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:46:13.036 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:46:13.342 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:46:13.820 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:46:14.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:46:14.038 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:46:14.038 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:46:14.038 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:46:14.298 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:46:14.776 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:46:15.077 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:46:15.254 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:46:15.732 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:46:16.079 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:46:16.210 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:46:16.688 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:46:17.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:46:17.166 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:46:17.644 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:46:18.081 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:46:18.123 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:46:18.600 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 03:46:19.078 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 03:46:19.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:46:19.084 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:46:19.556 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 03:46:20.035 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 03:46:20.513 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 03:46:20.992 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 03:46:21.470 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 03:46:21.949 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 03:46:22.142 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:46:22.427 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 03:46:22.905 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 03:46:23.143 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:46:23.383 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 03:46:23.860 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 03:46:24.144 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:46:24.338 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 03:46:24.815 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 03:46:25.145 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:46:25.292 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 03:46:25.769 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 03:46:26.147 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:46:26.247 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 03:46:26.725 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 03:46:27.147 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:46:27.202 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 03:46:27.679 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 03:46:28.157 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 03:46:28.635 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 03:46:29.112 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 03:46:29.219 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:46:29.219 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:46:29.230 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:46:29.230 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:46:29.230 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:46:29.230 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:46:29.232 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:46:29.232 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:46:29.232 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:46:29.232 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:46:29.232 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:46:29.232 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:46:29.232 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:46:29.232 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4311 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:46:29.232 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4311 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:46:29.232 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4311 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:46:29.232 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4311 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:46:29.232 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4311 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:46:34.236 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:46:34.236 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:46:34.237 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:46:34.237 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:46:34.238 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:46:34.239 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:46:34.248 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:46:34.250 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:46:34.250 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:46:34.251 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:46:34.251 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:46:34.256 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:46:34.256 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:46:34.256 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:46:34.256 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:46:34.257 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:46:34.257 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:46:34.257 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:46:34.257 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:46:34.261 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:46:34.261 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:46:34.262 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:46:34.262 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:46:34.262 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:46:34.262 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:46:34.263 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:46:34.263 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:46:34.265 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:46:34.266 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:46:34.266 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:46:34.266 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:46:34.266 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:46:34.266 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:46:34.267 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:46:34.267 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:46:34.271 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:46:34.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:46:34.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:46:34.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:46:34.271 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:46:34.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:46:34.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:46:34.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:46:34.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:34.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:46:34.272 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:46:34.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:34.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:34.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:34.272 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:46:34.272 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:46:34.272 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:46:34.273 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:46:34.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:34.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:34.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:34.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:46:34.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:34.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:34.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:34.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:34.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:34.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:34.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:34.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:34.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:34.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:34.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:34.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:34.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:34.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:34.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:34.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:34.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:34.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:34.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:34.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:34.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:34.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:34.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:34.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:34.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:34.277 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:46:34.761 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:46:34.795 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:46:34.797 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:46:34.798 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:46:34.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:46:34.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:46:34.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:46:34.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:46:34.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:46:34.818 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:46:34.818 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:46:34.818 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:46:34.818 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:46:34.854 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:46:34.858 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:46:34.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD NOHANDOVER
2025-12-15 03:46:34.866 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:46:34.866 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:46:34.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:46:34.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:46:34.883 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=130 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:34.887 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=131 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:34.892 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:34.896 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=133 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:34.901 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=134 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:34.906 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:34.910 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=136 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:34.915 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=137 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:34.919 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:34.924 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=139 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:34.929 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=140 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:34.933 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:34.943 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=143 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:34.947 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:34.952 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=145 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:34.956 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=146 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:34.961 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:34.966 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=148 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:34.970 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=149 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:34.975 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:34.979 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=151 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:34.984 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=152 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:34.989 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:34.993 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=154 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.003 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.007 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=157 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.012 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=158 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.016 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.021 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=160 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.026 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=161 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.030 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.035 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=163 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.040 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=164 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.044 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.049 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=166 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.053 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=167 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.063 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=169 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.067 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=170 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.072 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.076 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=172 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.081 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=173 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.086 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.090 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=175 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.095 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=176 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.099 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.104 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=178 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.109 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=179 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.113 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.123 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=182 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.127 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.132 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=184 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.136 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=185 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.141 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.146 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=187 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.150 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=188 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.155 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.159 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=190 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.164 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=191 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.169 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.173 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=193 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.183 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.187 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=196 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.192 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=197 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.196 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.201 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=199 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.206 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=200 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.210 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.215 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=202 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.220 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=203 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.224 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.229 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=205 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.233 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=206 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.239 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:46:35.249 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=208 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.254 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=209 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.258 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.263 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=211 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.267 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=212 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.272 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.277 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=214 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:35.278 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:46:35.278 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:46:35.278 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:46:35.278 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:46:35.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD NOHANDOVER
2025-12-15 03:46:35.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:46:35.677 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:46:35.677 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:46:35.688 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:46:35.688 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:46:35.688 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:46:35.688 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:46:35.694 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:46:35.694 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:46:35.694 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:46:35.694 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:46:35.694 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:46:35.694 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:46:35.694 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:46:35.695 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=304 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:46:35.695 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=304 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:46:35.695 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=304 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:46:35.695 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=304 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:46:35.695 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=304 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:46:35.695 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=304 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:46:40.692 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:46:40.692 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:46:40.694 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:46:40.694 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:46:40.695 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:46:40.695 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:46:40.704 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:46:40.704 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:46:40.705 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:46:40.705 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:46:40.705 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:46:40.709 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:46:40.709 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:46:40.709 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:46:40.709 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:46:40.710 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:46:40.710 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:46:40.710 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:46:40.710 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:46:40.713 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:46:40.713 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:46:40.713 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:46:40.713 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:46:40.713 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:46:40.713 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:46:40.713 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:46:40.713 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:46:40.716 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:46:40.716 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:46:40.716 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:46:40.716 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:46:40.716 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:46:40.716 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:46:40.716 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:46:40.716 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:46:40.720 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:46:40.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:46:40.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:46:40.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:46:40.720 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:46:40.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:46:40.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:46:40.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:46:40.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:40.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:46:40.720 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:46:40.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:40.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:40.721 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:46:40.721 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:46:40.721 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:46:40.721 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:46:40.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:40.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:40.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:40.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:46:40.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:40.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:40.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:40.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:40.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:40.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:40.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:40.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:40.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:40.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:40.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:40.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:40.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:40.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:40.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:40.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:40.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:40.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:40.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:40.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:40.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:40.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:40.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:40.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:40.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:40.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:40.726 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:46:41.210 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:46:41.238 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:46:41.239 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:46:41.240 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:46:41.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:46:41.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:46:41.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:46:41.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:46:41.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:46:41.265 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:46:41.266 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:46:41.266 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:46:41.266 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:46:41.302 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:46:41.306 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:46:41.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD NOHANDOVER
2025-12-15 03:46:41.319 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:46:41.320 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:46:41.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:46:41.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:46:41.331 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=130 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.335 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=131 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.340 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.345 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=133 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.349 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=134 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.354 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.359 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=136 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.363 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=137 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.368 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.372 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=139 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.377 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=140 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.382 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.391 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=143 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.396 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.400 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=145 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.405 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=146 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.409 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.414 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=148 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.419 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=149 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.423 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.428 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=151 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.433 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=152 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.437 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.442 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=154 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.451 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.456 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=157 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.460 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=158 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.465 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.469 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=160 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.474 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=161 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.479 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.483 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=163 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.488 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=164 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.492 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.497 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=166 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.502 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=167 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.511 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=169 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.516 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=170 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.520 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.525 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=172 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.529 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=173 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.534 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.539 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=175 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.543 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=176 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.548 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.552 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=178 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.557 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=179 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.562 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.571 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=182 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.576 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.580 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=184 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.585 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=185 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.589 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.594 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=187 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.599 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=188 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.603 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.608 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=190 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.612 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=191 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.617 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.622 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=193 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.631 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.636 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=196 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.640 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=197 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.645 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.649 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=199 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.654 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=200 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.659 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.663 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=202 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.668 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=203 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.672 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.677 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=205 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.682 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=206 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.688 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:46:41.698 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=208 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.703 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=209 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.707 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.712 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=211 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.717 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=212 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.721 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 03:46:41.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:46:41.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:46:41.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:46:41.724 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:46:42.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD NOHANDOVER
2025-12-15 03:46:42.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:46:42.126 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:46:42.126 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:46:42.136 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:46:42.136 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:46:42.136 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:46:42.137 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:46:42.142 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:46:42.142 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:46:42.143 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:46:42.143 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:46:42.143 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:46:42.143 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:46:42.143 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:46:42.144 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=303 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:46:42.144 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=304 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:46:42.144 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=304 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:46:42.144 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=304 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:46:42.144 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=304 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:46:42.144 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=304 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:46:42.144 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=304 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:46:42.144 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=304 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:46:42.145 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=304 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:46:47.141 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:46:47.141 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:46:47.142 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:46:47.143 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:46:47.143 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:46:47.144 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:46:47.152 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:46:47.152 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:46:47.152 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:46:47.153 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:46:47.153 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:46:47.155 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:46:47.155 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:46:47.155 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:46:47.155 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:46:47.156 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:46:47.156 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:46:47.156 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:46:47.156 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:46:47.158 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:46:47.158 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:46:47.158 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:46:47.158 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:46:47.159 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:46:47.159 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:46:47.159 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:46:47.159 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:46:47.161 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:46:47.161 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:46:47.161 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:46:47.161 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:46:47.161 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:46:47.161 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:46:47.161 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:46:47.161 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:46:47.166 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:46:47.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:46:47.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:46:47.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:46:47.166 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:46:47.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:46:47.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:46:47.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:46:47.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:46:47.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:47.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:47.166 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:46:47.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:47.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:47.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:47.167 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:46:47.167 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:46:47.167 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:46:47.167 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:46:47.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:47.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:47.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:47.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:46:47.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:47.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:47.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:47.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:47.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:47.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:47.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:47.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:47.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:47.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:47.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:47.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:47.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:47.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:47.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:47.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:47.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:47.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:47.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:47.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:47.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:47.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:47.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:47.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:47.172 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:46:47.656 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:46:47.690 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:46:47.692 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:46:47.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:46:47.693 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:46:47.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:46:47.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:46:47.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:46:47.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:46:47.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:46:47.717 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:46:47.717 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:46:47.717 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:46:47.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:46:47.759 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:46:47.759 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:46:47.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:46:47.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:46:48.133 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:46:48.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:46:48.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:46:48.139 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:46:48.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:46:48.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:46:48.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:46:48.140 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:46:48.140 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:46:48.140 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:46:48.140 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:46:48.140 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:46:48.140 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:46:48.140 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:46:53.143 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:46:53.144 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:46:53.145 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:46:53.146 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:46:53.146 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:46:53.147 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:46:53.155 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:46:53.156 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:46:53.156 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:46:53.157 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:46:53.157 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:46:53.160 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:46:53.160 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:46:53.160 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:46:53.161 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:46:53.161 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:46:53.161 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:46:53.162 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:46:53.162 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:46:53.165 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:46:53.165 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:46:53.165 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:46:53.165 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:46:53.165 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:46:53.166 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:46:53.166 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:46:53.166 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:46:53.169 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:46:53.169 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:46:53.170 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:46:53.170 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:46:53.170 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:46:53.170 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:46:53.170 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:46:53.170 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:46:53.175 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:46:53.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:46:53.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:46:53.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:46:53.175 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:46:53.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:46:53.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:46:53.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:46:53.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:53.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:46:53.176 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:46:53.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:53.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:53.176 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:46:53.176 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:46:53.176 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:46:53.176 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:46:53.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:53.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:53.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:53.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:46:53.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:53.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:53.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:53.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:53.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:53.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:53.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:53.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:53.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:53.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:46:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:53.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:53.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:46:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:46:53.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:53.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:46:53.181 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:46:53.664 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:46:53.696 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:46:53.697 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:46:53.699 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:46:53.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:46:53.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:46:53.732 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:46:53.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:46:53.740 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:46:53.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:46:53.743 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:46:53.744 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:46:53.744 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:46:53.744 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:46:53.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:46:53.763 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:46:53.763 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:46:53.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:46:53.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:46:54.140 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:46:54.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:46:54.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:46:54.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:46:54.180 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:46:54.618 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:46:55.095 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:46:55.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:46:55.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:46:55.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:46:55.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:46:55.573 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:46:56.051 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:46:56.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:46:56.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:46:56.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:46:56.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:46:56.530 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:46:57.008 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:46:57.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:46:57.182 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:46:57.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:46:57.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:46:57.486 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:46:57.965 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:46:58.183 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:46:58.183 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:46:58.183 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:46:58.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:46:58.443 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:46:58.922 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:46:59.399 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:46:59.877 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:47:00.355 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:47:00.833 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:47:01.311 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:47:01.789 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:47:02.267 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:47:02.745 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 03:47:03.224 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 03:47:03.702 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 03:47:04.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:47:04.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:47:04.148 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:47:04.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:47:04.162 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:47:04.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:47:04.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:47:04.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:47:04.163 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:47:04.163 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:47:04.163 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:47:04.163 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:47:04.163 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:47:04.163 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:47:04.163 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:47:09.167 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:47:09.168 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:47:09.168 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:47:09.168 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:47:09.168 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:47:09.169 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:47:09.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:47:09.186 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:47:09.186 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:47:09.186 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:47:09.186 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:47:09.191 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:47:09.191 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:47:09.192 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:47:09.192 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:47:09.192 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:47:09.192 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:47:09.192 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:47:09.192 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:47:09.197 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:47:09.197 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:47:09.197 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:47:09.197 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:47:09.197 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:47:09.197 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:47:09.198 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:47:09.198 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:47:09.202 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:47:09.202 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:47:09.202 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:47:09.202 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:47:09.202 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:47:09.202 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:47:09.202 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:47:09.202 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:47:09.208 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:47:09.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:47:09.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:47:09.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:47:09.208 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:47:09.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:47:09.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:47:09.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:47:09.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:47:09.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:47:09.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:47:09.209 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:47:09.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:47:09.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:47:09.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:47:09.209 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:47:09.209 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:47:09.209 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:47:09.209 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:47:09.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:47:09.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:47:09.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:47:09.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:47:09.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:47:09.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:47:09.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:47:09.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:47:09.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:47:09.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:47:09.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:47:09.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:47:09.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:47:09.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:47:09.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:47:09.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:47:09.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:47:09.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:47:09.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:47:09.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:47:09.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:47:09.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:47:09.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:47:09.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:47:09.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:47:09.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:47:09.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:47:09.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:47:09.214 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:47:09.697 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:47:09.735 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:47:09.737 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:47:09.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:47:09.738 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:47:09.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:47:09.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:47:09.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:47:09.769 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:47:09.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:47:09.772 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:47:09.772 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:47:09.772 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:47:09.772 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:47:09.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:47:09.800 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:47:09.800 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:47:09.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:47:09.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:47:10.174 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:47:10.212 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:47:10.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:47:10.213 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:47:10.213 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:47:10.652 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:47:11.130 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:47:11.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:47:11.214 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:47:11.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:47:11.214 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:47:11.608 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:47:12.087 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:47:12.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:47:12.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:47:12.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:47:12.215 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:47:12.565 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:47:13.043 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:47:13.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:47:13.216 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:47:13.216 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:47:13.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:47:13.520 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:47:13.999 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:47:14.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:47:14.217 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:47:14.217 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:47:14.217 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:47:14.477 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:47:14.956 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:47:15.434 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:47:15.912 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:47:16.390 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:47:16.868 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:47:17.346 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:47:17.824 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:47:18.302 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:47:18.781 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 03:47:19.259 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 03:47:19.737 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 03:47:20.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:47:20.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:47:20.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:47:20.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:47:20.182 [WARNING] transceiver.py:250 (MS@172.18.144.22:6700) RX TRXD message (fn=2342 tn=4 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:47:20.192 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:47:20.193 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:47:20.193 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:47:20.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:47:20.193 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:47:20.193 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:47:20.193 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:47:20.193 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:47:20.193 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:47:20.193 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:47:20.193 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:47:25.199 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:47:25.199 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:47:25.199 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:47:25.199 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:47:25.200 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:47:25.200 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:47:25.212 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:47:25.213 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:47:25.213 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:47:25.214 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:47:25.214 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:47:25.218 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:47:25.218 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:47:25.218 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:47:25.218 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:47:25.219 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:47:25.219 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:47:25.219 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:47:25.219 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:47:25.222 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:47:25.222 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:47:25.222 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:47:25.222 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:47:25.222 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:47:25.222 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:47:25.223 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:47:25.223 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:47:25.226 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:47:25.226 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:47:25.226 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:47:25.226 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:47:25.226 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:47:25.226 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:47:25.226 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:47:25.227 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:47:25.231 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:47:25.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:47:25.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:47:25.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:47:25.231 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:47:25.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:47:25.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:47:25.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:47:25.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:47:25.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:47:25.231 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:47:25.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:47:25.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:47:25.232 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:47:25.232 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:47:25.232 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:47:25.232 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:47:25.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:47:25.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:47:25.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:47:25.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:47:25.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:47:25.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:47:25.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:47:25.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:47:25.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:47:25.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:47:25.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:47:25.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:47:25.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:47:25.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:47:25.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:47:25.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:47:25.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:47:25.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:47:25.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:47:25.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:47:25.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:47:25.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:47:25.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:47:25.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:47:25.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:47:25.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:47:25.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:47:25.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:47:25.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:47:25.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:47:25.236 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:47:25.720 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:47:25.752 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:47:25.753 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:47:25.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:47:25.755 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:47:25.787 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:47:25.787 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:47:25.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:47:25.794 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:47:25.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:47:25.796 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:47:25.797 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:47:25.797 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:47:25.797 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:47:25.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:47:25.821 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:47:25.821 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:47:25.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:47:25.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:47:26.198 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:47:26.235 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:47:26.235 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:47:26.236 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:47:26.236 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:47:26.676 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:47:26.692 [DEBUG] fake_trx.py:264 (MS@172.18.144.22:6700) Recv SETTA cmd
2025-12-15 03:47:27.154 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:47:27.237 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:47:27.237 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:47:27.237 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:47:27.237 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:47:27.632 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:47:28.109 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:47:28.238 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:47:28.239 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:47:28.239 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:47:28.239 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:47:28.588 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:47:29.066 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:47:29.239 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:47:29.239 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:47:29.239 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:47:29.240 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:47:29.544 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:47:30.023 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:47:30.240 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:47:30.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:47:30.241 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:47:30.241 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:47:30.501 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:47:30.979 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:47:31.457 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:47:31.935 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:47:32.414 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:47:32.892 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:47:33.370 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:47:33.849 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:47:34.326 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:47:34.804 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 03:47:35.283 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 03:47:35.760 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 03:47:36.238 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 03:47:36.716 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 03:47:37.194 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 03:47:37.672 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 03:47:38.150 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 03:47:38.627 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 03:47:39.105 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 03:47:39.583 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 03:47:40.062 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 03:47:40.540 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 03:47:41.018 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 03:47:41.496 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 03:47:41.974 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 03:47:42.452 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 03:47:42.930 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 03:47:43.408 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 03:47:43.885 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 03:47:44.363 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 03:47:44.842 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 03:47:45.319 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 03:47:45.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:47:45.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:47:45.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:47:45.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:47:45.409 [WARNING] transceiver.py:250 (MS@172.18.144.22:6700) RX TRXD message (fn=4305 tn=4 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:47:45.417 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:47:45.417 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:47:45.417 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:47:45.418 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:47:45.421 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:47:45.421 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:47:45.421 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:47:45.421 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:47:45.421 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:47:45.421 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:47:45.421 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:47:45.421 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4308 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:47:45.421 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4308 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:47:45.421 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4308 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:47:45.421 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4308 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:47:45.421 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4308 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:47:45.421 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4308 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:47:50.424 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:47:50.424 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:47:50.424 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:47:50.424 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:47:50.425 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:47:50.425 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:47:50.435 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:47:50.437 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:47:50.437 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:47:50.438 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:47:50.438 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:47:50.442 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:47:50.442 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:47:50.442 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:47:50.442 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:47:50.443 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:47:50.443 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:47:50.443 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:47:50.444 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:47:50.448 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:47:50.448 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:47:50.449 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:47:50.449 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:47:50.449 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:47:50.449 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:47:50.449 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:47:50.449 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:47:50.452 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:47:50.452 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:47:50.452 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:47:50.452 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:47:50.452 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:47:50.452 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:47:50.452 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:47:50.452 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:47:50.457 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:47:50.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:47:50.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:47:50.457 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:47:50.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:47:50.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:47:50.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:47:50.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:47:50.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:47:50.458 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:47:50.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:47:50.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:47:50.458 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:47:50.458 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:47:50.458 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:47:50.458 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:47:50.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:47:50.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:47:50.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:47:50.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:47:50.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:47:50.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:47:50.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:47:50.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:47:50.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:47:50.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:47:50.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:47:50.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:47:50.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:47:50.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:47:50.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:47:50.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:47:50.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:47:50.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:47:50.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:47:50.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:47:50.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:47:50.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:47:50.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:47:50.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:47:50.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:47:50.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:47:50.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:47:50.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:47:50.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:47:50.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:47:50.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:47:50.463 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:47:50.947 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:47:50.983 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:47:50.984 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:47:50.984 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:47:50.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:47:51.006 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:47:51.006 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:47:51.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:47:51.013 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:47:51.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:47:51.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:47:51.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:47:51.016 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:47:51.016 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:47:51.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:47:51.050 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:47:51.051 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:47:51.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:47:51.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:47:51.424 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:47:51.461 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:47:51.462 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:47:51.462 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:47:51.463 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:47:51.903 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:47:52.380 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:47:52.463 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:47:52.463 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:47:52.464 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:47:52.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:47:52.858 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:47:53.336 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:47:53.465 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:47:53.465 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:47:53.465 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:47:53.465 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:47:53.813 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:47:54.292 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:47:54.466 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:47:54.466 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:47:54.466 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:47:54.467 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:47:54.770 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:47:55.248 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:47:55.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:47:55.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:47:55.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:47:55.467 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:47:55.727 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:47:56.205 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:47:56.683 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:47:57.161 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:47:57.639 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:47:58.117 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:47:58.595 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:47:59.073 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:47:59.551 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:48:00.029 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 03:48:00.507 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 03:48:00.986 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 03:48:01.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:48:01.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:01.432 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:48:01.432 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:48:01.445 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:48:01.445 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:48:01.445 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:48:01.445 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:48:01.451 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:48:01.451 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:48:01.451 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:48:01.451 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:48:01.452 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:48:01.452 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:48:01.452 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:48:01.452 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2347 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:48:01.453 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2347 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:48:01.453 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2347 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:48:01.453 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2347 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:48:01.453 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2347 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:48:01.453 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2347 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:48:01.453 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2347 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:48:01.453 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2347 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:48:06.452 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:48:06.452 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:48:06.452 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:48:06.452 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:48:06.453 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:48:06.453 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:48:06.461 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:48:06.461 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:48:06.461 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:48:06.462 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:48:06.462 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:48:06.464 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:48:06.465 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:48:06.465 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:48:06.465 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:48:06.465 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:48:06.465 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:48:06.465 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:48:06.465 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:48:06.468 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:48:06.468 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:48:06.468 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:48:06.468 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:48:06.468 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:48:06.468 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:48:06.469 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:48:06.469 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:48:06.474 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:48:06.474 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:48:06.474 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:48:06.474 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:48:06.475 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:48:06.475 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:48:06.475 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:48:06.475 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:48:06.485 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:48:06.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:48:06.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:48:06.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:48:06.486 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:48:06.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:48:06.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:48:06.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:48:06.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:48:06.487 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:48:06.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:06.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:06.487 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:48:06.487 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:48:06.487 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:48:06.487 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:48:06.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:06.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:06.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:06.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:48:06.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:06.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:06.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:06.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:06.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:06.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:06.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:06.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:06.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:06.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:06.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:06.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:06.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:06.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:06.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:06.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:06.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:06.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:06.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:06.492 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:48:06.975 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:48:07.014 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:48:07.015 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:48:07.016 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:48:07.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:48:07.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:48:07.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:48:07.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:48:07.046 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:48:07.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:07.049 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:48:07.049 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:48:07.050 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:48:07.050 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:48:07.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:48:07.079 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:48:07.080 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:48:07.080 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:48:07.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:07.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:07.452 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:48:07.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:48:07.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:48:07.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:48:07.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:48:07.931 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:48:07.948 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:48:08.409 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:48:08.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:48:08.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:48:08.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:48:08.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:48:08.887 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:48:09.365 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:48:09.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:48:09.493 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:48:09.493 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:48:09.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:48:09.843 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:48:10.321 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:48:10.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:48:10.494 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:48:10.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:48:10.494 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:48:10.800 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:48:11.278 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:48:11.495 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:48:11.495 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:48:11.495 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:48:11.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:48:11.756 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:48:12.235 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:48:12.713 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:48:13.190 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:48:13.669 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:48:13.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:48:13.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:13.800 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:48:13.800 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:48:13.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:48:13.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:48:13.811 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:48:13.811 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:48:13.813 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:48:13.813 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:48:13.813 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:48:13.813 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:48:13.813 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:48:13.813 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:48:13.813 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:48:18.816 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:48:18.816 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:48:18.817 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:48:18.818 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:48:18.818 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:48:18.819 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:48:18.827 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:48:18.828 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:48:18.829 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:48:18.829 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:48:18.829 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:48:18.832 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:48:18.832 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:48:18.833 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:48:18.833 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:48:18.833 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:48:18.833 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:48:18.834 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:48:18.834 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:48:18.836 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:48:18.836 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:48:18.836 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:48:18.836 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:48:18.836 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:48:18.836 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:48:18.837 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:48:18.837 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:48:18.839 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:48:18.839 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:48:18.839 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:48:18.839 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:48:18.839 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:48:18.839 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:48:18.839 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:48:18.839 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:48:18.843 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:48:18.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:48:18.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:48:18.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:48:18.843 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:48:18.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:48:18.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:48:18.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:48:18.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:18.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:48:18.843 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:48:18.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:18.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:18.843 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:48:18.843 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:48:18.843 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:48:18.844 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:48:18.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:18.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:18.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:18.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:48:18.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:18.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:18.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:18.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:18.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:18.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:18.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:18.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:18.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:18.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:18.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:18.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:18.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:18.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:18.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:18.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:18.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:18.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:18.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:18.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:18.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:18.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:18.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:18.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:18.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:18.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:18.848 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:48:19.333 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:48:19.360 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:48:19.360 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:48:19.361 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:48:19.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:48:19.374 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:48:19.375 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:48:19.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:48:19.380 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:48:19.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:19.383 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:48:19.384 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:48:19.384 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:48:19.384 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:48:19.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:48:19.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:48:19.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:48:19.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:19.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:19.811 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:48:19.846 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:48:19.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:48:19.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:48:19.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:48:20.289 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:48:20.767 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:48:20.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:48:20.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:48:20.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:48:20.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:48:21.245 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:48:21.723 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:48:21.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:48:21.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:48:21.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:48:21.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:48:22.201 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:48:22.679 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:48:22.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:48:22.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:48:22.850 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:48:22.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:48:23.157 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:48:23.635 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:48:23.851 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:48:23.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:48:23.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:48:23.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:48:24.112 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:48:24.591 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:48:25.065 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:48:25.544 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:48:26.021 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:48:26.500 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:48:26.978 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:48:27.456 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:48:27.934 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:48:28.413 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 03:48:28.891 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 03:48:29.369 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 03:48:29.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:48:29.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:29.444 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:48:29.444 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:48:29.457 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:48:29.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:48:29.457 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:48:29.458 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:48:29.463 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:48:29.463 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:48:29.463 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:48:29.464 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:48:29.464 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:48:29.464 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:48:29.464 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:48:34.462 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:48:34.462 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:48:34.464 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:48:34.465 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:48:34.466 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:48:34.466 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:48:34.473 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:48:34.474 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:48:34.474 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:48:34.475 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:48:34.475 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:48:34.478 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:48:34.479 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:48:34.479 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:48:34.479 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:48:34.479 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:48:34.480 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:48:34.480 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:48:34.480 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:48:34.482 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:48:34.483 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:48:34.483 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:48:34.483 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:48:34.483 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:48:34.483 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:48:34.483 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:48:34.483 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:48:34.486 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:48:34.486 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:48:34.486 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:48:34.486 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:48:34.486 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:48:34.486 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:48:34.486 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:48:34.486 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:48:34.490 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:48:34.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:48:34.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:48:34.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:48:34.490 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:48:34.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:48:34.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:48:34.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:48:34.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:48:34.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:34.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:34.491 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:48:34.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:34.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:34.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:34.491 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:48:34.491 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:48:34.491 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:48:34.491 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:48:34.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:34.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:34.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:34.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:48:34.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:34.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:34.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:34.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:34.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:34.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:34.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:34.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:34.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:34.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:34.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:34.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:34.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:34.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:34.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:34.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:34.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:34.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:34.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:34.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:34.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:34.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:34.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:34.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:34.496 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:48:34.979 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:48:35.011 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:48:35.013 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:48:35.015 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:48:35.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:48:35.033 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:48:35.033 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:48:35.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:48:35.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:35.036 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:48:35.036 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:48:35.036 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:48:35.036 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:48:35.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:48:35.077 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:48:35.078 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:48:35.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:35.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:35.455 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:48:35.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:48:35.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:35.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:48:35.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:48:35.480 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:48:35.480 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:48:35.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:48:35.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:35.481 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:48:35.481 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:48:35.481 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:48:35.481 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:48:35.493 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:48:35.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:48:35.495 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:48:35.495 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:48:35.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:48:35.505 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:48:35.506 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:48:35.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:35.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:35.934 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:48:36.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:48:36.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:36.196 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:48:36.196 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:48:36.230 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:48:36.230 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:48:36.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:48:36.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:36.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:48:36.234 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:48:36.234 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:48:36.234 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:48:36.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:48:36.269 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:48:36.270 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:48:36.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:36.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:36.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:48:36.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:36.375 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:48:36.375 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:48:36.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:48:36.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:48:36.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:48:36.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:36.395 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:48:36.395 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:48:36.396 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:48:36.396 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:48:36.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:48:36.404 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:48:36.404 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:48:36.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:36.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:36.411 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:48:36.494 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:48:36.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:48:36.495 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:48:36.495 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:48:36.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:48:36.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:36.808 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:48:36.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:48:36.818 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:48:36.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:48:36.818 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:48:36.818 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:48:36.824 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:48:36.824 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:48:36.824 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:48:36.824 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:48:36.825 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:48:36.825 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:48:36.825 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:48:36.825 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=499 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:48:36.825 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=499 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:48:36.825 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=499 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:48:36.826 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=499 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:48:36.826 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=499 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:48:41.824 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:48:41.824 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:48:41.824 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:48:41.825 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:48:41.825 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:48:41.826 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:48:41.844 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:48:41.844 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:48:41.844 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:48:41.845 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:48:41.845 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:48:41.847 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:48:41.847 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:48:41.847 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:48:41.847 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:48:41.847 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:48:41.847 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:48:41.847 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:48:41.848 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:48:41.850 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:48:41.850 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:48:41.850 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:48:41.850 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:48:41.850 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:48:41.850 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:48:41.850 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:48:41.850 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:48:41.852 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:48:41.853 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:48:41.853 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:48:41.853 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:48:41.853 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:48:41.853 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:48:41.853 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:48:41.853 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:48:41.856 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:48:41.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:48:41.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:48:41.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:48:41.856 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:48:41.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:48:41.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:48:41.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:48:41.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:41.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:48:41.857 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:48:41.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:41.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:41.857 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:48:41.857 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:48:41.857 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:48:41.857 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:48:41.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:41.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:41.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:41.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:48:41.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:41.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:41.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:41.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:41.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:41.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:41.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:41.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:41.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:41.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:41.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:41.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:41.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:41.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:41.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:41.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:41.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:41.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:41.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:41.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:41.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:41.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:41.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:41.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:41.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:41.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:41.862 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:48:42.345 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:48:42.374 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:48:42.375 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:48:42.377 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:48:42.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:48:42.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:48:42.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:48:42.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:48:42.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:42.401 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:48:42.401 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:48:42.401 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:48:42.401 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:48:42.437 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:48:42.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:48:42.453 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:48:42.453 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:48:42.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:42.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:42.820 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:48:42.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:48:42.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:42.830 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:48:42.830 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:48:42.840 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:48:42.840 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:48:42.841 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:48:42.841 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:48:42.846 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:48:42.846 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:48:42.847 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:48:42.847 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:48:42.847 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:48:42.847 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:48:42.847 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:48:42.848 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=212 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:48:42.848 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=212 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:48:42.848 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=212 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:48:47.847 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:48:47.847 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:48:47.847 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:48:47.847 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:48:47.848 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:48:47.848 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:48:47.858 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:48:47.860 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:48:47.860 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:48:47.860 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:48:47.861 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:48:47.866 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:48:47.866 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:48:47.866 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:48:47.867 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:48:47.867 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:48:47.867 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:48:47.868 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:48:47.868 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:48:47.871 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:48:47.871 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:48:47.872 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:48:47.872 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:48:47.872 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:48:47.872 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:48:47.872 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:48:47.872 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:48:47.875 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:48:47.875 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:48:47.875 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:48:47.875 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:48:47.876 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:48:47.876 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:48:47.876 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:48:47.876 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:48:47.880 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:48:47.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:48:47.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:48:47.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:48:47.880 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:48:47.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:48:47.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:48:47.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:48:47.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:48:47.881 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:48:47.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:47.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:47.881 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:48:47.881 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:48:47.881 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:48:47.881 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:48:47.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:47.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:47.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:47.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:48:47.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:47.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:47.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:47.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:47.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:47.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:47.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:47.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:47.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:47.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:47.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:47.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:47.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:47.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:47.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:47.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:47.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:47.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:47.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:47.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:48:47.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:47.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:47.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:47.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:48:47.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:48:47.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:47.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:48:47.886 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:48:48.371 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:48:48.406 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:48:48.407 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:48:48.409 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:48:48.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:48:48.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:48:48.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:48:48.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:48:48.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:48.433 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:48:48.433 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:48:48.433 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:48:48.433 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:48:48.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:48:48.474 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:48:48.475 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:48:48.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:48.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:48.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:48:48.849 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:48:48.885 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:48:48.886 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:48:48.886 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:48:48.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:48:49.327 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:48:49.805 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:48:49.886 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:48:49.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:48:49.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:48:49.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:48:50.284 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:48:50.761 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:48:50.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:48:50.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:48:50.888 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:48:50.888 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:48:51.239 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:48:51.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:48:51.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:51.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:48:51.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:48:51.606 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:48:51.606 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:48:51.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:48:51.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:51.608 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:48:51.608 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:48:51.608 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:48:51.608 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:48:51.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:48:51.612 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:48:51.612 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:48:51.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:51.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:51.717 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:48:51.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:48:51.888 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:48:51.889 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:48:51.889 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:48:51.889 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:48:52.195 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:48:52.674 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:48:52.890 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:48:52.890 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:48:52.890 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:48:52.890 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:48:53.152 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:48:53.630 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:48:54.108 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:48:54.587 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:48:54.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:48:54.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:54.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:48:54.774 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:48:54.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:48:54.792 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:48:54.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:48:54.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:54.793 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:48:54.793 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:48:54.793 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:48:54.793 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:48:54.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:48:54.828 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:48:54.828 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:48:54.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:54.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:55.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:48:55.064 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:48:55.542 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:48:56.020 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:48:56.497 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:48:56.976 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:48:57.454 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 03:48:57.932 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 03:48:58.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:48:58.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:58.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:48:58.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:48:58.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:48:58.078 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:48:58.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:48:58.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:58.079 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:48:58.080 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:48:58.080 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:48:58.080 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:48:58.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:48:58.119 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:48:58.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:48:58.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:58.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:48:58.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:48:58.409 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 03:48:58.887 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 03:48:59.365 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 03:48:59.842 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 03:49:00.320 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 03:49:00.798 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 03:49:01.277 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 03:49:01.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:49:01.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:49:01.334 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:49:01.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:49:01.344 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:49:01.345 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:49:01.345 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:49:01.345 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:49:01.350 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:49:01.351 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:49:01.351 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:49:01.351 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:49:01.352 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:49:01.352 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:49:01.352 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:49:01.352 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2873 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:49:01.352 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2874 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:49:01.352 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2874 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:49:01.352 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2874 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:49:01.353 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2874 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:49:01.353 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2874 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:49:01.353 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2874 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:49:01.353 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2874 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:49:01.353 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2874 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:49:06.352 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:49:06.352 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:49:06.353 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:49:06.353 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:49:06.354 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:49:06.355 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:49:06.364 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:49:06.366 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:49:06.366 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:49:06.366 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:49:06.366 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:49:06.371 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:49:06.372 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:49:06.372 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:49:06.372 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:49:06.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:49:06.372 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:49:06.373 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:49:06.373 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:49:06.377 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:49:06.377 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:49:06.378 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:49:06.378 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:49:06.378 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:49:06.378 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:49:06.378 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:49:06.378 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:49:06.382 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:49:06.382 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:49:06.383 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:49:06.383 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:49:06.383 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:49:06.383 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:49:06.383 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:49:06.383 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:49:06.388 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:49:06.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:49:06.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:49:06.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:49:06.389 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:49:06.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:49:06.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:49:06.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:49:06.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:49:06.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:49:06.390 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:49:06.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:49:06.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:49:06.390 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:49:06.390 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:49:06.390 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:49:06.390 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:49:06.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:49:06.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:49:06.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:49:06.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:49:06.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:49:06.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:49:06.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:49:06.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:49:06.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:49:06.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:49:06.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:49:06.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:49:06.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:49:06.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:49:06.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:49:06.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:49:06.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:49:06.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:49:06.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:49:06.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:49:06.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:49:06.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:49:06.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:49:06.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:49:06.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:49:06.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:49:06.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:49:06.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:49:06.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:49:06.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:49:06.395 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:49:06.878 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:49:06.918 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:49:06.920 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:49:06.921 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:49:06.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:49:06.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:49:06.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:49:06.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:49:06.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:49:06.924 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:49:06.924 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:49:06.924 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:49:06.924 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:49:07.354 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:49:07.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:49:07.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:49:07.395 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:49:07.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:49:07.832 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:49:08.310 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:49:08.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:49:08.394 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:49:08.395 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:49:08.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:49:08.787 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:49:09.265 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:49:09.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:49:09.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:49:09.396 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:49:09.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:49:09.743 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:49:10.221 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:49:10.396 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:49:10.396 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:49:10.397 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:49:10.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:49:10.698 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:49:11.175 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:49:11.415 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:49:11.416 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:49:11.416 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:49:11.416 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:49:11.653 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:49:12.131 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:49:12.609 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:49:13.087 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:49:13.565 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:49:14.043 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:49:14.520 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:49:14.998 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:49:15.476 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:49:15.953 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 03:49:16.431 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 03:49:16.909 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 03:49:17.387 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 03:49:17.865 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 03:49:18.343 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 03:49:18.821 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 03:49:19.299 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 03:49:19.777 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 03:49:20.255 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 03:49:20.733 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 03:49:21.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:49:21.020 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:49:21.030 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:49:21.030 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:49:21.030 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:49:21.030 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:49:21.035 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:49:21.036 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:49:21.036 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:49:21.036 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:49:21.036 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:49:21.036 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:49:21.037 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:49:21.037 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:49:21.037 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:49:21.037 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:49:21.037 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:49:26.037 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:49:26.037 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:49:26.037 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:49:26.038 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:49:26.039 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:49:26.039 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:49:26.048 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:49:26.050 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:49:26.050 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:49:26.050 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:49:26.050 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:49:26.055 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:49:26.055 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:49:26.056 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:49:26.056 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:49:26.056 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:49:26.056 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:49:26.056 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:49:26.056 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:49:26.061 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:49:26.061 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:49:26.061 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:49:26.061 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:49:26.062 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:49:26.062 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:49:26.062 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:49:26.062 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:49:26.066 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:49:26.066 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:49:26.066 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:49:26.066 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:49:26.066 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:49:26.067 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:49:26.067 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:49:26.067 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:49:26.072 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:49:26.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:49:26.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:49:26.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:49:26.072 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:49:26.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:49:26.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:49:26.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:49:26.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:49:26.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:49:26.073 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:49:26.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:49:26.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:49:26.074 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:49:26.074 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:49:26.074 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:49:26.074 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:49:26.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:49:26.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:49:26.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:49:26.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:49:26.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:49:26.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:49:26.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:49:26.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:49:26.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:49:26.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:49:26.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:49:26.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:49:26.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:49:26.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:49:26.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:49:26.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:49:26.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:49:26.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:49:26.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:49:26.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:49:26.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:49:26.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:49:26.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:49:26.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:49:26.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:49:26.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:49:26.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:49:26.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:49:26.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:49:26.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:49:26.078 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:49:26.561 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:49:26.596 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:49:26.598 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:49:26.599 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:49:26.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:49:26.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:49:26.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:49:26.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:49:26.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:49:26.623 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:49:26.623 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:49:26.624 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:49:26.624 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:49:26.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:49:26.666 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:49:26.666 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:49:26.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:49:26.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:49:27.039 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:49:27.078 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:49:27.078 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:49:27.079 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:49:27.079 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:49:27.537 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:49:28.014 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:49:28.080 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:49:28.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:49:28.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:49:28.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:49:28.493 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:49:28.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:49:28.667 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:49:28.667 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:49:28.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:49:28.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:49:28.670 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:49:28.670 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:49:28.670 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:49:28.670 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:49:28.970 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:49:29.081 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:49:29.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:49:29.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:49:29.082 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:49:29.449 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:49:29.927 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:49:30.083 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:49:30.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:49:30.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:49:30.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:49:30.404 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:49:30.878 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:49:31.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:49:31.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:49:31.084 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:49:31.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:49:31.356 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:49:31.834 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:49:32.312 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:49:32.790 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:49:33.268 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:49:33.746 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:49:34.224 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:49:34.702 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:49:35.180 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:49:35.657 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 03:49:36.135 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 03:49:36.613 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 03:49:37.091 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 03:49:37.569 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 03:49:38.047 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 03:49:38.524 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 03:49:39.003 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 03:49:39.480 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 03:49:39.958 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 03:49:40.435 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 03:49:40.913 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 03:49:41.391 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 03:49:41.869 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 03:49:42.346 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 03:49:42.824 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 03:49:43.302 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 03:49:43.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:49:43.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:49:43.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:49:43.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:49:43.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:49:43.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:49:43.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:49:43.605 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:49:43.605 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:49:43.605 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:49:43.605 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:49:43.605 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:49:43.605 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:49:43.605 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:49:43.605 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3739 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:49:43.605 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3739 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:49:43.605 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3739 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:49:43.605 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3739 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:49:48.609 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:49:48.610 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:49:48.611 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:49:48.612 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:49:48.613 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:49:48.614 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:49:48.623 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:49:48.624 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:49:48.624 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:49:48.624 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:49:48.625 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:49:48.627 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:49:48.627 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:49:48.627 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:49:48.627 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:49:48.627 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:49:48.628 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:49:48.628 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:49:48.628 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:49:48.629 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:49:48.630 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:49:48.630 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:49:48.630 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:49:48.630 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:49:48.630 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:49:48.630 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:49:48.630 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:49:48.632 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:49:48.632 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:49:48.632 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:49:48.632 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:49:48.632 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:49:48.632 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:49:48.632 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:49:48.632 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:49:48.635 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:49:48.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:49:48.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:49:48.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:49:48.635 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:49:48.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:49:48.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:49:48.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:49:48.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:49:48.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:49:48.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:49:48.636 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:49:48.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:49:48.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:49:48.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:49:48.636 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:49:48.636 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:49:48.636 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:49:48.636 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:49:48.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:49:48.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:49:48.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:49:48.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:49:48.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:49:48.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:49:48.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:49:48.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:49:48.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:49:48.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:49:48.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:49:48.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:49:48.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:49:48.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:49:48.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:49:48.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:49:48.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:49:48.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:49:48.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:49:48.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:49:48.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:49:48.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:49:48.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:49:48.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:49:48.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:49:48.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:49:48.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:49:48.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:49:48.641 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:49:49.125 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:49:49.154 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:49:49.155 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:49:49.156 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:49:49.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:49:49.160 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:49:49.160 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:49:49.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:49:49.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:49:49.161 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:49:49.161 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:49:49.162 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:49:49.162 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:49:49.602 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:49:49.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:49:49.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:49:49.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:49:49.639 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:49:50.080 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:49:50.558 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:49:50.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:49:50.640 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:49:50.640 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:49:50.640 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:49:51.036 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:49:51.514 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:49:51.640 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:49:51.640 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:49:51.641 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:49:51.641 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:49:51.992 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:49:52.470 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:49:52.641 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:49:52.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:49:52.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:49:52.642 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:49:52.948 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:49:53.426 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:49:53.643 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:49:53.643 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:49:53.643 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:49:53.643 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:49:53.903 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:49:54.381 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:49:54.860 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:49:55.338 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:49:55.815 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:49:56.292 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:49:56.770 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:49:57.248 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:49:57.726 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:49:58.204 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 03:49:58.683 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 03:49:59.160 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 03:49:59.639 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 03:50:00.116 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 03:50:00.593 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 03:50:01.071 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 03:50:01.549 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 03:50:02.027 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 03:50:02.505 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 03:50:02.983 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 03:50:03.462 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 03:50:03.939 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 03:50:04.417 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 03:50:04.895 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 03:50:05.373 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 03:50:05.850 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 03:50:06.329 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 03:50:06.806 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 03:50:07.285 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 03:50:07.762 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 03:50:08.240 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 03:50:08.718 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 03:50:09.195 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 03:50:09.673 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 03:50:10.152 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 03:50:10.630 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 03:50:10.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:50:10.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:50:10.658 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:50:10.658 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:50:10.658 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:50:10.658 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:50:10.659 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:50:10.659 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:50:10.659 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:50:10.659 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:50:10.659 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:50:10.659 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:50:10.659 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:50:10.659 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4700 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:50:15.663 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:50:15.663 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:50:15.664 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:50:15.665 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:50:15.665 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:50:15.666 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:50:15.677 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:50:15.678 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:50:15.678 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:50:15.679 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:50:15.679 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:50:15.682 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:50:15.682 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:50:15.682 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:50:15.683 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:50:15.683 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:50:15.683 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:50:15.683 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:50:15.683 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:50:15.688 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:50:15.688 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:50:15.688 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:50:15.688 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:50:15.688 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:50:15.688 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:50:15.688 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:50:15.688 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:50:15.691 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:50:15.691 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:50:15.691 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:50:15.691 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:50:15.691 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:50:15.691 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:50:15.691 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:50:15.691 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:50:15.695 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:50:15.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:50:15.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:50:15.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:50:15.695 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:50:15.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:50:15.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:50:15.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:50:15.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:50:15.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:50:15.696 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:50:15.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:50:15.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:50:15.696 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:50:15.696 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:50:15.696 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:50:15.696 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:50:15.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:50:15.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:50:15.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:50:15.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:50:15.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:50:15.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:50:15.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:50:15.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:50:15.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:50:15.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:50:15.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:50:15.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:50:15.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:50:15.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:50:15.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:50:15.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:50:15.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:50:15.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:50:15.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:50:15.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:50:15.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:50:15.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:50:15.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:50:15.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:50:15.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:50:15.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:50:15.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:50:15.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:50:15.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:50:15.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:50:15.701 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:50:16.185 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:50:16.217 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:50:16.218 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:50:16.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:50:16.220 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:50:16.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:50:16.222 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:50:16.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:50:16.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:50:16.222 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:50:16.222 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:50:16.222 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:50:16.223 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:50:16.662 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:50:16.699 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:50:16.700 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:50:16.700 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:50:16.700 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:50:17.140 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:50:17.618 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:50:17.700 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:50:17.701 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:50:17.702 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:50:17.702 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:50:18.096 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:50:18.575 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:50:18.701 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:50:18.701 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:50:18.703 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:50:18.703 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:50:19.053 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:50:19.531 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:50:19.702 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:50:19.702 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:50:19.703 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:50:19.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:50:20.009 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:50:20.487 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:50:20.703 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:50:20.703 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:50:20.704 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:50:20.705 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:50:20.965 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:50:21.443 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:50:21.922 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:50:22.400 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:50:22.878 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:50:23.356 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:50:23.834 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:50:24.312 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:50:24.790 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:50:25.267 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 03:50:25.745 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 03:50:26.223 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 03:50:26.701 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 03:50:27.178 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 03:50:27.657 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 03:50:28.135 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 03:50:28.613 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 03:50:29.091 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 03:50:29.569 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 03:50:30.047 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 03:50:30.525 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 03:50:31.003 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 03:50:31.481 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 03:50:31.959 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 03:50:32.437 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 03:50:32.915 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 03:50:33.393 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 03:50:33.871 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 03:50:34.349 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 03:50:34.827 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 03:50:35.304 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 03:50:35.783 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 03:50:36.261 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 03:50:36.739 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 03:50:37.217 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 03:50:37.695 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 03:50:37.713 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:50:37.713 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:50:37.719 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:50:37.719 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:50:37.719 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:50:37.719 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:50:37.721 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:50:37.721 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:50:37.721 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:50:37.721 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:50:37.721 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:50:37.721 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:50:37.721 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:50:37.721 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4699 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:50:42.724 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:50:42.724 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:50:42.726 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:50:42.727 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:50:42.727 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:50:42.728 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:50:42.736 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:50:42.736 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:50:42.736 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:50:42.736 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:50:42.736 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:50:42.739 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:50:42.739 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:50:42.739 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:50:42.739 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:50:42.739 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:50:42.739 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:50:42.739 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:50:42.739 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:50:42.742 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:50:42.742 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:50:42.742 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:50:42.742 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:50:42.743 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:50:42.743 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:50:42.743 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:50:42.743 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:50:42.747 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:50:42.747 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:50:42.747 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:50:42.747 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:50:42.747 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:50:42.747 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:50:42.747 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:50:42.747 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:50:42.753 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:50:42.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:50:42.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:50:42.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:50:42.753 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:50:42.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:50:42.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:50:42.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:50:42.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:50:42.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:50:42.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:50:42.753 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:50:42.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:50:42.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:50:42.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:50:42.753 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:50:42.753 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:50:42.753 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:50:42.753 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:50:42.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:50:42.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:50:42.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:50:42.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:50:42.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:50:42.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:50:42.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:50:42.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:50:42.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:50:42.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:50:42.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:50:42.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:50:42.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:50:42.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:50:42.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:50:42.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:50:42.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:50:42.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:50:42.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:50:42.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:50:42.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:50:42.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:50:42.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:50:42.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:50:42.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:50:42.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:50:42.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:50:42.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:50:42.758 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:50:43.242 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:50:43.273 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:50:43.275 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:50:43.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:50:43.277 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:50:43.279 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:50:43.279 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:50:43.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:50:43.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:50:43.280 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:50:43.280 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:50:43.280 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:50:43.280 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:50:43.719 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:50:43.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:50:43.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:50:43.758 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:50:43.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:50:44.197 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:50:44.675 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:50:44.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:50:44.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:50:44.758 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:50:44.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:50:45.153 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:50:45.630 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:50:45.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:50:45.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:50:45.759 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:50:45.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:50:46.108 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:50:46.587 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:50:46.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:50:46.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:50:46.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:50:46.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:50:47.065 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:50:47.543 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:50:47.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:50:47.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:50:47.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:50:47.762 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:50:48.021 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:50:48.499 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:50:48.977 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:50:49.455 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:50:49.933 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:50:50.411 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:50:50.889 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:50:51.366 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:50:51.845 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:50:52.323 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 03:50:52.800 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 03:50:53.278 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 03:50:53.756 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 03:50:54.234 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 03:50:54.711 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 03:50:55.189 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 03:50:55.667 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 03:50:56.145 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 03:50:56.623 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 03:50:57.101 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 03:50:57.579 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 03:50:58.058 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 03:50:58.536 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 03:50:59.014 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 03:50:59.492 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 03:50:59.970 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 03:51:00.448 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 03:51:00.926 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 03:51:01.404 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 03:51:01.882 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 03:51:02.361 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 03:51:02.839 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 03:51:03.317 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 03:51:03.796 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 03:51:04.274 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 03:51:04.752 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 03:51:05.230 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 03:51:05.708 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 03:51:06.186 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 03:51:06.664 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 03:51:07.142 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 03:51:07.620 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 03:51:08.098 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 03:51:08.576 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 03:51:09.054 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 03:51:09.531 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 03:51:10.008 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 03:51:10.487 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 03:51:10.965 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 03:51:11.442 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-15 03:51:11.920 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-15 03:51:12.398 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-15 03:51:12.876 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-15 03:51:13.354 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-15 03:51:13.833 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-15 03:51:14.310 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-15 03:51:14.788 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-15 03:51:15.266 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-15 03:51:15.744 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-15 03:51:16.222 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-15 03:51:16.700 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-15 03:51:16.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:51:16.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:51:16.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:51:16.781 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:51:16.781 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:51:16.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:51:16.786 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:51:16.786 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:51:16.787 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:51:16.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:51:16.787 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:51:16.788 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:51:16.788 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:51:16.788 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=7263 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:51:16.788 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=7263 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:51:16.788 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=7263 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:51:16.788 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=7263 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:51:16.789 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=7263 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:51:16.789 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=7263 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:51:16.789 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=7263 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:51:16.789 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=7263 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:51:21.787 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:51:21.787 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:51:21.788 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:51:21.789 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:51:21.789 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:51:21.790 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:51:21.798 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:51:21.798 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:51:21.798 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:51:21.798 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:51:21.798 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:51:21.803 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:51:21.803 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:51:21.803 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:51:21.803 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:51:21.803 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:51:21.803 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:51:21.804 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:51:21.804 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:51:21.808 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:51:21.808 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:51:21.808 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:51:21.808 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:51:21.809 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:51:21.809 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:51:21.809 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:51:21.809 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:51:21.813 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:51:21.813 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:51:21.813 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:51:21.813 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:51:21.813 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:51:21.813 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:51:21.813 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:51:21.813 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:51:21.819 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:51:21.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:51:21.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:51:21.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:51:21.819 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:51:21.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:51:21.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:51:21.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:51:21.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:51:21.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:51:21.820 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:51:21.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:51:21.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:51:21.820 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:51:21.820 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:51:21.820 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:51:21.820 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:51:21.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:51:21.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:51:21.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:51:21.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:51:21.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:51:21.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:51:21.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:51:21.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:51:21.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:51:21.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:51:21.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:51:21.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:51:21.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:51:21.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:51:21.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:51:21.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:51:21.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:51:21.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:51:21.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:51:21.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:51:21.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:51:21.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:51:21.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:51:21.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:51:21.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:51:21.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:51:21.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:51:21.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:51:21.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:51:21.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:51:21.825 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:51:22.309 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:51:22.340 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:51:22.342 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:51:22.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:51:22.344 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:51:22.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:51:22.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:51:22.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:51:22.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:51:22.346 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:51:22.347 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:51:22.347 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:51:22.347 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:51:22.787 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:51:22.823 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:51:22.824 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:51:22.824 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:51:22.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:51:23.265 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:51:23.742 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:51:23.825 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:51:23.825 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:51:23.825 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:51:23.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:51:24.220 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:51:24.697 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:51:24.826 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:51:24.826 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:51:24.826 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:51:24.826 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:51:25.175 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:51:25.653 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:51:25.827 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:51:25.827 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:51:25.827 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:51:25.827 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:51:26.130 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:51:26.608 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:51:26.828 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:51:26.829 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:51:26.829 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:51:26.829 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:51:27.086 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:51:27.564 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:51:28.042 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:51:28.520 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:51:28.998 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:51:29.476 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:51:29.954 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:51:30.432 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:51:30.909 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:51:31.388 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 03:51:31.866 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 03:51:32.344 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 03:51:32.822 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 03:51:33.300 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 03:51:33.779 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 03:51:34.256 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 03:51:34.734 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 03:51:35.212 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 03:51:35.690 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 03:51:36.167 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 03:51:36.645 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 03:51:37.123 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 03:51:37.601 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 03:51:38.078 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 03:51:38.553 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 03:51:39.022 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 03:51:39.493 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 03:51:39.972 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 03:51:40.449 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 03:51:40.928 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 03:51:41.406 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 03:51:41.884 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 03:51:42.362 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 03:51:42.840 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 03:51:43.318 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 03:51:43.796 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 03:51:44.274 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 03:51:44.751 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 03:51:45.229 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 03:51:45.707 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 03:51:46.185 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 03:51:46.663 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 03:51:47.141 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 03:51:47.620 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 03:51:48.098 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 03:51:48.576 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 03:51:49.054 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 03:51:49.532 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 03:51:49.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:51:49.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:51:49.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:51:49.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:51:49.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:51:49.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:51:49.848 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:51:49.848 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:51:49.848 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:51:49.848 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:51:49.848 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:51:49.848 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:51:49.848 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:51:54.852 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:51:54.852 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:51:54.853 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:51:54.854 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:51:54.855 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:51:54.855 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:51:54.864 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:51:54.865 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:51:54.865 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:51:54.866 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:51:54.866 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:51:54.870 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:51:54.870 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:51:54.871 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:51:54.871 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:51:54.871 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:51:54.871 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:51:54.871 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:51:54.871 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:51:54.875 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:51:54.876 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:51:54.876 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:51:54.876 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:51:54.876 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:51:54.876 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:51:54.876 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:51:54.876 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:51:54.880 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:51:54.881 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:51:54.881 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:51:54.881 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:51:54.881 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:51:54.881 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:51:54.881 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:51:54.881 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:51:54.887 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:51:54.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:51:54.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:51:54.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:51:54.887 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:51:54.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:51:54.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:51:54.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:51:54.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:51:54.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:51:54.888 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:51:54.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:51:54.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:51:54.888 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:51:54.888 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:51:54.888 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:51:54.888 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:51:54.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:51:54.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:51:54.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:51:54.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:51:54.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:51:54.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:51:54.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:51:54.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:51:54.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:51:54.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:51:54.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:51:54.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:51:54.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:51:54.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:51:54.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:51:54.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:51:54.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:51:54.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:51:54.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:51:54.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:51:54.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:51:54.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:51:54.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:51:54.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:51:54.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:51:54.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:51:54.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:51:54.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:51:54.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:51:54.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:51:54.893 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:51:55.378 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:51:55.407 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:51:55.407 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:51:55.409 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:51:55.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:51:55.463 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:51:55.464 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:51:55.464 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:51:55.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:51:55.470 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:51:55.470 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:51:55.470 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:51:55.470 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:51:55.471 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:51:55.471 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:51:55.471 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:51:55.471 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:51:55.471 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:51:55.471 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:51:55.472 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:51:55.472 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:51:55.472 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:51:55.472 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:51:55.472 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:51:55.472 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:51:55.472 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:51:55.472 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:52:00.471 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:52:00.472 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:52:00.473 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:52:00.475 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:52:00.477 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:52:00.480 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:52:00.497 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:52:00.498 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:52:00.499 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:52:00.499 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:52:00.499 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:52:00.503 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:52:00.503 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:52:00.503 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:52:00.504 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:52:00.504 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:52:00.504 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:52:00.505 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:52:00.505 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:52:00.507 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:52:00.507 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:52:00.508 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:52:00.508 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:52:00.508 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:52:00.508 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:52:00.508 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:52:00.508 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:52:00.511 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:52:00.511 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:52:00.511 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:52:00.511 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:52:00.511 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:52:00.511 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:52:00.511 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:52:00.511 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:52:00.516 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:52:00.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:52:00.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:52:00.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:52:00.516 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:52:00.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:52:00.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:52:00.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:52:00.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:00.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:52:00.517 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:52:00.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:00.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:00.517 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:52:00.517 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:52:00.517 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:52:00.517 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:52:00.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:00.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:00.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:00.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:52:00.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:00.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:00.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:00.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:00.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:00.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:00.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:00.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:00.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:00.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:00.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:00.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:00.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:00.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:00.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:00.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:00.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:00.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:00.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:00.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:00.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:00.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:00.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:00.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:00.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:00.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:00.522 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:52:01.002 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:52:01.042 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:52:01.045 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:52:01.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:52:01.047 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:52:01.104 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:52:01.105 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:52:01.105 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:52:01.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:52:01.110 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:52:01.110 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:52:01.110 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:52:01.110 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:52:01.110 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:52:01.110 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:52:01.111 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:52:01.111 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:52:01.111 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:52:01.111 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:52:01.111 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:52:01.111 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:52:01.112 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:52:06.108 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:52:06.108 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:52:06.110 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:52:06.111 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:52:06.111 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:52:06.112 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:52:06.120 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:52:06.121 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:52:06.121 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:52:06.121 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:52:06.121 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:52:06.124 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:52:06.124 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:52:06.124 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:52:06.124 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:52:06.125 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:52:06.125 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:52:06.125 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:52:06.125 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:52:06.129 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:52:06.129 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:52:06.129 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:52:06.129 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:52:06.130 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:52:06.130 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:52:06.130 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:52:06.130 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:52:06.132 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:52:06.132 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:52:06.133 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:52:06.133 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:52:06.133 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:52:06.133 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:52:06.133 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:52:06.133 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:52:06.136 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:52:06.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:52:06.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:52:06.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:52:06.136 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:52:06.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:52:06.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:52:06.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:52:06.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:06.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:52:06.137 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:52:06.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:06.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:06.137 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:52:06.137 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:52:06.137 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:52:06.137 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:52:06.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:06.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:06.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:06.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:52:06.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:06.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:06.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:06.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:06.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:06.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:06.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:06.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:06.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:06.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:06.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:06.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:06.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:06.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:06.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:06.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:06.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:06.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:06.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:06.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:06.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:06.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:06.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:06.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:06.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:06.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:06.142 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:52:06.621 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:52:06.662 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:52:06.664 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:52:06.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:52:06.666 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:52:06.681 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:52:06.681 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:52:06.681 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:52:06.681 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:52:06.683 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:52:06.683 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:52:06.683 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:52:06.683 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:52:06.683 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:52:06.684 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:52:06.684 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:52:06.684 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:52:06.684 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:52:06.684 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:52:06.684 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:52:06.684 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:52:06.684 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:52:06.684 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=117 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:52:06.684 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:52:06.684 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:52:06.684 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:52:06.684 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:52:06.684 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:52:06.684 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:52:06.684 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:52:11.688 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:52:11.688 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:52:11.689 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:52:11.690 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:52:11.691 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:52:11.692 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:52:11.700 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:52:11.701 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:52:11.701 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:52:11.702 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:52:11.702 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:52:11.705 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:52:11.705 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:52:11.705 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:52:11.705 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:52:11.706 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:52:11.706 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:52:11.706 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:52:11.706 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:52:11.709 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:52:11.709 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:52:11.709 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:52:11.709 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:52:11.709 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:52:11.709 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:52:11.709 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:52:11.709 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:52:11.712 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:52:11.712 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:52:11.712 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:52:11.712 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:52:11.712 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:52:11.713 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:52:11.713 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:52:11.713 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:52:11.717 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:52:11.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:52:11.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:52:11.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:52:11.717 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:52:11.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:52:11.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:52:11.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:52:11.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:11.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:52:11.718 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:52:11.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:11.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:11.718 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:52:11.718 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:52:11.718 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:52:11.718 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:52:11.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:11.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:11.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:11.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:52:11.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:11.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:11.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:11.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:11.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:11.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:11.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:11.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:11.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:11.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:11.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:11.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:11.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:11.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:11.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:11.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:11.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:11.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:11.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:11.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:11.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:11.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:11.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:11.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:11.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:11.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:11.723 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:52:12.206 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:52:12.237 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:52:12.239 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:52:12.240 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:52:12.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:52:12.242 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:52:12.242 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:52:12.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:52:12.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:52:12.243 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:52:12.243 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:52:12.243 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:52:12.243 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:52:12.684 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:52:12.721 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:52:12.722 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:52:12.722 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:52:12.722 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:52:13.161 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:52:13.638 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:52:13.722 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:52:13.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:52:13.723 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:52:13.723 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:52:14.117 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:52:14.594 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:52:14.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:52:14.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:52:14.724 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:52:14.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:52:15.073 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:52:15.551 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:52:15.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:52:15.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:52:15.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:52:15.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:52:16.029 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:52:16.507 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:52:16.725 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:52:16.725 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:52:16.726 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:52:16.726 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:52:16.985 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:52:17.463 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:52:17.941 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:52:18.419 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:52:18.897 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:52:19.375 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:52:19.853 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:52:20.256 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:52:20.256 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:52:20.260 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:52:20.261 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:52:20.261 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:52:20.261 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:52:20.262 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:52:20.262 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:52:20.262 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:52:20.262 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:52:20.262 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:52:20.262 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:52:20.262 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:52:20.262 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1824 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:52:20.262 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1824 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:52:20.262 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1824 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:52:20.262 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1824 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:52:20.262 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1824 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:52:20.263 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1824 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:52:25.287 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:52:25.288 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:52:25.289 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:52:25.292 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:52:25.293 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:52:25.296 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:52:25.314 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:52:25.315 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:52:25.315 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:52:25.315 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:52:25.315 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:52:25.317 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:52:25.317 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:52:25.318 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:52:25.318 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:52:25.318 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:52:25.318 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:52:25.318 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:52:25.318 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:52:25.319 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:52:25.319 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:52:25.319 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:52:25.319 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:52:25.319 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:52:25.319 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:52:25.320 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:52:25.320 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:52:25.321 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:52:25.321 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:52:25.321 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:52:25.321 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:52:25.321 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:52:25.321 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:52:25.321 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:52:25.321 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:52:25.324 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:52:25.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:52:25.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:52:25.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:52:25.324 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:52:25.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:52:25.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:52:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:52:25.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:52:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:25.325 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:52:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:25.325 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:52:25.325 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:52:25.325 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:52:25.325 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:52:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:25.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:52:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:25.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:25.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:25.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:25.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:25.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:25.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:25.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:25.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:25.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:25.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:25.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:25.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:25.329 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:52:25.813 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:52:25.839 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:52:25.841 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:52:25.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:52:25.842 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:52:25.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:52:25.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:52:25.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:52:25.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:52:25.844 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:52:25.844 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:52:25.844 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:52:25.844 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:52:26.288 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:52:26.327 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:52:26.327 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:52:26.327 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:52:26.328 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:52:26.765 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:52:27.243 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:52:27.328 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:52:27.328 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:52:27.328 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:52:27.329 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:52:27.721 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:52:28.199 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:52:28.329 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:52:28.329 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:52:28.330 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:52:28.330 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:52:28.677 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:52:29.155 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:52:29.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:52:29.330 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:52:29.330 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:52:29.330 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:52:29.633 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:52:30.110 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:52:30.331 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:52:30.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:52:30.332 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:52:30.332 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:52:30.589 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:52:31.066 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:52:31.544 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:52:32.022 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:52:32.500 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:52:32.978 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:52:33.456 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:52:33.862 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:52:33.862 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:52:33.866 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:52:33.866 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:52:33.866 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:52:33.866 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:52:33.869 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:52:33.869 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:52:33.869 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:52:33.869 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:52:33.869 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:52:33.869 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:52:33.869 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:52:33.869 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1825 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:52:33.869 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1825 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:52:33.869 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1825 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:52:33.869 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1825 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:52:33.869 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1825 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:52:33.869 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1825 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:52:33.869 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1825 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:52:33.869 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1825 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:52:38.872 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:52:38.872 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:52:38.875 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:52:38.877 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:52:38.878 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:52:38.882 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:52:38.892 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:52:38.894 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:52:38.894 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:52:38.895 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:52:38.895 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:52:38.900 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:52:38.900 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:52:38.901 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:52:38.901 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:52:38.901 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:52:38.901 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:52:38.901 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:52:38.901 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:52:38.906 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:52:38.906 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:52:38.906 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:52:38.906 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:52:38.906 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:52:38.906 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:52:38.906 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:52:38.906 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:52:38.910 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:52:38.910 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:52:38.911 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:52:38.911 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:52:38.911 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:52:38.911 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:52:38.911 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:52:38.911 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:52:38.915 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:52:38.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:52:38.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:52:38.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:52:38.915 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:52:38.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:52:38.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:52:38.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:52:38.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:38.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:52:38.916 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:52:38.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:38.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:38.916 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:52:38.916 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:52:38.916 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:52:38.916 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:52:38.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:38.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:38.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:38.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:52:38.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:38.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:38.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:38.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:38.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:38.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:38.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:38.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:38.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:38.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:38.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:38.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:38.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:38.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:38.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:38.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:38.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:38.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:38.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:38.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:38.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:38.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:38.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:38.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:38.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:38.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:38.921 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:52:39.405 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:52:39.434 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:52:39.435 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:52:39.436 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:52:39.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:52:39.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:52:39.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:52:39.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:52:39.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:52:39.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:52:39.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:52:39.439 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:52:39.439 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:52:39.882 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:52:39.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:52:39.920 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:52:39.920 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:52:39.920 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:52:40.359 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:52:40.837 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:52:40.920 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:52:40.921 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:52:40.921 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:52:40.921 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:52:41.315 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:52:41.793 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:52:41.922 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:52:41.922 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:52:41.922 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:52:41.922 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:52:42.271 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:52:42.749 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:52:42.923 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:52:42.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:52:42.923 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:52:42.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:52:43.227 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:52:43.704 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:52:43.924 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:52:43.924 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:52:43.924 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:52:43.925 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:52:44.182 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:52:44.659 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:52:45.137 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:52:45.615 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:52:46.093 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:52:46.571 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:52:47.049 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:52:47.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:52:47.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:52:47.461 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:52:47.461 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:52:47.461 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:52:47.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:52:47.463 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:52:47.463 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:52:47.463 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:52:47.463 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:52:47.463 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:52:47.463 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:52:47.463 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:52:47.463 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1825 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:52:52.469 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:52:52.469 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:52:52.469 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:52:52.470 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:52:52.471 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:52:52.471 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:52:52.481 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:52:52.482 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:52:52.482 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:52:52.482 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:52:52.482 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:52:52.485 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:52:52.485 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:52:52.485 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:52:52.485 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:52:52.486 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:52:52.486 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:52:52.486 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:52:52.486 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:52:52.488 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:52:52.488 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:52:52.488 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:52:52.488 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:52:52.489 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:52:52.489 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:52:52.489 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:52:52.489 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:52:52.491 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:52:52.491 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:52:52.491 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:52:52.492 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:52:52.492 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:52:52.492 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:52:52.492 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:52:52.492 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:52:52.495 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:52:52.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:52:52.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:52:52.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:52:52.496 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:52:52.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:52:52.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:52:52.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:52:52.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:52.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:52:52.496 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:52:52.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:52.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:52.496 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:52:52.496 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:52:52.496 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:52:52.497 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:52:52.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:52.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:52.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:52.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:52:52.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:52.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:52.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:52.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:52.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:52.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:52.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:52.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:52.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:52.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:52.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:52.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:52.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:52.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:52.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:52.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:52:52.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:52.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:52.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:52.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:52.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:52.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:52:52.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:52.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:52:52.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:52.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:52:52.501 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:52:52.985 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:52:53.014 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:52:53.015 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:52:53.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:52:53.016 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:52:53.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:52:53.017 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:52:53.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:52:53.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:52:53.018 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:52:53.018 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:52:53.018 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:52:53.018 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:52:53.463 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:52:53.499 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:52:53.499 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:52:53.500 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:52:53.500 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:52:53.940 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:52:54.418 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:52:54.500 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:52:54.500 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:52:54.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:52:54.501 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:52:54.896 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:52:55.374 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:52:55.500 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:52:55.501 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:52:55.502 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:52:55.502 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:52:55.852 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:52:56.330 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:52:56.501 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:52:56.502 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:52:56.502 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:52:56.503 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:52:56.808 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:52:57.286 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:52:57.503 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:52:57.503 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:52:57.504 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:52:57.504 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:52:57.764 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:52:58.242 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:52:58.720 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:52:59.197 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:52:59.675 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:53:00.153 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:53:00.630 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:53:01.038 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:53:01.038 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:53:01.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:53:01.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:53:01.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:53:01.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:53:01.049 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:53:01.050 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:53:01.050 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:53:01.050 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:53:01.050 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:53:01.051 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:53:01.051 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:53:01.051 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1827 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:53:01.051 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1827 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:53:01.051 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1827 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:53:01.051 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1827 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:53:01.051 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1827 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:53:01.052 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1827 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:53:01.052 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1827 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:53:01.052 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1827 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:53:06.071 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:53:06.071 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:53:06.073 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:53:06.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:53:06.074 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:53:06.075 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:53:06.083 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:53:06.084 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:53:06.084 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:53:06.084 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:53:06.084 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:53:06.087 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:53:06.087 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:53:06.087 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:53:06.087 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:53:06.088 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:53:06.088 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:53:06.088 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:53:06.088 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:53:06.090 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:53:06.091 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:53:06.091 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:53:06.091 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:53:06.091 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:53:06.091 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:53:06.091 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:53:06.091 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:53:06.094 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:53:06.094 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:53:06.094 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:53:06.094 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:53:06.094 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:53:06.094 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:53:06.094 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:53:06.094 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:53:06.098 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:53:06.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:53:06.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:53:06.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:53:06.098 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:53:06.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:53:06.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:53:06.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:53:06.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:53:06.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:53:06.099 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:53:06.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:53:06.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:53:06.099 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:53:06.099 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:53:06.099 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:53:06.099 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:53:06.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:53:06.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:53:06.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:53:06.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:53:06.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:53:06.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:53:06.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:53:06.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:53:06.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:53:06.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:53:06.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:53:06.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:53:06.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:53:06.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:53:06.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:53:06.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:53:06.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:53:06.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:53:06.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:53:06.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:53:06.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:53:06.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:53:06.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:53:06.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:53:06.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:53:06.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:53:06.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:53:06.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:53:06.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:53:06.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:53:06.104 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:53:06.583 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:53:06.627 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:53:06.629 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:53:06.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:53:06.632 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:53:06.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:53:06.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:53:06.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:53:06.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:53:06.636 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:53:06.636 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:53:06.637 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:53:06.637 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:53:07.061 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:53:07.102 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:53:07.103 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:53:07.103 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:53:07.104 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:53:07.539 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:53:08.016 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:53:08.104 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:53:08.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:53:08.105 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:53:08.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:53:08.493 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:53:08.971 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:53:09.105 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:53:09.105 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:53:09.106 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:53:09.106 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:53:09.449 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:53:09.927 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:53:10.106 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:53:10.106 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:53:10.107 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:53:10.107 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:53:10.404 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:53:10.882 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:53:11.112 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:53:11.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:53:11.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:53:11.114 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:53:11.360 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:53:11.838 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:53:12.316 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:53:12.793 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:53:13.271 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:53:13.749 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:53:14.227 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:53:14.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:53:14.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:53:14.689 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:53:14.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:53:14.689 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:53:14.689 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:53:14.695 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:53:14.695 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:53:14.695 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:53:14.695 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:53:14.696 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:53:14.696 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:53:14.696 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:53:19.694 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:53:19.694 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:53:19.696 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:53:19.696 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:53:19.696 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:53:19.697 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:53:19.708 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:53:19.709 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:53:19.709 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:53:19.710 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:53:19.710 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:53:19.713 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:53:19.713 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:53:19.713 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:53:19.713 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:53:19.714 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:53:19.714 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:53:19.714 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:53:19.714 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:53:19.717 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:53:19.717 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:53:19.718 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:53:19.718 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:53:19.718 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:53:19.718 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:53:19.718 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:53:19.718 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:53:19.721 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:53:19.721 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:53:19.721 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:53:19.721 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:53:19.722 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:53:19.722 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:53:19.722 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:53:19.722 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:53:19.726 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:53:19.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:53:19.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:53:19.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:53:19.727 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:53:19.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:53:19.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:53:19.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:53:19.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:53:19.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:53:19.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:53:19.727 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:53:19.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:53:19.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:53:19.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:53:19.727 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:53:19.727 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:53:19.728 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:53:19.728 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:53:19.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:53:19.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:53:19.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:53:19.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:53:19.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:53:19.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:53:19.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:53:19.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:53:19.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:53:19.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:53:19.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:53:19.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:53:19.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:53:19.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:53:19.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:53:19.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:53:19.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:53:19.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:53:19.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:53:19.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:53:19.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:53:19.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:53:19.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:53:19.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:53:19.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:53:19.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:53:19.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:53:19.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:53:19.732 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:53:20.212 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:53:20.243 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:53:20.243 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:53:20.243 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:53:20.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:53:20.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:53:20.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:53:20.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:53:20.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:53:20.244 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:53:20.244 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:53:20.244 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:53:20.244 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:53:20.689 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:53:20.731 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:53:20.731 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:53:20.732 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:53:20.732 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:53:21.167 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:53:21.645 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:53:21.732 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:53:21.732 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:53:21.733 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:53:21.733 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:53:22.123 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:53:22.601 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:53:22.733 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:53:22.733 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:53:22.733 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:53:22.734 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:53:23.079 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:53:23.556 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:53:23.733 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:53:23.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:53:23.734 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:53:23.734 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:53:24.033 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:53:24.511 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:53:24.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:53:24.735 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:53:24.735 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:53:24.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:53:24.989 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:53:25.466 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:53:25.944 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:53:26.422 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:53:26.900 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:53:27.377 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:53:27.855 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:53:28.333 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:53:28.811 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:53:29.289 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 03:53:29.767 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 03:53:30.245 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 03:53:30.723 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 03:53:31.201 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 03:53:31.678 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 03:53:32.152 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 03:53:32.631 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 03:53:33.108 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 03:53:33.586 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 03:53:34.064 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 03:53:34.541 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 03:53:35.019 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 03:53:35.497 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 03:53:35.975 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 03:53:36.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:53:36.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:53:36.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:53:36.271 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:53:36.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:53:36.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:53:36.273 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:53:36.273 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:53:36.273 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:53:36.273 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:53:36.273 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:53:36.273 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:53:36.273 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3533 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:53:36.273 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:53:36.273 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3533 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:53:36.273 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3533 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:53:36.273 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3533 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:53:36.273 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3533 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:53:36.273 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3533 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:53:36.273 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3534 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:53:36.273 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3534 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:53:36.273 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3534 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:53:36.273 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3534 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:53:36.273 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3534 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:53:36.273 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3534 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:53:36.273 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3534 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:53:36.273 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3534 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:53:41.275 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:53:41.275 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:53:41.277 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:53:41.277 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:53:41.278 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:53:41.279 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:53:41.289 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:53:41.291 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:53:41.291 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:53:41.292 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:53:41.292 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:53:41.297 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:53:41.297 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:53:41.297 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:53:41.297 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:53:41.298 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:53:41.298 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:53:41.298 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:53:41.298 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:53:41.302 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:53:41.303 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:53:41.303 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:53:41.303 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:53:41.303 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:53:41.303 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:53:41.303 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:53:41.303 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:53:41.307 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:53:41.307 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:53:41.308 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:53:41.308 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:53:41.308 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:53:41.308 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:53:41.308 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:53:41.308 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:53:41.313 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:53:41.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:53:41.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:53:41.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:53:41.314 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:53:41.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:53:41.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:53:41.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:53:41.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:53:41.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:53:41.314 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:53:41.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:53:41.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:53:41.314 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:53:41.315 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:53:41.315 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:53:41.315 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:53:41.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:53:41.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:53:41.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:53:41.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:53:41.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:53:41.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:53:41.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:53:41.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:53:41.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:53:41.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:53:41.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:53:41.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:53:41.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:53:41.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:53:41.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:53:41.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:53:41.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:53:41.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:53:41.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:53:41.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:53:41.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:53:41.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:53:41.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:53:41.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:53:41.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:53:41.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:53:41.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:53:41.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:53:41.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:53:41.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:53:41.319 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:53:41.803 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:53:41.840 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:53:41.842 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:53:41.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:53:41.844 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:53:41.852 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:53:41.852 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:53:41.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:53:41.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:53:41.852 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:53:41.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:53:41.853 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:53:41.853 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:53:42.280 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:53:42.319 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:53:42.319 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:53:42.319 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:53:42.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:53:42.758 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:53:43.236 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:53:43.319 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:53:43.320 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:53:43.320 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:53:43.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:53:43.714 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:53:44.192 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:53:44.320 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:53:44.321 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:53:44.321 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:53:44.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:53:44.670 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:53:45.148 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:53:45.322 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:53:45.322 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:53:45.322 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:53:45.323 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:53:45.626 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:53:46.104 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:53:46.323 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:53:46.323 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:53:46.323 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:53:46.323 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:53:46.582 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:53:47.060 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:53:47.539 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:53:48.017 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:53:48.494 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:53:48.973 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:53:49.451 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:53:49.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:53:49.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:53:49.906 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:53:49.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:53:49.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:53:49.906 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:53:49.907 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:53:49.907 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:53:49.907 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:53:49.907 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:53:49.907 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:53:49.907 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:53:49.907 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:53:54.911 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:53:54.911 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:53:54.913 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:53:54.914 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:53:54.914 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:53:54.915 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:53:54.924 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:53:54.926 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:53:54.926 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:53:54.926 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:53:54.926 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:53:54.930 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:53:54.930 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:53:54.931 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:53:54.931 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:53:54.931 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:53:54.931 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:53:54.932 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:53:54.932 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:53:54.934 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:53:54.934 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:53:54.934 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:53:54.935 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:53:54.935 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:53:54.935 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:53:54.935 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:53:54.935 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:53:54.937 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:53:54.938 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:53:54.938 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:53:54.938 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:53:54.938 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:53:54.938 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:53:54.938 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:53:54.938 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:53:54.942 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:53:54.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:53:54.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:53:54.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:53:54.942 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:53:54.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:53:54.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:53:54.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:53:54.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:53:54.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:53:54.942 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:53:54.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:53:54.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:53:54.942 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:53:54.943 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:53:54.943 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:53:54.943 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:53:54.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:53:54.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:53:54.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:53:54.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:53:54.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:53:54.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:53:54.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:53:54.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:53:54.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:53:54.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:53:54.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:53:54.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:53:54.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:53:54.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:53:54.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:53:54.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:53:54.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:53:54.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:53:54.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:53:54.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:53:54.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:53:54.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:53:54.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:53:54.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:53:54.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:53:54.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:53:54.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:53:54.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:53:54.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:53:54.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:53:54.947 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:53:55.431 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:53:55.465 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:53:55.467 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:53:55.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:53:55.469 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:53:55.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:53:55.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:53:55.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:53:55.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:53:55.473 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:53:55.473 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:53:55.473 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:53:55.473 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:53:55.908 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:53:55.945 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:53:55.946 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:53:55.946 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:53:55.947 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:53:56.386 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:53:56.863 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:53:56.947 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:53:56.947 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:53:56.947 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:53:56.948 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:53:57.341 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:53:57.818 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:53:57.948 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:53:57.948 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:53:57.948 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:53:57.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:53:58.296 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:53:58.774 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:53:58.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:53:58.949 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:53:58.949 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:53:58.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:53:59.252 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:53:59.730 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:53:59.950 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:53:59.950 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:53:59.950 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:53:59.951 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:54:00.208 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:54:00.686 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:54:01.164 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:54:01.642 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:54:02.120 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:54:02.598 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:54:03.076 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:54:03.554 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:54:04.032 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:54:04.510 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 03:54:04.985 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 03:54:05.462 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 03:54:05.940 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 03:54:06.418 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 03:54:06.895 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 03:54:07.373 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 03:54:07.851 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 03:54:08.329 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 03:54:08.806 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 03:54:09.284 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 03:54:09.762 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 03:54:10.240 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 03:54:10.718 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 03:54:11.195 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 03:54:11.539 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:54:11.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:54:11.556 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:54:11.556 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:54:11.556 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:54:11.558 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:54:11.561 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:54:11.561 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:54:11.561 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:54:11.561 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:54:11.561 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:54:11.561 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:54:11.562 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:54:11.562 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3548 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:54:11.562 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3548 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:54:11.562 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3548 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:54:11.562 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3548 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:54:11.562 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3548 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:54:11.562 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3548 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:54:11.562 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3549 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:54:11.562 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3549 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:54:11.562 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3549 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:54:11.562 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3549 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:54:11.562 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3549 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:54:11.563 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3549 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:54:11.563 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3549 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:54:11.563 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3549 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:54:16.562 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:54:16.562 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:54:16.564 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:54:16.565 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:54:16.566 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:54:16.567 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:54:16.575 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:54:16.576 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:54:16.576 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:54:16.576 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:54:16.577 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:54:16.579 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:54:16.579 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:54:16.580 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:54:16.580 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:54:16.580 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:54:16.580 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:54:16.580 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:54:16.580 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:54:16.583 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:54:16.583 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:54:16.583 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:54:16.583 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:54:16.583 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:54:16.583 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:54:16.583 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:54:16.585 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:54:16.587 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:54:16.587 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:54:16.587 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:54:16.587 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:54:16.588 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:54:16.588 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:54:16.588 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:54:16.588 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:54:16.591 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:54:16.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:54:16.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:54:16.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:54:16.591 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:54:16.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:54:16.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:54:16.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:54:16.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:16.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:54:16.592 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:54:16.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:16.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:16.592 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:54:16.592 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:54:16.592 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:54:16.592 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:54:16.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:16.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:16.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:16.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:54:16.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:16.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:16.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:16.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:16.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:16.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:16.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:16.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:16.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:16.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:16.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:16.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:16.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:16.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:16.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:16.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:16.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:16.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:16.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:16.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:16.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:16.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:16.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:16.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:16.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:16.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:16.597 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:54:17.081 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:54:17.111 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:54:17.113 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:54:17.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:54:17.114 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:54:17.131 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:54:17.131 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:54:17.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:54:17.170 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:54:17.170 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:54:17.170 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:54:17.171 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:54:17.175 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:54:17.175 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:54:17.175 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:54:17.175 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:54:17.175 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:54:17.175 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:54:17.175 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:54:22.175 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:54:22.176 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:54:22.178 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:54:22.178 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:54:22.178 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:54:22.179 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:54:22.188 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:54:22.189 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:54:22.189 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:54:22.189 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:54:22.189 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:54:22.193 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:54:22.193 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:54:22.193 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:54:22.193 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:54:22.194 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:54:22.194 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:54:22.194 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:54:22.194 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:54:22.198 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:54:22.198 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:54:22.199 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:54:22.199 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:54:22.199 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:54:22.199 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:54:22.199 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:54:22.199 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:54:22.202 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:54:22.203 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:54:22.203 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:54:22.203 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:54:22.203 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:54:22.203 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:54:22.203 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:54:22.203 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:54:22.207 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:54:22.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:54:22.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:54:22.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:54:22.207 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:54:22.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:54:22.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:54:22.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:54:22.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:22.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:54:22.208 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:54:22.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:22.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:22.208 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:54:22.208 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:54:22.208 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:54:22.208 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:54:22.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:22.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:22.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:22.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:54:22.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:22.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:22.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:22.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:22.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:22.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:22.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:22.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:22.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:22.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:22.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:22.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:22.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:22.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:22.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:22.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:22.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:22.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:22.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:22.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:22.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:22.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:22.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:22.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:22.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:22.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:22.213 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:54:22.696 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:54:22.727 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:54:22.728 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:54:22.729 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:54:22.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:54:22.746 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:54:22.746 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:54:22.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:54:22.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:54:22.798 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:54:22.798 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:54:22.798 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:54:22.804 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:54:22.804 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:54:22.804 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:54:22.804 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:54:22.804 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:54:22.804 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:54:22.804 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:54:22.805 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:54:22.805 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:54:22.805 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:54:22.805 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:54:22.805 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:54:22.805 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:54:27.803 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:54:27.803 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:54:27.804 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:54:27.804 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:54:27.804 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:54:27.805 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:54:27.813 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:54:27.816 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:54:27.816 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:54:27.816 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:54:27.816 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:54:27.823 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:54:27.823 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:54:27.823 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:54:27.823 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:54:27.824 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:54:27.824 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:54:27.824 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:54:27.824 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:54:27.829 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:54:27.829 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:54:27.829 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:54:27.829 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:54:27.829 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:54:27.829 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:54:27.830 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:54:27.830 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:54:27.833 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:54:27.833 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:54:27.834 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:54:27.834 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:54:27.834 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:54:27.834 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:54:27.834 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:54:27.834 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:54:27.839 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:54:27.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:54:27.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:54:27.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:54:27.839 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:54:27.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:54:27.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:54:27.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:54:27.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:27.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:54:27.840 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:54:27.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:27.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:27.840 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:54:27.840 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:54:27.840 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:54:27.840 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:54:27.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:27.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:27.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:27.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:54:27.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:27.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:27.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:27.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:27.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:27.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:27.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:27.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:27.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:27.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:27.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:27.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:27.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:27.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:27.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:27.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:27.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:27.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:27.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:27.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:27.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:27.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:27.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:27.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:27.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:27.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:27.845 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:54:28.328 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:54:28.361 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:54:28.363 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:54:28.364 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:54:28.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:54:28.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:54:28.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:54:28.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:54:28.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:54:28.398 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:54:28.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:54:28.398 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:54:28.399 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:54:28.399 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:54:28.399 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:54:28.399 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:54:28.399 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:54:28.399 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:54:28.399 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:54:28.399 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:54:28.399 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:54:28.399 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:54:28.399 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:54:28.399 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:54:33.402 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:54:33.402 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:54:33.404 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:54:33.404 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:54:33.404 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:54:33.405 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:54:33.414 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:54:33.415 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:54:33.415 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:54:33.416 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:54:33.416 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:54:33.419 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:54:33.419 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:54:33.419 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:54:33.419 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:54:33.419 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:54:33.419 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:54:33.419 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:54:33.419 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:54:33.422 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:54:33.422 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:54:33.422 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:54:33.422 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:54:33.422 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:54:33.423 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:54:33.423 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:54:33.423 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:54:33.425 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:54:33.425 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:54:33.425 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:54:33.425 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:54:33.425 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:54:33.425 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:54:33.425 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:54:33.425 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:54:33.428 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:54:33.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:54:33.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:54:33.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:54:33.429 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:54:33.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:54:33.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:54:33.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:54:33.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:54:33.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:33.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:33.429 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:54:33.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:33.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:33.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:33.429 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:54:33.429 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:54:33.429 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:54:33.429 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:54:33.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:33.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:33.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:33.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:54:33.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:33.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:33.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:33.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:33.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:33.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:33.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:33.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:33.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:33.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:33.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:33.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:33.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:33.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:33.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:33.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:33.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:33.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:33.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:33.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:33.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:33.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:33.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:33.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:33.434 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:54:33.916 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:54:33.948 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:54:33.949 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:54:33.951 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:54:33.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:54:33.967 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:54:33.967 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:54:33.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:54:34.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:54:34.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:54:34.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:54:34.024 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:54:34.025 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:54:34.025 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:54:34.025 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:54:34.025 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:54:34.025 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:54:34.025 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:54:34.025 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:54:34.025 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:54:34.025 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:54:34.025 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:54:34.026 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:54:39.029 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:54:39.029 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:54:39.030 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:54:39.031 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:54:39.031 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:54:39.032 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:54:39.042 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:54:39.043 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:54:39.043 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:54:39.044 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:54:39.044 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:54:39.048 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:54:39.049 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:54:39.049 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:54:39.049 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:54:39.049 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:54:39.050 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:54:39.050 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:54:39.050 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:54:39.052 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:54:39.052 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:54:39.052 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:54:39.052 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:54:39.052 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:54:39.052 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:54:39.052 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:54:39.052 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:54:39.054 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:54:39.054 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:54:39.054 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:54:39.054 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:54:39.055 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:54:39.055 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:54:39.055 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:54:39.055 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:54:39.059 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:54:39.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:54:39.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:54:39.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:54:39.059 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:54:39.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:54:39.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:54:39.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:54:39.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:39.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:54:39.059 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:54:39.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:39.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:39.060 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:54:39.060 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:54:39.060 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:54:39.060 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:54:39.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:39.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:39.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:39.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:54:39.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:39.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:39.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:39.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:39.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:39.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:39.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:39.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:39.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:39.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:39.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:39.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:39.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:39.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:39.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:39.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:39.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:39.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:39.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:39.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:39.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:39.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:39.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:39.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:39.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:39.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:39.065 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:54:39.548 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:54:39.587 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:54:39.589 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:54:39.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:54:39.592 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:54:39.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:54:39.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:54:39.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:54:39.658 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:54:39.658 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:54:39.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:54:39.662 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:54:39.662 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:54:39.662 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:54:39.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:54:39.664 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:54:39.665 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:54:39.665 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:54:39.665 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:54:39.665 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:54:39.665 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:54:39.665 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=129 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:54:39.665 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:54:39.665 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=129 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:54:39.665 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=129 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:54:39.665 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=129 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:54:39.665 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:54:39.665 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=129 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:54:39.665 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=129 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:54:39.665 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:54:44.667 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:54:44.667 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:54:44.668 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:54:44.669 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:54:44.669 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:54:44.670 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:54:44.679 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:54:44.680 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:54:44.680 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:54:44.680 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:54:44.680 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:54:44.683 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:54:44.684 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:54:44.684 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:54:44.684 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:54:44.684 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:54:44.685 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:54:44.685 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:54:44.685 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:54:44.687 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:54:44.687 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:54:44.687 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:54:44.687 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:54:44.688 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:54:44.688 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:54:44.688 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:54:44.688 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:54:44.690 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:54:44.690 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:54:44.691 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:54:44.691 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:54:44.691 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:54:44.691 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:54:44.691 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:54:44.691 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:54:44.694 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:54:44.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:54:44.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:54:44.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:54:44.695 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:54:44.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:54:44.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:54:44.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:54:44.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:44.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:54:44.695 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:54:44.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:44.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:44.695 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:54:44.695 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:54:44.695 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:54:44.695 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:54:44.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:44.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:44.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:44.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:54:44.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:44.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:44.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:44.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:44.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:44.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:44.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:44.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:44.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:44.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:44.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:44.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:44.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:44.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:44.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:44.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:44.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:44.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:44.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:44.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:44.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:44.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:44.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:44.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:44.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:44.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:44.700 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:54:45.183 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:54:45.214 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:54:45.214 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:54:45.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:54:45.215 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:54:45.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:54:45.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:54:45.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:54:45.285 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:54:45.285 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:54:45.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:54:45.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:54:45.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:54:45.291 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:54:45.291 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:54:45.293 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:54:45.294 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:54:45.294 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:54:45.294 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:54:45.294 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:54:45.294 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:54:45.294 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:54:50.296 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:54:50.296 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:54:50.298 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:54:50.298 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:54:50.299 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:54:50.299 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:54:50.309 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:54:50.311 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:54:50.311 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:54:50.311 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:54:50.311 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:54:50.317 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:54:50.317 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:54:50.318 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:54:50.318 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:54:50.318 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:54:50.318 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:54:50.318 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:54:50.318 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:54:50.326 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:54:50.326 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:54:50.327 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:54:50.327 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:54:50.327 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:54:50.327 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:54:50.327 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:54:50.327 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:54:50.333 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:54:50.333 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:54:50.333 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:54:50.333 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:54:50.333 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:54:50.334 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:54:50.334 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:54:50.334 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:54:50.341 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:54:50.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:54:50.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:54:50.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:54:50.341 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:54:50.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:54:50.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:54:50.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:54:50.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:50.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:54:50.342 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:54:50.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:50.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:50.342 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:54:50.342 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:54:50.342 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:54:50.343 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:54:50.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:50.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:50.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:50.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:54:50.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:50.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:50.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:50.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:50.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:50.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:50.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:50.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:50.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:50.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:50.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:50.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:50.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:50.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:50.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:50.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:54:50.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:50.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:50.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:50.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:50.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:50.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:54:50.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:50.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:54:50.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:50.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:54:50.347 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:54:50.831 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:54:50.859 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:54:50.860 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:54:50.860 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:54:50.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:54:50.861 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:54:50.861 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:54:50.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:54:50.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:54:50.862 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:54:50.862 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:54:50.862 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:54:50.862 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:54:51.307 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:54:51.347 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:54:51.347 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:54:51.348 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:54:51.348 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:54:51.785 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:54:52.263 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:54:52.348 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:54:52.348 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:54:52.348 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:54:52.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:54:52.740 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:54:53.218 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:54:53.349 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:54:53.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:54:53.349 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:54:53.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:54:53.695 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:54:54.173 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:54:54.350 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:54:54.350 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:54:54.350 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:54:54.350 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:54:54.652 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:54:55.130 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:54:55.351 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:54:55.351 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:54:55.351 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:54:55.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:54:55.607 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:54:56.085 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:54:56.564 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:54:57.042 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:54:57.520 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:54:57.997 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:54:58.476 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:54:58.954 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:54:59.432 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:54:59.909 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 03:55:00.387 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 03:55:00.866 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 03:55:01.344 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 03:55:01.822 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 03:55:02.300 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 03:55:02.778 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 03:55:03.256 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 03:55:03.734 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 03:55:04.212 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 03:55:04.690 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 03:55:05.168 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 03:55:05.646 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 03:55:06.124 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 03:55:06.602 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 03:55:07.080 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 03:55:07.558 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 03:55:08.036 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 03:55:08.514 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 03:55:08.992 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 03:55:09.470 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 03:55:09.948 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 03:55:10.426 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 03:55:10.904 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 03:55:11.382 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 03:55:11.859 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 03:55:12.338 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 03:55:12.816 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 03:55:13.294 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 03:55:13.771 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 03:55:14.250 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 03:55:14.728 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 03:55:15.205 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 03:55:15.683 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 03:55:16.160 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 03:55:16.638 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 03:55:17.116 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 03:55:17.593 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 03:55:18.071 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 03:55:18.550 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 03:55:19.027 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-15 03:55:19.506 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-15 03:55:19.984 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-15 03:55:20.462 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-15 03:55:20.940 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-15 03:55:21.418 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-15 03:55:21.896 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-15 03:55:22.374 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-15 03:55:22.852 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-15 03:55:23.329 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-15 03:55:23.806 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-15 03:55:24.284 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-15 03:55:24.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:55:24.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:55:24.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:55:24.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:55:24.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:55:24.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:55:24.371 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:55:24.371 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:55:24.371 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:55:24.371 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:55:24.371 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:55:24.371 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:55:24.371 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:55:24.371 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=7262 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:55:24.371 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=7262 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:55:24.371 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=7262 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:55:24.371 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=7262 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:55:29.376 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:55:29.376 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:55:29.378 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:55:29.379 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:55:29.379 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:55:29.380 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:55:29.388 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:55:29.388 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:55:29.388 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:55:29.389 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:55:29.389 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:55:29.391 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:55:29.391 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:55:29.392 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:55:29.392 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:55:29.392 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:55:29.392 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:55:29.392 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:55:29.392 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:55:29.394 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:55:29.394 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:55:29.394 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:55:29.394 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:55:29.394 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:55:29.394 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:55:29.395 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:55:29.395 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:55:29.397 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:55:29.397 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:55:29.397 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:55:29.397 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:55:29.397 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:55:29.397 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:55:29.397 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:55:29.397 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:55:29.400 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:55:29.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:55:29.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:55:29.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:55:29.401 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:55:29.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:55:29.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:55:29.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:55:29.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:55:29.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:55:29.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:55:29.401 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:55:29.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:55:29.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:55:29.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:55:29.401 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:55:29.401 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:55:29.401 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:55:29.401 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:55:29.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:55:29.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:55:29.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:55:29.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:55:29.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:55:29.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:55:29.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:55:29.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:55:29.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:55:29.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:55:29.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:55:29.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:55:29.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:55:29.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:55:29.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:55:29.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:55:29.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:55:29.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:55:29.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:55:29.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:55:29.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:55:29.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:55:29.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:55:29.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:55:29.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:55:29.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:55:29.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:55:29.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:55:29.406 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:55:29.888 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:55:29.921 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:55:29.922 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:55:29.922 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:55:29.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:55:30.365 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:55:30.404 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:55:30.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:55:30.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:55:30.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:55:30.843 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:55:31.322 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:55:31.406 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:55:31.406 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:55:31.406 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:55:31.407 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:55:31.801 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:55:32.280 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:55:32.408 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:55:32.408 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:55:32.408 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:55:32.408 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:55:32.758 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:55:32.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:55:32.945 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:55:32.945 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:55:32.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:55:32.945 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:55:32.946 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:55:32.946 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:55:32.946 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:55:32.946 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:55:32.946 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:55:32.946 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:55:32.946 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:55:37.951 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:55:37.951 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:55:37.953 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:55:37.954 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:55:37.954 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:55:37.955 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:55:37.964 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:55:37.965 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:55:37.965 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:55:37.965 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:55:37.965 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:55:37.968 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:55:37.968 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:55:37.968 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:55:37.968 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:55:37.969 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:55:37.969 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:55:37.969 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:55:37.969 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:55:37.972 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:55:37.972 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:55:37.972 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:55:37.972 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:55:37.972 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:55:37.972 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:55:37.972 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:55:37.972 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:55:37.975 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:55:37.975 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:55:37.975 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:55:37.975 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:55:37.975 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:55:37.976 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:55:37.976 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:55:37.976 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:55:37.980 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:55:37.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:55:37.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:55:37.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:55:37.980 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:55:37.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:55:37.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:55:37.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:55:37.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:55:37.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:55:37.980 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:55:37.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:55:37.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:55:37.980 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:55:37.981 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:55:37.981 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:55:37.981 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:55:37.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:55:37.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:55:37.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:55:37.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:55:37.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:55:37.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:55:37.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:55:37.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:55:37.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:55:37.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:55:37.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:55:37.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:55:37.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:55:37.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:55:37.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:55:37.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:55:37.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:55:37.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:55:37.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:55:37.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:55:37.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:55:37.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:55:37.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:55:37.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:55:37.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:55:37.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:55:37.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:55:37.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:55:37.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:55:37.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:55:37.985 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:55:38.468 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:55:38.495 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:55:38.496 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:55:38.496 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:55:38.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:55:38.944 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:55:38.984 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:55:38.984 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:55:38.984 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:55:38.984 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:55:39.423 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:55:39.902 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:55:39.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:55:39.985 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:55:39.985 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:55:39.985 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:55:40.381 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:55:40.859 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:55:40.986 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:55:40.987 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:55:40.987 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:55:40.987 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:55:41.338 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:55:41.816 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:55:41.987 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:55:41.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:55:41.988 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:55:41.988 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:55:42.294 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:55:42.772 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:55:42.989 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:55:42.990 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:55:42.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:55:42.990 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:55:43.251 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:55:43.730 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:55:44.208 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:55:44.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:55:44.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:55:44.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:55:44.506 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:55:44.507 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:55:44.507 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:55:44.507 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:55:44.507 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:55:44.507 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:55:44.507 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:55:44.507 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:55:49.510 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:55:49.510 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:55:49.512 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:55:49.513 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:55:49.514 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:55:49.514 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:55:49.524 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:55:49.525 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:55:49.525 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:55:49.525 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:55:49.525 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:55:49.528 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:55:49.529 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:55:49.529 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:55:49.529 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:55:49.529 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:55:49.529 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:55:49.529 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:55:49.529 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:55:49.532 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:55:49.532 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:55:49.533 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:55:49.533 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:55:49.533 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:55:49.533 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:55:49.533 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:55:49.533 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:55:49.536 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:55:49.536 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:55:49.536 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:55:49.536 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:55:49.536 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:55:49.537 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:55:49.537 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:55:49.537 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:55:49.541 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:55:49.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:55:49.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:55:49.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:55:49.541 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:55:49.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:55:49.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:55:49.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:55:49.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:55:49.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:55:49.542 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:55:49.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:55:49.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:55:49.542 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:55:49.542 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:55:49.542 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:55:49.542 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:55:49.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:55:49.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:55:49.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:55:49.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:55:49.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:55:49.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:55:49.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:55:49.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:55:49.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:55:49.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:55:49.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:55:49.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:55:49.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:55:49.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:55:49.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:55:49.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:55:49.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:55:49.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:55:49.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:55:49.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:55:49.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:55:49.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:55:49.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:55:49.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:55:49.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:55:49.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:55:49.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:55:49.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:55:49.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:55:49.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:55:49.547 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:55:50.029 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:55:50.064 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:55:50.065 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:55:50.067 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:55:50.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:55:50.506 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:55:50.546 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:55:50.546 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:55:50.546 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:55:50.547 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:55:50.984 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:55:51.463 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:55:51.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:55:51.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:55:51.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:55:51.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:55:51.941 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:55:52.421 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:55:52.549 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:55:52.549 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:55:52.550 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:55:52.550 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:55:52.899 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:55:53.377 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:55:53.551 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:55:53.551 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:55:53.551 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:55:53.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:55:53.854 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:55:54.333 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:55:54.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:55:54.552 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:55:54.552 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:55:54.553 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:55:54.812 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:55:55.289 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:55:55.768 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:55:56.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:55:56.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:55:56.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:55:56.083 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:55:56.085 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:55:56.085 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:55:56.085 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:55:56.085 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:55:56.085 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:55:56.085 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:55:56.085 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:56:01.087 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:56:01.087 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:56:01.089 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:56:01.089 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:56:01.090 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:56:01.090 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:56:01.099 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:56:01.100 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:56:01.100 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:56:01.100 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:56:01.100 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:56:01.103 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:56:01.104 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:56:01.104 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:56:01.104 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:56:01.104 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:56:01.105 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:56:01.105 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:56:01.105 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:56:01.108 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:56:01.108 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:56:01.108 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:56:01.108 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:56:01.108 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:56:01.109 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:56:01.109 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:56:01.109 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:56:01.112 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:56:01.113 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:56:01.113 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:56:01.113 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:56:01.113 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:56:01.113 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:56:01.113 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:56:01.113 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:56:01.120 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:56:01.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:56:01.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:56:01.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:56:01.120 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:56:01.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:56:01.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:56:01.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:56:01.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:01.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:56:01.121 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:56:01.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:01.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:01.121 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:56:01.121 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:56:01.121 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:56:01.121 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:56:01.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:01.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:01.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:01.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:56:01.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:01.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:01.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:01.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:01.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:01.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:01.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:01.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:01.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:01.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:01.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:01.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:01.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:01.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:01.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:01.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:01.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:01.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:01.126 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:56:01.609 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:56:01.648 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:56:01.649 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:56:01.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:56:01.650 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:56:02.085 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:56:02.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:56:02.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:56:02.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:56:02.129 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:56:02.564 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:56:03.043 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:56:03.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:56:03.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:56:03.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:56:03.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:56:03.522 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:56:04.000 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:56:04.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:56:04.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:56:04.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:56:04.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:56:04.479 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:56:04.958 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:56:05.131 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:56:05.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:56:05.131 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:56:05.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:56:05.436 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:56:05.915 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:56:06.133 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:56:06.133 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:56:06.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:56:06.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:56:06.394 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:56:06.872 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:56:07.351 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:56:07.662 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:56:07.663 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:56:07.663 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:56:07.663 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:56:07.664 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:56:07.664 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:56:07.664 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:56:07.664 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:56:07.664 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:56:07.664 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:56:07.664 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:56:12.669 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:56:12.670 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:56:12.670 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:56:12.671 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:56:12.672 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:56:12.673 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:56:12.680 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:56:12.682 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:56:12.682 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:56:12.682 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:56:12.682 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:56:12.685 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:56:12.685 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:56:12.685 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:56:12.685 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:56:12.686 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:56:12.686 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:56:12.686 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:56:12.686 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:56:12.688 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:56:12.688 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:56:12.688 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:56:12.688 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:56:12.689 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:56:12.689 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:56:12.689 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:56:12.689 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:56:12.691 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:56:12.691 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:56:12.691 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:56:12.691 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:56:12.691 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:56:12.691 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:56:12.691 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:56:12.691 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:56:12.694 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:56:12.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:56:12.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:56:12.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:56:12.695 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:56:12.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:56:12.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:56:12.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:56:12.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:12.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:56:12.695 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:56:12.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:12.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:12.695 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:56:12.695 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:56:12.695 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:56:12.695 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:56:12.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:12.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:12.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:12.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:56:12.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:12.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:12.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:12.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:12.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:12.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:12.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:12.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:12.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:12.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:12.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:12.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:12.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:12.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:12.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:12.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:12.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:12.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:12.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:12.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:12.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:12.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:12.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:12.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:12.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:12.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:12.700 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:56:13.184 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:56:13.211 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:56:13.211 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:56:13.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:56:13.212 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:56:13.661 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:56:13.698 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:56:13.698 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:56:13.698 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:56:13.698 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:56:14.140 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:56:14.618 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:56:14.699 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:56:14.699 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:56:14.699 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:56:14.700 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:56:15.097 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:56:15.576 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:56:15.700 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:56:15.701 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:56:15.701 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:56:15.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:56:16.055 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:56:16.533 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:56:16.702 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:56:16.702 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:56:16.702 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:56:16.702 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:56:17.012 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:56:17.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:56:17.490 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:56:17.703 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:56:17.704 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:56:17.704 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:56:17.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:56:17.969 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:56:18.447 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:56:18.926 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:56:19.405 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:56:19.884 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:56:20.362 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:56:20.841 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:56:21.232 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:56:21.233 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:56:21.233 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:56:21.233 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:56:21.235 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:56:21.235 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:56:21.235 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:56:21.235 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:56:21.235 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:56:21.235 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:56:21.235 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:56:21.235 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1821 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:56:21.235 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1821 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:56:21.235 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1821 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:56:21.235 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1821 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:56:21.235 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1821 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:56:26.258 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:56:26.258 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:56:26.259 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:56:26.260 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:56:26.261 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:56:26.262 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:56:26.270 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:56:26.271 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:56:26.271 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:56:26.271 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:56:26.271 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:56:26.274 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:56:26.275 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:56:26.275 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:56:26.275 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:56:26.275 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:56:26.275 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:56:26.275 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:56:26.275 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:56:26.278 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:56:26.278 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:56:26.279 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:56:26.279 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:56:26.279 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:56:26.279 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:56:26.279 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:56:26.279 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:56:26.282 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:56:26.282 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:56:26.282 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:56:26.282 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:56:26.282 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:56:26.282 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:56:26.282 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:56:26.282 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:56:26.286 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:56:26.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:56:26.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:56:26.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:56:26.286 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:56:26.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:56:26.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:56:26.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:56:26.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:26.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:56:26.286 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:56:26.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:26.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:26.287 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:56:26.287 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:56:26.287 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:56:26.287 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:56:26.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:26.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:26.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:26.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:56:26.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:26.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:26.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:26.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:26.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:26.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:26.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:26.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:26.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:26.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:26.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:26.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:26.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:26.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:26.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:26.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:26.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:26.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:26.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:26.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:26.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:26.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:26.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:26.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:26.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:26.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:26.292 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:56:26.776 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:56:26.803 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:56:26.804 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:56:26.805 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:56:26.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:56:27.253 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:56:27.290 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:56:27.290 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:56:27.290 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:56:27.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:56:27.732 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:56:28.210 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:56:28.291 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:56:28.292 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:56:28.292 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:56:28.292 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:56:28.689 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:56:29.168 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:56:29.293 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:56:29.293 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:56:29.293 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:56:29.294 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:56:29.645 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:56:30.124 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:56:30.295 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:56:30.295 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:56:30.295 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:56:30.295 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:56:30.603 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:56:30.813 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:56:30.813 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:56:30.813 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:56:30.813 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:56:30.815 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:56:30.815 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:56:30.815 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:56:30.815 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:56:30.815 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:56:30.815 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:56:30.815 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:56:35.818 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:56:35.818 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:56:35.820 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:56:35.821 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:56:35.822 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:56:35.823 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:56:35.836 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:56:35.837 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:56:35.837 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:56:35.838 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:56:35.838 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:56:35.841 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:56:35.841 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:56:35.842 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:56:35.842 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:56:35.842 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:56:35.842 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:56:35.842 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:56:35.842 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:56:35.846 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:56:35.846 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:56:35.846 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:56:35.846 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:56:35.846 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:56:35.846 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:56:35.846 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:56:35.846 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:56:35.850 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:56:35.850 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:56:35.850 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:56:35.850 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:56:35.850 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:56:35.850 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:56:35.850 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:56:35.850 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:56:35.855 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:56:35.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:56:35.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:56:35.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:56:35.855 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:56:35.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:56:35.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:56:35.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:56:35.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:35.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:56:35.856 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:56:35.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:35.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:35.856 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:56:35.856 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:56:35.856 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:56:35.856 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:56:35.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:35.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:35.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:35.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:56:35.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:35.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:35.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:35.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:35.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:35.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:35.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:35.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:35.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:35.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:35.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:35.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:35.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:35.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:35.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:35.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:35.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:35.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:35.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:35.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:35.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:35.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:35.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:35.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:35.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:35.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:35.861 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:56:36.345 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:56:36.372 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:56:36.372 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:56:36.372 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:56:36.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:56:36.426 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:56:36.426 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:56:36.426 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:56:36.426 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:56:36.427 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:56:36.427 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:56:36.427 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:56:36.427 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:56:36.427 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:56:36.427 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:56:36.428 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:56:36.428 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:56:36.428 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:56:36.428 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:56:36.428 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:56:36.428 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:56:41.442 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:56:41.442 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:56:41.444 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:56:41.445 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:56:41.445 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:56:41.446 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:56:41.453 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:56:41.454 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:56:41.454 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:56:41.455 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:56:41.455 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:56:41.458 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:56:41.458 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:56:41.458 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:56:41.458 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:56:41.458 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:56:41.459 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:56:41.459 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:56:41.459 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:56:41.463 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:56:41.463 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:56:41.463 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:56:41.463 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:56:41.464 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:56:41.464 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:56:41.464 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:56:41.464 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:56:41.471 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:56:41.471 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:56:41.471 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:56:41.471 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:56:41.471 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:56:41.472 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:56:41.472 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:56:41.472 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:56:41.481 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:56:41.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:56:41.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:56:41.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:56:41.481 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:56:41.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:56:41.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:56:41.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:56:41.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:41.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:56:41.482 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:56:41.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:41.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:41.482 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:56:41.482 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:56:41.482 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:56:41.482 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:56:41.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:41.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:41.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:41.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:56:41.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:41.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:41.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:41.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:41.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:41.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:41.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:41.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:41.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:41.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:41.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:41.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:41.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:41.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:41.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:41.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:41.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:41.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:41.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:41.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:41.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:41.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:41.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:41.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:41.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:41.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:41.487 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:56:41.967 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:56:42.007 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:56:42.008 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:56:42.009 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:56:42.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:56:42.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:56:42.062 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:56:42.063 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:56:42.063 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:56:42.063 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:56:42.064 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:56:42.064 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:56:42.064 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:56:42.064 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:56:42.064 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:56:42.064 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:56:42.064 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:56:42.064 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:56:42.064 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:56:42.064 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:56:42.064 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:56:47.067 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:56:47.067 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:56:47.068 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:56:47.070 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:56:47.070 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:56:47.071 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:56:47.081 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:56:47.082 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:56:47.082 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:56:47.082 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:56:47.083 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:56:47.086 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:56:47.086 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:56:47.087 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:56:47.087 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:56:47.087 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:56:47.087 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:56:47.088 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:56:47.088 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:56:47.090 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:56:47.091 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:56:47.091 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:56:47.091 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:56:47.091 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:56:47.091 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:56:47.091 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:56:47.091 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:56:47.094 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:56:47.094 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:56:47.095 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:56:47.095 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:56:47.095 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:56:47.095 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:56:47.095 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:56:47.095 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:56:47.099 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:56:47.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:56:47.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:56:47.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:56:47.099 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:56:47.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:56:47.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:56:47.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:56:47.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:56:47.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:47.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:47.100 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:56:47.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:47.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:47.100 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:56:47.100 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:56:47.100 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:56:47.100 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:56:47.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:47.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:47.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:47.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:56:47.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:47.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:47.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:47.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:47.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:47.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:47.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:47.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:47.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:47.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:47.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:47.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:47.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:47.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:47.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:47.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:47.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:47.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:47.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:47.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:47.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:47.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:47.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:47.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:47.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:47.105 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:56:47.586 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:56:47.614 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:56:47.615 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:56:47.615 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:56:47.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:56:47.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:56:47.666 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:56:47.666 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:56:47.666 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:56:47.666 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:56:47.666 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:56:47.666 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:56:47.667 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:56:47.667 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:56:47.667 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:56:47.667 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:56:52.672 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:56:52.672 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:56:52.673 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:56:52.674 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:56:52.675 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:56:52.676 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:56:52.685 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:56:52.686 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:56:52.686 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:56:52.686 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:56:52.686 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:56:52.690 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:56:52.691 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:56:52.691 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:56:52.691 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:56:52.691 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:56:52.692 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:56:52.692 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:56:52.692 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:56:52.694 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:56:52.694 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:56:52.694 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:56:52.694 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:56:52.695 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:56:52.695 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:56:52.695 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:56:52.695 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:56:52.697 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:56:52.697 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:56:52.697 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:56:52.697 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:56:52.698 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:56:52.698 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:56:52.698 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:56:52.698 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:56:52.701 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:56:52.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:56:52.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:56:52.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:56:52.701 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:56:52.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:56:52.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:56:52.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:56:52.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:52.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:56:52.702 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:56:52.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:52.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:52.702 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:56:52.702 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:56:52.702 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:56:52.702 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:56:52.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:52.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:52.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:52.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:56:52.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:52.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:52.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:52.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:52.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:52.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:52.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:52.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:52.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:52.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:52.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:52.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:52.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:52.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:52.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:52.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:52.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:52.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:56:52.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:52.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:52.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:52.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:56:52.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:52.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:56:52.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:52.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:56:52.706 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:56:53.190 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:56:53.217 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:56:53.218 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:56:53.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:56:53.218 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:56:53.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:56:53.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:56:53.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:56:53.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:56:53.221 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:56:53.222 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:56:53.222 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:56:53.222 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:56:53.667 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:56:53.705 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:56:53.705 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:56:53.705 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:56:53.705 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:56:54.145 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:56:54.622 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:56:54.706 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:56:54.706 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:56:54.707 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:56:54.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:56:55.101 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:56:55.579 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:56:55.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:56:55.708 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:56:55.708 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:56:55.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:56:56.057 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:56:56.240 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:56:56.241 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:56:56.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:56:56.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:56:56.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:56:56.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:56:56.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:56:56.292 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:56:56.293 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:56:56.293 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:56:56.293 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:56:56.294 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:56:56.294 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:56:56.294 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:56:56.294 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:56:56.294 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:56:56.294 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:56:56.294 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:57:01.298 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:57:01.298 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:57:01.300 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:57:01.301 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:57:01.302 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:57:01.302 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:57:01.311 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:57:01.313 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:57:01.313 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:57:01.313 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:57:01.313 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:57:01.321 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:57:01.321 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:57:01.322 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:57:01.322 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:57:01.322 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:57:01.323 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:57:01.323 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:57:01.323 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:57:01.331 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:57:01.332 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:57:01.332 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:57:01.332 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:57:01.332 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:57:01.333 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:57:01.333 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:57:01.333 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:57:01.338 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:57:01.338 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:57:01.339 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:57:01.339 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:57:01.339 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:57:01.339 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:57:01.340 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:57:01.340 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:57:01.346 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:57:01.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:57:01.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:57:01.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:57:01.346 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:57:01.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:57:01.347 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:57:01.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:57:01.347 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:01.347 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:57:01.347 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:57:01.347 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:01.347 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:01.347 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:57:01.347 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:57:01.347 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:57:01.348 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:57:01.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:01.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:01.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:01.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:57:01.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:01.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:01.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:01.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:01.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:01.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:01.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:01.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:01.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:01.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:01.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:01.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:01.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:01.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:01.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:01.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:01.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:01.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:01.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:01.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:01.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:01.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:01.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:01.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:01.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:01.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:01.352 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:57:01.834 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:57:01.873 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:57:01.874 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:57:01.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:57:01.875 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:57:01.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:57:01.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:57:01.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:57:01.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:57:01.879 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:57:01.879 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:57:01.879 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:57:01.879 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:57:02.311 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:57:02.352 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:57:02.352 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:57:02.353 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:57:02.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:57:02.789 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:57:03.267 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:57:03.353 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:57:03.354 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:57:03.354 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:57:03.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:57:03.745 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:57:04.222 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:57:04.355 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:57:04.355 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:57:04.355 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:57:04.355 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:57:04.698 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:57:04.941 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:57:04.941 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:57:04.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:57:04.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:57:05.176 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:57:05.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:57:05.356 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:57:05.356 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:57:05.357 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:57:05.655 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:57:05.667 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:57:05.667 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:57:05.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:57:05.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:57:05.675 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:57:05.675 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:57:05.675 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:57:05.676 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:57:05.676 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:57:05.676 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:57:05.676 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:57:05.676 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:57:05.676 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:57:05.676 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:57:05.676 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=924 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:57:05.676 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=924 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:57:05.676 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=924 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:57:05.676 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=924 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:57:05.676 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=924 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:57:05.676 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=924 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:57:10.680 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:57:10.680 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:57:10.682 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:57:10.683 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:57:10.683 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:57:10.684 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:57:10.692 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:57:10.693 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:57:10.693 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:57:10.693 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:57:10.693 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:57:10.697 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:57:10.697 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:57:10.697 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:57:10.697 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:57:10.698 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:57:10.698 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:57:10.698 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:57:10.698 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:57:10.701 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:57:10.702 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:57:10.702 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:57:10.702 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:57:10.702 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:57:10.702 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:57:10.702 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:57:10.702 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:57:10.706 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:57:10.706 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:57:10.706 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:57:10.706 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:57:10.706 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:57:10.706 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:57:10.706 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:57:10.706 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:57:10.711 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:57:10.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:57:10.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:57:10.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:57:10.711 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:57:10.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:57:10.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:57:10.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:57:10.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:10.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:57:10.712 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:57:10.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:10.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:10.712 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:57:10.712 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:57:10.712 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:57:10.713 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:57:10.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:10.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:10.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:10.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:57:10.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:10.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:10.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:10.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:10.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:10.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:10.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:10.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:10.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:10.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:10.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:10.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:10.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:10.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:10.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:10.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:10.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:10.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:10.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:10.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:10.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:10.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:10.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:10.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:10.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:10.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:10.717 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:57:11.194 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:57:11.240 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:57:11.241 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:57:11.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:57:11.243 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:57:11.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:57:11.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:57:11.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:57:11.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:57:11.253 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:57:11.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:57:11.253 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:57:11.254 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:57:11.671 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:57:11.716 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:57:11.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:57:11.717 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:57:11.718 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:57:12.149 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:57:12.627 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:57:12.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:57:12.725 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:57:12.725 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:57:12.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:57:13.106 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:57:13.584 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:57:13.726 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:57:13.726 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:57:13.727 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:57:13.727 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:57:14.062 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:57:14.304 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:57:14.305 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:57:14.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:57:14.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:57:14.540 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:57:14.727 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:57:14.728 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:57:14.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:57:14.728 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:57:15.018 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:57:15.496 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:57:15.728 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:57:15.728 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:57:15.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:57:15.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:57:15.974 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:57:16.452 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:57:16.930 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:57:17.408 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:57:17.886 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:57:18.364 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:57:18.842 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:57:19.307 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:57:19.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:57:19.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:57:19.320 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:57:19.326 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:57:19.326 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:57:19.327 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:57:19.327 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:57:19.329 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:57:19.329 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:57:19.329 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:57:19.329 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:57:19.329 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:57:19.329 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:57:19.329 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:57:24.331 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:57:24.331 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:57:24.333 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:57:24.334 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:57:24.334 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:57:24.335 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:57:24.342 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:57:24.344 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:57:24.344 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:57:24.344 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:57:24.344 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:57:24.347 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:57:24.348 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:57:24.348 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:57:24.348 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:57:24.348 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:57:24.348 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:57:24.348 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:57:24.349 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:57:24.351 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:57:24.351 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:57:24.351 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:57:24.351 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:57:24.351 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:57:24.351 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:57:24.351 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:57:24.352 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:57:24.354 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:57:24.354 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:57:24.354 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:57:24.354 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:57:24.354 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:57:24.354 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:57:24.354 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:57:24.354 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:57:24.358 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:57:24.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:57:24.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:57:24.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:57:24.358 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:57:24.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:57:24.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:57:24.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:57:24.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:57:24.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:24.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:24.358 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:57:24.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:24.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:24.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:24.358 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:57:24.358 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:57:24.358 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:57:24.359 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:57:24.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:24.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:24.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:24.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:57:24.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:24.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:24.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:24.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:24.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:24.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:24.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:24.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:24.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:24.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:24.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:24.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:24.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:24.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:24.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:24.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:24.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:24.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:24.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:24.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:24.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:24.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:24.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:24.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:24.363 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:57:24.847 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:57:24.879 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:57:24.879 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:57:24.881 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:57:24.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:57:24.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:57:24.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:57:24.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:57:24.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:57:24.886 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:57:24.886 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:57:24.887 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:57:24.887 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:57:25.324 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:57:25.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:57:25.362 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:57:25.362 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:57:25.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:57:25.802 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:57:26.279 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:57:26.362 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:57:26.363 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:57:26.363 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:57:26.363 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:57:26.756 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:57:27.234 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:57:27.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:57:27.364 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:57:27.364 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:57:27.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:57:27.712 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:57:27.895 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:57:27.895 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:57:27.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:57:27.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:57:28.190 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:57:28.366 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:57:28.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:57:28.366 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:57:28.366 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:57:28.668 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:57:29.146 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:57:29.367 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:57:29.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:57:29.367 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:57:29.368 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:57:29.624 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:57:30.102 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:57:30.580 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:57:31.058 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:57:31.536 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:57:32.014 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:57:32.492 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:57:32.898 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:57:32.898 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:57:32.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:57:32.917 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:57:32.917 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:57:32.917 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:57:32.917 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:57:32.918 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:57:32.918 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:57:32.918 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:57:32.919 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:57:32.919 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:57:32.919 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:57:32.919 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:57:32.919 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1828 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:57:32.919 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1828 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:57:32.919 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1828 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:57:32.919 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1828 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:57:32.919 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1828 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:57:37.922 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:57:37.922 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:57:37.927 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:57:37.929 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:57:37.930 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:57:37.933 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:57:37.942 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:57:37.944 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:57:37.944 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:57:37.945 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:57:37.945 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:57:37.950 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:57:37.950 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:57:37.951 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:57:37.951 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:57:37.951 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:57:37.952 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:57:37.952 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:57:37.952 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:57:37.955 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:57:37.955 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:57:37.955 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:57:37.955 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:57:37.955 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:57:37.955 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:57:37.955 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:57:37.955 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:57:37.959 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:57:37.959 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:57:37.959 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:57:37.959 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:57:37.959 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:57:37.959 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:57:37.959 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:57:37.959 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:57:37.963 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:57:37.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:57:37.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:57:37.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:57:37.964 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:57:37.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:57:37.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:57:37.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:57:37.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:37.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:57:37.964 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:57:37.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:37.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:37.964 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:57:37.964 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:57:37.964 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:57:37.965 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:57:37.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:37.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:37.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:37.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:57:37.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:37.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:37.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:37.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:37.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:37.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:37.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:37.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:37.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:37.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:37.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:37.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:37.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:37.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:37.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:37.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:37.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:37.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:37.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:37.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:37.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:37.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:37.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:37.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:37.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:37.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:37.969 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:57:38.452 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:57:38.490 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:57:38.492 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:57:38.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:57:38.494 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:57:38.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:57:38.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:57:38.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:57:38.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:57:38.501 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:57:38.501 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:57:38.501 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:57:38.501 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:57:38.929 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:57:38.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:57:38.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:57:38.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:57:38.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:57:39.406 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:57:39.884 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:57:39.968 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:57:39.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:57:39.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:57:39.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:57:40.362 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:57:40.839 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:57:40.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:57:40.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:57:40.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:57:40.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:57:41.317 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:57:41.560 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:57:41.560 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:57:41.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:57:41.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:57:41.796 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:57:41.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:57:41.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:57:41.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:57:41.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:57:42.274 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:57:42.753 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:57:42.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:57:42.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:57:42.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:57:42.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:57:43.231 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:57:43.708 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:57:44.186 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:57:44.664 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:57:45.142 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:57:45.620 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:57:46.098 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:57:46.563 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:57:46.563 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:57:46.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:57:46.575 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:57:46.582 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:57:46.583 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:57:46.583 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:57:46.583 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:57:46.585 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:57:46.585 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:57:46.585 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:57:46.585 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:57:46.585 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:57:46.585 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:57:46.585 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:57:46.585 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1840 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:57:46.585 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1840 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:57:46.585 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1840 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:57:46.585 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1840 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:57:46.585 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1840 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:57:46.585 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1840 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:57:46.585 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1840 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:57:51.588 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:57:51.588 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:57:51.590 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:57:51.590 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:57:51.591 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:57:51.591 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:57:51.600 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:57:51.601 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:57:51.601 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:57:51.601 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:57:51.602 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:57:51.605 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:57:51.605 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:57:51.605 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:57:51.605 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:57:51.606 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:57:51.606 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:57:51.606 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:57:51.606 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:57:51.608 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:57:51.608 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:57:51.609 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:57:51.609 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:57:51.609 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:57:51.609 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:57:51.609 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:57:51.609 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:57:51.611 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:57:51.611 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:57:51.612 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:57:51.612 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:57:51.612 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:57:51.612 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:57:51.612 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:57:51.612 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:57:51.615 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:57:51.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:57:51.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:57:51.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:57:51.616 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:57:51.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:57:51.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:57:51.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:57:51.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:51.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:57:51.616 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:57:51.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:51.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:51.616 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:57:51.616 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:57:51.616 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:57:51.616 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:57:51.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:51.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:51.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:51.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:57:51.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:51.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:51.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:51.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:51.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:51.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:51.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:51.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:51.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:51.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:51.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:51.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:51.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:51.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:51.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:51.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:57:51.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:51.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:51.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:51.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:51.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:51.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:57:51.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:51.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:57:51.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:51.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:57:51.621 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:57:52.102 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:57:52.133 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:57:52.134 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:57:52.135 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:57:52.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:57:52.138 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:57:52.138 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:57:52.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:57:52.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:57:52.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:57:52.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:57:52.139 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:57:52.139 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:57:52.145 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:57:52.145 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:57:52.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:57:52.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:57:52.579 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:57:52.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:57:52.620 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:57:52.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:57:52.620 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:57:53.057 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:57:53.534 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:57:53.622 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:57:53.622 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:57:53.622 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:57:53.622 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:57:54.012 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:57:54.490 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:57:54.623 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:57:54.623 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:57:54.623 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:57:54.624 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:57:54.968 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:57:55.445 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:57:55.624 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:57:55.624 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:57:55.625 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:57:55.625 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:57:55.924 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:57:56.401 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:57:56.625 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:57:56.626 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:57:56.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:57:56.626 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:57:56.879 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:57:57.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:57:57.147 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:57:57.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:57:57.159 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:57:57.159 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:57:57.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:57:57.160 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:57:57.160 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:57:57.160 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:57:57.160 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:57:57.160 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:57:57.160 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:57:57.160 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1184 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:57:57.160 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:57:57.160 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1184 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:57:57.160 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1184 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:57:57.160 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1184 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:57:57.160 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1184 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:57:57.160 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1184 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:58:02.164 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:58:02.164 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:58:02.165 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:58:02.166 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:58:02.166 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:58:02.167 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:58:02.177 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:58:02.179 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:58:02.179 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:58:02.179 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:58:02.179 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:58:02.183 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:58:02.184 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:58:02.184 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:58:02.184 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:58:02.184 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:58:02.184 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:58:02.185 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:58:02.185 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:58:02.188 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:58:02.188 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:58:02.188 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:58:02.188 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:58:02.189 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:58:02.189 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:58:02.189 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:58:02.189 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:58:02.191 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:58:02.191 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:58:02.192 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:58:02.192 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:58:02.192 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:58:02.192 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:58:02.192 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:58:02.192 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:58:02.196 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:58:02.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:58:02.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:58:02.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:58:02.196 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:58:02.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:58:02.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:58:02.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:58:02.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:02.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:58:02.197 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:58:02.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:02.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:02.197 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:58:02.197 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:58:02.197 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:58:02.197 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:58:02.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:02.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:02.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:02.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:58:02.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:02.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:02.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:02.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:02.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:02.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:02.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:02.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:02.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:02.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:02.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:02.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:02.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:02.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:02.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:02.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:02.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:02.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:02.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:02.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:02.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:02.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:02.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:02.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:02.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:02.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:02.202 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:58:02.685 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:58:02.717 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:58:02.718 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:58:02.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:58:02.719 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:58:02.722 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:58:02.722 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:58:02.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:58:02.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:58:02.722 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:58:02.722 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:58:02.722 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:58:02.722 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:58:03.162 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:58:03.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:58:03.200 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:58:03.201 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:58:03.201 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:58:03.640 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:58:04.117 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:58:04.201 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:58:04.201 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:58:04.201 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:58:04.202 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:58:04.595 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:58:05.074 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:58:05.202 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:58:05.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:58:05.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:58:05.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:58:05.552 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:58:05.735 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:58:05.735 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:58:05.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:58:05.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:58:06.030 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:58:06.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:58:06.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:58:06.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:58:06.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:58:06.508 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:58:06.987 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:58:07.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:58:07.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:58:07.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:58:07.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:58:07.465 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:58:07.943 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:58:08.421 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:58:08.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:58:08.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:58:08.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:58:08.476 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:58:08.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:58:08.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:58:08.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:58:08.482 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:58:08.482 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:58:08.482 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:58:08.482 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:58:08.483 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:58:08.483 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:58:08.483 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:58:13.481 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:58:13.481 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:58:13.483 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:58:13.483 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:58:13.484 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:58:13.485 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:58:13.493 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:58:13.495 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:58:13.495 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:58:13.495 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:58:13.495 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:58:13.498 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:58:13.498 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:58:13.499 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:58:13.499 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:58:13.499 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:58:13.499 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:58:13.500 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:58:13.500 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:58:13.502 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:58:13.502 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:58:13.502 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:58:13.502 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:58:13.502 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:58:13.503 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:58:13.503 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:58:13.503 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:58:13.505 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:58:13.505 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:58:13.505 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:58:13.505 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:58:13.506 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:58:13.506 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:58:13.506 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:58:13.506 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:58:13.511 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:58:13.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:58:13.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:58:13.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:58:13.511 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:58:13.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:58:13.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:58:13.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:58:13.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:58:13.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:13.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:13.512 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:58:13.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:13.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:13.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:13.512 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:58:13.512 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:58:13.512 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:58:13.512 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:58:13.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:13.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:13.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:13.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:58:13.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:13.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:13.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:13.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:13.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:13.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:13.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:13.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:13.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:13.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:13.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:13.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:13.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:13.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:13.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:13.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:13.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:13.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:13.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:13.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:13.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:13.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:13.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:13.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:13.516 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:58:13.997 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:58:14.038 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:58:14.040 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:58:14.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:58:14.042 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:58:14.049 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:58:14.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:58:14.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:58:14.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:58:14.050 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:58:14.050 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:58:14.050 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:58:14.050 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:58:14.474 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:58:14.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:58:14.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:58:14.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:58:14.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:58:14.952 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:58:15.430 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:58:15.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:58:15.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:58:15.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:58:15.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:58:15.908 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:58:16.385 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:58:16.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:58:16.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:58:16.518 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:58:16.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:58:16.863 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:58:17.160 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:58:17.161 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:58:17.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:58:17.167 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:58:17.167 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:58:17.167 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:58:17.167 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:58:17.168 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:58:17.168 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:58:17.168 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:58:17.168 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:58:17.168 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:58:17.168 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:58:17.168 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:58:17.168 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=782 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:58:17.169 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=782 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:58:17.169 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=782 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:58:17.169 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=782 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:58:22.171 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:58:22.171 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:58:22.173 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:58:22.173 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:58:22.174 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:58:22.175 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:58:22.186 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:58:22.188 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:58:22.188 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:58:22.188 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:58:22.188 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:58:22.192 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:58:22.193 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:58:22.193 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:58:22.193 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:58:22.193 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:58:22.194 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:58:22.194 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:58:22.194 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:58:22.196 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:58:22.197 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:58:22.197 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:58:22.197 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:58:22.197 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:58:22.197 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:58:22.197 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:58:22.197 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:58:22.200 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:58:22.200 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:58:22.200 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:58:22.200 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:58:22.200 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:58:22.200 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:58:22.200 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:58:22.200 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:58:22.204 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:58:22.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:58:22.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:58:22.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:58:22.204 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:58:22.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:58:22.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:58:22.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:58:22.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:22.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:58:22.205 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:58:22.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:22.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:22.205 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:58:22.205 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:58:22.205 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:58:22.205 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:58:22.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:22.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:22.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:22.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:58:22.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:22.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:22.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:22.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:22.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:22.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:22.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:22.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:22.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:22.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:22.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:22.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:22.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:22.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:22.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:22.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:22.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:22.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:22.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:22.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:22.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:22.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:22.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:22.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:22.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:22.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:22.210 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:58:22.693 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:58:22.723 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:58:22.726 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:58:22.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:58:22.729 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:58:22.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:58:22.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:58:22.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:58:22.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:58:22.737 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:58:22.737 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:58:22.737 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:58:22.737 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:58:23.171 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:58:23.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:58:23.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:58:23.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:58:23.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:58:23.648 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:58:24.126 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:58:24.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:58:24.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:58:24.209 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:58:24.209 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:58:24.604 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:58:25.082 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:58:25.210 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:58:25.210 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:58:25.210 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:58:25.210 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:58:25.560 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:58:25.877 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:58:25.877 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:58:25.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:58:25.882 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:58:25.882 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:58:25.882 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:58:25.882 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:58:25.884 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:58:25.884 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:58:25.884 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:58:25.884 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:58:25.884 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:58:25.884 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:58:25.884 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:58:25.884 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=786 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:58:25.884 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=786 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:58:25.884 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=786 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:58:25.884 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=786 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:58:25.884 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=786 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:58:25.884 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=786 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:58:30.886 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:58:30.887 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:58:30.889 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:58:30.890 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:58:30.890 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:58:30.891 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:58:30.898 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:58:30.899 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:58:30.899 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:58:30.900 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:58:30.900 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:58:30.902 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:58:30.902 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:58:30.902 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:58:30.902 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:58:30.903 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:58:30.903 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:58:30.903 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:58:30.903 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:58:30.905 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:58:30.905 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:58:30.905 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:58:30.905 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:58:30.905 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:58:30.905 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:58:30.905 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:58:30.906 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:58:30.907 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:58:30.907 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:58:30.907 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:58:30.908 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:58:30.908 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:58:30.908 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:58:30.908 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:58:30.908 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:58:30.910 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:58:30.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:58:30.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:58:30.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:58:30.911 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:58:30.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:58:30.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:58:30.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:58:30.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:58:30.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:30.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:30.911 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:58:30.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:30.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:30.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:30.911 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:58:30.911 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:58:30.911 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:58:30.911 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:58:30.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:30.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:30.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:30.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:58:30.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:30.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:30.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:30.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:30.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:30.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:30.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:30.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:30.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:30.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:30.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:30.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:30.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:30.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:30.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:30.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:30.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:30.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:30.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:30.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:30.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:30.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:30.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:30.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:30.916 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:58:31.396 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:58:31.427 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:58:31.428 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:58:31.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:58:31.429 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:58:31.434 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:58:31.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:58:31.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:58:31.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:58:31.435 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:58:31.436 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:58:31.436 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:58:31.436 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:58:31.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:58:31.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:58:31.718 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:58:31.718 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:58:31.718 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:58:31.718 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:58:31.722 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:58:31.722 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:58:31.722 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:58:31.722 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:58:31.723 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:58:31.723 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:58:31.723 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:58:36.723 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:58:36.723 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:58:36.724 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:58:36.725 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:58:36.725 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:58:36.726 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:58:36.735 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:58:36.737 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:58:36.737 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:58:36.737 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:58:36.737 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:58:36.740 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:58:36.741 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:58:36.741 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:58:36.741 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:58:36.741 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:58:36.742 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:58:36.742 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:58:36.742 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:58:36.744 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:58:36.744 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:58:36.745 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:58:36.745 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:58:36.745 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:58:36.745 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:58:36.745 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:58:36.745 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:58:36.748 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:58:36.748 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:58:36.748 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:58:36.748 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:58:36.748 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:58:36.748 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:58:36.748 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:58:36.748 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:58:36.752 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:58:36.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:58:36.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:58:36.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:58:36.752 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:58:36.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:58:36.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:58:36.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:58:36.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:36.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:58:36.752 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:58:36.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:36.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:36.752 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:58:36.752 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:58:36.752 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:58:36.753 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:58:36.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:36.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:36.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:36.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:58:36.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:36.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:36.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:36.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:36.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:36.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:36.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:36.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:36.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:36.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:36.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:36.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:36.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:36.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:36.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:36.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:36.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:36.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:36.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:36.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:36.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:36.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:36.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:36.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:36.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:36.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:36.757 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:58:37.243 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:58:37.270 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:58:37.271 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:58:37.272 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:58:37.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:58:37.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:58:37.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:58:37.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:58:37.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:58:37.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:58:37.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:58:37.278 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:58:37.278 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:58:37.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:58:37.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:58:37.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:58:37.330 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:58:37.330 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:58:37.330 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:58:37.331 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:58:37.331 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:58:37.331 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:58:37.331 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:58:37.331 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:58:37.331 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:58:37.331 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:58:42.335 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:58:42.335 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:58:42.337 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:58:42.338 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:58:42.339 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:58:42.340 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:58:42.348 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:58:42.349 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:58:42.349 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:58:42.350 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:58:42.350 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:58:42.353 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:58:42.353 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:58:42.353 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:58:42.353 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:58:42.353 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:58:42.354 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:58:42.354 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:58:42.354 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:58:42.357 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:58:42.358 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:58:42.358 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:58:42.358 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:58:42.358 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:58:42.358 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:58:42.358 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:58:42.358 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:58:42.360 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:58:42.361 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:58:42.361 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:58:42.361 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:58:42.361 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:58:42.361 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:58:42.361 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:58:42.361 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:58:42.364 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:58:42.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:58:42.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:58:42.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:58:42.364 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:58:42.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:58:42.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:58:42.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:58:42.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:42.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:58:42.365 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:58:42.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:42.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:42.365 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:58:42.365 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:58:42.365 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:58:42.365 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:58:42.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:42.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:42.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:42.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:58:42.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:42.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:42.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:42.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:42.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:42.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:42.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:42.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:42.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:42.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:42.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:42.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:42.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:42.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:42.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:42.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:42.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:42.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:42.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:42.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:42.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:42.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:42.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:42.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:42.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:42.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:42.370 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:58:42.854 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:58:42.884 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:58:42.886 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:58:42.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:58:42.887 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:58:42.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:58:42.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:58:42.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:58:42.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:58:42.895 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:58:42.895 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:58:42.895 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:58:42.895 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:58:43.332 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:58:43.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:58:43.368 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:58:43.368 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:58:43.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:58:43.810 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:58:44.288 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:58:44.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:58:44.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:58:44.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:58:44.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:58:44.766 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:58:45.245 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:58:45.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:58:45.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:58:45.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:58:45.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:58:45.723 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:58:46.201 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:58:46.371 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:58:46.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:58:46.371 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:58:46.371 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:58:46.679 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:58:47.157 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:58:47.372 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:58:47.373 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:58:47.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:58:47.373 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:58:47.635 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:58:48.113 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:58:48.591 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:58:49.069 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:58:49.547 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:58:50.025 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:58:50.503 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:58:50.981 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:58:51.459 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:58:51.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:58:51.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:58:51.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:58:51.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:58:51.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:58:51.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:58:51.814 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:58:51.814 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:58:51.815 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:58:51.815 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:58:51.815 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:58:51.815 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:58:51.815 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:58:51.815 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2017 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:58:51.815 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2017 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:58:51.816 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2017 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:58:51.816 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2017 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:58:51.816 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2017 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:58:51.816 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2017 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:58:51.816 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2017 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:58:51.816 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2017 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:58:56.814 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:58:56.814 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:58:56.816 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:58:56.817 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:58:56.817 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:58:56.818 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:58:56.827 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:58:56.828 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:58:56.829 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:58:56.829 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:58:56.829 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:58:56.832 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:58:56.832 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:58:56.832 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:58:56.832 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:58:56.832 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:58:56.833 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:58:56.833 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:58:56.833 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:58:56.836 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:58:56.836 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:58:56.836 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:58:56.836 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:58:56.836 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:58:56.837 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:58:56.837 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:58:56.837 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:58:56.840 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:58:56.840 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:58:56.840 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:58:56.840 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:58:56.840 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:58:56.840 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:58:56.840 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:58:56.840 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:58:56.845 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:58:56.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:58:56.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:58:56.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:58:56.845 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:58:56.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:58:56.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:58:56.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:58:56.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:56.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:58:56.846 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:58:56.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:56.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:56.846 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:58:56.846 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:58:56.846 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:58:56.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:56.846 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:58:56.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:56.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:56.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:58:56.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:56.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:56.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:56.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:56.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:56.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:56.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:56.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:56.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:56.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:56.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:56.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:56.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:56.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:56.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:56.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:56.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:58:56.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:56.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:56.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:56.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:56.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:56.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:58:56.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:58:56.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:56.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:58:56.851 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:58:57.335 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:58:57.367 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:58:57.368 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:58:57.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:58:57.370 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:58:57.374 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:58:57.374 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:58:57.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:58:57.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:58:57.374 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:58:57.374 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:58:57.374 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:58:57.374 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:58:57.812 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:58:57.849 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:58:57.850 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:58:57.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:58:57.851 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:58:58.290 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:58:58.769 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:58:58.851 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:58:58.851 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:58:58.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:58:58.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:58:59.247 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:58:59.725 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:58:59.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:58:59.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:58:59.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:58:59.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:59:00.204 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:59:00.683 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:59:00.853 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:59:00.853 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:59:00.853 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:59:00.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:59:01.161 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:59:01.640 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:59:01.854 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:59:01.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:59:01.854 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:59:01.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:59:02.118 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:59:02.596 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:59:03.075 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:59:03.553 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:59:04.031 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:59:04.509 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:59:04.987 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:59:05.465 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 03:59:05.944 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 03:59:06.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:59:06.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:59:06.258 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:59:06.258 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:59:06.258 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:59:06.258 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:59:06.259 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:59:06.259 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:59:06.259 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:59:06.259 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:59:06.259 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:59:06.259 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:59:06.259 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:59:06.259 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2008 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:59:06.259 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2008 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:59:06.259 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2008 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:59:06.259 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2008 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:59:06.259 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2008 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:59:11.263 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:59:11.263 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:59:11.263 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:59:11.264 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:59:11.264 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:59:11.265 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:59:11.274 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:59:11.276 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:59:11.276 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:59:11.277 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:59:11.277 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:59:11.281 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:59:11.281 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:59:11.282 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:59:11.282 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:59:11.282 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:59:11.283 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:59:11.283 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:59:11.283 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:59:11.286 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:59:11.286 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:59:11.286 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:59:11.286 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:59:11.287 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:59:11.287 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:59:11.287 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:59:11.287 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:59:11.290 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:59:11.290 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:59:11.290 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:59:11.290 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:59:11.290 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:59:11.291 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:59:11.291 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:59:11.291 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:59:11.295 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:59:11.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:59:11.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:59:11.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:59:11.295 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:59:11.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:59:11.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:59:11.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:59:11.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:11.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:59:11.296 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:59:11.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:11.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:11.296 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:59:11.296 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:59:11.296 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:59:11.296 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:59:11.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:11.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:11.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:11.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:59:11.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:11.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:11.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:11.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:11.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:11.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:11.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:11.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:11.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:11.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:11.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:11.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:11.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:11.301 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:59:11.782 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:59:11.816 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:59:11.818 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:59:11.820 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:59:11.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:59:11.827 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:59:11.827 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:59:11.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 03:59:11.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:59:11.829 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:59:11.829 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:59:11.829 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 03:59:11.829 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 03:59:12.259 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:59:12.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:59:12.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:59:12.299 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:59:12.300 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:59:12.737 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:59:13.215 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:59:13.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:59:13.300 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:59:13.300 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:59:13.300 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:59:13.694 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:59:14.171 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:59:14.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:59:14.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:59:14.302 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:59:14.302 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:59:14.649 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:59:14.892 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 03:59:14.892 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 03:59:14.892 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:59:14.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:59:14.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 03:59:14.939 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:59:14.981 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:59:15.022 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:59:15.059 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:59:15.101 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:59:15.127 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:59:15.150 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:59:15.186 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:59:15.228 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:59:15.269 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:59:15.302 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:59:15.302 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:59:15.302 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:59:15.303 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:59:15.306 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:59:15.348 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:59:15.390 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:59:15.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 03:59:15.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 03:59:15.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:59:15.433 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:59:15.433 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:59:15.433 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:59:15.433 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:59:15.434 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:59:15.434 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:59:15.434 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:59:15.434 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:59:15.434 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:59:15.434 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:59:15.434 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:59:15.434 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=884 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:59:20.439 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:59:20.439 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:59:20.440 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:59:20.440 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:59:20.440 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:59:20.441 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:59:20.450 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:59:20.450 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:59:20.450 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:59:20.450 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:59:20.450 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:59:20.453 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:59:20.453 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:59:20.454 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:59:20.454 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:59:20.454 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:59:20.454 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:59:20.454 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:59:20.454 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:59:20.457 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:59:20.457 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:59:20.457 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:59:20.457 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:59:20.457 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:59:20.458 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:59:20.458 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:59:20.458 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:59:20.460 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:59:20.460 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:59:20.461 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:59:20.461 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:59:20.461 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:59:20.461 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:59:20.461 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:59:20.461 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:59:20.465 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:59:20.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:59:20.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:59:20.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:59:20.465 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:59:20.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:59:20.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:59:20.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:59:20.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:20.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:59:20.466 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:59:20.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:20.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:20.466 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:59:20.466 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:59:20.466 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:59:20.466 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:59:20.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:20.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:20.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:20.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:59:20.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:20.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:20.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:20.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:20.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:20.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:20.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:20.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:20.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:20.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:20.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:20.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:20.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:20.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:20.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:20.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:20.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:20.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:20.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:20.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:20.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:20.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:20.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:20.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:20.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:20.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:20.471 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:59:20.953 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:59:20.982 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:59:20.983 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:59:20.984 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:59:20.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:59:21.250 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:59:21.250 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:59:21.251 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:59:21.251 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:59:21.254 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:59:21.255 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:59:21.255 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:59:21.255 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:59:21.255 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:59:21.255 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:59:21.255 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:59:21.255 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=169 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:59:21.255 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=169 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:59:21.256 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=169 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:59:21.256 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=169 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:59:21.256 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=169 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:59:21.256 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=169 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:59:21.256 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=169 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:59:21.256 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=169 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 03:59:26.255 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:59:26.255 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:59:26.257 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:59:26.258 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:59:26.258 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:59:26.260 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:59:26.268 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:59:26.268 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:59:26.269 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:59:26.269 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:59:26.269 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:59:26.271 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:59:26.272 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:59:26.272 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:59:26.272 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:59:26.272 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:59:26.272 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:59:26.273 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:59:26.273 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:59:26.274 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:59:26.275 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:59:26.275 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:59:26.275 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:59:26.275 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:59:26.275 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:59:26.275 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:59:26.275 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:59:26.277 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:59:26.277 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:59:26.277 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:59:26.277 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:59:26.277 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:59:26.278 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:59:26.278 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:59:26.278 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:59:26.281 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:59:26.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:59:26.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:59:26.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:59:26.281 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:59:26.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:59:26.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:59:26.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:59:26.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:26.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:59:26.281 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:59:26.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:26.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:26.281 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:59:26.281 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:59:26.281 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:59:26.281 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:59:26.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:26.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:26.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:26.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:59:26.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:26.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:26.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:26.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:26.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:26.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:26.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:26.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:26.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:26.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:26.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:26.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:26.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:26.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:26.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:26.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:26.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:26.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:26.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:26.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:26.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:26.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:26.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:26.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:26.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:26.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:26.286 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:59:26.770 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:59:26.800 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:59:26.801 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:59:26.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:59:26.802 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:59:27.247 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:59:27.284 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:59:27.285 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:59:27.285 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:59:27.285 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:59:27.726 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:59:28.204 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:59:28.286 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:59:28.286 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:59:28.286 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:59:28.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:59:28.683 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:59:29.161 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:59:29.287 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:59:29.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:59:29.287 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:59:29.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:59:29.640 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:59:30.118 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:59:30.288 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:59:30.288 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:59:30.288 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:59:30.288 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:59:30.597 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:59:31.075 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:59:31.289 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:59:31.289 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:59:31.289 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:59:31.289 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:59:31.554 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:59:32.033 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:59:32.512 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:59:32.991 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:59:33.470 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:59:33.948 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:59:34.426 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:59:34.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:59:34.830 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:59:34.830 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:59:34.830 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:59:34.830 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:59:34.831 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:59:34.831 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:59:34.831 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:59:34.831 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:59:34.831 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:59:34.831 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:59:34.831 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:59:39.834 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:59:39.834 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:59:39.836 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:59:39.836 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:59:39.837 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:59:39.837 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:59:39.845 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:59:39.846 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:59:39.846 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:59:39.847 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:59:39.847 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:59:39.850 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:59:39.850 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:59:39.850 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:59:39.850 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:59:39.851 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:59:39.851 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:59:39.851 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:59:39.851 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:59:39.853 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:59:39.854 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:59:39.854 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:59:39.854 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:59:39.854 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:59:39.854 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:59:39.854 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:59:39.854 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:59:39.857 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:59:39.857 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:59:39.857 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:59:39.857 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:59:39.857 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:59:39.857 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:59:39.858 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:59:39.858 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:59:39.862 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:59:39.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:59:39.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:59:39.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:59:39.862 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:59:39.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:59:39.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:59:39.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:59:39.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:39.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:59:39.863 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:59:39.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:39.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:39.863 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:59:39.863 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:59:39.863 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:59:39.863 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:59:39.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:39.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:39.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:39.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:59:39.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:39.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:39.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:39.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:39.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:39.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:39.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:39.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:39.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:39.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:39.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:39.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:39.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:39.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:39.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:39.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:39.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:39.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:39.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:39.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:39.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:39.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:39.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:39.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:39.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:39.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:39.868 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:59:40.351 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:59:40.392 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:59:40.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:59:40.395 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:59:40.397 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:59:40.829 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:59:40.866 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:59:40.866 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:59:40.867 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:59:40.867 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:59:41.309 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:59:41.788 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:59:41.867 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:59:41.867 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:59:41.868 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:59:41.869 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:59:42.267 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:59:42.745 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:59:42.868 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:59:42.869 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:59:42.869 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:59:42.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:59:43.224 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:59:43.702 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 03:59:43.869 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:59:43.869 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:59:43.870 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:59:43.872 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:59:44.180 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 03:59:44.658 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 03:59:44.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:59:44.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:59:44.871 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:59:44.873 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:59:45.137 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 03:59:45.615 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 03:59:46.093 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 03:59:46.572 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 03:59:47.050 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 03:59:47.529 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 03:59:48.007 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 03:59:48.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:59:48.413 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:59:48.413 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:59:48.413 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:59:48.413 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:59:48.414 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:59:48.414 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:59:48.414 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:59:48.414 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:59:48.414 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:59:48.414 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:59:48.414 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 03:59:53.420 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:59:53.420 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:59:53.420 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:59:53.420 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:59:53.421 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:59:53.421 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:59:53.430 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:59:53.432 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:59:53.432 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:59:53.432 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 03:59:53.433 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 03:59:53.437 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 03:59:53.437 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 03:59:53.437 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:59:53.437 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:59:53.437 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:59:53.437 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 03:59:53.437 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 03:59:53.437 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 03:59:53.440 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 03:59:53.440 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 03:59:53.440 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:59:53.440 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:59:53.441 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:59:53.441 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 03:59:53.441 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 03:59:53.441 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 03:59:53.443 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 03:59:53.443 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 03:59:53.443 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:59:53.443 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 03:59:53.443 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:59:53.443 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 03:59:53.443 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 03:59:53.443 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 03:59:53.448 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 03:59:53.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 03:59:53.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 03:59:53.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 03:59:53.448 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 03:59:53.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 03:59:53.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 03:59:53.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 03:59:53.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 03:59:53.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:53.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:53.449 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 03:59:53.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:53.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:53.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:53.449 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 03:59:53.449 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 03:59:53.449 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 03:59:53.449 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 03:59:53.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:53.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:53.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:53.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 03:59:53.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:53.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:53.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:53.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:53.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:53.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:53.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:53.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:53.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:53.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:53.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:53.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:53.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:53.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:53.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:53.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 03:59:53.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:53.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:53.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:53.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:53.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 03:59:53.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 03:59:53.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:53.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 03:59:53.454 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 03:59:53.937 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 03:59:53.984 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 03:59:53.986 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 03:59:53.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:59:53.988 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 03:59:54.416 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 03:59:54.454 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:59:54.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:59:54.454 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:59:54.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:59:54.891 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 03:59:55.371 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 03:59:55.455 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:59:55.455 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:59:55.455 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:59:55.457 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:59:55.851 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 03:59:56.329 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 03:59:56.456 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:59:56.457 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:59:56.457 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:59:56.459 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:59:56.808 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 03:59:57.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 03:59:57.020 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 03:59:57.020 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 03:59:57.020 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 03:59:57.020 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 03:59:57.021 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 03:59:57.021 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 03:59:57.021 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 03:59:57.021 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 03:59:57.022 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 03:59:57.022 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 03:59:57.022 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:00:02.025 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:00:02.026 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:00:02.027 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:00:02.027 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:00:02.028 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:00:02.029 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:00:02.038 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:00:02.039 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:00:02.039 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:00:02.040 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:00:02.040 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:00:02.046 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:00:02.047 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:00:02.047 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:00:02.047 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:00:02.048 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:00:02.049 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:00:02.049 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:00:02.049 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:00:02.053 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:00:02.053 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:00:02.054 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:00:02.054 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:00:02.054 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:00:02.054 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:00:02.055 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:00:02.055 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:00:02.058 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:00:02.058 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:00:02.059 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:00:02.059 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:00:02.059 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:00:02.059 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:00:02.059 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:00:02.059 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:00:02.064 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:00:02.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:00:02.064 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:00:02.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:00:02.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:00:02.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:00:02.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:00:02.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:00:02.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:00:02.065 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:00:02.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:02.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:02.065 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:00:02.065 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:00:02.065 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:00:02.065 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:00:02.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:02.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:02.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:02.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:00:02.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:02.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:02.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:02.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:02.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:02.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:02.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:02.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:02.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:02.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:02.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:02.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:02.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:02.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:02.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:02.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:02.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:02.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:02.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:02.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:02.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:02.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:02.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:02.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:02.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:02.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:02.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:02.070 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:00:02.554 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:00:02.588 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:00:02.589 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:00:02.591 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:00:02.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:00:02.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:00:02.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:00:02.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:00:02.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:00:02.623 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:00:02.623 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:00:02.623 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:00:02.623 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:00:02.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:00:02.658 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:00:02.658 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:00:02.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:00:02.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:00:03.031 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:00:03.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:00:03.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:00:03.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:00:03.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:00:03.047 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:00:03.047 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:00:03.047 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:00:03.047 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:00:03.049 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:00:03.049 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:00:03.049 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:00:03.049 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:00:03.049 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:00:03.049 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:00:03.049 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:00:08.052 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:00:08.052 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:00:08.052 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:00:08.052 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:00:08.053 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:00:08.055 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:00:08.064 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:00:08.065 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:00:08.065 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:00:08.065 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:00:08.065 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:00:08.069 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:00:08.070 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:00:08.070 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:00:08.070 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:00:08.070 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:00:08.071 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:00:08.071 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:00:08.071 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:00:08.075 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:00:08.075 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:00:08.075 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:00:08.075 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:00:08.075 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:00:08.076 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:00:08.076 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:00:08.076 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:00:08.080 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:00:08.080 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:00:08.080 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:00:08.080 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:00:08.080 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:00:08.080 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:00:08.081 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:00:08.081 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:00:08.086 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:00:08.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:00:08.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:00:08.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:00:08.087 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:00:08.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:00:08.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:00:08.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:00:08.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:08.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:00:08.087 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:00:08.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:08.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:08.088 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:00:08.088 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:00:08.088 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:00:08.088 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:00:08.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:08.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:08.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:08.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:00:08.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:08.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:08.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:08.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:08.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:08.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:08.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:08.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:08.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:08.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:08.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:08.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:08.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:08.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:08.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:08.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:08.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:08.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:08.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:08.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:08.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:08.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:08.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:08.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:08.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:08.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:08.093 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:00:08.572 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:00:08.616 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:00:08.618 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:00:08.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:00:08.620 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:00:08.641 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:00:08.641 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:00:08.641 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:00:08.641 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:00:08.646 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:00:08.647 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:00:08.647 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:00:08.647 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:00:08.647 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:00:08.647 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:00:08.647 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:00:08.648 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=120 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:00:08.648 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:00:08.648 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:00:08.648 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:00:08.648 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:00:08.648 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:00:08.648 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:00:08.649 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:00:13.644 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:00:13.644 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:00:13.646 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:00:13.646 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:00:13.646 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:00:13.647 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:00:13.656 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:00:13.658 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:00:13.658 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:00:13.658 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:00:13.658 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:00:13.663 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:00:13.664 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:00:13.664 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:00:13.664 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:00:13.664 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:00:13.664 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:00:13.664 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:00:13.664 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:00:13.669 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:00:13.669 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:00:13.669 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:00:13.669 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:00:13.670 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:00:13.670 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:00:13.670 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:00:13.670 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:00:13.674 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:00:13.674 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:00:13.674 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:00:13.674 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:00:13.674 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:00:13.674 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:00:13.674 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:00:13.674 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:00:13.681 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:00:13.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:00:13.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:00:13.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:00:13.681 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:00:13.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:00:13.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:00:13.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:00:13.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:13.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:00:13.682 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:00:13.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:13.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:13.682 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:00:13.682 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:00:13.682 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:00:13.682 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:00:13.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:13.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:13.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:13.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:00:13.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:13.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:13.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:13.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:13.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:13.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:13.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:13.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:13.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:13.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:13.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:13.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:13.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:13.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:13.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:13.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:13.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:13.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:13.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:13.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:13.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:13.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:13.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:13.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:13.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:13.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:13.687 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:00:14.169 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:00:14.211 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:00:14.214 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:00:14.216 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:00:14.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:00:14.648 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:00:14.687 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:00:14.687 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:00:14.688 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:00:14.689 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:00:15.128 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:00:15.607 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:00:15.689 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:00:15.689 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:00:15.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:00:15.691 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:00:16.086 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:00:16.239 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:00:16.239 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:00:16.239 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:00:16.239 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:00:16.240 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:00:16.240 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:00:16.240 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:00:16.240 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:00:16.240 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:00:16.240 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:00:16.241 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:00:16.241 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=545 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:00:16.241 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=545 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:00:16.241 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=545 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:00:16.241 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=545 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:00:16.241 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=545 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:00:21.244 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:00:21.244 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:00:21.246 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:00:21.246 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:00:21.246 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:00:21.247 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:00:21.257 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:00:21.258 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:00:21.258 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:00:21.259 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:00:21.259 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:00:21.264 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:00:21.264 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:00:21.264 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:00:21.264 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:00:21.265 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:00:21.265 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:00:21.265 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:00:21.265 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:00:21.269 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:00:21.270 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:00:21.270 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:00:21.270 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:00:21.270 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:00:21.270 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:00:21.270 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:00:21.270 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:00:21.274 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:00:21.275 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:00:21.275 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:00:21.275 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:00:21.275 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:00:21.275 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:00:21.275 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:00:21.275 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:00:21.281 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:00:21.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:00:21.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:00:21.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:00:21.281 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:00:21.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:00:21.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:00:21.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:00:21.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:21.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:00:21.282 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:00:21.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:21.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:21.282 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:00:21.282 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:00:21.282 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:00:21.283 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:00:21.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:21.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:21.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:21.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:00:21.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:21.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:21.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:21.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:21.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:21.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:21.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:21.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:21.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:21.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:21.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:21.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:21.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:21.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:21.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:21.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:21.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:21.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:21.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:21.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:21.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:21.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:21.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:21.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:21.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:21.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:21.287 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:00:21.771 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:00:21.801 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:00:21.802 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:00:21.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:00:21.803 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:00:21.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:00:21.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:00:21.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:00:21.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:00:21.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:00:21.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:00:21.804 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:00:21.804 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:00:22.249 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:00:22.286 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:00:22.286 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:00:22.287 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:00:22.288 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:00:22.727 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:00:23.204 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:00:23.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:00:23.288 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:00:23.288 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:00:23.288 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:00:23.681 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:00:24.159 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:00:24.288 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:00:24.289 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:00:24.289 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:00:24.289 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:00:24.636 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:00:24.656 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:00:24.656 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:00:24.661 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:00:24.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:00:24.661 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:00:24.661 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:00:24.664 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:00:24.664 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:00:24.664 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:00:24.664 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:00:24.664 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:00:24.664 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:00:24.664 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:00:24.664 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=721 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:00:24.664 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=721 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:00:24.664 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=721 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:00:24.664 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=721 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:00:24.664 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=721 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:00:24.664 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=721 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:00:24.664 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=721 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:00:29.666 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:00:29.666 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:00:29.668 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:00:29.668 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:00:29.669 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:00:29.669 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:00:29.677 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:00:29.678 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:00:29.679 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:00:29.679 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:00:29.679 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:00:29.682 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:00:29.682 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:00:29.682 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:00:29.682 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:00:29.683 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:00:29.683 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:00:29.683 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:00:29.683 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:00:29.685 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:00:29.686 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:00:29.686 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:00:29.686 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:00:29.686 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:00:29.686 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:00:29.686 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:00:29.686 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:00:29.688 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:00:29.689 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:00:29.689 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:00:29.689 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:00:29.689 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:00:29.689 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:00:29.689 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:00:29.689 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:00:29.692 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:00:29.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:00:29.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:00:29.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:00:29.693 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:00:29.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:00:29.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:00:29.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:00:29.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:29.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:00:29.693 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:00:29.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:29.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:29.693 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:00:29.693 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:00:29.693 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:00:29.693 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:00:29.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:29.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:29.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:29.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:00:29.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:29.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:29.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:29.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:29.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:29.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:29.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:29.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:29.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:29.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:29.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:29.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:29.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:29.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:29.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:29.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:29.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:29.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:29.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:29.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:29.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:29.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:29.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:29.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:29.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:29.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:29.698 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:00:30.182 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:00:30.214 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:00:30.216 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:00:30.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:00:30.217 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:00:30.219 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:00:30.219 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:00:30.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:00:30.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:00:30.220 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:00:30.220 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:00:30.220 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:00:30.220 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:00:30.660 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:00:30.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:00:30.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:00:30.697 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:00:30.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:00:31.138 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:00:31.616 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:00:31.697 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:00:31.697 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:00:31.698 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:00:31.698 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:00:32.094 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:00:32.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:00:32.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:00:32.355 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:00:32.355 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:00:32.355 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:00:32.355 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:00:32.356 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:00:32.356 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:00:32.356 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:00:32.356 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:00:32.356 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:00:32.356 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:00:32.356 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:00:32.357 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=568 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:00:32.357 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=568 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:00:37.360 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:00:37.360 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:00:37.361 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:00:37.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:00:37.362 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:00:37.363 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:00:37.370 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:00:37.371 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:00:37.371 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:00:37.371 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:00:37.371 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:00:37.376 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:00:37.376 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:00:37.376 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:00:37.376 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:00:37.377 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:00:37.377 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:00:37.377 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:00:37.377 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:00:37.379 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:00:37.379 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:00:37.379 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:00:37.379 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:00:37.379 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:00:37.379 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:00:37.379 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:00:37.379 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:00:37.381 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:00:37.381 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:00:37.381 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:00:37.381 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:00:37.381 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:00:37.381 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:00:37.381 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:00:37.381 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:00:37.384 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:00:37.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:00:37.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:00:37.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:00:37.384 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:00:37.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:00:37.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:00:37.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:00:37.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:37.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:00:37.385 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:00:37.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:37.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:37.385 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:00:37.385 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:00:37.385 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:00:37.385 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:00:37.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:37.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:37.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:37.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:00:37.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:37.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:37.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:37.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:37.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:37.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:37.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:37.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:37.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:37.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:37.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:37.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:37.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:37.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:37.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:37.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:37.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:37.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:37.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:37.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:37.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:37.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:37.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:37.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:37.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:37.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:37.390 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:00:37.873 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:00:37.903 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:00:37.904 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:00:37.905 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:00:37.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:00:37.909 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:00:37.909 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:00:37.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:00:37.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:00:37.911 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:00:37.911 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:00:37.911 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:00:37.911 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:00:38.351 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:00:38.388 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:00:38.389 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:00:38.389 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:00:38.389 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:00:38.828 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:00:39.306 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:00:39.389 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:00:39.390 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:00:39.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:00:39.390 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:00:39.783 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:00:40.261 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:00:40.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:00:40.391 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:00:40.391 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:00:40.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:00:40.739 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:00:40.760 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:00:40.760 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:00:40.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:00:40.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:00:40.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:00:40.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:00:40.771 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:00:40.771 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:00:40.771 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:00:40.771 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:00:40.771 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:00:40.771 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:00:40.771 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:00:40.772 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=722 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:00:40.772 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=722 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:00:40.772 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=722 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:00:40.772 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=722 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:00:40.772 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=722 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:00:40.772 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=722 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:00:45.774 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:00:45.774 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:00:45.776 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:00:45.776 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:00:45.777 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:00:45.777 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:00:45.786 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:00:45.788 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:00:45.788 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:00:45.788 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:00:45.788 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:00:45.792 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:00:45.792 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:00:45.792 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:00:45.792 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:00:45.793 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:00:45.793 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:00:45.793 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:00:45.793 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:00:45.797 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:00:45.797 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:00:45.798 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:00:45.798 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:00:45.798 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:00:45.798 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:00:45.798 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:00:45.798 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:00:45.800 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:00:45.800 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:00:45.800 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:00:45.800 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:00:45.800 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:00:45.801 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:00:45.801 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:00:45.801 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:00:45.804 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:00:45.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:00:45.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:00:45.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:00:45.804 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:00:45.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:00:45.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:00:45.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:00:45.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:45.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:00:45.805 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:00:45.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:45.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:45.805 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:00:45.805 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:00:45.805 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:00:45.805 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:00:45.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:45.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:45.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:45.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:00:45.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:45.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:45.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:45.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:45.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:45.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:45.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:45.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:45.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:45.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:45.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:45.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:45.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:45.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:45.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:45.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:45.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:45.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:45.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:45.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:45.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:45.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:45.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:45.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:45.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:45.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:45.810 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:00:46.293 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:00:46.325 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:00:46.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:00:46.327 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:00:46.328 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:00:46.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:00:46.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:00:46.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:00:46.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:00:46.337 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:00:46.337 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:00:46.337 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:00:46.337 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:00:46.770 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:00:46.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:00:46.809 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:00:46.809 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:00:46.809 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:00:47.248 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:00:47.726 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:00:47.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:00:47.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:00:47.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:00:47.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:00:48.204 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:00:48.459 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:00:48.459 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:00:48.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:00:48.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:00:48.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:00:48.467 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:00:48.469 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:00:48.469 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:00:48.469 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:00:48.469 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:00:48.470 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:00:48.470 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:00:48.470 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:00:53.470 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:00:53.470 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:00:53.471 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:00:53.472 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:00:53.473 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:00:53.474 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:00:53.481 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:00:53.482 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:00:53.482 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:00:53.482 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:00:53.482 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:00:53.485 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:00:53.485 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:00:53.486 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:00:53.486 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:00:53.486 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:00:53.486 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:00:53.487 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:00:53.487 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:00:53.490 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:00:53.490 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:00:53.490 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:00:53.490 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:00:53.491 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:00:53.491 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:00:53.491 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:00:53.491 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:00:53.494 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:00:53.494 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:00:53.494 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:00:53.495 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:00:53.495 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:00:53.495 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:00:53.495 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:00:53.495 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:00:53.500 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:00:53.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:00:53.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:00:53.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:00:53.501 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:00:53.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:00:53.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:00:53.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:00:53.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:00:53.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:53.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:53.502 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:00:53.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:53.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:53.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:53.502 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:00:53.502 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:00:53.502 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:00:53.502 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:00:53.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:53.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:53.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:53.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:00:53.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:53.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:53.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:53.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:53.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:53.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:53.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:53.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:53.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:53.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:53.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:53.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:53.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:53.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:53.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:53.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:53.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:53.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:00:53.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:53.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:53.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:00:53.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:00:53.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:53.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:00:53.507 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:00:53.989 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:00:54.024 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:00:54.024 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:00:54.025 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:00:54.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:00:54.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:00:54.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:00:54.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:00:54.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:00:54.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:00:54.031 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:00:54.031 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:00:54.031 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:00:54.467 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:00:54.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:00:54.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:00:54.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:00:54.507 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:00:54.945 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:00:55.423 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:00:55.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:00:55.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:00:55.508 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:00:55.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:00:55.901 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:00:56.380 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:00:56.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:00:56.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:00:56.508 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:00:56.509 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:00:56.857 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:00:57.335 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:00:57.509 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:00:57.509 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:00:57.509 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:00:57.509 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:00:57.813 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:00:57.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:00:57.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:00:57.841 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:00:57.842 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:00:57.842 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:00:57.842 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:00:57.847 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:00:57.848 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:00:57.848 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:00:57.848 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:00:57.848 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:00:57.849 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:00:57.849 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:01:02.847 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:01:02.847 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:01:02.849 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:01:02.850 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:01:02.851 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:01:02.851 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:01:02.859 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:01:02.860 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:01:02.860 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:01:02.860 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:01:02.860 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:01:02.864 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:01:02.864 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:01:02.864 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:01:02.864 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:01:02.865 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:01:02.865 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:01:02.865 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:01:02.865 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:01:02.867 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:01:02.868 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:01:02.868 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:01:02.868 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:01:02.868 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:01:02.868 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:01:02.868 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:01:02.868 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:01:02.870 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:01:02.871 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:01:02.871 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:01:02.871 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:01:02.871 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:01:02.871 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:01:02.871 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:01:02.871 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:01:02.874 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:01:02.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:01:02.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:01:02.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:01:02.874 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:01:02.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:01:02.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:01:02.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:01:02.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:02.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:01:02.875 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:01:02.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:02.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:02.875 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:01:02.875 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:01:02.875 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:01:02.875 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:01:02.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:02.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:02.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:02.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:01:02.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:02.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:02.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:02.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:02.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:02.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:02.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:02.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:02.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:02.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:02.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:02.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:02.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:02.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:02.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:02.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:02.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:02.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:02.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:02.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:02.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:02.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:02.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:02.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:02.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:02.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:02.880 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:01:03.364 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:01:03.395 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:01:03.396 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:01:03.396 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:01:03.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:01:03.399 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:01:03.399 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:01:03.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:01:03.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:01:03.400 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:01:03.400 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:01:03.400 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:01:03.400 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:01:03.842 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:01:03.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:01:03.878 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:01:03.879 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:01:03.879 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:01:04.319 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:01:04.797 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:01:04.880 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:01:04.880 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:01:04.880 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:01:04.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:01:05.275 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:01:05.752 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:01:05.881 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:01:05.881 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:01:05.881 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:01:05.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:01:06.230 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:01:06.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:01:06.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:01:06.493 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:01:06.494 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:01:06.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:01:06.494 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:01:06.495 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:01:06.495 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:01:06.495 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:01:06.495 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:01:06.495 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:01:06.495 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:01:06.495 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:01:11.499 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:01:11.499 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:01:11.499 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:01:11.500 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:01:11.500 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:01:11.500 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:01:11.509 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:01:11.510 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:01:11.510 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:01:11.511 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:01:11.511 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:01:11.515 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:01:11.519 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:01:11.519 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:01:11.519 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:01:11.519 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:01:11.519 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:01:11.520 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:01:11.520 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:01:11.523 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:01:11.524 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:01:11.524 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:01:11.524 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:01:11.524 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:01:11.524 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:01:11.524 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:01:11.524 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:01:11.527 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:01:11.527 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:01:11.527 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:01:11.527 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:01:11.528 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:01:11.528 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:01:11.528 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:01:11.528 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:01:11.531 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:01:11.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:01:11.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:01:11.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:01:11.531 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:01:11.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:01:11.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:01:11.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:01:11.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:01:11.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:11.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:11.532 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:01:11.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:11.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:11.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:11.532 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:01:11.532 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:01:11.532 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:01:11.532 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:01:11.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:11.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:11.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:11.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:01:11.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:11.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:11.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:11.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:11.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:11.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:11.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:11.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:11.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:11.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:11.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:11.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:11.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:11.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:11.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:11.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:11.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:11.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:11.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:11.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:11.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:11.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:11.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:11.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:11.537 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:01:12.020 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:01:12.050 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:01:12.051 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:01:12.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:01:12.052 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:01:12.497 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:01:12.535 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:01:12.536 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:01:12.536 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:01:12.536 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:01:12.976 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:01:13.455 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:01:13.536 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:01:13.537 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:01:13.537 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:01:13.537 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:01:13.933 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:01:14.065 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:01:14.065 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:01:14.065 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:01:14.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:01:14.066 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:01:14.066 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:01:14.066 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:01:14.066 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:01:14.066 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:01:14.066 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:01:14.066 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:01:19.071 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:01:19.071 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:01:19.072 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:01:19.072 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:01:19.072 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:01:19.073 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:01:19.083 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:01:19.085 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:01:19.085 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:01:19.085 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:01:19.085 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:01:19.089 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:01:19.089 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:01:19.090 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:01:19.090 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:01:19.090 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:01:19.090 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:01:19.091 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:01:19.091 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:01:19.093 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:01:19.093 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:01:19.093 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:01:19.094 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:01:19.094 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:01:19.094 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:01:19.094 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:01:19.094 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:01:19.097 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:01:19.097 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:01:19.097 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:01:19.097 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:01:19.097 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:01:19.097 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:01:19.097 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:01:19.098 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:01:19.101 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:01:19.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:01:19.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:01:19.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:01:19.102 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:01:19.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:01:19.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:01:19.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:01:19.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:19.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:01:19.102 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:01:19.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:19.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:19.102 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:01:19.102 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:01:19.102 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:01:19.102 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:01:19.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:19.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:19.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:19.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:01:19.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:19.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:19.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:19.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:19.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:19.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:19.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:19.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:19.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:19.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:19.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:19.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:19.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:19.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:19.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:19.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:19.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:19.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:19.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:19.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:19.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:19.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:19.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:19.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:19.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:19.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:19.107 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:01:19.591 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:01:19.621 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:01:19.622 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:01:19.623 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:01:19.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:01:19.639 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:01:19.639 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:01:19.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:01:19.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:19.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:01:20.068 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:01:20.106 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:01:20.106 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:01:20.106 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:01:20.107 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:01:20.546 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:01:21.025 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:01:21.108 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:01:21.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:01:21.108 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:01:21.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:01:21.504 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:01:21.982 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:01:22.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:01:22.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:01:22.110 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:01:22.110 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:01:22.462 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:01:22.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:01:22.697 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:01:22.697 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:01:22.697 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:01:22.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:01:22.698 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:01:22.698 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:01:22.698 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:01:22.698 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:01:22.698 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:01:22.698 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:01:22.698 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:01:27.722 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:01:27.722 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:01:27.723 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:01:27.724 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:01:27.724 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:01:27.725 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:01:27.734 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:01:27.736 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:01:27.736 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:01:27.736 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:01:27.736 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:01:27.741 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:01:27.741 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:01:27.741 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:01:27.741 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:01:27.741 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:01:27.741 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:01:27.742 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:01:27.742 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:01:27.746 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:01:27.746 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:01:27.746 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:01:27.746 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:01:27.746 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:01:27.746 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:01:27.746 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:01:27.746 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:01:27.750 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:01:27.750 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:01:27.750 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:01:27.750 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:01:27.751 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:01:27.751 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:01:27.751 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:01:27.751 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:01:27.756 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:01:27.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:01:27.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:01:27.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:01:27.756 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:01:27.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:01:27.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:01:27.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:01:27.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:27.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:01:27.757 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:01:27.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:27.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:27.757 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:01:27.757 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:01:27.757 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:01:27.757 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:01:27.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:27.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:27.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:27.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:01:27.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:27.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:27.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:27.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:27.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:27.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:27.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:27.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:27.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:27.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:27.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:27.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:27.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:27.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:27.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:27.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:27.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:27.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:27.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:27.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:27.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:27.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:27.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:27.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:27.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:27.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:27.762 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:01:28.245 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:01:28.277 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:01:28.278 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:01:28.278 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:01:28.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:01:28.289 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:01:28.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:01:28.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:01:28.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:28.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:01:28.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:01:28.346 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:01:28.346 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:01:28.347 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:01:28.347 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:01:28.352 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:01:28.352 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:01:28.352 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:01:28.352 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:01:28.352 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:01:28.352 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:01:28.352 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:01:28.353 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:01:28.353 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:01:28.353 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:01:28.353 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:01:28.353 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:01:28.353 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:01:28.354 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:01:28.354 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:01:28.354 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:01:28.354 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:01:28.354 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:01:28.354 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:01:28.354 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:01:28.354 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:01:33.351 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:01:33.351 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:01:33.351 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:01:33.352 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:01:33.352 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:01:33.353 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:01:33.361 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:01:33.362 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:01:33.362 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:01:33.363 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:01:33.363 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:01:33.367 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:01:33.368 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:01:33.368 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:01:33.368 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:01:33.368 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:01:33.369 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:01:33.369 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:01:33.369 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:01:33.372 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:01:33.372 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:01:33.372 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:01:33.373 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:01:33.373 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:01:33.373 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:01:33.373 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:01:33.373 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:01:33.376 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:01:33.377 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:01:33.377 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:01:33.377 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:01:33.377 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:01:33.378 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:01:33.378 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:01:33.378 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:01:33.382 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:01:33.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:01:33.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:01:33.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:01:33.383 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:01:33.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:01:33.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:01:33.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:01:33.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:33.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:01:33.383 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:01:33.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:33.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:33.384 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:01:33.384 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:01:33.384 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:01:33.384 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:01:33.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:33.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:33.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:33.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:01:33.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:33.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:33.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:33.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:33.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:33.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:33.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:33.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:33.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:33.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:33.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:33.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:33.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:33.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:33.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:33.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:33.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:33.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:33.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:33.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:33.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:33.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:33.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:33.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:33.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:33.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:33.389 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:01:33.872 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:01:33.910 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:01:33.911 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:01:33.913 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:01:33.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:01:33.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:01:33.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:01:33.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:01:33.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:33.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:01:34.350 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:01:34.389 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:01:34.390 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:01:34.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:01:34.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:01:34.830 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:01:35.310 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:01:35.391 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:01:35.391 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:01:35.391 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:01:35.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:01:35.789 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:01:36.268 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:01:36.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:01:36.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:01:36.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:01:36.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:01:36.747 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:01:36.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:01:36.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:36.983 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:01:36.984 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:01:36.984 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:01:36.984 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:01:36.987 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:01:36.987 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:01:36.987 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:01:36.987 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:01:36.987 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:01:36.987 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:01:36.987 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:01:41.989 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:01:41.989 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:01:41.990 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:01:41.991 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:01:41.992 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:01:41.992 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:01:42.001 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:01:42.002 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:01:42.002 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:01:42.002 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:01:42.003 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:01:42.008 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:01:42.009 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:01:42.009 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:01:42.009 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:01:42.010 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:01:42.010 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:01:42.010 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:01:42.010 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:01:42.013 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:01:42.013 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:01:42.013 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:01:42.013 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:01:42.013 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:01:42.013 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:01:42.014 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:01:42.014 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:01:42.016 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:01:42.017 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:01:42.017 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:01:42.017 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:01:42.017 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:01:42.017 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:01:42.017 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:01:42.017 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:01:42.021 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:01:42.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:01:42.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:01:42.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:01:42.021 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:01:42.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:01:42.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:01:42.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:01:42.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:42.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:01:42.022 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:01:42.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:42.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:42.022 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:01:42.022 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:01:42.022 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:01:42.022 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:01:42.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:42.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:42.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:42.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:01:42.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:42.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:42.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:42.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:42.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:42.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:42.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:42.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:42.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:42.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:42.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:42.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:42.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:42.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:42.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:42.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:42.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:42.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:42.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:42.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:42.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:42.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:42.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:42.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:42.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:42.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:42.027 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:01:42.511 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:01:42.548 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:01:42.550 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:01:42.552 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:01:42.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:01:42.575 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:01:42.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:01:42.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:01:42.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:42.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:01:42.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:01:42.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:42.624 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:01:42.624 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:01:42.624 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:01:42.624 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:01:42.629 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:01:42.629 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:01:42.629 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:01:42.629 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:01:42.629 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:01:42.629 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:01:42.629 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:01:47.629 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:01:47.629 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:01:47.631 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:01:47.632 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:01:47.632 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:01:47.633 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:01:47.642 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:01:47.644 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:01:47.644 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:01:47.644 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:01:47.644 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:01:47.649 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:01:47.649 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:01:47.650 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:01:47.650 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:01:47.650 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:01:47.651 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:01:47.651 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:01:47.651 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:01:47.654 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:01:47.654 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:01:47.654 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:01:47.654 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:01:47.655 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:01:47.655 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:01:47.655 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:01:47.655 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:01:47.658 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:01:47.658 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:01:47.659 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:01:47.659 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:01:47.659 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:01:47.659 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:01:47.659 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:01:47.659 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:01:47.664 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:01:47.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:01:47.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:01:47.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:01:47.664 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:01:47.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:01:47.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:01:47.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:01:47.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:47.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:01:47.665 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:01:47.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:47.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:47.665 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:01:47.665 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:01:47.665 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:01:47.665 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:01:47.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:47.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:47.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:47.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:01:47.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:47.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:47.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:47.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:47.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:47.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:47.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:47.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:47.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:47.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:47.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:47.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:47.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:47.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:47.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:47.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:47.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:47.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:47.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:47.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:47.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:47.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:47.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:47.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:47.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:47.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:47.670 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:01:48.153 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:01:48.187 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:01:48.189 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:01:48.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:01:48.192 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:01:48.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:01:48.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:01:48.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:01:48.204 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:01:48.207 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:01:48.207 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:01:48.207 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:01:48.207 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:01:48.207 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:01:48.207 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:01:48.207 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:01:48.207 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=114 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:01:48.207 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=114 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:01:48.207 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=114 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:01:48.207 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=114 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:01:48.207 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=114 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:01:48.207 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=114 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:01:48.207 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=115 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:01:48.207 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=115 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:01:48.207 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:01:48.207 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:01:48.207 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:01:48.207 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:01:48.207 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:01:48.207 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:01:53.208 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:01:53.209 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:01:53.210 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:01:53.211 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:01:53.211 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:01:53.212 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:01:53.222 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:01:53.224 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:01:53.224 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:01:53.224 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:01:53.224 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:01:53.229 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:01:53.229 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:01:53.230 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:01:53.230 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:01:53.230 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:01:53.231 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:01:53.231 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:01:53.231 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:01:53.234 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:01:53.234 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:01:53.235 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:01:53.235 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:01:53.235 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:01:53.235 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:01:53.235 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:01:53.235 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:01:53.239 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:01:53.239 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:01:53.239 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:01:53.239 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:01:53.240 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:01:53.240 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:01:53.240 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:01:53.240 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:01:53.246 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:01:53.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:01:53.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:01:53.246 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:01:53.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:01:53.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:01:53.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:01:53.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:01:53.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:01:53.247 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:01:53.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:53.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:53.247 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:01:53.247 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:01:53.247 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:01:53.247 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:01:53.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:53.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:53.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:53.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:01:53.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:53.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:53.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:53.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:53.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:53.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:53.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:53.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:53.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:53.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:53.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:53.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:53.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:53.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:53.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:53.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:53.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:53.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:53.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:53.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:53.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:53.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:53.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:53.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:53.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:53.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:53.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:53.252 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:01:53.733 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:01:53.773 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:01:53.775 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:01:53.777 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:01:53.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:01:53.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:01:53.790 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:01:53.790 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:01:53.790 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:01:53.795 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:01:53.795 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:01:53.795 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:01:53.795 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:01:53.795 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:01:53.795 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:01:53.795 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:01:53.796 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:01:53.796 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:01:53.796 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:01:53.796 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:01:58.794 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:01:58.794 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:01:58.796 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:01:58.797 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:01:58.798 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:01:58.798 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:01:58.817 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:01:58.819 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:01:58.819 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:01:58.819 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:01:58.819 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:01:58.824 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:01:58.824 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:01:58.825 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:01:58.825 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:01:58.825 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:01:58.826 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:01:58.826 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:01:58.826 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:01:58.829 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:01:58.830 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:01:58.830 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:01:58.830 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:01:58.830 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:01:58.831 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:01:58.831 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:01:58.831 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:01:58.834 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:01:58.834 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:01:58.835 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:01:58.835 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:01:58.835 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:01:58.835 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:01:58.835 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:01:58.835 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:01:58.841 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:01:58.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:01:58.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:01:58.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:01:58.841 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:01:58.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:01:58.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:01:58.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:01:58.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:58.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:01:58.842 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:01:58.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:58.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:58.842 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:01:58.842 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:01:58.842 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:01:58.842 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:01:58.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:58.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:58.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:58.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:01:58.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:58.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:58.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:58.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:58.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:58.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:58.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:58.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:58.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:58.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:58.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:58.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:58.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:58.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:58.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:58.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:01:58.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:58.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:58.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:58.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:58.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:58.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:01:58.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:58.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:01:58.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:58.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:01:58.847 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:01:59.328 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:01:59.362 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:01:59.362 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:01:59.363 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:01:59.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:01:59.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:01:59.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:01:59.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:01:59.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:01:59.373 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:01:59.373 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:01:59.373 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:01:59.373 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:01:59.373 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:01:59.373 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:01:59.373 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:01:59.373 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=113 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:02:04.374 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:02:04.374 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:02:04.376 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:02:04.376 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:02:04.377 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:02:04.377 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:02:04.385 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:02:04.387 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:02:04.387 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:02:04.387 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:02:04.387 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:02:04.392 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:02:04.392 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:02:04.393 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:02:04.393 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:02:04.393 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:02:04.393 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:02:04.393 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:02:04.393 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:02:04.398 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:02:04.398 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:02:04.398 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:02:04.398 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:02:04.399 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:02:04.399 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:02:04.399 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:02:04.399 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:02:04.402 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:02:04.402 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:02:04.403 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:02:04.403 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:02:04.403 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:02:04.403 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:02:04.403 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:02:04.403 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:02:04.410 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:02:04.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:02:04.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:02:04.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:02:04.410 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:02:04.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:02:04.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:02:04.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:02:04.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:04.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:02:04.411 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:02:04.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:04.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:04.411 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:02:04.411 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:02:04.411 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:02:04.411 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:02:04.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:04.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:04.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:04.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:02:04.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:04.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:04.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:04.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:04.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:04.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:04.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:04.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:04.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:04.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:04.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:04.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:04.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:04.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:04.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:04.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:04.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:04.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:04.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:04.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:04.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:04.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:04.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:04.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:04.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:04.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:04.416 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:02:04.900 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:02:04.936 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:02:04.938 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:02:04.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:04.938 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:02:04.951 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:02:04.951 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:02:04.952 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:02:04.952 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:02:04.958 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:02:04.958 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:02:04.958 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:02:04.958 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:02:04.959 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:02:04.959 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:02:04.959 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:02:04.959 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:02:04.959 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:02:04.959 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:02:04.959 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:02:04.959 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:02:04.959 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:02:04.960 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=116 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:02:04.960 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:02:04.960 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:02:04.960 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:02:04.960 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:02:04.960 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:02:04.960 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:02:04.960 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:02:09.956 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:02:09.956 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:02:09.958 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:02:09.959 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:02:09.959 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:02:09.960 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:02:09.971 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:02:09.973 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:02:09.973 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:02:09.973 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:02:09.973 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:02:09.978 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:02:09.978 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:02:09.978 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:02:09.978 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:02:09.979 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:02:09.979 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:02:09.979 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:02:09.980 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:02:09.982 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:02:09.982 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:02:09.983 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:02:09.983 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:02:09.983 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:02:09.983 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:02:09.983 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:02:09.983 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:02:09.986 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:02:09.986 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:02:09.987 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:02:09.987 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:02:09.987 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:02:09.987 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:02:09.987 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:02:09.987 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:02:09.992 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:02:09.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:02:09.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:02:09.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:02:09.992 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:02:09.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:02:09.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:02:09.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:02:09.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:09.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:02:09.993 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:02:09.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:09.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:09.993 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:02:09.993 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:02:09.993 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:02:09.993 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:02:09.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:09.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:09.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:09.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:02:09.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:09.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:09.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:09.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:09.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:09.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:09.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:09.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:09.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:09.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:09.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:09.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:09.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:09.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:09.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:09.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:09.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:09.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:09.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:09.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:09.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:09.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:09.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:09.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:09.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:09.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:09.998 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:02:10.481 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:02:10.515 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:02:10.517 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:02:10.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:10.518 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:02:10.958 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:02:10.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:02:10.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:02:10.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:02:10.999 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:02:11.436 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:02:11.915 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:02:11.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:02:12.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:02:12.000 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:02:12.000 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:02:12.393 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:02:12.872 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:02:13.001 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:02:13.001 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:02:13.001 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:02:13.001 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:02:13.350 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:02:13.534 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:02:13.534 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:02:13.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:02:13.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:02:13.536 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:02:13.536 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:02:13.537 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:02:13.537 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:02:13.829 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:02:14.002 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:02:14.003 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:02:14.003 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:02:14.003 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:02:14.306 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:02:14.785 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:02:15.003 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:02:15.003 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:02:15.003 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:02:15.004 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:02:15.262 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:02:15.740 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:02:15.866 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:02:15.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:02:15.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:15.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:02:15.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:02:15.874 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:02:15.874 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:02:15.879 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:02:15.879 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:02:15.879 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:02:15.880 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:02:15.880 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:02:15.880 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:02:15.880 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:02:15.881 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1256 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:02:15.881 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1256 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:02:20.877 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:02:20.877 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:02:20.880 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:02:20.880 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:02:20.881 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:02:20.882 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:02:20.888 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:02:20.890 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:02:20.890 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:02:20.890 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:02:20.890 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:02:20.894 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:02:20.895 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:02:20.895 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:02:20.895 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:02:20.895 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:02:20.896 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:02:20.896 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:02:20.896 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:02:20.901 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:02:20.901 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:02:20.901 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:02:20.901 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:02:20.901 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:02:20.901 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:02:20.902 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:02:20.902 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:02:20.904 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:02:20.904 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:02:20.905 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:02:20.905 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:02:20.905 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:02:20.905 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:02:20.905 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:02:20.905 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:02:20.909 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:02:20.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:02:20.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:02:20.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:02:20.909 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:02:20.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:02:20.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:02:20.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:02:20.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:20.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:02:20.910 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:02:20.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:20.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:20.910 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:02:20.910 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:02:20.910 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:02:20.910 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:02:20.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:20.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:20.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:20.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:02:20.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:20.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:20.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:20.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:20.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:20.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:20.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:20.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:20.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:20.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:20.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:20.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:20.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:20.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:20.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:20.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:20.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:20.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:20.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:20.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:20.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:20.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:20.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:20.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:20.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:20.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:20.915 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:02:21.397 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:02:21.432 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:02:21.434 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:02:21.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:21.436 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:02:21.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:02:21.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:02:21.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:02:21.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:02:21.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:02:21.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:02:21.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:02:21.496 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:02:21.496 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:02:21.496 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:02:21.497 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:02:21.497 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:02:21.497 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:02:21.497 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:02:21.498 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:02:21.498 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:02:21.498 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:02:26.496 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:02:26.496 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:02:26.498 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:02:26.498 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:02:26.499 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:02:26.499 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:02:26.508 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:02:26.509 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:02:26.509 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:02:26.510 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:02:26.510 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:02:26.513 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:02:26.513 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:02:26.513 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:02:26.513 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:02:26.514 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:02:26.514 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:02:26.514 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:02:26.514 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:02:26.516 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:02:26.517 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:02:26.517 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:02:26.517 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:02:26.517 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:02:26.517 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:02:26.517 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:02:26.517 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:02:26.520 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:02:26.520 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:02:26.520 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:02:26.520 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:02:26.520 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:02:26.520 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:02:26.520 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:02:26.520 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:02:26.524 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:02:26.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:02:26.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:02:26.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:02:26.524 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:02:26.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:02:26.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:02:26.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:02:26.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:26.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:02:26.524 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:02:26.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:26.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:26.525 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:02:26.525 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:02:26.525 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:02:26.525 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:02:26.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:26.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:26.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:26.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:02:26.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:26.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:26.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:26.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:26.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:26.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:26.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:26.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:26.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:26.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:26.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:26.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:26.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:26.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:26.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:26.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:26.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:26.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:26.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:26.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:26.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:26.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:26.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:26.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:26.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:26.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:26.530 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:02:27.010 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:02:27.055 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:02:27.057 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:02:27.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:27.059 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:02:27.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:02:27.084 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:02:27.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:02:27.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:27.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:27.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:02:27.108 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:02:27.109 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:02:27.109 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:02:27.111 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:02:27.111 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:02:27.111 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:02:27.111 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:02:27.111 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:02:27.111 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:02:27.111 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:02:32.115 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:02:32.115 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:02:32.116 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:02:32.116 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:02:32.116 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:02:32.118 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:02:32.127 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:02:32.129 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:02:32.129 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:02:32.129 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:02:32.130 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:02:32.134 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:02:32.134 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:02:32.134 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:02:32.134 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:02:32.135 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:02:32.135 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:02:32.135 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:02:32.135 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:02:32.139 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:02:32.139 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:02:32.139 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:02:32.139 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:02:32.140 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:02:32.140 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:02:32.140 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:02:32.140 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:02:32.144 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:02:32.144 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:02:32.144 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:02:32.144 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:02:32.144 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:02:32.144 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:02:32.144 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:02:32.144 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:02:32.150 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:02:32.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:02:32.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:02:32.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:02:32.150 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:02:32.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:02:32.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:02:32.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:02:32.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:32.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:02:32.151 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:02:32.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:32.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:32.151 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:02:32.151 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:02:32.151 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:02:32.151 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:02:32.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:32.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:32.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:32.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:02:32.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:32.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:32.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:32.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:32.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:32.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:32.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:32.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:32.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:32.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:32.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:32.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:32.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:32.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:32.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:32.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:32.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:32.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:32.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:32.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:32.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:32.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:32.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:32.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:32.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:32.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:32.156 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:02:32.639 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:02:32.666 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:02:32.667 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:02:32.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:32.667 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:02:32.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:02:32.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:02:32.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:02:32.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:32.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:32.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:32.731 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:02:32.731 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:02:32.731 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:02:32.731 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:02:32.732 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:02:32.732 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:02:32.732 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:02:32.732 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:02:32.733 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:02:32.733 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:02:32.733 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:02:32.733 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:02:37.736 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:02:37.736 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:02:37.738 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:02:37.738 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:02:37.738 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:02:37.739 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:02:37.750 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:02:37.753 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:02:37.753 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:02:37.753 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:02:37.753 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:02:37.758 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:02:37.758 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:02:37.759 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:02:37.759 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:02:37.759 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:02:37.760 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:02:37.760 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:02:37.760 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:02:37.763 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:02:37.763 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:02:37.763 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:02:37.763 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:02:37.764 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:02:37.764 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:02:37.764 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:02:37.764 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:02:37.767 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:02:37.767 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:02:37.768 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:02:37.768 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:02:37.768 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:02:37.768 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:02:37.768 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:02:37.768 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:02:37.773 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:02:37.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:02:37.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:02:37.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:02:37.773 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:02:37.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:02:37.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:02:37.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:02:37.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:37.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:02:37.774 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:02:37.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:37.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:37.774 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:02:37.774 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:02:37.774 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:02:37.774 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:02:37.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:37.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:37.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:37.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:02:37.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:37.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:37.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:37.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:37.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:37.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:37.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:37.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:37.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:37.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:37.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:37.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:37.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:37.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:37.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:37.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:37.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:37.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:37.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:37.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:37.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:37.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:37.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:37.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:37.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:37.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:37.779 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:02:38.260 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:02:38.302 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:02:38.302 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:02:38.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:38.304 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:02:38.324 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:02:38.324 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:02:38.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:02:38.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:38.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:38.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:38.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:38.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:38.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:38.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:38.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:38.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:38.382 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:02:38.383 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:02:38.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:02:38.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:02:38.387 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:02:38.387 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:02:38.387 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:02:38.387 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:02:38.387 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:02:38.387 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:02:38.387 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:02:43.387 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:02:43.387 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:02:43.388 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:02:43.388 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:02:43.388 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:02:43.389 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:02:43.399 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:02:43.400 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:02:43.400 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:02:43.400 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:02:43.400 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:02:43.402 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:02:43.403 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:02:43.403 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:02:43.403 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:02:43.403 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:02:43.404 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:02:43.404 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:02:43.404 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:02:43.406 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:02:43.406 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:02:43.406 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:02:43.406 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:02:43.406 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:02:43.406 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:02:43.406 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:02:43.406 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:02:43.409 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:02:43.409 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:02:43.409 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:02:43.409 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:02:43.409 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:02:43.409 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:02:43.409 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:02:43.409 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:02:43.413 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:02:43.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:02:43.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:02:43.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:02:43.413 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:02:43.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:02:43.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:02:43.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:02:43.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:43.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:02:43.413 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:02:43.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:43.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:43.413 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:02:43.413 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:02:43.413 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:02:43.414 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:02:43.414 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:43.414 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:43.414 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:43.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:02:43.414 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:43.414 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:43.414 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:43.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:43.414 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:43.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:43.414 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:43.414 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:43.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:43.414 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:43.414 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:43.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:43.414 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:43.414 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:43.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:43.414 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:43.414 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:43.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:43.414 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:43.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:43.414 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:43.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:43.414 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:43.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:43.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:43.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:43.418 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:02:43.900 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:02:43.935 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:02:43.936 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:02:43.938 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:02:43.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:43.939 [DEBUG] fake_trx.py:377 (BTS@172.18.144.20:5700) Recv FAKE_TRXC_DELAY cmd
2025-12-15 04:02:43.939 [INFO] fake_trx.py:380 (BTS@172.18.144.20:5700) Artificial TRXC delay set to 200
2025-12-15 04:02:43.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD FAKE_TRXC_DELAY
2025-12-15 04:02:44.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:44.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:44.376 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:02:44.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:02:44.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:02:44.566 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:02:44.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:44.767 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:02:44.852 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:02:45.328 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:02:45.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:45.573 [DEBUG] fake_trx.py:377 (BTS@172.18.144.20:5700) Recv FAKE_TRXC_DELAY cmd
2025-12-15 04:02:45.573 [INFO] fake_trx.py:380 (BTS@172.18.144.20:5700) Artificial TRXC delay set to 0
2025-12-15 04:02:45.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD FAKE_TRXC_DELAY
2025-12-15 04:02:45.574 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:02:45.574 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:02:45.574 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:02:45.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:45.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:02:45.584 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:02:45.584 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:02:45.584 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:02:45.585 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:02:45.585 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:02:45.585 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:02:45.585 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:02:45.585 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:02:45.585 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:02:45.585 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:02:45.585 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=465 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:02:45.585 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=465 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:02:45.585 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=465 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:02:45.585 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=465 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:02:45.585 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=465 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:02:45.585 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=465 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:02:45.585 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=465 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:02:50.588 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:02:50.588 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:02:50.590 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:02:50.590 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:02:50.591 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:02:50.591 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:02:50.601 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:02:50.603 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:02:50.603 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:02:50.603 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:02:50.604 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:02:50.608 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:02:50.608 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:02:50.609 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:02:50.609 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:02:50.609 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:02:50.609 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:02:50.610 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:02:50.610 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:02:50.612 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:02:50.612 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:02:50.613 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:02:50.613 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:02:50.613 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:02:50.613 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:02:50.613 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:02:50.613 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:02:50.615 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:02:50.616 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:02:50.616 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:02:50.616 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:02:50.616 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:02:50.616 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:02:50.616 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:02:50.616 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:02:50.621 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:02:50.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:02:50.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:02:50.622 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:02:50.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:02:50.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:02:50.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:02:50.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:02:50.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:02:50.622 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:02:50.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:50.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:50.623 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:02:50.623 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:02:50.623 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:02:50.623 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:02:50.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:50.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:50.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:50.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:02:50.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:50.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:50.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:50.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:50.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:50.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:50.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:50.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:50.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:50.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:50.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:50.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:50.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:50.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:50.628 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:02:51.109 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:02:51.152 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:02:51.154 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:02:51.156 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:02:51.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:51.158 [DEBUG] fake_trx.py:377 (BTS@172.18.144.20:5700) Recv FAKE_TRXC_DELAY cmd
2025-12-15 04:02:51.158 [INFO] fake_trx.py:380 (BTS@172.18.144.20:5700) Artificial TRXC delay set to 200
2025-12-15 04:02:51.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD FAKE_TRXC_DELAY
2025-12-15 04:02:51.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:51.587 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:02:51.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:51.791 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:02:51.791 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:02:51.792 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:02:51.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:51.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:52.065 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:02:52.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:52.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:52.543 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:02:52.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:52.795 [DEBUG] fake_trx.py:377 (BTS@172.18.144.20:5700) Recv FAKE_TRXC_DELAY cmd
2025-12-15 04:02:52.795 [INFO] fake_trx.py:380 (BTS@172.18.144.20:5700) Artificial TRXC delay set to 0
2025-12-15 04:02:52.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD FAKE_TRXC_DELAY
2025-12-15 04:02:52.795 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:02:52.796 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:02:52.796 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:02:52.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:52.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:52.797 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:02:52.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:52.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:52.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:52.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:52.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:52.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:52.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:52.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:52.801 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:02:52.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:02:52.801 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:02:52.802 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:02:52.804 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:02:52.804 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:02:52.804 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:02:52.804 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:02:52.804 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:02:52.804 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:02:52.804 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:02:52.804 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=466 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:02:52.804 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=466 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:02:52.804 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=466 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:02:52.804 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=466 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:02:52.804 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=466 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:02:52.804 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=466 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:02:52.804 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=466 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:02:57.807 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:02:57.808 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:02:57.810 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:02:57.810 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:02:57.811 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:02:57.812 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:02:57.819 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:02:57.819 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:02:57.819 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:02:57.820 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:02:57.820 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:02:57.822 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:02:57.824 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:02:57.824 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:02:57.824 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:02:57.824 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:02:57.825 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:02:57.825 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:02:57.825 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:02:57.826 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:02:57.826 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:02:57.826 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:02:57.826 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:02:57.826 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:02:57.827 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:02:57.827 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:02:57.827 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:02:57.828 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:02:57.828 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:02:57.828 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:02:57.828 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:02:57.828 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:02:57.828 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:02:57.828 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:02:57.828 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:02:57.831 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:02:57.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:02:57.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:02:57.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:02:57.831 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:02:57.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:02:57.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:02:57.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:02:57.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:57.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:02:57.831 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:02:57.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:57.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:57.831 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:02:57.831 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:02:57.832 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:02:57.832 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:02:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:57.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:02:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:57.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:57.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:57.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:57.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:57.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:57.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:57.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:02:57.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:02:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:57.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:02:57.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:57.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:02:57.836 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:02:58.320 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:02:58.348 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:02:58.349 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:02:58.350 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:02:58.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:58.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:02:58.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:02:58.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:02:58.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:58.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:02:58.382 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:02:58.382 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:02:58.382 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:02:58.382 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:02:58.388 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:02:58.388 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:02:58.388 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:02:58.389 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:02:58.389 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:02:58.389 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:02:58.389 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:03:03.387 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:03:03.387 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:03:03.389 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:03:03.390 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:03:03.390 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:03:03.391 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:03:03.398 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:03:03.399 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:03:03.399 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:03:03.400 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:03:03.400 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:03:03.402 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:03:03.402 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:03:03.403 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:03:03.403 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:03:03.403 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:03:03.403 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:03:03.403 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:03:03.404 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:03:03.405 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:03:03.405 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:03:03.406 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:03:03.406 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:03:03.406 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:03:03.406 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:03:03.406 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:03:03.406 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:03:03.408 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:03:03.408 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:03:03.408 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:03:03.408 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:03:03.408 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:03:03.408 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:03:03.408 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:03:03.408 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:03:03.411 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:03:03.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:03:03.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:03:03.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:03:03.411 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:03:03.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:03:03.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:03:03.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:03:03.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:03:03.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:03:03.412 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:03:03.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:03:03.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:03:03.412 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:03:03.412 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:03:03.412 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:03:03.412 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:03:03.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:03:03.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:03:03.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:03:03.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:03:03.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:03:03.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:03:03.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:03:03.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:03:03.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:03:03.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:03:03.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:03:03.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:03:03.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:03:03.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:03:03.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:03:03.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:03:03.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:03:03.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:03:03.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:03:03.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:03:03.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:03:03.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:03:03.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:03:03.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:03:03.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:03:03.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:03:03.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:03:03.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:03:03.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:03:03.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:03:03.417 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:03:03.901 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:03:03.930 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:03:03.932 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:03:03.933 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:03:03.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:03.953 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:03.953 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:03.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:03:03.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:03.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:04.003 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:03:04.003 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:03:04.003 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:03:04.003 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:03:04.009 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:03:04.009 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:03:04.010 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:03:04.010 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:03:04.010 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:03:04.010 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:03:04.010 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:03:04.010 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:03:04.011 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:03:04.011 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:03:04.011 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:03:04.011 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:03:04.011 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:03:04.011 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:03:04.011 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:03:04.011 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:03:04.011 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:03:04.011 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:03:04.012 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:03:04.012 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:03:04.012 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:03:09.008 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:03:09.008 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:03:09.009 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:03:09.010 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:03:09.010 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:03:09.011 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:03:09.021 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:03:09.022 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:03:09.022 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:03:09.023 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:03:09.023 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:03:09.027 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:03:09.027 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:03:09.027 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:03:09.027 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:03:09.027 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:03:09.028 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:03:09.028 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:03:09.028 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:03:09.032 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:03:09.032 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:03:09.032 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:03:09.032 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:03:09.032 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:03:09.032 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:03:09.032 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:03:09.032 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:03:09.035 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:03:09.036 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:03:09.036 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:03:09.036 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:03:09.036 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:03:09.036 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:03:09.036 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:03:09.036 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:03:09.040 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:03:09.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:03:09.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:03:09.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:03:09.040 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:03:09.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:03:09.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:03:09.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:03:09.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:03:09.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:03:09.041 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:03:09.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:03:09.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:03:09.041 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:03:09.041 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:03:09.041 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:03:09.041 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:03:09.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:03:09.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:03:09.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:03:09.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:03:09.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:03:09.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:03:09.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:03:09.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:03:09.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:03:09.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:03:09.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:03:09.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:03:09.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:03:09.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:03:09.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:03:09.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:03:09.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:03:09.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:03:09.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:03:09.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:03:09.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:03:09.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:03:09.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:03:09.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:03:09.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:03:09.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:03:09.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:03:09.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:03:09.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:03:09.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:03:09.046 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:03:09.530 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:03:09.559 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:03:09.561 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:03:09.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:09.563 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:03:09.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:09.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:09.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:03:09.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:09.593 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:09.594 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:09.594 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:03:09.594 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:03:09.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:09.633 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:09.633 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:09.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:09.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:09.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:09.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:09.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:09.693 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:09.710 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:09.710 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:09.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:03:09.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:09.712 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:09.712 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:09.712 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:03:09.712 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:03:09.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:09.770 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:09.770 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:09.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:09.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:10.008 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:03:10.045 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:03:10.045 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:03:10.045 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:03:10.045 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:03:10.486 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:03:10.964 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:03:11.045 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:03:11.046 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:03:11.046 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:03:11.046 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:03:11.442 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:03:11.920 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:03:12.046 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:03:12.047 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:03:12.047 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:03:12.047 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:03:12.400 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:03:12.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:12.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:12.778 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:12.778 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:12.797 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:12.797 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:12.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:03:12.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:12.798 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:12.798 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:12.798 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:03:12.798 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:03:12.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:12.822 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:12.822 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:12.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:12.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:12.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:12.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:12.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:12.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:12.878 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:03:12.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:12.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:12.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:03:12.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:12.891 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:12.891 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:12.891 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:03:12.891 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:03:12.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:12.933 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:12.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:12.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:12.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:13.047 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:03:13.047 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:03:13.048 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:03:13.048 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:03:13.355 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:03:13.833 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:03:14.048 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:03:14.049 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:03:14.049 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:03:14.049 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:03:14.312 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:03:14.790 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:03:15.269 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:03:15.747 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:03:15.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:15.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:15.942 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:15.942 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:15.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:15.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:15.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:03:15.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:15.962 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:15.962 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:15.962 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:03:15.962 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:03:15.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:15.992 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:15.992 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:15.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:15.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:16.225 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:03:16.703 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:03:17.182 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:03:17.660 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:03:18.138 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:03:18.616 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:03:18.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:19.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:19.001 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:19.001 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:19.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:19.020 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:19.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:03:19.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:19.021 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:19.021 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:19.021 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:03:19.022 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:03:19.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:19.039 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:19.039 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:19.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:19.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:19.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:19.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:19.092 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:19.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:19.094 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:03:19.109 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:19.109 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:19.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:03:19.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:19.110 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:19.110 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:19.110 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:03:19.110 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:03:19.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:19.149 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:19.149 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:19.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:19.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:19.572 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:03:20.050 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:03:20.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:20.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:20.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:20.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:20.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:20.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:20.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:03:20.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:20.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:20.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:20.278 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:03:20.278 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:03:20.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:20.283 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:20.283 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:20.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:20.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:20.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:20.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:20.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:20.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:20.372 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:20.373 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:20.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:03:20.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:20.374 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:20.374 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:20.374 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:03:20.374 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:03:20.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:20.428 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:20.428 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:20.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:20.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:20.527 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:03:21.005 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:03:21.484 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:03:21.963 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:03:22.441 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:03:22.919 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:03:23.398 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:03:23.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:23.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:23.430 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:23.430 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:23.444 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:23.444 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:23.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:03:23.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:23.446 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:23.446 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:23.446 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:03:23.446 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:03:23.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:23.498 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:23.499 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:23.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:23.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:23.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:23.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:23.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:23.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:23.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:23.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:23.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:03:23.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:23.588 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:23.588 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:23.588 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:03:23.588 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:03:23.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:23.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:23.663 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:23.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:23.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:23.876 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:03:24.354 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:03:24.833 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 04:03:25.311 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 04:03:25.789 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 04:03:26.268 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 04:03:26.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:26.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:26.670 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:26.670 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:26.689 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:26.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:26.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:03:26.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:26.691 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:26.691 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:26.691 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:03:26.691 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:03:26.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:26.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:26.739 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:26.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:26.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:26.745 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 04:03:27.224 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 04:03:27.702 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 04:03:28.179 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 04:03:28.658 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 04:03:29.137 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 04:03:29.614 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 04:03:29.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:29.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:29.746 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:29.746 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:29.765 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:29.765 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:29.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:03:29.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:29.766 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:29.766 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:29.766 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:03:29.766 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:03:29.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:29.807 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:29.807 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:29.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:29.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:29.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:29.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:29.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:29.907 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:29.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:29.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:29.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:03:29.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:29.927 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:29.927 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:29.927 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:03:29.927 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:03:29.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:29.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:29.943 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:29.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:29.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:30.093 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 04:03:30.571 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 04:03:31.050 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 04:03:31.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:31.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:31.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:31.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:31.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:31.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:31.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:03:31.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:31.251 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:31.251 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:31.251 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:03:31.251 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:03:31.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:31.294 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:31.295 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:31.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:31.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:31.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:31.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:31.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:31.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:31.528 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 04:03:31.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:31.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:31.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:03:31.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:31.537 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:31.537 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:31.537 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:03:31.537 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:03:31.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:31.583 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:31.584 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:31.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:31.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:32.005 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 04:03:32.483 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 04:03:32.962 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 04:03:33.440 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 04:03:33.917 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 04:03:34.395 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 04:03:34.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:34.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:34.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:34.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:34.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:34.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:34.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:03:34.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:34.610 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:34.610 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:34.610 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:03:34.610 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:03:34.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:34.632 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:34.632 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:34.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:34.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:34.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:34.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:34.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:34.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:34.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:34.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:34.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:03:34.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:34.871 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:34.871 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:34.871 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:03:34.871 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:03:34.874 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 04:03:34.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:34.930 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:34.930 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:34.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:34.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:35.351 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 04:03:35.828 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 04:03:36.306 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 04:03:36.784 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 04:03:37.261 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 04:03:37.740 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-15 04:03:37.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:37.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:37.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:37.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:37.956 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:37.956 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:37.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:03:37.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:37.958 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:37.958 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:37.958 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:03:37.958 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:03:37.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:37.978 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:37.978 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:37.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:37.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:38.218 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-15 04:03:38.695 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-15 04:03:39.173 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-15 04:03:39.651 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-15 04:03:40.129 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-15 04:03:40.608 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-15 04:03:40.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:40.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:40.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:40.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:41.005 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:41.005 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:41.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:03:41.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:41.007 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:41.007 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:41.007 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:03:41.007 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:03:41.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:41.033 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:41.033 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:41.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:41.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:41.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:41.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:41.075 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:41.075 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:41.085 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-15 04:03:41.093 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:41.093 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:41.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:03:41.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:41.094 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:41.094 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:41.094 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:03:41.094 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:03:41.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:41.138 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:41.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:41.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:41.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:41.562 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-15 04:03:42.040 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-15 04:03:42.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:42.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:42.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:42.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:42.105 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:42.105 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:42.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:03:42.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:42.106 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:42.106 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:42.106 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:03:42.106 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:03:42.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:42.138 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:42.138 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:42.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:42.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:42.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:42.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:42.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:42.200 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:42.218 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:42.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:42.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:03:42.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:42.220 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:42.220 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:42.220 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:03:42.220 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:03:42.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:42.223 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:42.223 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:42.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:42.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:42.518 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-15 04:03:42.996 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-15 04:03:43.474 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-15 04:03:43.951 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-15 04:03:44.429 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-15 04:03:44.907 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-15 04:03:45.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:45.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:45.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:45.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:45.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:45.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:45.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:03:45.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:45.253 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:45.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:45.253 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:03:45.253 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:03:45.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:45.291 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:45.292 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:45.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:45.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:45.384 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-15 04:03:45.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:45.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:45.544 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:45.544 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:45.562 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:45.562 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:45.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:03:45.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:45.564 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:45.564 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:45.564 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:03:45.564 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:03:45.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:45.567 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:45.567 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:45.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:45.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:45.862 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-15 04:03:46.339 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-15 04:03:46.817 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-15 04:03:47.295 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-15 04:03:47.774 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-15 04:03:48.252 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-15 04:03:48.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:48.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:48.575 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:48.575 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:48.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:48.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:48.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:03:48.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:48.595 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:48.595 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:48.596 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:03:48.596 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:03:48.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:48.635 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:48.636 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:48.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:48.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:48.730 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-15 04:03:49.207 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-15 04:03:49.685 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-15 04:03:50.163 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-15 04:03:50.640 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-15 04:03:51.119 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2025-12-15 04:03:51.596 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2025-12-15 04:03:51.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:51.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:51.645 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:51.645 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:51.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:51.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:51.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:03:51.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:51.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:51.663 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:51.663 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:03:51.663 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:03:51.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:51.696 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:51.697 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:51.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:51.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:51.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:51.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:51.756 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:51.756 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:51.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:51.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:51.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:03:51.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:51.776 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:51.777 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:51.777 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:03:51.777 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:03:51.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:51.841 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:51.842 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:51.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:51.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:52.074 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2025-12-15 04:03:52.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:52.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:52.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:52.543 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:52.551 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2025-12-15 04:03:52.552 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:03:52.552 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:03:52.552 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:03:52.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:03:52.553 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:03:52.553 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:03:52.553 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:03:52.553 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:03:52.553 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:03:52.553 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:03:52.553 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:03:57.556 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:03:57.557 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:03:57.558 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:03:57.559 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:03:57.559 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:03:57.560 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:03:57.568 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:03:57.569 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:03:57.569 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:03:57.570 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:03:57.570 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:03:57.573 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:03:57.574 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:03:57.574 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:03:57.574 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:03:57.574 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:03:57.574 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:03:57.574 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:03:57.574 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:03:57.580 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:03:57.580 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:03:57.580 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:03:57.580 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:03:57.580 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:03:57.580 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:03:57.580 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:03:57.580 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:03:57.583 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:03:57.584 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:03:57.584 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:03:57.584 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:03:57.584 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:03:57.584 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:03:57.584 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:03:57.584 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:03:57.589 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:03:57.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:03:57.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:03:57.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:03:57.589 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:03:57.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:03:57.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:03:57.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:03:57.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:03:57.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:03:57.589 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:03:57.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:03:57.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:03:57.590 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:03:57.590 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:03:57.590 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:03:57.590 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:03:57.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:03:57.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:03:57.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:03:57.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:03:57.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:03:57.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:03:57.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:03:57.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:03:57.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:03:57.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:03:57.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:03:57.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:03:57.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:03:57.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:03:57.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:03:57.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:03:57.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:03:57.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:03:57.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:03:57.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:03:57.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:03:57.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:03:57.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:03:57.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:03:57.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:03:57.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:03:57.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:03:57.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:03:57.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:03:57.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:03:57.594 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:03:58.077 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:03:58.106 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:03:58.106 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:03:58.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:58.107 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:03:58.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:58.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:58.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:03:58.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:58.114 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:58.114 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:58.114 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:03:58.114 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:03:58.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:58.160 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:58.160 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:58.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:58.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:58.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:58.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:58.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:58.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:58.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:58.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:58.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:03:58.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:58.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:58.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:58.261 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:03:58.261 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:03:58.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:58.317 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:58.318 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:58.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:58.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:58.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:58.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:58.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:58.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:58.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:58.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:58.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:03:58.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:58.419 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:58.419 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:58.419 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:03:58.419 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:03:58.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:58.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:58.460 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:58.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:58.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:58.554 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:03:58.594 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:03:58.594 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:03:58.594 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:03:58.594 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:03:58.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:58.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:58.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:58.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:58.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:58.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:58.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:03:58.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:58.735 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:58.735 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:58.735 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:03:58.735 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:03:58.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:58.798 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:03:58.798 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:03:58.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:58.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:58.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:03:58.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:03:58.880 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:03:58.880 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:03:58.889 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:03:58.890 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:03:58.890 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:03:58.890 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:03:58.895 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:03:58.895 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:03:58.896 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:03:58.896 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:03:58.896 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:03:58.896 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:03:58.896 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:03:58.897 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=279 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:03:58.897 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=279 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:03:58.897 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=279 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:03:58.897 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=279 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:03:58.897 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=279 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:03:58.897 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=279 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:03:58.897 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=280 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:03:58.897 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=280 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:03:58.898 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=280 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:03:58.898 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=280 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:03:58.898 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=280 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:03:58.898 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=280 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:03:58.898 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=280 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:03:58.898 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=280 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:04:03.895 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:04:03.895 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:04:03.897 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:04:03.899 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:04:03.899 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:04:03.900 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:04:03.913 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:04:03.914 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:04:03.914 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:04:03.915 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:04:03.915 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:04:03.919 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:04:03.920 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:04:03.920 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:04:03.920 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:04:03.920 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:04:03.921 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:04:03.921 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:04:03.921 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:04:03.923 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:04:03.924 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:04:03.924 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:04:03.924 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:04:03.924 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:04:03.924 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:04:03.924 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:04:03.924 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:04:03.927 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:04:03.927 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:04:03.927 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:04:03.927 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:04:03.927 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:04:03.927 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:04:03.927 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:04:03.927 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:04:03.931 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:04:03.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:04:03.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:04:03.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:04:03.931 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:04:03.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:04:03.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:04:03.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:04:03.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:03.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:04:03.932 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:04:03.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:03.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:03.932 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:04:03.932 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:04:03.932 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:04:03.932 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:04:03.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:03.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:03.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:03.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:04:03.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:03.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:03.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:03.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:03.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:03.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:03.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:03.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:03.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:03.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:03.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:03.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:03.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:03.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:03.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:03.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:03.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:03.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:03.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:03.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:03.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:03.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:03.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:03.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:03.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:03.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:03.937 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:04:04.417 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:04:04.452 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:04:04.453 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:04:04.455 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:04:04.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:04.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:04.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:04.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:04:04.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:04.478 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:04.478 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:04.478 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:04:04.478 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:04:04.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:04.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:04.519 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:04.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:04.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:04.895 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:04:04.935 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:04:04.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:04:04.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:04:04.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:04:05.373 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:04:05.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:05.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:05.396 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:05.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:05.410 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:05.410 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:05.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:04:05.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:05.412 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:05.412 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:05.412 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:04:05.412 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:04:05.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:05.418 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:05.418 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:05.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:05.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:05.851 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:04:05.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:04:05.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:04:05.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:04:05.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:04:06.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:06.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:06.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:06.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:06.141 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:06.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:06.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:04:06.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:06.143 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:06.143 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:06.143 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:04:06.143 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:04:06.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:06.188 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:06.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:06.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:06.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:06.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:06.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:06.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:06.295 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:06.316 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:06.316 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:06.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:04:06.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:06.318 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:06.318 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:06.318 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:04:06.318 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:04:06.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:06.321 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:06.321 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:06.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:06.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:06.330 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:04:06.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:06.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:06.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:06.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:06.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:04:06.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:04:06.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:04:06.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:04:06.739 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:04:06.739 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:04:06.739 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:04:06.739 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:04:06.739 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:04:06.739 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:04:06.739 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:04:11.740 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:04:11.740 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:04:11.742 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:04:11.742 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:04:11.743 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:04:11.743 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:04:11.759 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:04:11.760 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:04:11.760 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:04:11.761 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:04:11.761 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:04:11.766 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:04:11.767 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:04:11.767 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:04:11.767 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:04:11.768 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:04:11.768 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:04:11.769 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:04:11.769 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:04:11.772 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:04:11.772 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:04:11.773 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:04:11.773 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:04:11.773 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:04:11.773 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:04:11.773 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:04:11.773 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:04:11.776 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:04:11.777 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:04:11.777 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:04:11.777 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:04:11.777 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:04:11.778 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:04:11.778 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:04:11.778 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:04:11.782 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:04:11.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:04:11.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:04:11.782 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:04:11.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:04:11.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:04:11.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:04:11.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:04:11.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:04:11.783 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:04:11.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:11.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:11.783 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:04:11.783 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:04:11.783 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:04:11.783 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:04:11.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:11.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:11.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:11.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:04:11.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:11.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:11.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:11.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:11.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:11.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:11.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:11.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:11.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:11.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:11.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:11.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:11.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:11.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:11.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:11.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:11.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:11.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:11.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:11.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:11.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:11.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:11.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:11.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:11.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:11.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:11.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:11.788 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:04:12.271 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:04:12.304 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:04:12.306 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:04:12.307 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:04:12.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:12.330 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:12.330 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:12.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:04:12.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:12.335 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:12.335 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:12.335 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:04:12.335 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:04:12.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:12.374 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:12.374 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:12.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:12.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:12.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:12.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:12.545 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:12.545 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:12.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:12.561 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:12.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:04:12.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:12.563 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:12.563 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:12.563 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:04:12.563 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:04:12.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:12.607 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:12.608 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:12.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:12.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:12.746 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:04:12.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:04:12.787 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:04:12.788 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:04:12.788 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:04:12.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:12.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:12.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:12.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:12.909 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:12.909 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:12.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:04:12.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:12.911 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:12.911 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:12.911 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:04:12.911 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:04:12.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:12.929 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:12.929 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:12.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:12.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:13.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:13.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:13.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:13.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:13.223 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:04:13.228 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:13.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:13.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:04:13.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:13.230 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:13.230 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:13.230 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:04:13.230 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:04:13.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:13.279 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:13.279 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:13.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:13.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:13.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:13.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:13.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:13.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:13.624 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:04:13.624 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:04:13.625 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:04:13.625 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:04:13.625 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:04:13.625 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:04:13.625 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:04:13.626 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:04:13.626 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:04:13.626 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:04:13.626 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:04:13.626 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=395 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:04:13.626 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=395 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:04:13.626 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=395 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:04:13.626 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=395 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:04:13.626 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=395 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:04:13.626 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=395 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:04:18.629 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:04:18.629 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:04:18.631 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:04:18.632 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:04:18.633 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:04:18.634 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:04:18.643 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:04:18.644 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:04:18.644 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:04:18.644 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:04:18.644 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:04:18.647 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:04:18.648 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:04:18.648 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:04:18.648 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:04:18.648 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:04:18.648 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:04:18.648 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:04:18.648 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:04:18.651 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:04:18.651 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:04:18.651 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:04:18.651 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:04:18.652 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:04:18.652 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:04:18.652 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:04:18.652 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:04:18.657 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:04:18.657 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:04:18.658 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:04:18.658 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:04:18.658 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:04:18.658 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:04:18.658 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:04:18.658 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:04:18.666 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:04:18.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:04:18.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:04:18.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:04:18.666 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:04:18.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:04:18.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:04:18.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:04:18.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:04:18.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:18.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:18.667 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:04:18.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:18.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:18.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:18.667 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:04:18.667 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:04:18.667 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:04:18.667 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:04:18.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:18.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:18.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:18.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:04:18.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:18.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:18.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:18.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:18.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:18.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:18.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:18.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:18.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:18.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:18.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:18.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:18.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:18.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:18.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:18.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:18.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:18.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:18.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:18.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:18.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:18.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:18.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:18.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:18.672 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:04:19.155 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:04:19.185 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:04:19.185 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:04:19.186 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:04:19.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:19.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:19.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:19.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:04:19.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:19.206 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:19.206 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:19.206 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:04:19.206 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:04:19.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:19.258 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:19.258 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:19.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:19.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:19.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:19.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:19.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:19.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:19.444 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:19.444 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:19.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:04:19.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:19.445 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:19.446 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:19.446 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:04:19.446 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:04:19.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:19.491 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:19.491 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:19.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:19.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:19.632 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:04:19.671 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:04:19.671 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:04:19.671 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:04:19.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:04:19.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:19.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:19.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:19.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:19.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:19.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:19.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:04:19.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:19.800 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:19.800 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:19.800 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:04:19.801 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:04:19.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:19.820 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:19.820 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:19.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:19.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:20.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:20.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:20.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:20.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:20.110 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:04:20.120 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:20.120 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:20.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:04:20.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:20.122 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:20.123 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:20.123 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:04:20.123 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:04:20.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:20.163 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:20.164 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:20.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:20.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:20.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:20.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:20.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:20.505 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:20.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:04:20.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:04:20.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:04:20.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:04:20.521 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:04:20.522 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:04:20.522 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:04:20.522 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:04:20.523 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:04:20.523 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:04:20.523 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:04:25.521 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:04:25.521 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:04:25.523 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:04:25.524 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:04:25.525 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:04:25.525 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:04:25.536 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:04:25.537 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:04:25.537 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:04:25.537 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:04:25.537 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:04:25.539 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:04:25.539 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:04:25.539 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:04:25.540 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:04:25.540 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:04:25.540 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:04:25.540 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:04:25.540 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:04:25.542 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:04:25.542 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:04:25.542 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:04:25.542 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:04:25.542 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:04:25.542 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:04:25.542 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:04:25.542 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:04:25.544 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:04:25.544 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:04:25.544 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:04:25.544 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:04:25.544 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:04:25.545 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:04:25.545 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:04:25.545 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:04:25.547 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:04:25.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:04:25.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:04:25.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:04:25.548 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:04:25.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:04:25.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:04:25.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:04:25.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:25.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:04:25.548 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:04:25.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:25.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:25.548 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:04:25.548 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:04:25.548 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:04:25.548 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:04:25.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:25.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:25.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:25.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:04:25.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:25.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:25.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:25.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:25.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:25.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:25.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:25.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:25.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:25.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:25.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:25.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:25.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:25.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:25.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:25.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:25.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:25.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:25.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:25.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:25.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:25.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:25.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:25.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:25.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:25.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:25.553 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:04:26.036 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:04:26.066 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:04:26.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:26.068 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:04:26.069 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:04:26.083 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:26.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:26.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:04:26.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:26.087 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:26.087 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:26.087 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:04:26.087 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:04:26.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:26.138 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:26.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:26.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:26.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:26.513 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:04:26.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:04:26.551 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:04:26.551 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:04:26.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:04:26.990 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:04:27.469 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:04:27.551 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:04:27.552 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:04:27.552 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:04:27.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:04:27.947 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:04:27.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:27.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:27.998 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:27.998 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:28.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:28.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:28.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:04:28.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:28.017 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:28.017 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:28.017 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:04:28.017 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:04:28.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:28.046 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:28.047 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:28.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:28.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:28.425 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:04:28.553 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:04:28.553 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:04:28.553 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:04:28.553 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:04:28.904 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:04:29.382 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:04:29.554 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:04:29.554 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:04:29.554 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:04:29.554 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:04:29.860 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:04:30.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:30.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:30.194 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:30.194 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:30.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:30.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:30.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:04:30.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:30.215 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:30.215 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:30.215 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:04:30.215 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:04:30.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:30.241 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:30.241 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:30.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:30.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:30.338 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:04:30.555 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:04:30.556 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:04:30.556 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:04:30.556 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:04:30.816 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:04:31.294 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:04:31.773 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:04:31.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:31.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:31.816 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:31.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:31.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:31.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:31.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:04:31.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:31.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:31.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:31.835 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:04:31.835 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:04:31.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:31.873 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:31.874 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:31.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:31.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:32.250 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:04:32.728 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:04:33.205 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:04:33.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:33.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:33.675 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:33.675 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:33.683 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:04:33.687 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:04:33.687 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:04:33.687 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:04:33.687 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:04:33.696 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:04:33.696 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:04:33.696 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:04:33.696 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:04:33.698 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:04:33.698 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:04:33.698 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:04:38.692 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:04:38.692 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:04:38.694 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:04:38.694 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:04:38.695 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:04:38.695 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:04:38.703 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:04:38.705 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:04:38.705 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:04:38.705 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:04:38.705 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:04:38.709 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:04:38.709 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:04:38.709 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:04:38.709 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:04:38.709 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:04:38.709 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:04:38.709 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:04:38.709 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:04:38.712 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:04:38.713 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:04:38.713 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:04:38.713 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:04:38.713 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:04:38.713 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:04:38.713 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:04:38.713 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:04:38.716 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:04:38.716 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:04:38.716 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:04:38.716 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:04:38.716 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:04:38.716 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:04:38.716 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:04:38.716 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:04:38.720 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:04:38.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:04:38.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:04:38.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:04:38.720 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:04:38.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:04:38.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:04:38.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:04:38.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:38.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:04:38.721 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:04:38.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:38.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:38.721 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:04:38.721 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:04:38.721 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:04:38.721 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:04:38.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:38.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:38.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:38.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:04:38.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:38.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:38.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:38.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:38.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:38.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:38.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:38.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:38.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:38.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:38.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:38.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:38.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:38.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:38.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:38.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:38.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:38.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:38.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:38.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:38.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:38.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:38.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:38.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:38.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:38.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:38.726 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:04:39.209 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:04:39.238 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:04:39.238 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:04:39.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:39.239 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:04:39.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:39.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:39.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:04:39.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:39.249 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:39.249 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:39.249 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:04:39.249 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:04:39.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:39.288 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:39.288 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:39.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:39.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:39.685 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:04:39.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:04:39.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:04:39.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:04:39.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:04:40.163 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:04:40.641 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:04:40.725 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:04:40.725 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:04:40.725 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:04:40.726 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:04:41.118 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:04:41.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:41.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:41.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:41.170 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:41.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:41.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:41.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:04:41.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:41.187 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:41.187 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:41.187 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:04:41.187 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:04:41.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:41.217 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:41.217 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:41.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:41.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:41.596 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:04:41.726 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:04:41.726 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:04:41.726 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:04:41.727 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:04:42.075 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:04:42.553 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:04:42.727 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:04:42.728 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:04:42.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:04:42.728 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:04:43.031 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:04:43.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:43.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:43.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:43.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:43.382 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:43.382 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:43.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:04:43.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:43.384 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:43.384 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:43.384 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:04:43.384 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:04:43.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:43.413 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:43.413 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:43.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:43.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:43.509 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:04:43.729 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:04:43.729 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:04:43.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:04:43.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:04:43.987 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:04:44.465 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:04:44.943 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:04:44.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:44.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:44.986 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:44.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:45.005 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:45.005 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:45.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:04:45.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:45.006 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:45.006 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:45.006 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:04:45.007 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:04:45.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:45.045 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:45.045 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:45.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:45.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:45.421 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:04:45.899 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:04:46.377 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:04:46.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:46.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:46.845 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:46.845 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:46.854 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:04:46.857 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:04:46.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:04:46.857 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:04:46.857 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:04:46.866 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:04:46.866 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:04:46.866 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:04:46.866 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:04:46.868 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:04:46.868 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:04:46.868 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:04:51.861 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:04:51.862 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:04:51.864 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:04:51.865 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:04:51.866 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:04:51.866 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:04:51.881 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:04:51.883 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:04:51.883 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:04:51.883 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:04:51.883 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:04:51.888 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:04:51.889 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:04:51.889 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:04:51.889 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:04:51.889 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:04:51.889 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:04:51.889 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:04:51.889 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:04:51.893 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:04:51.893 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:04:51.893 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:04:51.893 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:04:51.894 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:04:51.894 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:04:51.894 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:04:51.894 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:04:51.897 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:04:51.897 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:04:51.898 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:04:51.898 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:04:51.898 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:04:51.898 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:04:51.898 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:04:51.898 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:04:51.902 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:04:51.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:04:51.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:04:51.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:04:51.903 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:04:51.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:04:51.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:04:51.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:04:51.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:51.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:04:51.903 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:04:51.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:51.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:51.903 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:04:51.903 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:04:51.903 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:04:51.903 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:04:51.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:51.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:51.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:51.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:04:51.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:51.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:51.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:51.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:51.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:51.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:51.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:51.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:51.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:51.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:51.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:51.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:51.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:51.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:51.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:51.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:51.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:51.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:04:51.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:51.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:51.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:51.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:04:51.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:04:51.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:51.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:51.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:04:51.908 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:04:52.392 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:04:52.420 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:04:52.420 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:04:52.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:52.422 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:04:52.434 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:52.434 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:52.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:04:52.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:52.437 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:52.437 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:52.437 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:04:52.437 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:04:52.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:52.489 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:52.489 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:52.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:52.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:52.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:52.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:52.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:52.675 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:52.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:52.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:52.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:04:52.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:52.694 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:52.694 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:52.694 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:04:52.694 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:04:52.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:52.732 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:52.733 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:52.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:52.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:52.868 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:04:52.907 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:04:52.907 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:04:52.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:04:52.908 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:04:53.347 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:04:53.824 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:04:53.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:04:53.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:04:53.909 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:04:53.909 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:04:54.303 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:04:54.781 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:04:54.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:54.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:54.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:54.831 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:54.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:54.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:54.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:04:54.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:54.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:54.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:54.853 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:04:54.853 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:04:54.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:54.878 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:54.879 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:54.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:54.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:54.909 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:04:54.910 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:04:54.910 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:04:54.910 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:04:55.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:55.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:55.047 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:55.047 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:55.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:55.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:55.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:04:55.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:55.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:55.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:55.064 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:04:55.064 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:04:55.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:55.119 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:55.119 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:55.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:55.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:55.259 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:04:55.737 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:04:55.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:04:55.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:04:55.911 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:04:55.911 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:04:56.215 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:04:56.693 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:04:56.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:04:56.912 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:04:56.912 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:04:56.912 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:04:57.170 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:04:57.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:57.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:57.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:57.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:57.289 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:57.289 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:57.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:04:57.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:57.290 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:57.290 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:57.290 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:04:57.291 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:04:57.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:57.313 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:57.313 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:57.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:57.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:57.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:57.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:57.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:57.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:57.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:57.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:57.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:04:57.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:57.606 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:57.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:57.606 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:04:57.606 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:04:57.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:57.649 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:04:57.649 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:57.650 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:57.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:57.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:58.127 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:04:58.605 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:04:59.083 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:04:59.562 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:04:59.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:59.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:59.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:59.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:59.962 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:04:59.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:04:59.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:04:59.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:59.964 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:59.964 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:59.964 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:04:59.964 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:04:59.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:04:59.984 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:04:59.984 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:04:59.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:04:59.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:00.040 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:05:00.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:00.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:00.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:00.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:00.288 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:00.288 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:00.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:00.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:00.290 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:00.290 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:00.290 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:00.290 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:00.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:00.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:00.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:00.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:00.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:00.518 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:05:00.996 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:05:01.475 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:05:01.953 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:05:02.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:02.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:02.383 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:02.383 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:02.400 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:02.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:02.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:02.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:02.402 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:02.402 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:02.402 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:02.402 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:02.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:02.426 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:02.426 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:02.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:02.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:02.430 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:05:02.908 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:05:03.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:03.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:03.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:03.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:03.087 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:03.087 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:03.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:03.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:03.088 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:03.088 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:03.089 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:03.089 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:03.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:03.146 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:03.146 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:03.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:03.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:03.385 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:05:03.863 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:05:04.341 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:05:04.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:04.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:04.783 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:04.783 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:04.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:04.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:04.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:04.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:04.802 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:04.802 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:04.802 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:04.802 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:04.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:04.810 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:04.810 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:04.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:04.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:04.819 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:05:05.296 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:05:05.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:05.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:05.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:05.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:05.475 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:05.475 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:05.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:05.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:05.476 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:05.477 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:05.477 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:05.477 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:05.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:05.540 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:05.540 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:05.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:05.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:05.774 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:05:06.252 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:05:06.730 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:05:07.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:07.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:07.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:07.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:07.190 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:07.190 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:07.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:07.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:07.191 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:07.191 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:07.191 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:07.191 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:07.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:07.199 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:07.199 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:07.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:07.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:07.208 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:05:07.685 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 04:05:07.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:07.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:07.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:07.773 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:07.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:07.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:07.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:07.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:07.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:07.783 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:07.783 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:07.783 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:07.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:07.826 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:07.826 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:07.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:07.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:08.163 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 04:05:08.641 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 04:05:09.119 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 04:05:09.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:09.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:09.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:09.517 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:09.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:09.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:09.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:09.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:09.538 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:09.538 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:09.539 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:09.539 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:09.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:09.593 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:09.593 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:09.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:09.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:09.596 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 04:05:10.074 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 04:05:10.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:10.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:10.162 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:10.162 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:10.181 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:10.181 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:10.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:10.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:10.183 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:10.183 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:10.183 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:10.183 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:10.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:10.220 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:10.220 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:10.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:10.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:10.552 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 04:05:11.029 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 04:05:11.507 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 04:05:11.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:11.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:11.904 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:11.904 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:11.915 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:05:11.915 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:05:11.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:05:11.915 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:05:11.916 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:05:11.916 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:05:11.916 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:05:11.916 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:05:11.916 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:05:11.916 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:05:11.916 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:05:16.920 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:05:16.920 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:05:16.921 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:05:16.922 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:05:16.923 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:05:16.923 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:05:16.934 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:05:16.936 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:05:16.936 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:05:16.937 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:05:16.937 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:05:16.944 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:05:16.944 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:05:16.945 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:05:16.945 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:05:16.945 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:05:16.946 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:05:16.946 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:05:16.946 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:05:16.949 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:05:16.950 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:05:16.950 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:05:16.950 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:05:16.950 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:05:16.950 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:05:16.951 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:05:16.951 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:05:16.954 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:05:16.954 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:05:16.955 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:05:16.955 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:05:16.955 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:05:16.955 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:05:16.956 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:05:16.956 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:05:16.960 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:05:16.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:05:16.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:05:16.961 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:05:16.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:05:16.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:05:16.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:05:16.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:05:16.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:05:16.961 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:05:16.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:16.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:16.961 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:05:16.962 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:05:16.962 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:05:16.962 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:05:16.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:16.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:16.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:16.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:05:16.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:16.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:16.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:16.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:16.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:16.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:16.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:16.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:16.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:16.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:16.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:16.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:16.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:16.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:16.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:16.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:16.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:16.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:16.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:16.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:16.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:16.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:16.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:16.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:16.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:16.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:16.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:16.967 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:05:17.450 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:05:17.488 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:05:17.490 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:05:17.493 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:05:17.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:17.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:17.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:17.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:17.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:17.512 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:17.512 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:17.512 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:17.512 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:17.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:17.552 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:17.553 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:17.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:17.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:17.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:17.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:17.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:17.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:17.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:17.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:17.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:17.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:17.630 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:17.630 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:17.630 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:17.630 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:17.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:17.694 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:17.695 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:17.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:17.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:17.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:17.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:17.772 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:17.773 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:17.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:17.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:17.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:17.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:17.789 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:17.789 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:17.789 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:17.789 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:17.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:17.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:17.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:17.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:17.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:17.924 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:05:17.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:17.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:17.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:17.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:17.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:17.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:17.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:17.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:17.941 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:17.941 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:17.941 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:17.941 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:17.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:05:17.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:05:17.966 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:05:17.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:05:17.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:17.975 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:17.975 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:17.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:17.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:18.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:18.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:18.051 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:18.051 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:18.067 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:18.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:18.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:18.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:18.069 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:18.069 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:18.069 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:18.069 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:18.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:18.113 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:18.113 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:18.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:18.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:18.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:18.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:18.318 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:18.319 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:18.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:18.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:18.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:18.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:18.339 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:18.339 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:18.339 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:18.339 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:18.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:18.394 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:18.395 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:18.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:18.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:18.401 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:05:18.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:18.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:18.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:18.562 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:18.581 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:18.581 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:18.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:18.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:18.582 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:18.582 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:18.582 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:18.582 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:18.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:18.644 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:18.644 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:18.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:18.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:18.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:18.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:18.725 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:18.726 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:18.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:18.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:18.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:18.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:18.745 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:18.745 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:18.745 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:18.745 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:18.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:18.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:18.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:18.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:18.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:18.878 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:05:18.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:18.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:18.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:05:18.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:05:18.967 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:18.967 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:18.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:05:18.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:05:18.974 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:05:18.974 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:05:18.974 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:05:18.974 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:05:18.975 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:05:18.975 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:05:18.975 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:05:18.975 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:05:18.975 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:05:18.975 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:05:18.975 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:05:18.975 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=431 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:05:18.975 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=431 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:05:18.976 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=431 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:05:18.976 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=431 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:05:18.976 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=431 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:05:18.976 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=431 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:05:18.976 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=431 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:05:18.976 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=431 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:05:23.978 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:05:23.979 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:05:23.981 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:05:23.982 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:05:23.982 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:05:23.983 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:05:23.988 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:05:23.988 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:05:23.988 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:05:23.989 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:05:23.989 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:05:23.990 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:05:23.991 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:05:23.991 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:05:23.991 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:05:23.991 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:05:23.991 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:05:23.991 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:05:23.991 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:05:23.993 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:05:23.993 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:05:23.993 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:05:23.993 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:05:23.993 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:05:23.993 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:05:23.994 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:05:23.994 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:05:23.995 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:05:23.996 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:05:23.996 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:05:23.996 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:05:23.996 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:05:23.996 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:05:23.996 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:05:23.996 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:05:23.999 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:05:23.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:05:23.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:05:23.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:05:23.999 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:05:23.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:05:23.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:05:24.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:05:24.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:24.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:05:24.000 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:05:24.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:24.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:24.000 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:05:24.000 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:05:24.000 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:05:24.000 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:05:24.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:24.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:24.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:24.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:05:24.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:24.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:24.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:24.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:24.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:24.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:24.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:24.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:24.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:24.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:24.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:24.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:24.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:24.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:24.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:24.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:24.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:24.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:24.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:24.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:24.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:24.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:24.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:24.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:24.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:24.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:24.005 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:05:24.485 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:05:24.519 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:05:24.520 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:05:24.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:24.521 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:05:24.534 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:24.534 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:24.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:24.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:24.538 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:24.538 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:24.538 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:24.539 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:24.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:24.587 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:24.587 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:24.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:24.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:24.962 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:05:25.003 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:05:25.003 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:05:25.003 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:05:25.003 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:05:25.441 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:05:25.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:25.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:25.462 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:25.462 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:25.479 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:25.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:25.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:25.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:25.480 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:25.480 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:25.481 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:25.481 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:25.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:25.485 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:25.485 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:25.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:25.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:25.918 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:05:25.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:25.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:25.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:25.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:25.967 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:25.967 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:25.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:25.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:25.968 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:25.968 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:25.968 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:25.968 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:26.004 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:05:26.005 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:05:26.005 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:05:26.005 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:05:26.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:26.019 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:26.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:26.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:26.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:26.396 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:05:26.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:26.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:26.678 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:26.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:26.688 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:26.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:26.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:26.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:26.689 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:26.689 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:26.690 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:26.690 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:26.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:26.731 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:26.731 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:26.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:26.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:26.873 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:05:27.006 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:05:27.006 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:05:27.006 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:05:27.006 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:05:27.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:27.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:27.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:27.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:27.179 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:27.179 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:27.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:27.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:27.181 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:27.181 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:27.181 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:27.181 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:27.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:27.206 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:27.207 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:27.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:27.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:27.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:27.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:27.316 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:27.316 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:27.330 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:27.331 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:27.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:27.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:27.332 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:27.332 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:27.332 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:27.332 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:27.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:27.343 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:27.343 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:27.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:27.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:27.351 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:05:27.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:27.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:27.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:27.792 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:27.811 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:27.811 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:27.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:27.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:27.812 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:27.812 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:27.812 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:27.812 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:27.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:27.819 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:27.820 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:27.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:27.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:27.828 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:05:28.007 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:05:28.007 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:05:28.007 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:05:28.008 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:05:28.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:28.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:28.225 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:28.225 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:28.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:28.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:28.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:28.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:28.244 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:28.244 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:28.244 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:28.244 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:28.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:28.301 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:28.301 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:28.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:28.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:28.305 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:05:28.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:28.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:28.701 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:28.702 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:28.710 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:05:28.711 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:05:28.711 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:05:28.711 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:05:28.713 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:05:28.713 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:05:28.713 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:05:28.713 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:05:28.713 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:05:28.713 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:05:28.713 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:05:33.716 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:05:33.716 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:05:33.718 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:05:33.718 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:05:33.719 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:05:33.720 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:05:33.729 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:05:33.731 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:05:33.731 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:05:33.731 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:05:33.731 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:05:33.738 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:05:33.738 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:05:33.738 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:05:33.739 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:05:33.739 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:05:33.740 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:05:33.740 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:05:33.740 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:05:33.746 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:05:33.746 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:05:33.746 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:05:33.746 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:05:33.747 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:05:33.747 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:05:33.747 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:05:33.747 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:05:33.752 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:05:33.752 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:05:33.753 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:05:33.753 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:05:33.753 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:05:33.753 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:05:33.753 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:05:33.753 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:05:33.759 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:05:33.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:05:33.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:05:33.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:05:33.759 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:05:33.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:05:33.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:05:33.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:05:33.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:33.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:05:33.760 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:05:33.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:33.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:33.760 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:05:33.760 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:05:33.760 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:05:33.761 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:05:33.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:33.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:33.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:33.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:05:33.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:33.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:33.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:33.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:33.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:33.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:33.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:33.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:33.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:33.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:33.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:33.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:33.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:33.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:33.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:33.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:33.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:33.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:33.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:33.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:33.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:33.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:33.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:33.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:33.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:33.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:33.765 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:05:34.246 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:05:34.288 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:05:34.290 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:05:34.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:34.292 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:05:34.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:34.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:34.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:34.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:34.310 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:34.310 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:34.311 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:34.311 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:34.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:34.348 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:34.348 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:34.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:34.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:34.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:34.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:34.410 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:34.410 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:34.426 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:34.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:34.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:34.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:34.428 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:34.428 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:34.428 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:34.428 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:34.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:34.491 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:34.491 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:34.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:34.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:34.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:34.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:34.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:34.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:34.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:34.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:34.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:34.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:34.566 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:34.566 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:34.566 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:34.566 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:34.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:34.572 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:34.572 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:34.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:34.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:34.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:34.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:34.669 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:34.669 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:34.686 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:34.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:34.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:34.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:34.687 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:34.687 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:34.687 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:34.687 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:34.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:34.721 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:05:34.725 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:34.726 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:34.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:34.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:34.764 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:05:34.765 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:05:34.765 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:05:34.766 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:05:34.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:34.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:34.789 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:34.789 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:34.802 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:34.802 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:34.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:34.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:34.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:34.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:34.804 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:34.804 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:34.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:34.808 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:34.808 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:34.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:34.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:34.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:34.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:34.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:34.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:34.956 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:34.956 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:34.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:34.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:34.957 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:34.957 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:34.957 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:34.957 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:35.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:35.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:35.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:35.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:35.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:35.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:35.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:35.183 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:35.183 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:35.198 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:05:35.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:35.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:35.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:35.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:35.200 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:35.200 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:35.200 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:35.200 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:35.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:35.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:35.252 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:35.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:35.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:35.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:35.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:35.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:35.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:35.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:35.373 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:35.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:35.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:35.375 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:35.375 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:35.375 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:35.375 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:35.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:35.380 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:35.380 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:35.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:35.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:35.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:35.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:35.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:35.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:35.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:05:35.597 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:05:35.597 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:05:35.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:05:35.598 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:05:35.598 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:05:35.598 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:05:35.598 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:05:35.598 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:05:35.598 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:05:35.598 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:05:40.603 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:05:40.603 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:05:40.604 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:05:40.605 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:05:40.605 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:05:40.606 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:05:40.614 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:05:40.615 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:05:40.615 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:05:40.615 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:05:40.615 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:05:40.618 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:05:40.618 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:05:40.618 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:05:40.618 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:05:40.619 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:05:40.619 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:05:40.619 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:05:40.619 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:05:40.622 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:05:40.622 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:05:40.623 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:05:40.623 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:05:40.623 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:05:40.623 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:05:40.623 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:05:40.623 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:05:40.626 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:05:40.626 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:05:40.627 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:05:40.627 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:05:40.627 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:05:40.627 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:05:40.627 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:05:40.627 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:05:40.632 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:05:40.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:05:40.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:05:40.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:05:40.632 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:05:40.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:05:40.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:05:40.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:05:40.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:40.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:05:40.633 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:05:40.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:40.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:40.633 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:05:40.633 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:05:40.633 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:05:40.633 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:05:40.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:40.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:40.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:40.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:05:40.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:40.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:40.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:40.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:40.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:40.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:40.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:40.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:40.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:40.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:40.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:40.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:40.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:40.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:40.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:40.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:40.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:40.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:40.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:40.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:40.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:40.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:40.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:40.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:40.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:40.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:40.638 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:05:41.120 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:05:41.160 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:05:41.161 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:05:41.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:41.163 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:05:41.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:41.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:41.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:41.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:41.188 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:41.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:41.189 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:41.189 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:41.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:41.223 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:41.224 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:41.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:41.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:41.598 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:05:41.637 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:05:41.637 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:05:41.638 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:05:41.638 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:05:42.076 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:05:42.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:42.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:42.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:42.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:42.118 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:42.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:42.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:42.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:42.120 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:42.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:42.120 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:42.120 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:42.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:42.177 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:42.177 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:42.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:42.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:42.554 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:05:42.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:05:42.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:05:42.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:05:42.639 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:05:43.032 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:05:43.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:43.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:43.076 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:43.076 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:43.094 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:43.094 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:43.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:43.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:43.095 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:43.095 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:43.095 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:43.095 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:43.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:43.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:43.133 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:43.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:43.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:43.510 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:05:43.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:05:43.640 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:05:43.640 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:05:43.640 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:05:43.988 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:05:44.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:44.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:44.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:44.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:44.327 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:44.327 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:44.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:44.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:44.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:44.328 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:44.329 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:44.329 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:44.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:44.332 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:44.332 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:44.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:44.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:44.484 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:05:44.640 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:05:44.641 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:05:44.641 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:05:44.641 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:05:44.963 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:05:45.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:45.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:45.285 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:45.285 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:45.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:45.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:45.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:45.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:45.299 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:45.299 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:45.299 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:45.299 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:45.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:45.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:45.345 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:45.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:45.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:45.440 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:05:45.641 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:05:45.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:05:45.642 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:05:45.642 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:05:45.918 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:05:45.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:45.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:45.961 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:45.961 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:45.975 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:45.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:45.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:45.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:45.976 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:45.976 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:45.976 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:45.976 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:46.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:46.020 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:46.020 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:46.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:46.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:46.395 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:05:46.873 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:05:46.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:46.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:46.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:46.918 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:46.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:46.931 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:46.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:46.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:46.933 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:46.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:46.934 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:46.934 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:46.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:46.969 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:46.970 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:46.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:46.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:47.351 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:05:47.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:47.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:47.821 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:47.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:47.829 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:05:47.838 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:47.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:47.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:47.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:47.840 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:47.840 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:47.840 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:47.840 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:47.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:47.882 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:47.883 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:47.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:47.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:48.306 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:05:48.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:48.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:48.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:48.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:48.784 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:05:48.785 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:05:48.785 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:05:48.785 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:05:48.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:05:48.791 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:05:48.791 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:05:48.791 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:05:48.792 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:05:48.792 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:05:48.792 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:05:48.793 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:05:53.791 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:05:53.791 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:05:53.792 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:05:53.793 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:05:53.793 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:05:53.794 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:05:53.803 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:05:53.804 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:05:53.804 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:05:53.805 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:05:53.805 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:05:53.809 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:05:53.809 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:05:53.809 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:05:53.809 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:05:53.810 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:05:53.810 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:05:53.810 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:05:53.810 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:05:53.814 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:05:53.814 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:05:53.815 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:05:53.815 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:05:53.815 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:05:53.815 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:05:53.815 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:05:53.815 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:05:53.819 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:05:53.819 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:05:53.819 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:05:53.819 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:05:53.819 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:05:53.819 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:05:53.819 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:05:53.819 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:05:53.825 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:05:53.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:05:53.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:05:53.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:05:53.825 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:05:53.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:05:53.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:05:53.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:05:53.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:53.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:05:53.826 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:05:53.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:53.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:53.826 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:05:53.826 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:05:53.826 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:05:53.826 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:05:53.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:53.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:53.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:53.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:05:53.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:53.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:53.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:53.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:53.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:53.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:53.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:53.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:53.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:53.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:53.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:53.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:53.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:53.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:53.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:53.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:53.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:53.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:05:53.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:53.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:53.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:53.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:05:53.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:53.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:05:53.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:53.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:05:53.831 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:05:54.315 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:05:54.350 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:05:54.352 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:05:54.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:54.354 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:05:54.378 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:54.378 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:54.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:54.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:54.380 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:54.381 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:54.381 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:54.381 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:54.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:54.418 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:54.419 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:54.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:54.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:54.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:54.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:54.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:54.519 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:54.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:54.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:54.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:54.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:54.536 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:54.536 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:54.536 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:54.536 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:54.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:54.551 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:54.551 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:54.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:54.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:54.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:54.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:54.701 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:54.702 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:54.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:54.719 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:54.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:54.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:54.721 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:54.721 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:54.721 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:54.721 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:54.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:54.737 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:54.737 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:54.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:54.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:54.792 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:05:54.830 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:05:54.830 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:05:54.831 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:05:54.831 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:05:55.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:55.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:55.025 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:55.025 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:55.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:55.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:55.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:05:55.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:55.040 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:55.040 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:55.040 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:05:55.040 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:05:55.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:55.082 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:05:55.082 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:05:55.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:55.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:55.270 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:05:55.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:05:55.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:05:55.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:05:55.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:05:55.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:05:55.438 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:05:55.439 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:05:55.439 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:05:55.444 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:05:55.444 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:05:55.444 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:05:55.444 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:05:55.444 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:05:55.444 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:05:55.444 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:05:55.445 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=345 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:05:55.445 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=345 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:05:55.445 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=345 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:05:55.445 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=345 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:05:55.445 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=345 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:05:55.445 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=345 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:06:00.444 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:06:00.444 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:06:00.445 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:06:00.445 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:06:00.446 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:06:00.446 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:06:00.457 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:06:00.459 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:06:00.459 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:06:00.459 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:06:00.459 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:06:00.465 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:06:00.465 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:06:00.466 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:06:00.466 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:06:00.466 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:06:00.466 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:06:00.467 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:06:00.467 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:06:00.470 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:06:00.470 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:06:00.471 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:06:00.471 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:06:00.471 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:06:00.471 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:06:00.471 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:06:00.471 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:06:00.475 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:06:00.475 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:06:00.475 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:06:00.475 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:06:00.476 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:06:00.476 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:06:00.476 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:06:00.476 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:06:00.480 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:06:00.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:06:00.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:06:00.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:06:00.481 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:06:00.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:06:00.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:06:00.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:06:00.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:00.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:06:00.481 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:06:00.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:00.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:00.482 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:06:00.482 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:06:00.482 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:06:00.482 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:06:00.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:00.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:00.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:00.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:06:00.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:00.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:00.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:00.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:00.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:00.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:00.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:00.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:00.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:00.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:00.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:00.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:00.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:00.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:00.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:00.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:00.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:00.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:00.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:00.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:00.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:00.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:00.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:00.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:00.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:00.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:00.487 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:06:00.968 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:06:01.004 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:06:01.006 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:06:01.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:01.009 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:06:01.034 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:01.034 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:01.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:06:01.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:01.038 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:01.038 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:01.038 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:06:01.039 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:06:01.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:01.073 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:01.074 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:01.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:01.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:01.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:01.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:01.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:01.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:01.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:01.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:01.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:06:01.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:01.211 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:01.212 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:01.212 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:06:01.212 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:06:01.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:01.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:01.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:01.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:01.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:01.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:01.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:01.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:01.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:01.446 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:06:01.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:01.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:01.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:06:01.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:01.450 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:01.450 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:01.450 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:06:01.450 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:06:01.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:06:01.486 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:06:01.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:06:01.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:06:01.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:01.500 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:01.501 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:01.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:01.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:01.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:01.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:01.678 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:01.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:01.696 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:01.696 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:01.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:06:01.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:01.698 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:01.698 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:01.698 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:06:01.698 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:06:01.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:01.737 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:01.737 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:01.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:01.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:01.923 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:06:02.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:02.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:02.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:02.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:02.091 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:06:02.091 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:06:02.092 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:06:02.092 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:06:02.097 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:06:02.097 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:06:02.097 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:06:02.097 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:06:02.097 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:06:02.097 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:06:02.097 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:06:02.098 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=345 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:06:02.098 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=345 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:06:02.098 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=345 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:06:02.098 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=345 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:06:02.098 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=345 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:06:02.098 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=345 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:06:07.097 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:06:07.098 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:06:07.098 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:06:07.099 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:06:07.099 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:06:07.100 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:06:07.110 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:06:07.111 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:06:07.111 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:06:07.112 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:06:07.112 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:06:07.116 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:06:07.116 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:06:07.117 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:06:07.117 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:06:07.117 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:06:07.117 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:06:07.117 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:06:07.117 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:06:07.121 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:06:07.122 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:06:07.122 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:06:07.122 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:06:07.122 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:06:07.122 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:06:07.122 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:06:07.122 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:06:07.126 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:06:07.126 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:06:07.126 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:06:07.126 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:06:07.127 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:06:07.127 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:06:07.127 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:06:07.127 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:06:07.133 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:06:07.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:06:07.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:06:07.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:06:07.133 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:06:07.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:06:07.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:06:07.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:06:07.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:06:07.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:07.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:07.134 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:06:07.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:07.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:07.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:07.134 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:06:07.134 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:06:07.134 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:06:07.134 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:06:07.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:07.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:07.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:07.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:06:07.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:07.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:07.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:07.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:07.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:07.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:07.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:07.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:07.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:07.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:07.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:07.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:07.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:07.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:07.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:07.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:07.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:07.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:07.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:07.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:07.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:07.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:07.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:07.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:07.139 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:06:07.623 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:06:07.656 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:06:07.658 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:06:07.660 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:06:07.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:07.679 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:07.679 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:07.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:06:07.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:07.683 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:07.683 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:07.684 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:06:07.684 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:06:07.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:07.726 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:07.726 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:07.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:07.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:07.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:07.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:07.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:07.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:07.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:07.846 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:07.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:06:07.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:07.847 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:07.847 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:07.848 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:06:07.848 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:06:07.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:07.857 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:07.857 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:07.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:07.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:08.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:08.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:08.008 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:08.008 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:08.025 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:08.025 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:08.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:06:08.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:08.026 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:08.026 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:08.027 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:06:08.027 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:06:08.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:08.046 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:08.047 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:08.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:08.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:08.099 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:06:08.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:06:08.139 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:06:08.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:06:08.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:06:08.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:08.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:08.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:08.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:08.347 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:08.347 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:08.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:06:08.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:08.348 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:08.348 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:08.349 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:06:08.349 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:06:08.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:08.389 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:08.390 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:08.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:08.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:08.575 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:06:08.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:08.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:08.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:08.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:08.743 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:06:08.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:06:08.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:06:08.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:06:08.745 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:06:08.745 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:06:08.745 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:06:08.745 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:06:08.745 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:06:08.745 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:06:08.745 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:06:08.745 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=344 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:06:08.745 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=344 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:06:08.745 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=344 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:06:08.745 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=344 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:06:13.749 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:06:13.750 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:06:13.750 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:06:13.751 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:06:13.752 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:06:13.753 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:06:13.761 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:06:13.762 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:06:13.762 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:06:13.762 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:06:13.762 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:06:13.765 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:06:13.765 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:06:13.766 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:06:13.766 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:06:13.766 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:06:13.766 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:06:13.767 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:06:13.767 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:06:13.769 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:06:13.769 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:06:13.769 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:06:13.769 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:06:13.769 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:06:13.769 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:06:13.769 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:06:13.769 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:06:13.772 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:06:13.772 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:06:13.772 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:06:13.772 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:06:13.772 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:06:13.772 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:06:13.773 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:06:13.773 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:06:13.776 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:06:13.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:06:13.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:06:13.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:06:13.777 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:06:13.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:06:13.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:06:13.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:06:13.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:13.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:06:13.777 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:06:13.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:13.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:13.777 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:06:13.777 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:06:13.777 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:06:13.777 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:06:13.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:13.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:13.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:13.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:06:13.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:13.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:13.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:13.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:13.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:13.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:13.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:13.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:13.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:13.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:13.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:13.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:13.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:13.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:13.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:13.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:13.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:13.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:13.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:13.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:13.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:13.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:13.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:13.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:13.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:13.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:13.782 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:06:14.265 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:06:14.298 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:06:14.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:14.301 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:06:14.304 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:06:14.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:14.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:14.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:06:14.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:14.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:14.328 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:14.328 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:06:14.328 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:06:14.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:14.369 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:14.369 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:14.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:14.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:14.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:14.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:14.489 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:14.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:14.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:14.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:14.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:06:14.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:14.508 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:14.508 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:14.508 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:06:14.508 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:06:14.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:14.558 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:14.558 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:14.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:14.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:14.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:14.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:14.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:14.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:14.741 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:06:14.744 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:14.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:14.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:06:14.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:14.746 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:14.746 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:14.746 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:06:14.746 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:06:14.781 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:06:14.781 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:06:14.781 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:06:14.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:06:14.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:14.787 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:14.787 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:14.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:14.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:14.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:14.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:14.968 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:14.968 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:14.985 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:14.985 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:14.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:06:14.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:14.987 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:14.987 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:14.987 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:06:14.987 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:06:15.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:15.027 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:15.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:15.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:15.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:15.218 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:06:15.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:15.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:15.376 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:15.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:15.386 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:06:15.386 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:06:15.386 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:06:15.386 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:06:15.391 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:06:15.392 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:06:15.392 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:06:15.392 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:06:15.392 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:06:15.392 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:06:15.392 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:06:20.412 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:06:20.412 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:06:20.413 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:06:20.414 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:06:20.414 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:06:20.415 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:06:20.426 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:06:20.428 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:06:20.428 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:06:20.428 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:06:20.428 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:06:20.433 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:06:20.434 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:06:20.434 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:06:20.434 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:06:20.434 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:06:20.435 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:06:20.435 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:06:20.435 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:06:20.438 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:06:20.438 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:06:20.438 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:06:20.438 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:06:20.439 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:06:20.439 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:06:20.439 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:06:20.439 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:06:20.442 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:06:20.442 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:06:20.442 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:06:20.442 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:06:20.443 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:06:20.443 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:06:20.443 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:06:20.443 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:06:20.447 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:06:20.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:06:20.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:06:20.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:06:20.448 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:06:20.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:06:20.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:06:20.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:06:20.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:06:20.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:20.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:20.448 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:06:20.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:20.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:20.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:20.448 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:06:20.448 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:06:20.448 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:06:20.449 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:06:20.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:20.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:20.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:20.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:06:20.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:20.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:20.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:20.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:20.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:20.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:20.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:20.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:20.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:20.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:20.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:20.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:20.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:20.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:20.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:20.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:20.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:20.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:20.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:20.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:20.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:20.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:20.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:20.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:20.453 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:06:20.937 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:06:20.971 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:06:20.973 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:06:20.975 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:06:20.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:20.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:20.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:20.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:06:20.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:20.997 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:20.998 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:20.998 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:06:20.998 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:06:21.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:21.040 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:21.041 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:21.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:21.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:21.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:21.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:21.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:21.357 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:21.374 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:21.374 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:21.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:06:21.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:21.376 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:21.376 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:21.376 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:06:21.376 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:06:21.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:21.415 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:06:21.418 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:21.418 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:21.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:21.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:21.453 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:06:21.453 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:06:21.453 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:06:21.454 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:06:21.894 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:06:21.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:21.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:21.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:21.912 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:21.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:21.931 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:21.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:06:21.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:21.933 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:21.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:21.933 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:06:21.933 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:06:21.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:21.938 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:21.938 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:21.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:21.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:22.372 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:06:22.454 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:06:22.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:06:22.455 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:06:22.455 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:06:22.850 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:06:23.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:23.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:23.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:23.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:23.026 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:23.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:23.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:06:23.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:23.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:23.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:23.029 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:06:23.029 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:06:23.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:23.033 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:23.033 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:23.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:23.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:23.327 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:06:23.456 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:06:23.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:06:23.456 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:06:23.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:06:23.805 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:06:24.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:24.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:24.129 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:24.129 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:24.136 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:06:24.136 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:06:24.136 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:06:24.136 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:06:24.137 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:06:24.137 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:06:24.137 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:06:24.137 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:06:24.137 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:06:24.137 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:06:24.137 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:06:29.142 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:06:29.142 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:06:29.144 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:06:29.145 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:06:29.145 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:06:29.146 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:06:29.155 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:06:29.156 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:06:29.156 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:06:29.157 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:06:29.157 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:06:29.160 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:06:29.161 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:06:29.161 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:06:29.161 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:06:29.161 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:06:29.161 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:06:29.162 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:06:29.162 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:06:29.164 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:06:29.164 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:06:29.164 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:06:29.164 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:06:29.164 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:06:29.164 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:06:29.165 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:06:29.165 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:06:29.167 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:06:29.167 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:06:29.167 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:06:29.167 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:06:29.167 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:06:29.167 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:06:29.167 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:06:29.168 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:06:29.171 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:06:29.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:06:29.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:06:29.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:06:29.171 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:06:29.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:06:29.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:06:29.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:06:29.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:29.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:06:29.171 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:06:29.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:29.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:29.171 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:06:29.171 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:06:29.171 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:06:29.171 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:06:29.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:29.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:29.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:29.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:06:29.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:29.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:29.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:29.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:29.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:29.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:29.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:29.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:29.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:29.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:29.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:29.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:29.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:29.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:29.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:29.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:29.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:29.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:29.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:29.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:29.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:29.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:29.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:29.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:29.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:29.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:29.176 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:06:29.660 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:06:29.688 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:06:29.689 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:06:29.690 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:06:29.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:29.706 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:29.706 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:29.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:06:29.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:29.709 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:29.709 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:29.709 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:06:29.709 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:06:29.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:29.765 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:29.765 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:29.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:29.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:30.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:30.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:30.080 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:30.080 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:30.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:30.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:30.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:06:30.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:30.100 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:30.100 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:30.100 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:06:30.100 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:06:30.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:30.137 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:06:30.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:30.140 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:30.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:30.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:30.174 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:06:30.175 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:06:30.175 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:06:30.175 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:06:30.615 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:06:30.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:30.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:30.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:30.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:30.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:30.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:30.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:06:30.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:30.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:30.655 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:30.655 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:06:30.655 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:06:30.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:30.659 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:30.659 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:30.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:30.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:31.093 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:06:31.176 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:06:31.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:06:31.177 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:06:31.177 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:06:31.571 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:06:31.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:31.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:31.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:31.732 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:31.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:31.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:31.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:06:31.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:31.750 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:31.750 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:31.750 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:06:31.750 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:06:31.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:31.753 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:31.753 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:31.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:31.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:32.048 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:06:32.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:06:32.178 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:06:32.178 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:06:32.178 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:06:32.525 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:06:32.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:32.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:32.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:32.849 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:32.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:06:32.854 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:06:32.854 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:06:32.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:06:32.855 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:06:32.855 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:06:32.855 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:06:32.855 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:06:32.855 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:06:32.855 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:06:32.855 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:06:37.860 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:06:37.860 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:06:37.862 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:06:37.863 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:06:37.864 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:06:37.864 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:06:37.874 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:06:37.875 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:06:37.876 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:06:37.876 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:06:37.876 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:06:37.882 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:06:37.882 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:06:37.883 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:06:37.883 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:06:37.883 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:06:37.884 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:06:37.884 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:06:37.884 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:06:37.888 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:06:37.888 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:06:37.889 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:06:37.889 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:06:37.889 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:06:37.890 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:06:37.890 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:06:37.890 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:06:37.893 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:06:37.893 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:06:37.894 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:06:37.894 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:06:37.894 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:06:37.894 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:06:37.894 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:06:37.894 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:06:37.900 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:06:37.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:06:37.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:06:37.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:06:37.900 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:06:37.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:06:37.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:06:37.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:06:37.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:06:37.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:37.901 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:06:37.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:37.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:37.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:37.901 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:06:37.901 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:06:37.901 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:06:37.901 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:06:37.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:37.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:37.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:37.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:06:37.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:37.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:37.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:37.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:37.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:37.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:37.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:37.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:37.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:37.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:37.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:37.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:37.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:37.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:37.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:37.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:37.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:37.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:37.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:37.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:37.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:37.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:37.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:37.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:37.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:37.906 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:06:38.390 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:06:38.421 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:06:38.421 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:06:38.422 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:06:38.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:38.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:38.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:38.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:06:38.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:38.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:38.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:38.439 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:06:38.439 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:06:38.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:38.481 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:38.481 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:38.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:38.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:38.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:38.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:38.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:38.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:38.808 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:38.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:38.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:06:38.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:38.810 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:38.810 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:38.810 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:06:38.810 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:06:38.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:38.866 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:06:38.869 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:38.869 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:38.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:38.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:38.905 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:06:38.905 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:06:38.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:06:38.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:06:39.344 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:06:39.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:39.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:39.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:39.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:39.382 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:39.382 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:39.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:06:39.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:39.385 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:39.385 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:39.385 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:06:39.385 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:06:39.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:39.389 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:39.389 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:39.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:39.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:39.822 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:06:39.905 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:06:39.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:06:39.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:06:39.908 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:06:40.300 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:06:40.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:40.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:40.462 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:40.462 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:40.477 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:40.477 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:40.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:06:40.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:40.480 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:40.480 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:40.480 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:06:40.480 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:06:40.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:40.543 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:40.544 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:40.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:40.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:40.777 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:06:40.907 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:06:40.907 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:06:40.907 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:06:40.910 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:06:41.255 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:06:41.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:41.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:41.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:41.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:41.589 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:06:41.589 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:06:41.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:06:41.589 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:06:41.594 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:06:41.595 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:06:41.595 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:06:41.595 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:06:41.595 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:06:41.595 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:06:41.595 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:06:46.616 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:06:46.616 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:06:46.616 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:06:46.617 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:06:46.618 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:06:46.619 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:06:46.627 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:06:46.628 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:06:46.629 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:06:46.629 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:06:46.629 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:06:46.635 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:06:46.635 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:06:46.636 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:06:46.636 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:06:46.636 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:06:46.636 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:06:46.637 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:06:46.637 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:06:46.640 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:06:46.640 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:06:46.640 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:06:46.640 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:06:46.641 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:06:46.641 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:06:46.641 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:06:46.641 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:06:46.643 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:06:46.643 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:06:46.643 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:06:46.643 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:06:46.643 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:06:46.643 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:06:46.643 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:06:46.643 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:06:46.647 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:06:46.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:06:46.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:06:46.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:06:46.648 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:06:46.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:06:46.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:06:46.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:06:46.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:46.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:06:46.648 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:06:46.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:46.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:46.648 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:06:46.648 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:06:46.648 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:06:46.648 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:06:46.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:46.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:46.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:46.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:06:46.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:46.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:46.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:46.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:46.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:46.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:46.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:46.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:46.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:46.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:46.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:46.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:46.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:46.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:46.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:46.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:46.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:46.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:46.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:46.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:46.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:46.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:46.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:46.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:46.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:46.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:46.653 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:06:47.136 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:06:47.169 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:06:47.171 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:06:47.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:47.173 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:06:47.192 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:47.192 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:47.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:06:47.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:47.201 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:47.201 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:47.202 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:06:47.202 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:06:47.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:47.240 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:47.240 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:47.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:47.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:47.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:47.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:47.556 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:47.556 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:47.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:47.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:47.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:06:47.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:47.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:47.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:47.577 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:06:47.577 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:06:47.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:47.614 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:06:47.616 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:47.616 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:47.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:47.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:47.652 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:06:47.652 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:06:47.653 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:06:47.653 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:06:48.093 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:06:48.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:48.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:48.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:48.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:48.130 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:48.130 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:48.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:06:48.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:48.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:48.133 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:48.133 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:06:48.133 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:06:48.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:48.137 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:48.137 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:48.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:48.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:48.570 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:06:48.653 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:06:48.654 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:06:48.654 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:06:48.654 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:06:49.048 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:06:49.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:49.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:49.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:49.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:49.228 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:49.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:49.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:06:49.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:49.230 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:49.230 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:49.231 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:06:49.231 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:06:49.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:49.291 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:06:49.292 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:06:49.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:49.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:49.526 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:06:49.655 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:06:49.656 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:06:49.656 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:06:49.656 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:06:50.004 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:06:50.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:50.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:06:50.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:50.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:50.337 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:06:50.337 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:06:50.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:06:50.338 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:06:50.343 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:06:50.343 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:06:50.343 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:06:50.344 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:06:50.344 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:06:50.344 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:06:50.344 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:06:50.344 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=789 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:06:50.345 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=789 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:06:50.345 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=789 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:06:50.345 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=789 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:06:50.345 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=789 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:06:50.345 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=789 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:06:55.344 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:06:55.344 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:06:55.345 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:06:55.346 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:06:55.346 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:06:55.347 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:06:55.351 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:06:55.352 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:06:55.352 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:06:55.352 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:06:55.352 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:06:55.355 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:06:55.355 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:06:55.355 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:06:55.355 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:06:55.356 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:06:55.356 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:06:55.356 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:06:55.356 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:06:55.358 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:06:55.358 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:06:55.358 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:06:55.358 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:06:55.358 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:06:55.358 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:06:55.358 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:06:55.358 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:06:55.360 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:06:55.360 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:06:55.360 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:06:55.360 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:06:55.360 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:06:55.360 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:06:55.360 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:06:55.360 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:06:55.364 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:06:55.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:06:55.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:06:55.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:06:55.364 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:06:55.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:06:55.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:06:55.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:06:55.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:06:55.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:55.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:55.364 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:06:55.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:55.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:55.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:55.364 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:06:55.364 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:06:55.364 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:06:55.365 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:06:55.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:55.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:55.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:55.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:06:55.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:55.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:55.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:55.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:55.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:55.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:55.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:55.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:55.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:55.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:55.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:55.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:55.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:55.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:55.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:55.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:55.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:55.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:06:55.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:55.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:55.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:06:55.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:06:55.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:55.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:06:55.369 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:06:55.853 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:06:55.883 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:06:55.885 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:06:55.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:06:55.886 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:06:55.905 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:06:55.905 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:06:55.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:06:55.922 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:06:55.922 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:06:55.922 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:06:55.923 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:06:55.925 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:06:55.925 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:06:55.925 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:06:55.925 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:06:55.925 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:06:55.925 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:06:55.925 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:07:00.928 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:07:00.928 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:07:00.929 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:07:00.930 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:07:00.931 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:07:00.931 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:07:00.940 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:07:00.941 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:07:00.941 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:07:00.941 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:07:00.942 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:07:00.944 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:07:00.945 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:07:00.945 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:07:00.945 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:07:00.946 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:07:00.946 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:07:00.946 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:07:00.946 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:07:00.948 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:07:00.949 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:07:00.949 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:07:00.949 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:07:00.949 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:07:00.949 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:07:00.949 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:07:00.949 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:07:00.951 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:07:00.951 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:07:00.951 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:07:00.951 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:07:00.952 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:07:00.952 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:07:00.952 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:07:00.952 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:07:00.955 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:07:00.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:07:00.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:07:00.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:07:00.955 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:07:00.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:07:00.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:07:00.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:07:00.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:00.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:07:00.955 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:07:00.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:00.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:00.956 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:07:00.956 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:07:00.956 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:07:00.956 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:07:00.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:00.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:00.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:00.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:07:00.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:00.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:00.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:00.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:00.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:00.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:00.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:00.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:00.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:00.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:00.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:00.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:00.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:00.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:00.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:00.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:00.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:00.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:00.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:00.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:00.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:00.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:00.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:00.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:00.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:00.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:00.960 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:07:01.446 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:07:01.473 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:07:01.474 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:07:01.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:01.475 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:07:01.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:01.551 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:01.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:07:01.573 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:01.573 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:01.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:07:01.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:01.579 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:07:01.579 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:07:01.579 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:07:01.580 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:07:01.582 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:07:01.582 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:07:01.582 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:07:01.582 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:07:01.582 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:07:01.582 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:07:01.582 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:07:01.582 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=133 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:07:01.582 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=133 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:07:01.582 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=133 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:07:01.582 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=133 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:07:01.582 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=133 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:07:01.582 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=133 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:07:01.582 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=133 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:07:01.582 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=133 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:07:06.585 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:07:06.586 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:07:06.586 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:07:06.587 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:07:06.588 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:07:06.588 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:07:06.596 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:07:06.597 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:07:06.597 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:07:06.597 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:07:06.597 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:07:06.601 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:07:06.601 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:07:06.601 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:07:06.601 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:07:06.601 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:07:06.602 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:07:06.602 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:07:06.602 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:07:06.604 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:07:06.604 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:07:06.605 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:07:06.605 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:07:06.605 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:07:06.605 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:07:06.605 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:07:06.605 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:07:06.607 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:07:06.608 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:07:06.608 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:07:06.608 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:07:06.608 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:07:06.608 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:07:06.608 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:07:06.608 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:07:06.611 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:07:06.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:07:06.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:07:06.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:07:06.612 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:07:06.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:07:06.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:07:06.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:07:06.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:06.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:07:06.612 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:07:06.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:06.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:06.612 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:07:06.612 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:07:06.612 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:07:06.612 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:07:06.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:06.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:06.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:06.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:07:06.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:06.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:06.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:06.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:06.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:06.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:06.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:06.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:06.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:06.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:06.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:06.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:06.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:06.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:06.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:06.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:06.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:06.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:06.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:06.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:06.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:06.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:06.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:06.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:06.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:06.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:06.617 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:07:07.100 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:07:07.133 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:07:07.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:07.136 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:07:07.137 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:07:07.158 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:07.158 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:07.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:07:07.185 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:07:07.186 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:07:07.186 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:07:07.186 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:07:07.189 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:07:07.189 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:07:07.189 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:07:07.189 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:07:07.189 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:07:07.189 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:07:07.189 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:07:07.189 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:07:07.189 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:07:07.189 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:07:07.189 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:07:07.189 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:07:07.189 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:07:07.189 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=123 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:07:07.189 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:07:07.189 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:07:07.189 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:07:07.189 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:07:07.189 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:07:07.189 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:07:07.189 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:07:12.192 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:07:12.192 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:07:12.193 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:07:12.193 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:07:12.194 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:07:12.195 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:07:12.204 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:07:12.205 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:07:12.205 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:07:12.205 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:07:12.205 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:07:12.210 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:07:12.211 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:07:12.211 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:07:12.211 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:07:12.211 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:07:12.212 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:07:12.212 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:07:12.212 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:07:12.214 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:07:12.214 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:07:12.215 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:07:12.215 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:07:12.215 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:07:12.215 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:07:12.215 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:07:12.215 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:07:12.218 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:07:12.218 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:07:12.218 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:07:12.218 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:07:12.218 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:07:12.218 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:07:12.218 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:07:12.218 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:07:12.222 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:07:12.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:07:12.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:07:12.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:07:12.223 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:07:12.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:07:12.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:07:12.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:07:12.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:07:12.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:12.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:12.223 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:07:12.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:12.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:12.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:12.223 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:07:12.223 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:07:12.223 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:07:12.223 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:07:12.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:12.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:12.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:12.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:07:12.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:12.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:12.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:12.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:12.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:12.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:12.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:12.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:12.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:12.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:12.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:12.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:12.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:12.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:12.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:12.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:12.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:12.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:12.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:12.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:12.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:12.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:12.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:12.225 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:07:12.226 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:07:12.226 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:07:12.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:12.226 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:07:12.226 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:07:12.226 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:07:12.226 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:07:17.231 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:07:17.232 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:07:17.233 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:07:17.234 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:07:17.235 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:07:17.235 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:07:17.245 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:07:17.245 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:07:17.245 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:07:17.246 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:07:17.246 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:07:17.249 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:07:17.249 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:07:17.249 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:07:17.249 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:07:17.250 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:07:17.250 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:07:17.250 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:07:17.250 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:07:17.252 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:07:17.252 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:07:17.253 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:07:17.253 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:07:17.253 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:07:17.253 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:07:17.253 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:07:17.253 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:07:17.255 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:07:17.255 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:07:17.255 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:07:17.255 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:07:17.256 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:07:17.256 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:07:17.256 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:07:17.256 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:07:17.259 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:07:17.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:07:17.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:07:17.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:07:17.259 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:07:17.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:07:17.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:07:17.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:07:17.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:17.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:07:17.260 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:07:17.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:17.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:17.260 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:07:17.260 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:07:17.260 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:07:17.260 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:07:17.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:17.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:17.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:17.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:07:17.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:17.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:17.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:17.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:17.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:17.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:17.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:17.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:17.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:17.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:17.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:17.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:17.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:17.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:17.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:17.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:17.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:17.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:17.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:17.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:17.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:17.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:17.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:17.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:17.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:17.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:17.265 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:07:17.749 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:07:17.776 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:07:17.777 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:07:17.778 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:07:17.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:17.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:17.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:17.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:07:17.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:17.799 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:17.799 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:17.800 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:07:17.800 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:07:17.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:17.851 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:17.852 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:17.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:17.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:18.226 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:07:18.263 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:07:18.264 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:07:18.264 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:07:18.264 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:07:18.704 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:07:18.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:18.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:18.818 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:18.818 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:18.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:18.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:18.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:07:18.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:18.828 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:18.828 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:18.828 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:07:18.828 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:07:18.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:18.844 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:18.844 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:18.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:18.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:19.182 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:07:19.265 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:07:19.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:07:19.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:07:19.266 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:07:19.660 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:07:19.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:19.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:19.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:19.792 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:19.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:19.807 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:19.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:07:19.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:19.808 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:19.808 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:19.808 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:07:19.808 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:07:19.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:19.852 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:19.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:19.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:19.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:20.137 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:07:20.267 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:07:20.267 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:07:20.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:07:20.267 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:07:20.615 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:07:20.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:20.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:20.774 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:20.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:20.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:20.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:20.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:07:20.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:20.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:20.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:20.795 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:07:20.795 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:07:20.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:20.798 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:20.798 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:20.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:20.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:21.092 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:07:21.268 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:07:21.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:07:21.269 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:07:21.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:07:21.570 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:07:21.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:21.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:21.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:21.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:21.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:21.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:21.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:07:21.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:21.765 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:21.765 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:21.765 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:07:21.765 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:07:21.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:21.814 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:21.814 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:21.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:21.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:22.048 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:07:22.270 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:07:22.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:07:22.270 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:07:22.270 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:07:22.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:22.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:22.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:22.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:22.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:22.389 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:22.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:07:22.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:22.391 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:22.391 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:22.391 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:07:22.391 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:07:22.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:22.430 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:22.430 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:22.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:22.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:22.525 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:07:22.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:22.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:22.975 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:22.976 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:22.993 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:22.993 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:22.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:07:22.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:22.995 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:22.995 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:22.995 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:07:22.995 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:07:23.003 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:07:23.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:23.053 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:23.054 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:23.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:23.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:23.481 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:07:23.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:23.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:23.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:23.614 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:23.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:23.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:23.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:07:23.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:23.636 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:23.636 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:23.636 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:07:23.636 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:07:23.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:23.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:23.675 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:23.676 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:23.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:23.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:23.959 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:07:24.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:24.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:24.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:24.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:24.289 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:24.289 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:24.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:07:24.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:24.291 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:24.291 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:24.291 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:07:24.291 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:07:24.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:24.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:24.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:24.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:24.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:24.436 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:07:24.914 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:07:24.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:24.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:24.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:24.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:24.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:24.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:24.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:07:24.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:24.994 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:24.994 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:24.994 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:07:24.994 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:07:25.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:25.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:25.007 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:25.007 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:25.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:25.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:25.392 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:07:25.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:25.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:25.562 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:25.562 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:25.581 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:25.581 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:25.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:07:25.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:25.583 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:25.583 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:25.583 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:07:25.583 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:07:25.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:25.635 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:25.636 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:25.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:25.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:25.870 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:07:26.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:26.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:26.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:26.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:26.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:26.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:26.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:07:26.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:26.244 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:26.244 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:26.244 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:07:26.244 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:07:26.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:26.298 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:26.299 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:26.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:26.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:26.348 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:07:26.826 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:07:26.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:26.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:26.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:26.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:26.938 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:26.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:26.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:07:26.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:26.940 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:26.940 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:26.940 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:07:26.940 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:07:26.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:26.972 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:26.973 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:26.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:26.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:27.304 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:07:27.781 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:07:27.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:27.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:27.794 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:27.794 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:27.802 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:27.802 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:27.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:07:27.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:27.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:27.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:27.804 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:07:27.804 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:07:27.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:27.843 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:27.843 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:27.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:27.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:28.266 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:07:28.745 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:07:28.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:28.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:28.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:28.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:28.785 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:28.785 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:28.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:07:28.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:28.787 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:28.787 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:28.787 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:07:28.787 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:07:28.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:28.840 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:28.840 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:28.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:28.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:29.222 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:07:29.700 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:07:29.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:29.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:29.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:29.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:29.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:29.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:29.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:07:29.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:29.760 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:29.760 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:29.760 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:07:29.760 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:07:29.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:29.800 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:29.801 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:29.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:29.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:30.178 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:07:30.656 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:07:30.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:30.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:30.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:30.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:30.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:30.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:30.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:07:30.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:30.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:30.734 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:30.734 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:07:30.734 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:07:30.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:30.749 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:30.749 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:30.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:30.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:31.134 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:07:31.612 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:07:31.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:31.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:31.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:31.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:31.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:31.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:31.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:07:31.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:31.719 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:31.719 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:31.719 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:07:31.719 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:07:31.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:31.759 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:31.759 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:31.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:31.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:32.090 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:07:32.569 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:07:32.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:32.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:32.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:32.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:32.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:32.693 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:32.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:07:32.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:32.695 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:32.695 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:32.695 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:07:32.695 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:07:32.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:32.706 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:32.707 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:32.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:32.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:33.047 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 04:07:33.525 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 04:07:33.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:33.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:33.648 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:33.648 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:33.657 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:33.657 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:33.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:07:33.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:33.658 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:33.658 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:33.658 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:07:33.658 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:07:33.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:33.661 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:33.661 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:33.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:33.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:34.002 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 04:07:34.480 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 04:07:34.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:34.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:34.623 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:34.623 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:34.634 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:07:34.634 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:07:34.634 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:07:34.634 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:07:34.642 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:07:34.642 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:07:34.642 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:07:34.643 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:07:34.643 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:07:34.644 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:07:34.644 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:07:39.637 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:07:39.637 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:07:39.639 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:07:39.639 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:07:39.640 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:07:39.641 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:07:39.651 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:07:39.652 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:07:39.652 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:07:39.652 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:07:39.652 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:07:39.659 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:07:39.660 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:07:39.660 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:07:39.660 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:07:39.661 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:07:39.661 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:07:39.662 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:07:39.662 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:07:39.671 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:07:39.671 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:07:39.672 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:07:39.672 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:07:39.672 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:07:39.672 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:07:39.672 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:07:39.672 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:07:39.677 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:07:39.678 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:07:39.678 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:07:39.678 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:07:39.678 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:07:39.679 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:07:39.679 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:07:39.679 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:07:39.685 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:07:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:07:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:07:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:07:39.685 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:07:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:07:39.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:07:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:07:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:07:39.686 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:07:39.686 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:39.686 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:39.686 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:07:39.686 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:07:39.686 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:07:39.686 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:07:39.686 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:39.686 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:39.686 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:39.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:07:39.686 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:39.686 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:39.686 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:39.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:39.686 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:39.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:39.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:39.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:39.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:39.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:39.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:39.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:39.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:39.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:39.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:39.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:39.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:39.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:39.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:39.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:39.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:39.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:39.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:39.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:39.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:39.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:39.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:39.690 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:07:40.175 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:07:40.211 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:07:40.213 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:07:40.215 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:07:40.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:40.235 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:40.235 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:40.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:07:40.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:40.238 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:40.238 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:40.238 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:07:40.238 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:07:40.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:40.277 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:40.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:40.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:40.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:40.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:40.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:40.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:40.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:40.540 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:40.540 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:40.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:07:40.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:40.542 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:40.542 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:40.542 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:07:40.542 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:07:40.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:40.548 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:40.548 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:40.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:40.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:40.653 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:07:40.690 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:07:40.691 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:07:40.691 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:07:40.691 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:07:40.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:40.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:40.785 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:40.785 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:40.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:40.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:40.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:07:40.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:40.794 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:40.794 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:40.794 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:07:40.794 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:07:40.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:40.847 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:40.847 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:40.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:40.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:41.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:41.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:41.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:41.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:41.064 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:41.064 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:41.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:07:41.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:41.066 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:41.066 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:41.066 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:07:41.066 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:07:41.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:41.071 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:07:41.071 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:07:41.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:41.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:41.130 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:07:41.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:07:41.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:07:41.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:07:41.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:07:41.317 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:07:41.318 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:07:41.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:07:41.318 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:07:41.323 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:07:41.323 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:07:41.323 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:07:41.323 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:07:41.324 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:07:41.324 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:07:41.324 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:07:41.324 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=349 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:07:41.324 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=349 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:07:41.324 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=350 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:07:41.325 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=350 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:07:41.325 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=350 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:07:41.325 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=350 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:07:41.325 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=350 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:07:41.325 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=350 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:07:41.325 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=350 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:07:41.325 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=350 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:07:46.321 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:07:46.321 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:07:46.323 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:07:46.324 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:07:46.325 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:07:46.325 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:07:46.335 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:07:46.336 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:07:46.336 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:07:46.337 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:07:46.337 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:07:46.341 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:07:46.342 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:07:46.342 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:07:46.342 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:07:46.342 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:07:46.342 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:07:46.342 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:07:46.342 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:07:46.349 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:07:46.349 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:07:46.349 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:07:46.349 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:07:46.349 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:07:46.349 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:07:46.349 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:07:46.349 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:07:46.352 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:07:46.353 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:07:46.353 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:07:46.353 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:07:46.353 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:07:46.353 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:07:46.353 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:07:46.353 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:07:46.358 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:07:46.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:07:46.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:07:46.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:07:46.358 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:07:46.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:07:46.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:07:46.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:07:46.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:07:46.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:46.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:46.359 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:07:46.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:46.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:46.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:46.359 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:07:46.359 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:07:46.359 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:07:46.359 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:07:46.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:46.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:46.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:46.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:07:46.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:46.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:46.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:46.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:46.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:46.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:46.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:46.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:46.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:46.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:46.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:46.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:46.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:46.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:46.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:46.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:46.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:07:46.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:46.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:46.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:07:46.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:46.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:46.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:07:46.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:07:46.364 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:07:46.846 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:07:47.325 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:07:47.804 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:07:48.282 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:07:48.761 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:07:49.240 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:07:49.718 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:07:50.196 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:07:50.674 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:07:51.152 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:07:51.632 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:07:52.110 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:07:52.589 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:07:53.068 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:07:53.546 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:07:54.025 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:07:54.504 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:07:54.983 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:07:55.462 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:07:55.940 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:07:56.418 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:07:56.897 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:07:57.375 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:07:57.853 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:07:58.332 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:07:58.810 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:07:59.289 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:07:59.768 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:08:00.246 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:08:00.725 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:08:01.204 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:08:01.683 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:08:02.162 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 04:08:02.640 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 04:08:03.119 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 04:08:03.598 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 04:08:04.077 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 04:08:04.556 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 04:08:05.034 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 04:08:05.512 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 04:08:05.991 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 04:08:06.470 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 04:08:06.949 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 04:08:07.427 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 04:08:07.905 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 04:08:08.384 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 04:08:08.861 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 04:08:09.341 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 04:08:09.819 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 04:08:10.298 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 04:08:10.400 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:08:10.400 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:08:10.400 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:08:10.400 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:08:10.400 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:08:10.400 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:08:10.401 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:08:10.401 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=5123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:08:10.401 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=5123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:08:10.401 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=5123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:08:10.401 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=5123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:08:10.401 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=5123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:08:10.402 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=5123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:08:10.402 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=5124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:08:10.402 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=5124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:08:10.402 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=5124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:08:10.402 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=5124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:08:10.402 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=5124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:08:10.402 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=5124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:08:10.402 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=5124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:08:10.402 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=5124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:08:15.404 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:08:15.404 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:08:15.406 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:08:15.409 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:08:15.411 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:08:15.415 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:08:15.424 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:08:15.426 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:08:15.426 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:08:15.426 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:08:15.426 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:08:15.429 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:08:15.429 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:08:15.429 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:08:15.429 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:08:15.430 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:08:15.430 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:08:15.430 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:08:15.430 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:08:15.432 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:08:15.432 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:08:15.432 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:08:15.432 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:08:15.432 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:08:15.432 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:08:15.433 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:08:15.433 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:08:15.435 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:08:15.435 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:08:15.435 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:08:15.435 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:08:15.435 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:08:15.435 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:08:15.435 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:08:15.435 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:08:15.438 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:08:15.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:08:15.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:08:15.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:08:15.438 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:08:15.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:08:15.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:08:15.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:08:15.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:08:15.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:08:15.439 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:08:15.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:08:15.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:08:15.439 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:08:15.439 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:08:15.439 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:08:15.439 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:08:15.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:08:15.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:08:15.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:08:15.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:08:15.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:08:15.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:08:15.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:08:15.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:08:15.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:08:15.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:08:15.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:08:15.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:08:15.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:08:15.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:08:15.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:08:15.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:08:15.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:08:15.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:08:15.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:08:15.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:08:15.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:08:15.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:08:15.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:08:15.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:08:15.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:08:15.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:08:15.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:08:15.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:08:15.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:08:15.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:08:15.444 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:08:15.929 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:08:16.408 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:08:16.887 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:08:17.366 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:08:17.844 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:08:18.323 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:08:18.802 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:08:19.280 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:08:19.759 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:08:20.238 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:08:20.717 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:08:21.195 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:08:21.674 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:08:22.152 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:08:22.631 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:08:23.110 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:08:23.590 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:08:24.069 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:08:24.548 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:08:25.026 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:08:25.505 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:08:25.984 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:08:26.462 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:08:26.941 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:08:27.419 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:08:27.898 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:08:28.376 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:08:28.855 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:08:29.334 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:08:29.813 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:08:30.291 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:08:30.770 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:08:31.249 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 04:08:31.728 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 04:08:32.207 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 04:08:32.686 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 04:08:33.165 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 04:08:33.644 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 04:08:34.122 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 04:08:34.601 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 04:08:35.079 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 04:08:35.557 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 04:08:36.036 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 04:08:36.514 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 04:08:36.993 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 04:08:37.472 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 04:08:37.950 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 04:08:38.429 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 04:08:38.907 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 04:08:39.386 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 04:08:39.864 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 04:08:40.343 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 04:08:40.822 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 04:08:41.301 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 04:08:41.780 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 04:08:42.258 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 04:08:42.737 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 04:08:43.216 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 04:08:43.694 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 04:08:44.173 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-15 04:08:44.652 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-15 04:08:45.131 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-15 04:08:45.609 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-15 04:08:46.088 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-15 04:08:46.567 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-15 04:08:47.046 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-15 04:08:47.524 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-15 04:08:48.003 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-15 04:08:48.482 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-15 04:08:48.961 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-15 04:08:49.439 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-15 04:08:49.918 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-15 04:08:50.397 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-15 04:08:50.876 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-15 04:08:51.354 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-15 04:08:51.833 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-15 04:08:52.312 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-15 04:08:52.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:08:52.790 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-15 04:08:53.269 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-15 04:08:53.468 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:08:53.747 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-15 04:08:54.225 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-15 04:08:54.470 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:08:54.704 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-15 04:08:55.183 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-15 04:08:55.471 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:08:55.662 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-15 04:08:56.141 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-15 04:08:56.473 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:08:56.620 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-15 04:08:57.098 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-15 04:08:57.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:08:57.475 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:08:57.475 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:08:57.475 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:08:57.476 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:08:57.477 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:08:57.477 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:08:57.477 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:08:57.477 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=8957 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:08:57.477 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=8957 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:08:57.478 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=8957 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:08:57.478 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=8957 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:08:57.478 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=8957 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:08:57.478 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=8957 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:08:57.478 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=8958 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:08:57.478 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=8958 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:08:57.478 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=8958 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:08:57.478 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=8958 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:08:57.478 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=8958 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:08:57.478 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=8958 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:08:57.478 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=8958 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:08:57.478 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=8958 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:09:02.479 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:09:02.479 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:09:02.482 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:09:02.483 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:09:02.483 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:09:02.483 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:09:02.495 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:09:02.496 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:09:02.496 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:09:02.496 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:09:02.496 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:09:02.498 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:09:02.498 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:09:02.498 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:09:02.498 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:09:02.498 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:09:02.498 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:09:02.498 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:09:02.498 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:09:02.501 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:09:02.501 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:09:02.501 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:09:02.501 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:09:02.501 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:09:02.501 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:09:02.501 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:09:02.501 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:09:02.503 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:09:02.503 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:09:02.503 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:09:02.503 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:09:02.503 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:09:02.503 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:09:02.503 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:09:02.503 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:09:02.506 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:09:02.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:09:02.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:09:02.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:09:02.506 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:09:02.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:09:02.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:09:02.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:09:02.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:09:02.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:09:02.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:09:02.507 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:09:02.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:09:02.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:09:02.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:09:02.507 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:09:02.507 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:09:02.507 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:09:02.507 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:09:02.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:09:02.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:09:02.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:09:02.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:09:02.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:09:02.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:09:02.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:09:02.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:09:02.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:09:02.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:09:02.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:09:02.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:09:02.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:09:02.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:09:02.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:09:02.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:09:02.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:09:02.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:09:02.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:09:02.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:09:02.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:09:02.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:09:02.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:09:02.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:09:02.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:09:02.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:09:02.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:09:02.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:09:02.511 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:09:02.995 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:09:03.025 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:09:03.026 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:03.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:09:03.027 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:09:03.043 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:09:03.043 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:09:03.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:09:03.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:09:03.046 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:09:03.046 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:09:03.046 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:09:03.046 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:09:03.090 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:03.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:09:03.103 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:09:03.103 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:09:03.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:09:03.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:09:03.472 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:09:03.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:09:03.511 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:09:03.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:09:03.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:09:03.951 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:09:04.429 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:09:04.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:09:04.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:09:04.512 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:09:04.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:09:04.906 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:09:05.380 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:09:05.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:09:05.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:09:05.512 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:09:05.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:09:05.856 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:09:06.334 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:09:06.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:09:06.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:09:06.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:09:06.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:09:06.813 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:09:07.291 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:09:07.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:09:07.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:09:07.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:09:07.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:09:07.394 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:09:07.394 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:09:07.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:09:07.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:09:07.396 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:09:07.396 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:09:07.396 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:09:07.396 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:09:07.430 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:07.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:09:07.446 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:09:07.446 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:09:07.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:09:07.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:09:07.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:09:07.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:09:07.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:09:07.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:09:07.769 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:09:08.247 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:09:08.725 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:09:09.204 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:09:09.682 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:09:10.160 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:09:10.639 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:09:11.117 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:09:11.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:09:11.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:09:11.520 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:09:11.520 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:09:11.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:09:11.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:09:11.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:09:11.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:09:11.539 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:09:11.539 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:09:11.539 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:09:11.539 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:09:11.590 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:11.595 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:09:11.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:09:11.609 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:09:11.609 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:09:11.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:09:11.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:09:12.073 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:09:12.552 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:09:13.030 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:09:13.508 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:09:13.986 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:09:14.464 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:09:14.943 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:09:15.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:09:15.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:09:15.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:09:15.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:09:15.398 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:09:15.398 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:09:15.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:09:15.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:09:15.400 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:09:15.400 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:09:15.400 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:09:15.400 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:09:15.413 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:15.421 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:09:15.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:09:15.425 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:09:15.426 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:09:15.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:09:15.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:09:15.898 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:09:16.376 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:09:16.853 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:09:17.331 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:09:17.809 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:09:18.287 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 04:09:18.764 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 04:09:19.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:09:19.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:09:19.161 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:09:19.161 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:09:19.173 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:09:19.173 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:09:19.173 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:09:19.173 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:09:19.179 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:09:19.179 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:09:19.180 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:09:19.180 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:09:19.180 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:09:19.180 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:09:19.180 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:09:19.181 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3559 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:09:19.181 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3559 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:09:19.181 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3559 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:09:19.181 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3560 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:09:19.181 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3560 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:09:19.181 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3560 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:09:19.181 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3560 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:09:19.182 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3560 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:09:19.182 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3560 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:09:19.182 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3560 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:09:19.182 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3560 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:09:24.179 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:09:24.179 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:09:24.180 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:09:24.180 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:09:24.180 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:09:24.181 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:09:24.190 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:09:24.192 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:09:24.192 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:09:24.192 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:09:24.192 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:09:24.196 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:09:24.196 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:09:24.197 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:09:24.197 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:09:24.197 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:09:24.198 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:09:24.198 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:09:24.198 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:09:24.201 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:09:24.201 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:09:24.201 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:09:24.201 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:09:24.201 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:09:24.202 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:09:24.202 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:09:24.202 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:09:24.204 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:09:24.205 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:09:24.205 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:09:24.205 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:09:24.205 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:09:24.205 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:09:24.205 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:09:24.205 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:09:24.209 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:09:24.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:09:24.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:09:24.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:09:24.209 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:09:24.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:09:24.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:09:24.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:09:24.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:09:24.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:09:24.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:09:24.210 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:09:24.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:09:24.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:09:24.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:09:24.210 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:09:24.210 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:09:24.210 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:09:24.210 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:09:24.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:09:24.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:09:24.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:09:24.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:09:24.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:09:24.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:09:24.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:09:24.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:09:24.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:09:24.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:09:24.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:09:24.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:09:24.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:09:24.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:09:24.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:09:24.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:09:24.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:09:24.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:09:24.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:09:24.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:09:24.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:09:24.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:09:24.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:09:24.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:09:24.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:09:24.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:09:24.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:09:24.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:09:24.215 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:09:24.698 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:09:24.731 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:09:24.732 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:24.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:09:24.734 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:09:24.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:09:24.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:09:24.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:09:24.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:09:24.765 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:09:24.765 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:09:24.765 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:09:24.765 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:09:24.791 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:24.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:09:24.807 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:09:24.807 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:09:24.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:09:24.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:09:25.175 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:09:25.213 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:09:25.214 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:09:25.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:09:25.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:09:25.653 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:09:25.670 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:26.131 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:09:26.157 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:26.214 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:09:26.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:09:26.215 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:09:26.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:09:26.610 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:09:26.644 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:27.088 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:09:27.132 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:27.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:09:27.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:09:27.216 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:09:27.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:09:27.567 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:09:27.620 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:28.046 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:09:28.108 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:28.216 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:09:28.217 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:09:28.217 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:09:28.217 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:09:28.524 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:09:28.595 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:29.003 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:09:29.083 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:29.217 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:09:29.217 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:09:29.218 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:09:29.218 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:09:29.481 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:09:29.571 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:29.960 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:09:30.059 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:30.438 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:09:30.546 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:30.916 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:09:31.034 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:31.395 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:09:31.521 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:31.873 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:09:32.008 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:32.350 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:09:32.495 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:32.829 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:09:32.983 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:32.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:09:32.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:09:32.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:09:32.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:09:33.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:09:33.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:09:33.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:09:33.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:09:33.013 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:09:33.013 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:09:33.014 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:09:33.014 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:09:33.065 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:33.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:09:33.082 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:09:33.082 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:09:33.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:09:33.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:09:33.306 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:09:33.711 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:33.785 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:09:34.198 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:34.263 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:09:34.686 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:34.742 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:09:35.174 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:35.220 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:09:35.661 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:35.698 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:09:36.149 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:36.177 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:09:36.636 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:36.655 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:09:37.124 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:37.134 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:09:37.612 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:37.613 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:09:38.090 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:09:38.107 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:38.568 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:09:38.594 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:39.046 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:09:39.082 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:39.525 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:09:39.569 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:40.003 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 04:09:40.057 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:40.482 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 04:09:40.545 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:40.961 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 04:09:41.032 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:41.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:09:41.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:09:41.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:09:41.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:09:41.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:09:41.045 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:09:41.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:09:41.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:09:41.046 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:09:41.046 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:09:41.046 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:09:41.046 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:09:41.049 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:41.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:09:41.053 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:09:41.054 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:09:41.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:09:41.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:09:41.397 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:41.438 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 04:09:41.874 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:41.916 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 04:09:42.352 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:42.395 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 04:09:42.830 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:42.872 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 04:09:43.308 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:43.350 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 04:09:43.786 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:43.829 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 04:09:44.264 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:44.306 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 04:09:44.742 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:44.784 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 04:09:45.220 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:45.262 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 04:09:45.698 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:45.740 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 04:09:46.175 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:46.218 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 04:09:46.653 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:46.693 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 04:09:47.125 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:47.170 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 04:09:47.606 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:47.649 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 04:09:48.084 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:48.127 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 04:09:48.563 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:48.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:09:48.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:09:48.569 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:09:48.569 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:09:48.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:09:48.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:09:48.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:09:48.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:09:48.587 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:09:48.587 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:09:48.587 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:09:48.587 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:09:48.595 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:48.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:09:48.602 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:09:48.602 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:09:48.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:09:48.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:09:48.605 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 04:09:49.016 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:49.083 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 04:09:49.473 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:49.560 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 04:09:49.951 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:50.039 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 04:09:50.429 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:50.516 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 04:09:50.907 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:50.995 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 04:09:51.386 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:51.473 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 04:09:51.863 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:51.950 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 04:09:52.341 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:52.429 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 04:09:52.819 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:52.907 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-15 04:09:53.297 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:53.384 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-15 04:09:53.775 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:53.862 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-15 04:09:54.252 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:54.340 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-15 04:09:54.730 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:54.818 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-15 04:09:55.209 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:55.296 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-15 04:09:55.687 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:55.773 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-15 04:09:56.164 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:09:56.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:09:56.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:09:56.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:09:56.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:09:56.183 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:09:56.183 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:09:56.183 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:09:56.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:09:56.187 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:09:56.187 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:09:56.187 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:09:56.187 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:09:56.187 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:09:56.187 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:09:56.187 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:09:56.187 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6822 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:09:56.187 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6822 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:09:56.187 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6823 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:09:56.187 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6823 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:09:56.187 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6823 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:09:56.187 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6823 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:09:56.187 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6823 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:09:56.187 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6823 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:09:56.187 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6823 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:09:56.187 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6823 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:10:01.188 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:10:01.188 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:10:01.190 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:10:01.191 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:10:01.191 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:10:01.192 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:10:01.201 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:10:01.202 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:10:01.202 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:10:01.202 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:10:01.202 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:10:01.206 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:10:01.206 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:10:01.206 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:10:01.206 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:10:01.207 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:10:01.207 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:10:01.207 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:10:01.207 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:10:01.210 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:10:01.210 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:10:01.211 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:10:01.211 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:10:01.211 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:10:01.211 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:10:01.211 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:10:01.211 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:10:01.214 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:10:01.214 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:10:01.214 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:10:01.214 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:10:01.215 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:10:01.215 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:10:01.215 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:10:01.215 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:10:01.220 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:10:01.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:10:01.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:10:01.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:10:01.220 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:10:01.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:10:01.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:10:01.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:10:01.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:10:01.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:01.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:01.221 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:10:01.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:01.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:01.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:01.221 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:10:01.221 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:10:01.221 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:10:01.221 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:10:01.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:01.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:01.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:01.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:10:01.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:01.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:01.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:01.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:01.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:01.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:01.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:01.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:01.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:01.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:01.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:01.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:01.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:01.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:01.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:01.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:01.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:01.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:01.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:01.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:01.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:01.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:01.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:01.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:01.226 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:10:01.710 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:10:01.740 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:10:01.741 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:10:01.741 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:10:01.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:10:01.754 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:10:01.754 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:10:01.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:10:01.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:01.755 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:10:01.755 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:10:01.756 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:10:01.756 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:10:01.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:10:01.811 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:10:01.812 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:10:01.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:01.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:02.187 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:10:02.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:10:02.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:10:02.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:10:02.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:10:02.665 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:10:03.143 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:10:03.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:10:03.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:10:03.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:10:03.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:10:03.622 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:10:03.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:10:03.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:03.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:10:03.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:10:03.941 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:10:03.941 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:10:03.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:10:03.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:03.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:10:03.943 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:10:03.943 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:10:03.943 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:10:03.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:10:03.948 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:10:03.948 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:10:03.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:03.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:04.099 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:10:04.227 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:10:04.227 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:10:04.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:10:04.227 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:10:04.577 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:10:05.055 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:10:05.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:10:05.228 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:10:05.228 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:10:05.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:10:05.533 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:10:06.011 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:10:06.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:10:06.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:06.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:10:06.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:10:06.080 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:10:06.080 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:10:06.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:10:06.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:06.082 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:10:06.082 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:10:06.082 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:10:06.082 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:10:06.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:10:06.115 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:10:06.115 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:10:06.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:06.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:06.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:10:06.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:10:06.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:10:06.230 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:10:06.488 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:10:06.966 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:10:07.444 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:10:07.923 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:10:08.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:10:08.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:08.206 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:10:08.206 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:10:08.216 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:10:08.216 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:10:08.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:10:08.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:10:08.218 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:10:08.218 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:10:08.218 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:10:08.218 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:10:08.218 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:10:08.219 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:10:08.219 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:10:08.219 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1493 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:10:08.219 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1493 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:10:08.219 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1493 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:10:08.219 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1493 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:10:08.219 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1493 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:10:08.219 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1493 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:10:08.219 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1494 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:10:08.219 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1494 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:10:08.219 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1494 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:10:08.219 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1494 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:10:08.219 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1494 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:10:08.219 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1494 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:10:08.219 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1494 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:10:08.219 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1494 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:10:13.220 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:10:13.221 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:10:13.223 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:10:13.224 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:10:13.224 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:10:13.225 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:10:13.233 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:10:13.234 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:10:13.234 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:10:13.235 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:10:13.235 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:10:13.243 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:10:13.244 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:10:13.244 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:10:13.244 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:10:13.244 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:10:13.244 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:10:13.244 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:10:13.244 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:10:13.246 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:10:13.246 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:10:13.247 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:10:13.247 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:10:13.247 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:10:13.247 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:10:13.247 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:10:13.247 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:10:13.249 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:10:13.249 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:10:13.249 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:10:13.249 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:10:13.249 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:10:13.249 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:10:13.249 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:10:13.249 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:10:13.252 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:10:13.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:10:13.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:10:13.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:10:13.253 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:10:13.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:10:13.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:10:13.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:10:13.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:13.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:10:13.253 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:10:13.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:13.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:13.253 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:10:13.253 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:10:13.253 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:10:13.253 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:10:13.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:13.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:13.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:13.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:10:13.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:13.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:13.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:13.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:13.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:13.258 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:10:13.741 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:10:13.769 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:10:13.770 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:10:13.771 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:10:13.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:10:13.787 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:10:13.787 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:10:13.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:10:13.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:13.790 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:10:13.790 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:10:13.790 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:10:13.790 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:10:13.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:10:13.846 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:10:13.847 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:10:13.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:13.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:14.218 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:10:14.256 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:10:14.257 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:10:14.257 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:10:14.257 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:10:14.696 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:10:15.175 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:10:15.257 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:10:15.258 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:10:15.258 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:10:15.258 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:10:15.653 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:10:15.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:10:15.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:15.954 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:10:15.954 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:10:15.970 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:10:15.970 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:10:15.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:10:15.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:15.972 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:10:15.972 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:10:15.972 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:10:15.972 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:10:15.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:10:15.980 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:10:15.980 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:10:15.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:15.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:16.130 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:10:16.259 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:10:16.259 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:10:16.259 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:10:16.259 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:10:16.609 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:10:17.087 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:10:17.260 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:10:17.260 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:10:17.260 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:10:17.260 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:10:17.565 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:10:18.044 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:10:18.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:10:18.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:18.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:10:18.089 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:10:18.098 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:10:18.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:10:18.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:10:18.099 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:10:18.100 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:10:18.100 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:10:18.100 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:10:18.100 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:10:18.100 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:10:18.100 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:10:18.101 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:10:23.104 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:10:23.104 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:10:23.105 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:10:23.105 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:10:23.106 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:10:23.106 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:10:23.121 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:10:23.122 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:10:23.122 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:10:23.122 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:10:23.122 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:10:23.124 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:10:23.124 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:10:23.124 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:10:23.124 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:10:23.124 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:10:23.124 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:10:23.124 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:10:23.124 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:10:23.126 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:10:23.126 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:10:23.126 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:10:23.126 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:10:23.126 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:10:23.126 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:10:23.126 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:10:23.126 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:10:23.128 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:10:23.128 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:10:23.128 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:10:23.128 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:10:23.128 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:10:23.128 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:10:23.128 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:10:23.128 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:10:23.131 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:10:23.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:10:23.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:10:23.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:10:23.131 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:10:23.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:10:23.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:10:23.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:10:23.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:10:23.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:23.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:23.131 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:10:23.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:23.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:23.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:23.131 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:10:23.131 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:10:23.131 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:10:23.131 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:10:23.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:23.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:23.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:23.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:10:23.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:23.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:23.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:23.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:23.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:23.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:23.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:23.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:23.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:23.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:23.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:23.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:23.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:23.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:23.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:23.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:23.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:23.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:23.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:23.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:23.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:23.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:23.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:23.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:23.136 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:10:23.616 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:10:23.645 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:10:23.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:10:23.645 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:10:23.646 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:10:23.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:10:23.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:10:23.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:10:23.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:23.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:10:23.655 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:10:23.655 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:10:23.655 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:10:23.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:10:23.695 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:10:23.696 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:10:23.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:23.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:24.093 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:10:24.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:10:24.135 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:10:24.136 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:10:24.136 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:10:24.571 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:10:25.049 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:10:25.136 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:10:25.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:10:25.137 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:10:25.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:10:25.528 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:10:25.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:25.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:10:25.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:10:25.790 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:10:25.806 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:10:25.806 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:10:25.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:10:25.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:25.808 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:10:25.808 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:10:25.808 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:10:25.808 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:10:25.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:10:25.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:10:25.863 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:10:25.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:25.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:26.006 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:10:26.137 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:10:26.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:10:26.137 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:10:26.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:10:26.484 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:10:26.963 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:10:27.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:10:27.138 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:10:27.138 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:10:27.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:10:27.441 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:10:27.916 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:10:27.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:27.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:10:27.965 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:10:27.965 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:10:27.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:10:27.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:10:27.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:10:27.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:27.983 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:10:27.983 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:10:27.983 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:10:27.983 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:10:28.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:10:28.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:10:28.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:10:28.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:28.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:28.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:10:28.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:10:28.139 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:10:28.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:10:28.394 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:10:28.872 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:10:29.350 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:10:29.828 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:10:30.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:30.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:10:30.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:10:30.096 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:10:30.103 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:10:30.103 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:10:30.103 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:10:30.103 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:10:30.104 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:10:30.104 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:10:30.104 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:10:30.104 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:10:30.104 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:10:30.104 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:10:30.104 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:10:35.108 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:10:35.108 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:10:35.110 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:10:35.110 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:10:35.111 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:10:35.112 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:10:35.120 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:10:35.122 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:10:35.122 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:10:35.122 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:10:35.122 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:10:35.126 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:10:35.126 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:10:35.126 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:10:35.126 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:10:35.127 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:10:35.127 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:10:35.127 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:10:35.127 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:10:35.130 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:10:35.130 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:10:35.130 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:10:35.130 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:10:35.130 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:10:35.131 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:10:35.131 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:10:35.131 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:10:35.135 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:10:35.135 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:10:35.135 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:10:35.135 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:10:35.135 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:10:35.135 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:10:35.136 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:10:35.136 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:10:35.140 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:10:35.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:10:35.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:10:35.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:10:35.141 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:10:35.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:10:35.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:10:35.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:10:35.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:35.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:10:35.141 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:10:35.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:35.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:35.141 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:10:35.141 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:10:35.141 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:10:35.142 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:10:35.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:35.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:35.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:35.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:10:35.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:35.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:35.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:35.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:35.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:35.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:35.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:35.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:35.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:35.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:35.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:35.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:35.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:35.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:35.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:35.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:35.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:35.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:35.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:35.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:35.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:35.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:35.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:35.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:35.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:35.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:35.146 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:10:35.630 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:10:35.663 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:10:35.663 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:10:35.664 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:10:35.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:10:35.677 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:10:35.677 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:10:35.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:10:35.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:35.682 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:10:35.682 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:10:35.683 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:10:35.683 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:10:35.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:10:35.733 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:10:35.734 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:10:35.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:35.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:36.108 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:10:36.145 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:10:36.146 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:10:36.146 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:10:36.146 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:10:36.586 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:10:37.065 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:10:37.146 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:10:37.146 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:10:37.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:10:37.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:10:37.543 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:10:37.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:37.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:10:37.864 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:10:37.864 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:10:37.882 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:10:37.882 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:10:37.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:10:37.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:37.883 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:10:37.883 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:10:37.883 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:10:37.883 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:10:37.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:10:37.924 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:10:37.924 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:10:37.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:37.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:38.021 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:10:38.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:10:38.148 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:10:38.148 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:10:38.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:10:38.500 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:10:38.978 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:10:39.149 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:10:39.149 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:10:39.149 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:10:39.149 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:10:39.456 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:10:39.934 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:10:40.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:40.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:10:40.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:10:40.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:10:40.050 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:10:40.050 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:10:40.050 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:10:40.050 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:10:40.055 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:10:40.055 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:10:40.055 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:10:40.055 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:10:40.055 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:10:40.055 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:10:40.055 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:10:40.055 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1048 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:10:40.055 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1048 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:10:40.055 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1048 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:10:45.056 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:10:45.056 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:10:45.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:10:45.058 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:10:45.058 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:10:45.061 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:10:45.068 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:10:45.069 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:10:45.069 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:10:45.069 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:10:45.069 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:10:45.073 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:10:45.073 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:10:45.073 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:10:45.073 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:10:45.074 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:10:45.074 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:10:45.074 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:10:45.074 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:10:45.077 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:10:45.078 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:10:45.078 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:10:45.078 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:10:45.078 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:10:45.078 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:10:45.078 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:10:45.078 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:10:45.081 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:10:45.081 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:10:45.082 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:10:45.082 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:10:45.082 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:10:45.082 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:10:45.082 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:10:45.082 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:10:45.087 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:10:45.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:10:45.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:10:45.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:10:45.087 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:10:45.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:10:45.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:10:45.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:10:45.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:45.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:10:45.088 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:10:45.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:45.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:45.088 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:10:45.088 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:10:45.088 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:10:45.088 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:10:45.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:45.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:45.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:45.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:10:45.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:45.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:45.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:45.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:45.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:45.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:45.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:45.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:45.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:45.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:45.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:45.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:45.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:45.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:45.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:45.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:45.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:45.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:45.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:45.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:45.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:45.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:45.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:45.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:45.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:45.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:45.093 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:10:45.577 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:10:45.609 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:10:45.610 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:10:45.611 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:10:45.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:10:45.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:10:45.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:10:45.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:10:45.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:45.627 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:10:45.627 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:10:45.627 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:10:45.627 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:10:45.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:10:45.676 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:10:45.677 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:10:45.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:45.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:46.054 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:10:46.092 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:10:46.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:10:46.092 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:10:46.092 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:10:46.532 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:10:47.010 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:10:47.093 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:10:47.093 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:10:47.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:10:47.093 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:10:47.488 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:10:47.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:47.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:10:47.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:10:47.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:10:47.882 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:10:47.882 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:10:47.882 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:10:47.882 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:10:47.887 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:10:47.888 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:10:47.888 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:10:47.888 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:10:47.888 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:10:47.888 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:10:47.888 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:10:52.886 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:10:52.886 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:10:52.888 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:10:52.888 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:10:52.889 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:10:52.889 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:10:52.904 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:10:52.905 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:10:52.905 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:10:52.906 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:10:52.906 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:10:52.910 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:10:52.911 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:10:52.911 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:10:52.911 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:10:52.912 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:10:52.913 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:10:52.913 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:10:52.913 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:10:52.917 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:10:52.917 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:10:52.917 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:10:52.918 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:10:52.918 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:10:52.918 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:10:52.919 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:10:52.919 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:10:52.922 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:10:52.922 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:10:52.922 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:10:52.922 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:10:52.922 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:10:52.923 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:10:52.923 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:10:52.923 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:10:52.928 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:10:52.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:10:52.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:10:52.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:10:52.928 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:10:52.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:10:52.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:10:52.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:10:52.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:10:52.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:52.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:52.929 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:10:52.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:52.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:52.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:52.929 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:10:52.929 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:10:52.929 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:10:52.929 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:10:52.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:52.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:52.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:52.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:10:52.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:52.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:52.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:52.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:52.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:52.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:52.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:52.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:52.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:52.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:52.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:52.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:52.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:52.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:52.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:52.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:52.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:52.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:52.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:10:52.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:52.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:10:52.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:52.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:10:52.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:10:52.934 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:10:53.416 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:10:53.450 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:10:53.451 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:10:53.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:10:53.452 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:10:53.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:10:53.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:10:53.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:10:53.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:53.466 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:10:53.466 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:10:53.466 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:10:53.466 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:10:53.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:10:53.522 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:10:53.523 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:10:53.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:53.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:53.893 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:10:53.934 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:10:53.934 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:10:53.934 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:10:53.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:10:54.372 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:10:54.849 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:10:54.934 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:10:54.934 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:10:54.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:10:54.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:10:55.327 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:10:55.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:10:55.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:10:55.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:10:55.723 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:10:55.732 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:10:55.733 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:10:55.733 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:10:55.733 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:10:55.736 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:10:55.736 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:10:55.736 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:10:55.736 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:10:55.736 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:10:55.736 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:10:55.736 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:11:00.738 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:11:00.738 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:11:00.740 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:11:00.740 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:11:00.741 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:11:00.741 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:11:00.750 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:11:00.751 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:11:00.751 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:11:00.752 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:11:00.752 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:11:00.755 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:11:00.755 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:11:00.755 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:11:00.755 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:11:00.756 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:11:00.756 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:11:00.757 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:11:00.757 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:11:00.759 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:11:00.760 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:11:00.760 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:11:00.760 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:11:00.760 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:11:00.760 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:11:00.760 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:11:00.760 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:11:00.763 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:11:00.764 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:11:00.764 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:11:00.764 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:11:00.764 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:11:00.764 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:11:00.765 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:11:00.765 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:11:00.769 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:11:00.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:11:00.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:11:00.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:11:00.770 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:11:00.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:11:00.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:11:00.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:11:00.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:00.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:11:00.770 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:11:00.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:00.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:00.770 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:11:00.770 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:11:00.770 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:11:00.771 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:11:00.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:00.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:00.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:00.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:11:00.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:00.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:00.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:00.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:00.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:00.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:00.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:00.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:00.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:00.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:00.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:00.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:00.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:00.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:00.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:00.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:00.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:00.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:00.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:00.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:00.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:00.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:00.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:00.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:00.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:00.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:00.775 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:11:01.259 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:11:01.295 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:11:01.297 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:11:01.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:11:01.299 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:11:01.324 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:11:01.324 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:11:01.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:11:01.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:01.374 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:11:01.374 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:11:01.375 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:11:01.375 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:11:01.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:11:01.404 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:11:01.405 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:11:01.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:01.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:01.737 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:11:01.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:11:01.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:11:01.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:11:01.775 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:11:01.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:01.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:11:01.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:11:01.790 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:11:01.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:11:01.807 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:11:01.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:11:01.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:01.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:11:01.817 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:11:01.817 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:11:01.817 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:11:01.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:11:01.829 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:11:01.829 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:11:01.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:01.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:02.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:02.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:11:02.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:11:02.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:11:02.214 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:11:02.219 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:11:02.219 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:11:02.219 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:11:02.219 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:11:02.225 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:11:02.226 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:11:02.226 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:11:02.226 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:11:02.226 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:11:02.226 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:11:02.226 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:11:02.227 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=310 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:11:02.227 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=310 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:11:02.227 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=310 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:11:02.227 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=310 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:11:02.227 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=310 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:11:02.227 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=310 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:11:07.225 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:11:07.225 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:11:07.228 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:11:07.228 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:11:07.229 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:11:07.230 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:11:07.240 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:11:07.241 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:11:07.242 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:11:07.242 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:11:07.242 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:11:07.251 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:11:07.251 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:11:07.251 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:11:07.251 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:11:07.252 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:11:07.252 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:11:07.252 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:11:07.252 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:11:07.257 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:11:07.257 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:11:07.258 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:11:07.258 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:11:07.258 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:11:07.259 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:11:07.259 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:11:07.259 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:11:07.263 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:11:07.263 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:11:07.263 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:11:07.263 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:11:07.264 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:11:07.264 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:11:07.264 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:11:07.264 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:11:07.270 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:11:07.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:11:07.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:11:07.270 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:11:07.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:11:07.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:11:07.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:11:07.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:11:07.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:11:07.271 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:11:07.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:07.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:07.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:07.271 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:11:07.271 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:11:07.271 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:11:07.272 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:11:07.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:07.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:07.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:07.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:11:07.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:07.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:07.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:07.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:07.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:07.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:07.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:07.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:07.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:07.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:07.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:07.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:07.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:07.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:07.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:07.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:07.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:07.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:07.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:07.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:07.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:07.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:07.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:07.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:07.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:07.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:07.276 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:11:07.759 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:11:07.793 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:11:07.795 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:11:07.796 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:11:07.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:11:07.813 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:11:07.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:11:07.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:11:07.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:07.862 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:11:07.862 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:11:07.863 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:11:07.863 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:11:07.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:11:07.905 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:11:07.905 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:11:07.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:07.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:08.237 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:11:08.275 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:11:08.276 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:11:08.276 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:11:08.276 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:11:08.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:08.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:11:08.291 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:11:08.292 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:11:08.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:11:08.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:11:08.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:11:08.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:08.318 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:11:08.318 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:11:08.318 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:11:08.318 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:11:08.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:11:08.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:11:08.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:11:08.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:08.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:08.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:08.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:11:08.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:11:08.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:11:08.714 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:11:08.720 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:11:08.720 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:11:08.720 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:11:08.720 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:11:08.721 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:11:08.721 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:11:08.721 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:11:08.721 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:11:08.721 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:11:08.721 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:11:08.721 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:11:13.725 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:11:13.725 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:11:13.727 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:11:13.727 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:11:13.727 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:11:13.728 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:11:13.744 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:11:13.744 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:11:13.745 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:11:13.745 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:11:13.745 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:11:13.747 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:11:13.747 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:11:13.747 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:11:13.747 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:11:13.747 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:11:13.747 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:11:13.747 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:11:13.747 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:11:13.749 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:11:13.749 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:11:13.749 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:11:13.749 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:11:13.749 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:11:13.749 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:11:13.750 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:11:13.750 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:11:13.751 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:11:13.751 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:11:13.751 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:11:13.751 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:11:13.751 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:11:13.751 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:11:13.752 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:11:13.752 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:11:13.754 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:11:13.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:11:13.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:11:13.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:11:13.754 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:11:13.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:11:13.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:11:13.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:11:13.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:11:13.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:13.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:13.755 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:11:13.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:13.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:13.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:13.755 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:11:13.755 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:11:13.755 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:11:13.755 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:11:13.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:13.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:13.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:13.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:11:13.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:13.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:13.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:13.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:13.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:13.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:13.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:13.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:13.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:13.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:13.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:13.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:13.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:13.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:13.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:13.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:13.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:13.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:13.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:13.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:13.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:13.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:13.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:13.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:13.760 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:11:14.244 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:11:14.271 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:11:14.272 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:11:14.273 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:11:14.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:11:14.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:11:14.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:11:14.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:11:14.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:14.333 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:11:14.333 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:11:14.333 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:11:14.333 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:11:14.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:11:14.390 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:11:14.391 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:11:14.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:14.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:14.722 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:11:14.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:11:14.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:11:14.758 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:11:14.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:11:14.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:14.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:11:14.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:11:14.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:11:14.795 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:11:14.795 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:11:14.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:11:14.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:14.806 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:11:14.807 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:11:14.807 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:11:14.807 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:11:14.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:11:14.814 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:11:14.814 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:11:14.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:14.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:15.200 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:11:15.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:15.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:11:15.242 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:11:15.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:11:15.253 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:11:15.253 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:11:15.253 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:11:15.253 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:11:15.254 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:11:15.254 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:11:15.254 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:11:15.255 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:11:15.255 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:11:15.255 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:11:15.255 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:11:20.258 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:11:20.258 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:11:20.260 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:11:20.261 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:11:20.262 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:11:20.262 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:11:20.268 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:11:20.269 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:11:20.269 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:11:20.269 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:11:20.269 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:11:20.273 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:11:20.273 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:11:20.273 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:11:20.273 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:11:20.273 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:11:20.273 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:11:20.273 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:11:20.273 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:11:20.276 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:11:20.276 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:11:20.277 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:11:20.277 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:11:20.277 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:11:20.277 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:11:20.277 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:11:20.277 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:11:20.279 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:11:20.280 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:11:20.280 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:11:20.280 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:11:20.280 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:11:20.280 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:11:20.280 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:11:20.280 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:11:20.284 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:11:20.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:11:20.284 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:11:20.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:11:20.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:11:20.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:11:20.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:11:20.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:11:20.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:11:20.285 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:11:20.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:20.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:20.285 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:11:20.285 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:11:20.285 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:11:20.285 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:11:20.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:20.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:20.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:20.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:11:20.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:20.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:20.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:20.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:20.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:20.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:20.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:20.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:20.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:20.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:20.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:20.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:20.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:20.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:20.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:20.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:20.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:20.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:20.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:20.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:20.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:20.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:20.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:20.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:20.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:20.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:20.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:20.290 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:11:20.774 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:11:20.803 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:11:20.803 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:11:20.804 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:11:20.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:11:20.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:11:20.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:11:20.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:11:20.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:20.859 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:11:20.860 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:11:20.861 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:11:20.861 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:11:20.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:11:20.874 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:11:20.874 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:11:20.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:20.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:21.252 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:11:21.288 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:11:21.289 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:11:21.289 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:11:21.289 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:11:21.730 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:11:22.209 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:11:22.289 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:11:22.289 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:11:22.289 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:11:22.289 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:11:22.687 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:11:23.166 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:11:23.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:11:23.290 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:11:23.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:11:23.291 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:11:23.644 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:11:24.122 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:11:24.291 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:11:24.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:11:24.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:11:24.291 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:11:24.600 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:11:24.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:11:24.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:11:24.882 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:11:24.882 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:11:24.882 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:11:24.882 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:11:24.883 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:11:24.883 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:11:24.883 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:11:24.883 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:11:24.884 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:11:24.884 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:11:24.884 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:11:29.888 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:11:29.888 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:11:29.890 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:11:29.891 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:11:29.892 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:11:29.892 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:11:29.900 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:11:29.902 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:11:29.902 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:11:29.902 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:11:29.902 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:11:29.907 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:11:29.907 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:11:29.907 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:11:29.907 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:11:29.907 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:11:29.907 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:11:29.908 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:11:29.908 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:11:29.911 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:11:29.911 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:11:29.911 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:11:29.911 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:11:29.912 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:11:29.912 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:11:29.912 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:11:29.912 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:11:29.915 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:11:29.916 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:11:29.916 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:11:29.916 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:11:29.916 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:11:29.916 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:11:29.916 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:11:29.916 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:11:29.921 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:11:29.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:11:29.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:11:29.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:11:29.921 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:11:29.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:11:29.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:11:29.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:11:29.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:29.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:11:29.922 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:11:29.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:29.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:29.922 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:11:29.922 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:11:29.922 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:11:29.922 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:11:29.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:29.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:29.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:29.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:11:29.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:29.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:29.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:29.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:29.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:29.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:29.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:29.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:29.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:29.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:29.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:29.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:29.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:29.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:29.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:29.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:29.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:29.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:29.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:29.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:29.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:29.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:29.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:29.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:29.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:29.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:29.927 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:11:30.411 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:11:30.447 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:11:30.449 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:11:30.450 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:11:30.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:11:30.469 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:11:30.469 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:11:30.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:11:30.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:30.516 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:11:30.516 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:11:30.517 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:11:30.517 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:11:30.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:11:30.557 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:11:30.557 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:11:30.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:30.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:30.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:30.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:11:30.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:11:30.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:11:30.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:11:30.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:11:30.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:11:30.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:30.803 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:11:30.803 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:11:30.803 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:11:30.803 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:11:30.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:11:30.836 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:11:30.837 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:11:30.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:30.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:30.888 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:11:30.926 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:11:30.926 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:11:30.927 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:11:30.927 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:11:31.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:31.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:11:31.062 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:11:31.062 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:11:31.072 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:11:31.072 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:11:31.072 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:11:31.072 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:11:31.073 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:11:31.073 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:11:31.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:11:31.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:11:31.073 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:11:31.073 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:11:31.074 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:11:31.074 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=246 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:11:31.074 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=246 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:11:31.074 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=246 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:11:31.074 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=246 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:11:31.074 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=246 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:11:31.074 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=246 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:11:31.074 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=246 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:11:36.076 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:11:36.076 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:11:36.077 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:11:36.078 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:11:36.079 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:11:36.079 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:11:36.088 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:11:36.089 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:11:36.089 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:11:36.089 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:11:36.089 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:11:36.093 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:11:36.093 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:11:36.093 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:11:36.093 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:11:36.093 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:11:36.094 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:11:36.094 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:11:36.094 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:11:36.096 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:11:36.096 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:11:36.096 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:11:36.096 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:11:36.096 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:11:36.097 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:11:36.097 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:11:36.097 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:11:36.099 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:11:36.099 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:11:36.099 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:11:36.100 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:11:36.100 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:11:36.100 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:11:36.100 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:11:36.100 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:11:36.103 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:11:36.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:11:36.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:11:36.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:11:36.103 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:11:36.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:11:36.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:11:36.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:11:36.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:11:36.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:36.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:36.104 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:11:36.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:36.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:36.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:36.104 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:11:36.104 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:11:36.104 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:11:36.104 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:11:36.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:36.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:36.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:36.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:11:36.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:36.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:36.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:36.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:36.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:36.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:36.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:36.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:36.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:36.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:36.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:36.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:36.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:36.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:36.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:36.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:36.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:36.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:36.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:36.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:36.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:36.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:36.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:36.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:36.109 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:11:36.593 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:11:36.622 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:11:36.623 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:11:36.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:11:36.625 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:11:36.638 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:11:36.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:11:36.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:11:36.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:36.680 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:11:36.680 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:11:36.681 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:11:36.681 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:11:36.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:11:36.693 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:11:36.693 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:11:36.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:36.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:37.063 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:11:37.107 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:11:37.107 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:11:37.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:11:37.108 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:11:37.540 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:11:38.013 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:11:38.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:11:38.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:11:38.109 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:11:38.109 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:11:38.488 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:11:38.966 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:11:39.110 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:11:39.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:11:39.110 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:11:39.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:11:39.445 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:11:39.923 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:11:40.111 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:11:40.112 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:11:40.112 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:11:40.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:11:40.402 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:11:40.698 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:11:40.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:11:40.701 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:11:40.701 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:11:40.701 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:11:40.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:11:40.702 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:11:40.702 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:11:40.702 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:11:40.702 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:11:40.702 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:11:40.702 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:11:40.702 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:11:45.708 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:11:45.708 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:11:45.709 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:11:45.709 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:11:45.710 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:11:45.710 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:11:45.720 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:11:45.720 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:11:45.720 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:11:45.720 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:11:45.720 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:11:45.723 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:11:45.723 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:11:45.723 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:11:45.724 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:11:45.724 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:11:45.724 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:11:45.724 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:11:45.724 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:11:45.728 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:11:45.728 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:11:45.728 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:11:45.728 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:11:45.729 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:11:45.729 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:11:45.729 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:11:45.729 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:11:45.733 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:11:45.733 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:11:45.733 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:11:45.733 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:11:45.733 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:11:45.733 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:11:45.733 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:11:45.733 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:11:45.740 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:11:45.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:11:45.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:11:45.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:11:45.740 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:11:45.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:11:45.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:11:45.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:11:45.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:45.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:11:45.741 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:11:45.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:45.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:45.741 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:11:45.741 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:11:45.741 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:11:45.741 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:11:45.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:45.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:45.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:45.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:11:45.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:45.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:45.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:45.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:45.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:45.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:45.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:45.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:45.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:45.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:45.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:45.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:45.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:45.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:45.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:45.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:45.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:45.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:45.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:45.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:45.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:45.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:45.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:45.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:45.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:45.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:45.746 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:11:46.227 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:11:46.264 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:11:46.265 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:11:46.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:11:46.266 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:11:46.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:11:46.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:11:46.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:11:46.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:46.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:11:46.328 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:11:46.328 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:11:46.329 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:11:46.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:11:46.372 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:11:46.373 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:11:46.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:46.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:46.702 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:11:46.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:11:46.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:11:46.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:11:46.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:11:47.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:47.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:11:47.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:11:47.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:11:47.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:11:47.105 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:11:47.105 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:11:47.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:11:47.108 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:11:47.108 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:11:47.108 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:11:47.108 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:11:47.108 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:11:47.108 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:11:47.108 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:11:47.108 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:11:47.108 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:11:47.108 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:11:47.108 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:11:47.108 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:11:47.108 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:11:47.108 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:11:52.133 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:11:52.133 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:11:52.135 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:11:52.136 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:11:52.137 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:11:52.137 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:11:52.147 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:11:52.149 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:11:52.149 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:11:52.149 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:11:52.149 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:11:52.152 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:11:52.152 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:11:52.152 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:11:52.152 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:11:52.152 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:11:52.152 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:11:52.153 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:11:52.153 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:11:52.156 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:11:52.156 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:11:52.156 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:11:52.156 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:11:52.156 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:11:52.156 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:11:52.156 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:11:52.156 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:11:52.159 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:11:52.159 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:11:52.159 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:11:52.160 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:11:52.160 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:11:52.160 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:11:52.160 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:11:52.160 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:11:52.164 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:11:52.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:11:52.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:11:52.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:11:52.164 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:11:52.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:11:52.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:11:52.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:11:52.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:52.165 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:11:52.165 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:11:52.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:52.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:52.165 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:11:52.165 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:11:52.165 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:11:52.165 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:11:52.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:52.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:52.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:52.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:11:52.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:52.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:52.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:52.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:52.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:52.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:52.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:52.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:52.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:52.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:52.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:52.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:52.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:52.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:52.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:52.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:52.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:52.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:52.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:52.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:52.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:52.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:52.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:52.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:52.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:52.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:52.170 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:11:52.655 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:11:52.686 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:11:52.687 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:11:52.688 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:11:52.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:11:52.701 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:11:52.701 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:11:52.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:11:52.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:52.745 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:11:52.745 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:11:52.746 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:11:52.746 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:11:52.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:11:52.800 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:11:52.800 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:11:52.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:52.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:53.132 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:11:53.169 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:11:53.169 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:11:53.169 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:11:53.170 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:11:53.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:53.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:11:53.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:11:53.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:11:53.539 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:11:53.540 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:11:53.540 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:11:53.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:11:53.542 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:11:53.542 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:11:53.542 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:11:53.542 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:11:53.542 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:11:53.542 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:11:53.542 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:11:58.544 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:11:58.544 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:11:58.546 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:11:58.547 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:11:58.547 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:11:58.548 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:11:58.555 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:11:58.557 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:11:58.557 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:11:58.557 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:11:58.557 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:11:58.561 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:11:58.562 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:11:58.562 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:11:58.562 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:11:58.562 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:11:58.562 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:11:58.562 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:11:58.562 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:11:58.567 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:11:58.567 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:11:58.567 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:11:58.567 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:11:58.567 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:11:58.567 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:11:58.567 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:11:58.567 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:11:58.571 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:11:58.571 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:11:58.571 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:11:58.571 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:11:58.571 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:11:58.571 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:11:58.572 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:11:58.572 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:11:58.577 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:11:58.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:11:58.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:11:58.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:11:58.577 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:11:58.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:11:58.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:11:58.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:11:58.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:11:58.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:58.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:58.578 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:11:58.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:58.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:58.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:58.578 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:11:58.578 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:11:58.578 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:11:58.578 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:11:58.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:58.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:58.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:58.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:11:58.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:58.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:58.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:58.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:58.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:58.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:58.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:58.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:58.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:58.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:58.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:58.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:58.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:58.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:58.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:58.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:58.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:58.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:11:58.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:58.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:58.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:11:58.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:11:58.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:58.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:11:58.583 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:11:59.067 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:11:59.102 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:11:59.103 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:11:59.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:11:59.105 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:11:59.120 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:11:59.120 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:11:59.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:11:59.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:59.159 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:11:59.159 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:11:59.160 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:11:59.160 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:11:59.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:11:59.213 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:11:59.214 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:11:59.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:59.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:59.544 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:11:59.582 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:11:59.583 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:11:59.583 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:11:59.583 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:11:59.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:11:59.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:11:59.941 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:11:59.941 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:11:59.952 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:11:59.952 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:11:59.952 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:11:59.953 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:11:59.954 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:11:59.954 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:11:59.954 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:11:59.955 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:11:59.955 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:11:59.955 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:11:59.955 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:11:59.955 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:11:59.955 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:11:59.955 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:11:59.955 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:11:59.955 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:11:59.955 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:12:04.958 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:12:04.958 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:12:04.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:12:04.960 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:12:04.961 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:12:04.962 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:12:04.979 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:12:04.981 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:12:04.981 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:12:04.981 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:12:04.981 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:12:04.985 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:12:04.985 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:12:04.986 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:12:04.986 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:12:04.986 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:12:04.986 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:12:04.987 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:12:04.987 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:12:04.989 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:12:04.989 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:12:04.989 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:12:04.989 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:12:04.989 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:12:04.989 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:12:04.989 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:12:04.989 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:12:04.992 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:12:04.992 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:12:04.992 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:12:04.992 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:12:04.993 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:12:04.993 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:12:04.993 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:12:04.993 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:12:04.998 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:12:04.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:12:04.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:12:04.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:12:04.998 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:12:04.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:12:04.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:12:04.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:12:04.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:04.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:12:04.998 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:12:04.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:04.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:04.998 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:12:04.998 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:12:04.998 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:12:04.999 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:12:04.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:04.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:04.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:04.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:12:04.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:04.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:04.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:04.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:04.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:04.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:04.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:04.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:04.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:04.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:04.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:04.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:04.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:04.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:04.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:04.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:04.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:04.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:04.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:04.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:05.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:05.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:05.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:05.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:05.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:05.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:05.003 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:12:05.487 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:12:05.518 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:12:05.519 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:12:05.521 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:12:05.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:12:05.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:12:05.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:12:05.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:12:05.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:12:05.581 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:12:05.581 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:12:05.581 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:12:05.581 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:12:05.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:12:05.632 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:12:05.633 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:12:05.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:12:05.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:12:05.964 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:12:06.002 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:12:06.003 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:12:06.003 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:12:06.003 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:12:06.443 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:12:06.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:12:06.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:12:06.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:12:06.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:12:06.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:12:06.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:12:06.513 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:12:06.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:12:06.516 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:12:06.516 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:12:06.516 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:12:06.516 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:12:06.516 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:12:06.516 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:12:06.516 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:12:11.518 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:12:11.518 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:12:11.518 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:12:11.519 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:12:11.519 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:12:11.520 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:12:11.529 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:12:11.530 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:12:11.530 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:12:11.531 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:12:11.531 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:12:11.535 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:12:11.535 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:12:11.535 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:12:11.535 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:12:11.535 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:12:11.536 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:12:11.536 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:12:11.536 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:12:11.542 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:12:11.542 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:12:11.543 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:12:11.543 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:12:11.543 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:12:11.543 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:12:11.543 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:12:11.543 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:12:11.546 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:12:11.546 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:12:11.547 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:12:11.547 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:12:11.547 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:12:11.547 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:12:11.547 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:12:11.547 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:12:11.552 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:12:11.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:12:11.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:12:11.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:12:11.552 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:12:11.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:12:11.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:12:11.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:12:11.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:11.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:12:11.553 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:12:11.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:11.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:11.553 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:12:11.553 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:12:11.553 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:12:11.553 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:12:11.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:11.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:11.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:11.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:12:11.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:11.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:11.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:11.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:11.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:11.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:11.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:11.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:11.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:11.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:11.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:11.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:11.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:11.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:11.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:11.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:11.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:11.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:11.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:11.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:11.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:11.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:11.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:11.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:11.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:11.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:11.558 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:12:12.042 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:12:12.077 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:12:12.078 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:12:12.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:12:12.078 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:12:12.092 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:12:12.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:12:12.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:12:12.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:12:12.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:12:12.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:12:12.139 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:12:12.139 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:12:12.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:12:12.186 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:12:12.187 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:12:12.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:12:12.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:12:12.518 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:12:12.558 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:12:12.558 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:12:12.558 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:12:12.559 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:12:12.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:12:12.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:12:12.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:12:12.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:12:12.925 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:12:12.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:12:12.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:12:12.925 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:12:12.927 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:12:12.927 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:12:12.927 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:12:12.927 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:12:12.927 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:12:12.927 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:12:12.927 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:12:12.927 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:12:17.931 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:12:17.932 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:12:17.933 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:12:17.934 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:12:17.935 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:12:17.935 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:12:17.945 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:12:17.946 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:12:17.946 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:12:17.946 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:12:17.946 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:12:17.951 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:12:17.951 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:12:17.952 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:12:17.952 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:12:17.952 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:12:17.952 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:12:17.953 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:12:17.953 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:12:17.955 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:12:17.955 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:12:17.955 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:12:17.955 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:12:17.956 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:12:17.956 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:12:17.956 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:12:17.956 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:12:17.958 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:12:17.958 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:12:17.958 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:12:17.958 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:12:17.959 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:12:17.959 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:12:17.959 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:12:17.959 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:12:17.962 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:12:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:12:17.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:12:17.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:12:17.963 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:12:17.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:12:17.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:12:17.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:12:17.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:17.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:12:17.963 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:12:17.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:17.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:17.963 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:12:17.963 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:12:17.963 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:12:17.963 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:12:17.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:17.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:17.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:17.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:12:17.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:17.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:17.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:17.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:17.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:17.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:17.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:17.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:17.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:17.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:17.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:17.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:17.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:17.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:17.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:17.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:17.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:17.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:17.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:17.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:17.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:17.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:17.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:17.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:17.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:17.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:17.968 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:12:18.450 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:12:18.486 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:12:18.488 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:12:18.489 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:12:18.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:12:18.513 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:12:18.513 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:12:18.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:12:18.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:12:18.560 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:12:18.560 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:12:18.561 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:12:18.561 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:12:18.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:12:18.596 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:12:18.596 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:12:18.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:12:18.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:12:18.928 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:12:18.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:12:18.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:12:18.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:12:18.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:12:19.406 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:12:19.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:12:19.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:12:19.467 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:12:19.467 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:12:19.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:12:19.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:12:19.478 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:12:19.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:12:19.479 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:12:19.479 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:12:19.479 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:12:19.479 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:12:19.479 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:12:19.479 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:12:19.479 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:12:19.479 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=323 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:12:19.479 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=323 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:12:19.479 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=323 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:12:19.479 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=323 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:12:19.479 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=323 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:12:24.483 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:12:24.484 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:12:24.485 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:12:24.486 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:12:24.487 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:12:24.488 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:12:24.497 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:12:24.498 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:12:24.498 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:12:24.498 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:12:24.498 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:12:24.501 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:12:24.501 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:12:24.502 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:12:24.502 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:12:24.502 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:12:24.502 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:12:24.502 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:12:24.502 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:12:24.505 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:12:24.505 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:12:24.505 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:12:24.505 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:12:24.505 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:12:24.505 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:12:24.505 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:12:24.505 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:12:24.508 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:12:24.508 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:12:24.508 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:12:24.508 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:12:24.509 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:12:24.509 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:12:24.509 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:12:24.509 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:12:24.513 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:12:24.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:12:24.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:12:24.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:12:24.513 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:12:24.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:12:24.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:12:24.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:12:24.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:12:24.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:24.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:24.514 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:12:24.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:24.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:24.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:24.514 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:12:24.514 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:12:24.514 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:12:24.514 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:12:24.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:24.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:24.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:24.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:12:24.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:24.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:24.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:24.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:24.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:24.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:24.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:24.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:24.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:24.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:24.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:24.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:24.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:24.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:24.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:24.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:24.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:24.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:24.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:24.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:24.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:24.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:24.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:24.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:24.519 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:12:25.003 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:12:25.039 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:12:25.041 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:12:25.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:12:25.042 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:12:25.066 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:12:25.066 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:12:25.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:12:25.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:12:25.071 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:12:25.071 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:12:25.072 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:12:25.072 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:12:25.480 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:12:25.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:12:25.518 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:12:25.519 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:12:25.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:12:25.958 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:12:26.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:12:26.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:12:26.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:12:26.234 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:12:26.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:12:26.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:12:26.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:12:26.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:12:26.244 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:12:26.244 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:12:26.244 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:12:26.244 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:12:26.435 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:12:26.519 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:12:26.519 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:12:26.519 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:12:26.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:12:26.913 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:12:27.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD NOHANDOVER
2025-12-15 04:12:27.391 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:12:27.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD NOHANDOVER
2025-12-15 04:12:27.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:12:27.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:12:27.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:12:27.442 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:12:27.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:12:27.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:12:27.445 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:12:27.445 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:12:27.445 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:12:27.445 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:12:27.445 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:12:27.445 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:12:27.445 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:12:32.448 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:12:32.448 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:12:32.450 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:12:32.451 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:12:32.451 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:12:32.452 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:12:32.461 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:12:32.463 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:12:32.463 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:12:32.464 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:12:32.464 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:12:32.469 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:12:32.470 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:12:32.470 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:12:32.470 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:12:32.471 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:12:32.471 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:12:32.471 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:12:32.471 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:12:32.475 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:12:32.475 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:12:32.475 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:12:32.476 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:12:32.476 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:12:32.476 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:12:32.476 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:12:32.476 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:12:32.479 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:12:32.479 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:12:32.480 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:12:32.480 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:12:32.480 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:12:32.480 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:12:32.480 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:12:32.480 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:12:32.485 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:12:32.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:12:32.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:12:32.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:12:32.485 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:12:32.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:12:32.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:12:32.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:12:32.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:32.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:12:32.486 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:12:32.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:32.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:32.486 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:12:32.486 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:12:32.486 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:12:32.486 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:12:32.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:32.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:32.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:32.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:12:32.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:32.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:32.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:32.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:32.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:32.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:32.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:32.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:32.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:32.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:32.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:32.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:32.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:32.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:32.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:32.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:32.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:32.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:32.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:32.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:32.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:32.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:32.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:32.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:32.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:32.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:32.491 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:12:32.975 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:12:33.005 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:12:33.007 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:12:33.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:12:33.008 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:12:33.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:12:33.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:12:33.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:12:33.451 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:12:33.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:12:33.490 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:12:33.490 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:12:33.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:12:33.930 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:12:34.408 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:12:34.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:12:34.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:12:34.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:12:34.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:12:34.887 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:12:35.365 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:12:35.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:12:35.493 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:12:35.493 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:12:35.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:12:35.844 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:12:36.322 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:12:36.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:12:36.494 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:12:36.494 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:12:36.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:12:36.801 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:12:37.280 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:12:37.495 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:12:37.495 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:12:37.495 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:12:37.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:12:37.758 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:12:38.237 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:12:38.715 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:12:39.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:12:39.040 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:12:39.041 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:12:39.041 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:12:39.041 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:12:39.193 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:12:39.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD NOHANDOVER
2025-12-15 04:12:39.225 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:12:39.225 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:12:39.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:12:39.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:12:39.672 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:12:40.151 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:12:40.623 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:12:41.094 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:12:41.564 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:12:42.035 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:12:42.506 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:12:42.977 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:12:43.448 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:12:43.918 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:12:44.389 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:12:44.860 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:12:45.331 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:12:45.809 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:12:46.288 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:12:46.766 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:12:47.244 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:12:47.723 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:12:48.195 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 04:12:48.666 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 04:12:49.136 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 04:12:49.607 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 04:12:50.078 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 04:12:50.549 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 04:12:51.019 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 04:12:51.490 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 04:12:51.960 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 04:12:52.435 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 04:12:52.913 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 04:12:53.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD NOHANDOVER
2025-12-15 04:12:53.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:12:53.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:12:53.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:12:53.255 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:12:53.255 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:12:53.255 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:12:53.255 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:12:53.257 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:12:53.257 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:12:53.257 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:12:53.257 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:12:53.257 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:12:53.257 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:12:53.257 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4461 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:12:53.257 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:12:53.257 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4461 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:12:53.257 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4461 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:12:53.257 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4461 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:12:53.257 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4461 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:12:53.257 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4462 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:12:53.257 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4462 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:12:53.257 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4462 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:12:53.257 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4462 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:12:53.257 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4462 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:12:53.257 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4462 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:12:53.257 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4462 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:12:53.257 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4462 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:12:58.261 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:12:58.262 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:12:58.264 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:12:58.264 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:12:58.265 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:12:58.266 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:12:58.275 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:12:58.276 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:12:58.276 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:12:58.277 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:12:58.277 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:12:58.279 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:12:58.279 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:12:58.280 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:12:58.280 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:12:58.280 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:12:58.280 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:12:58.280 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:12:58.280 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:12:58.282 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:12:58.282 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:12:58.282 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:12:58.282 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:12:58.283 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:12:58.283 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:12:58.283 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:12:58.283 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:12:58.285 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:12:58.285 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:12:58.285 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:12:58.285 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:12:58.285 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:12:58.285 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:12:58.286 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:12:58.286 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:12:58.289 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:12:58.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:12:58.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:12:58.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:12:58.290 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:12:58.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:12:58.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:12:58.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:12:58.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:58.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:12:58.290 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:12:58.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:58.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:58.290 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:12:58.290 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:12:58.290 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:12:58.290 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:12:58.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:58.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:58.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:58.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:12:58.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:58.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:58.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:58.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:58.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:58.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:58.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:58.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:58.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:58.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:58.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:58.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:58.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:58.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:58.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:58.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:12:58.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:58.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:58.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:58.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:58.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:58.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:58.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:12:58.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:12:58.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:58.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:12:58.295 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:12:58.779 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:12:58.813 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:12:58.814 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:12:58.815 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:12:58.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:12:58.830 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:12:58.830 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:12:58.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:12:59.257 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:12:59.294 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:12:59.294 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:12:59.295 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:12:59.295 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:12:59.735 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:13:00.213 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:13:00.295 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:13:00.296 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:13:00.296 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:13:00.296 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:13:00.692 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:13:01.170 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:13:01.296 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:13:01.296 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:13:01.296 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:13:01.297 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:13:01.649 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:13:02.127 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:13:02.297 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:13:02.297 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:13:02.297 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:13:02.298 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:13:02.614 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:13:03.091 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:13:03.298 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:13:03.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:13:03.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:13:03.299 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:13:03.569 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:13:04.048 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:13:04.527 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:13:04.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:13:04.837 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:13:04.838 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:13:04.838 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:13:04.839 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:13:05.005 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:13:05.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD NOHANDOVER
2025-12-15 04:13:05.029 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:13:05.030 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:13:05.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:13:05.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:13:05.485 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:13:05.964 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:13:06.444 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:13:06.922 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:13:07.401 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:13:07.879 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:13:08.358 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:13:08.829 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:13:09.305 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:13:09.783 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:13:10.262 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:13:10.741 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:13:10.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD NOHANDOVER
2025-12-15 04:13:10.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:13:10.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:13:10.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:13:10.924 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:13:10.924 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:13:10.924 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:13:10.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:13:10.925 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:13:10.925 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:13:10.925 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:13:10.925 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:13:10.925 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:13:10.925 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:13:10.925 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:13:15.930 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:13:15.930 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:13:15.932 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:13:15.933 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:13:15.934 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:13:15.934 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:13:15.943 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:13:15.944 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:13:15.944 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:13:15.945 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:13:15.945 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:13:15.948 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:13:15.948 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:13:15.949 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:13:15.949 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:13:15.949 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:13:15.949 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:13:15.950 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:13:15.950 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:13:15.951 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:13:15.952 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:13:15.952 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:13:15.952 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:13:15.952 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:13:15.952 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:13:15.952 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:13:15.952 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:13:15.954 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:13:15.954 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:13:15.955 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:13:15.955 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:13:15.955 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:13:15.955 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:13:15.955 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:13:15.955 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:13:15.958 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:13:15.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:13:15.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:13:15.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:13:15.958 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:13:15.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:13:15.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:13:15.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:13:15.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:13:15.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:13:15.959 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:13:15.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:13:15.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:13:15.959 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:13:15.959 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:13:15.959 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:13:15.959 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:13:15.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:13:15.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:13:15.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:13:15.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:13:15.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:13:15.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:13:15.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:13:15.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:13:15.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:13:15.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:13:15.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:13:15.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:13:15.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:13:15.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:13:15.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:13:15.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:13:15.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:13:15.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:13:15.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:13:15.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:13:15.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:13:15.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:13:15.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:13:15.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:13:15.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:13:15.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:13:15.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:13:15.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:13:15.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:13:15.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:13:15.964 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:13:16.444 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:13:16.480 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:13:16.480 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:13:16.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:13:16.482 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:13:16.496 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:13:16.496 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:13:16.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:13:16.919 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:13:16.964 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:13:16.964 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:13:16.964 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:13:16.964 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:13:17.398 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:13:17.877 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:13:17.965 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:13:17.965 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:13:17.965 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:13:17.965 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:13:18.356 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:13:18.835 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:13:18.965 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:13:18.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:13:18.966 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:13:18.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:13:19.314 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:13:19.793 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:13:19.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:13:19.968 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:13:19.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:13:19.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:13:20.271 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:13:20.750 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:13:20.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:13:20.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:13:20.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:13:20.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:13:21.228 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:13:21.707 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:13:22.185 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:13:22.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:13:22.508 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:13:22.509 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:13:22.509 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:13:22.509 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:13:22.663 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:13:22.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD NOHANDOVER
2025-12-15 04:13:22.695 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:13:22.696 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:13:22.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:13:22.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:13:23.142 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:13:23.618 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:13:24.087 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:13:24.556 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:13:25.027 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:13:25.506 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:13:25.986 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:13:26.465 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:13:26.944 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:13:27.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD NOHANDOVER
2025-12-15 04:13:27.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:13:27.094 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:13:27.094 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:13:27.103 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:13:27.104 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:13:27.104 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:13:27.104 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:13:27.107 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:13:27.107 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:13:27.107 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:13:27.108 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:13:27.108 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:13:27.108 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:13:27.108 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:13:32.110 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:13:32.110 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:13:32.111 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:13:32.111 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:13:32.112 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:13:32.113 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:13:32.120 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:13:32.121 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:13:32.121 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:13:32.122 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:13:32.122 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:13:32.125 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:13:32.125 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:13:32.125 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:13:32.126 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:13:32.126 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:13:32.126 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:13:32.126 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:13:32.126 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:13:32.129 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:13:32.130 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:13:32.130 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:13:32.130 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:13:32.130 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:13:32.130 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:13:32.130 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:13:32.130 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:13:32.133 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:13:32.134 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:13:32.134 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:13:32.134 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:13:32.134 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:13:32.134 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:13:32.134 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:13:32.134 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:13:32.139 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:13:32.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:13:32.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:13:32.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:13:32.139 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:13:32.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:13:32.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:13:32.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:13:32.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:13:32.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:13:32.140 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:13:32.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:13:32.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:13:32.140 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:13:32.140 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:13:32.140 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:13:32.140 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:13:32.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:13:32.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:13:32.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:13:32.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:13:32.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:13:32.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:13:32.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:13:32.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:13:32.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:13:32.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:13:32.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:13:32.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:13:32.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:13:32.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:13:32.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:13:32.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:13:32.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:13:32.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:13:32.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:13:32.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:13:32.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:13:32.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:13:32.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:13:32.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:13:32.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:13:32.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:13:32.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:13:32.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:13:32.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:13:32.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:13:32.145 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:13:32.626 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:13:32.661 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:13:32.662 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:13:32.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:13:32.663 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:13:32.677 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:13:32.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:13:32.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:13:33.103 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:13:33.144 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:13:33.144 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:13:33.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:13:33.145 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:13:33.582 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:13:34.060 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:13:34.145 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:13:34.145 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:13:34.146 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:13:34.146 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:13:34.539 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:13:35.017 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:13:35.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:13:35.147 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:13:35.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:13:35.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:13:35.497 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:13:35.976 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:13:36.148 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:13:36.148 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:13:36.148 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:13:36.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:13:36.454 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:13:36.933 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:13:37.149 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:13:37.149 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:13:37.150 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:13:37.150 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:13:37.412 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:13:37.890 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:13:38.369 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:13:38.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:13:38.687 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:13:38.687 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:13:38.688 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:13:38.688 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:13:38.847 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:13:38.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD NOHANDOVER
2025-12-15 04:13:38.874 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:13:38.875 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:13:38.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:13:38.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:13:39.326 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:13:39.805 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:13:40.284 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:13:40.763 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:13:41.242 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:13:41.721 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:13:42.200 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:13:42.678 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:13:42.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD NOHANDOVER
2025-12-15 04:13:42.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:13:42.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:13:42.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:13:42.826 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:13:42.826 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:13:42.826 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:13:42.826 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:13:42.833 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:13:42.833 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:13:42.833 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:13:42.833 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:13:42.834 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:13:42.834 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:13:42.834 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:13:47.852 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:13:47.852 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:13:47.853 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:13:47.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:13:47.854 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:13:47.855 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:13:47.862 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:13:47.863 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:13:47.863 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:13:47.863 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:13:47.863 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:13:47.867 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:13:47.867 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:13:47.867 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:13:47.867 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:13:47.867 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:13:47.867 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:13:47.867 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:13:47.868 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:13:47.871 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:13:47.871 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:13:47.871 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:13:47.871 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:13:47.871 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:13:47.871 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:13:47.871 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:13:47.871 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:13:47.874 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:13:47.874 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:13:47.874 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:13:47.874 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:13:47.874 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:13:47.874 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:13:47.874 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:13:47.874 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:13:47.878 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:13:47.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:13:47.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:13:47.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:13:47.878 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:13:47.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:13:47.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:13:47.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:13:47.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:13:47.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:13:47.879 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:13:47.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:13:47.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:13:47.879 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:13:47.879 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:13:47.879 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:13:47.879 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:13:47.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:13:47.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:13:47.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:13:47.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:13:47.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:13:47.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:13:47.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:13:47.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:13:47.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:13:47.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:13:47.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:13:47.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:13:47.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:13:47.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:13:47.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:13:47.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:13:47.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:13:47.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:13:47.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:13:47.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:13:47.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:13:47.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:13:47.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:13:47.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:13:47.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:13:47.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:13:47.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:13:47.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:13:47.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:13:47.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:13:47.884 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:13:48.367 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:13:48.398 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:13:48.399 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:13:48.401 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:13:48.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:13:48.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:13:48.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:13:48.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:13:48.845 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:13:48.883 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:13:48.883 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:13:48.883 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:13:48.883 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:13:49.323 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:13:49.802 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:13:49.884 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:13:49.884 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:13:49.884 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:13:49.884 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:13:50.280 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:13:50.759 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:13:50.885 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:13:50.885 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:13:50.885 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:13:50.885 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:13:51.238 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:13:51.716 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:13:51.886 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:13:51.886 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:13:51.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:13:51.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:13:52.195 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:13:52.674 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:13:52.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:13:52.906 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:13:52.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:13:52.906 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:13:53.154 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:13:53.632 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:13:54.111 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:13:54.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:13:54.430 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:13:54.431 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:13:54.431 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:13:54.431 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:13:54.591 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:13:54.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD NOHANDOVER
2025-12-15 04:13:54.618 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:13:54.618 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:13:54.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:13:54.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:13:55.069 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:13:55.547 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:13:56.026 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:13:56.506 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:13:56.984 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:13:57.463 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:13:57.942 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:13:58.420 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:13:58.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD NOHANDOVER
2025-12-15 04:13:58.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:13:58.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:13:58.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:13:58.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:13:58.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:13:58.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:13:58.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:13:58.569 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:13:58.569 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:13:58.569 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:13:58.569 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:13:58.569 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:13:58.569 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:13:58.569 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:13:58.569 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2278 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:13:58.569 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2278 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:13:58.569 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2278 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:13:58.569 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2278 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:13:58.569 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2278 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:14:03.574 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:14:03.574 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:14:03.575 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:14:03.576 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:14:03.577 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:14:03.578 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:14:03.587 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:14:03.587 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:14:03.587 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:14:03.588 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:14:03.588 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:14:03.590 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:14:03.590 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:14:03.590 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:14:03.590 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:14:03.590 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:14:03.590 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:14:03.590 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:14:03.590 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:14:03.592 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:14:03.592 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:14:03.593 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:14:03.593 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:14:03.593 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:14:03.593 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:14:03.593 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:14:03.593 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:14:03.595 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:14:03.595 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:14:03.595 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:14:03.595 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:14:03.595 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:14:03.595 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:14:03.595 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:14:03.595 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:14:03.598 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:14:03.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:14:03.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:14:03.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:14:03.598 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:14:03.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:14:03.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:14:03.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:14:03.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:14:03.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:03.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:03.598 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:14:03.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:03.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:03.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:03.599 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:14:03.599 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:14:03.599 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:14:03.599 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:14:03.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:03.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:03.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:03.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:14:03.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:03.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:03.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:03.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:03.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:03.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:03.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:03.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:03.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:03.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:03.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:03.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:03.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:03.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:03.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:03.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:03.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:03.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:03.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:03.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:03.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:03.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:03.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:03.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:03.603 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:14:04.088 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:14:04.118 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:14:04.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:14:04.120 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:14:04.121 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:14:04.566 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:14:04.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:14:04.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:14:04.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:14:04.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:14:05.045 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:14:05.524 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:14:05.603 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:14:05.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:14:05.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:14:05.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:14:06.002 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:14:06.481 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:14:06.604 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:14:06.605 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:14:06.605 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:14:06.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:14:06.960 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:14:07.438 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:14:07.605 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:14:07.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:14:07.606 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:14:07.606 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:14:07.917 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:14:08.396 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:14:08.606 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:14:08.606 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:14:08.607 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:14:08.607 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:14:08.874 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:14:09.353 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:14:09.832 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:14:10.310 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:14:10.788 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:14:11.267 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:14:11.746 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:14:12.224 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:14:12.703 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:14:13.182 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:14:13.661 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:14:14.133 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:14:14.133 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:14:14.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:14:14.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:14:14.134 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:14:14.134 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:14:14.134 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:14:14.134 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:14:14.134 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:14:14.134 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:14:14.134 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:14:19.139 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:14:19.139 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:14:19.142 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:14:19.143 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:14:19.143 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:14:19.144 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:14:19.154 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:14:19.157 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:14:19.157 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:14:19.157 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:14:19.157 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:14:19.164 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:14:19.164 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:14:19.165 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:14:19.165 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:14:19.165 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:14:19.166 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:14:19.166 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:14:19.166 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:14:19.171 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:14:19.171 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:14:19.172 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:14:19.172 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:14:19.172 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:14:19.172 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:14:19.172 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:14:19.172 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:14:19.175 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:14:19.175 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:14:19.176 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:14:19.176 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:14:19.176 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:14:19.176 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:14:19.176 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:14:19.176 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:14:19.181 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:14:19.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:14:19.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:14:19.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:14:19.181 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:14:19.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:14:19.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:14:19.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:14:19.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:19.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:14:19.182 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:14:19.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:19.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:19.182 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:14:19.182 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:14:19.182 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:14:19.182 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:14:19.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:19.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:19.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:19.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:14:19.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:19.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:19.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:19.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:19.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:19.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:19.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:19.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:19.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:19.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:19.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:19.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:19.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:19.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:19.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:19.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:19.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:19.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:19.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:19.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:19.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:19.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:19.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:19.185 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:14:19.185 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:14:19.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:19.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:19.185 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:14:19.185 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:14:19.185 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:14:19.185 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:14:19.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:24.191 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:14:24.191 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:14:24.192 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:14:24.193 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:14:24.194 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:14:24.195 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:14:24.203 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:14:24.205 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:14:24.205 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:14:24.205 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:14:24.205 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:14:24.209 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:14:24.209 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:14:24.209 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:14:24.209 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:14:24.209 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:14:24.209 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:14:24.209 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:14:24.209 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:14:24.212 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:14:24.212 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:14:24.213 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:14:24.213 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:14:24.213 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:14:24.213 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:14:24.213 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:14:24.213 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:14:24.216 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:14:24.216 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:14:24.216 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:14:24.216 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:14:24.216 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:14:24.216 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:14:24.216 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:14:24.216 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:14:24.221 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:14:24.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:14:24.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:14:24.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:14:24.221 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:14:24.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:14:24.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:14:24.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:14:24.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:14:24.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:24.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:24.222 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:14:24.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:24.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:24.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:24.222 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:14:24.222 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:14:24.222 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:14:24.222 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:14:24.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:24.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:24.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:24.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:14:24.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:24.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:24.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:24.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:24.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:24.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:24.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:24.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:24.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:24.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:24.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:24.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:24.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:24.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:24.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:24.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:24.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:24.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:24.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:24.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:24.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:24.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:24.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:24.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:24.227 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:14:24.711 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:14:24.745 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:14:24.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:14:24.747 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:14:24.749 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:14:24.751 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:14:24.751 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:14:24.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:14:24.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:14:24.751 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:14:24.751 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:14:24.751 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:14:24.751 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:14:25.189 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:14:25.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:14:25.227 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:14:25.227 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:14:25.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:14:25.666 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:14:26.144 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:14:26.227 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:14:26.228 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:14:26.228 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:14:26.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:14:26.622 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:14:27.100 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:14:27.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:14:27.230 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:14:27.230 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:14:27.230 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:14:27.578 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:14:28.055 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:14:28.231 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:14:28.231 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:14:28.231 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:14:28.231 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:14:28.531 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:14:29.009 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:14:29.232 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:14:29.232 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:14:29.232 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:14:29.232 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:14:29.487 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:14:29.965 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:14:30.443 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:14:30.921 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:14:31.399 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:14:31.876 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:14:32.354 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:14:32.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:14:32.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:14:32.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:14:32.763 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:14:32.763 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:14:32.763 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:14:32.764 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:14:32.764 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:14:32.764 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:14:32.764 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:14:32.764 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:14:32.764 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:14:32.764 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1824 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:14:32.764 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:14:32.764 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1824 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:14:32.764 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1824 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:14:32.764 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1824 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:14:32.764 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1824 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:14:32.764 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1824 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:14:37.769 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:14:37.769 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:14:37.771 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:14:37.772 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:14:37.773 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:14:37.774 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:14:37.782 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:14:37.783 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:14:37.783 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:14:37.783 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:14:37.783 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:14:37.785 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:14:37.786 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:14:37.786 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:14:37.786 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:14:37.786 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:14:37.786 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:14:37.787 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:14:37.787 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:14:37.788 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:14:37.789 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:14:37.789 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:14:37.789 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:14:37.789 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:14:37.789 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:14:37.789 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:14:37.789 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:14:37.791 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:14:37.791 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:14:37.791 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:14:37.791 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:14:37.791 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:14:37.792 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:14:37.792 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:14:37.792 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:14:37.795 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:14:37.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:14:37.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:14:37.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:14:37.795 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:14:37.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:14:37.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:14:37.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:14:37.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:37.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:14:37.796 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:14:37.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:37.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:37.796 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:14:37.796 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:14:37.796 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:14:37.796 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:14:37.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:37.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:37.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:37.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:14:37.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:37.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:37.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:37.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:37.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:37.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:37.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:37.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:37.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:37.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:37.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:37.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:37.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:37.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:37.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:37.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:37.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:37.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:37.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:37.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:37.797 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:14:37.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:37.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:37.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:37.798 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:14:37.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:37.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:37.798 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:14:37.798 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:14:37.798 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:14:37.798 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:14:37.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:42.804 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:14:42.804 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:14:42.805 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:14:42.806 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:14:42.806 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:14:42.810 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:14:42.817 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:14:42.818 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:14:42.818 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:14:42.818 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:14:42.818 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:14:42.820 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:14:42.821 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:14:42.821 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:14:42.821 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:14:42.821 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:14:42.821 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:14:42.821 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:14:42.822 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:14:42.823 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:14:42.823 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:14:42.823 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:14:42.823 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:14:42.823 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:14:42.823 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:14:42.823 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:14:42.823 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:14:42.825 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:14:42.825 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:14:42.825 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:14:42.825 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:14:42.826 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:14:42.826 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:14:42.826 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:14:42.826 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:14:42.828 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:14:42.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:14:42.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:14:42.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:14:42.828 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:14:42.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:14:42.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:14:42.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:14:42.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:14:42.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:42.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:42.829 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:14:42.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:42.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:42.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:42.829 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:14:42.829 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:14:42.829 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:14:42.829 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:14:42.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:42.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:42.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:42.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:14:42.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:42.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:42.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:42.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:42.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:42.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:42.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:42.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:42.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:42.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:42.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:42.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:42.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:42.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:42.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:42.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:42.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:42.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:42.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:42.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:42.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:42.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:42.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:42.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:42.834 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:14:43.315 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:14:43.351 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:14:43.353 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:14:43.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:14:43.355 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:14:43.358 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:14:43.358 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:14:43.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:14:43.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:14:43.360 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:14:43.360 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:14:43.360 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:14:43.360 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:14:43.793 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:14:43.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:14:43.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:14:43.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:14:43.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:14:44.271 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:14:44.749 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:14:44.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:14:44.849 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:14:44.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:14:44.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:14:45.227 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:14:45.704 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:14:45.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:14:45.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:14:45.850 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:14:45.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:14:46.183 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:14:46.661 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:14:46.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:14:46.851 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:14:46.851 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:14:46.851 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:14:47.138 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:14:47.616 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:14:47.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:14:47.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:14:47.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:14:47.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:14:48.094 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:14:48.571 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:14:49.049 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:14:49.527 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:14:50.005 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:14:50.483 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:14:50.961 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:14:51.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:14:51.410 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:14:51.415 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:14:51.415 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:14:51.415 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:14:51.415 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:14:51.416 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:14:51.416 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:14:51.416 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:14:51.416 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:14:51.416 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:14:51.416 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:14:51.416 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:14:51.417 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1834 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:14:51.417 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1834 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:14:51.417 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1834 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:14:51.417 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1834 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:14:51.417 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1834 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:14:51.417 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1834 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:14:56.420 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:14:56.420 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:14:56.422 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:14:56.423 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:14:56.424 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:14:56.425 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:14:56.431 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:14:56.432 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:14:56.432 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:14:56.432 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:14:56.432 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:14:56.435 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:14:56.435 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:14:56.436 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:14:56.436 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:14:56.436 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:14:56.436 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:14:56.437 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:14:56.437 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:14:56.439 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:14:56.439 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:14:56.439 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:14:56.439 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:14:56.439 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:14:56.440 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:14:56.440 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:14:56.440 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:14:56.442 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:14:56.442 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:14:56.443 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:14:56.443 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:14:56.443 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:14:56.443 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:14:56.443 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:14:56.443 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:14:56.447 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:14:56.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:14:56.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:14:56.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:14:56.447 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:14:56.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:14:56.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:14:56.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:14:56.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:56.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:14:56.448 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:14:56.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:56.448 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:14:56.448 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:14:56.448 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:14:56.448 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:14:56.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:56.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:56.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:56.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:14:56.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:56.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:56.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:56.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:56.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:56.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:56.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:56.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:56.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:56.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:56.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:56.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:56.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:56.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:56.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:56.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:56.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:56.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:56.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:14:56.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:56.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:56.451 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:14:56.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:56.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:56.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:14:56.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:14:56.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:14:56.451 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:14:56.451 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:14:56.451 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:14:56.451 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:14:56.451 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:14:56.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:01.457 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:15:01.457 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:15:01.458 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:15:01.459 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:15:01.460 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:15:01.460 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:15:01.467 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:15:01.469 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:15:01.469 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:15:01.470 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:15:01.470 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:15:01.474 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:15:01.474 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:15:01.475 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:15:01.475 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:15:01.475 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:15:01.476 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:15:01.476 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:15:01.476 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:15:01.479 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:15:01.479 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:15:01.480 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:15:01.480 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:15:01.480 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:15:01.480 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:15:01.480 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:15:01.481 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:15:01.484 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:15:01.484 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:15:01.484 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:15:01.484 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:15:01.484 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:15:01.485 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:15:01.485 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:15:01.485 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:15:01.490 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:15:01.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:15:01.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:15:01.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:15:01.490 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:15:01.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:15:01.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:15:01.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:15:01.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:01.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:15:01.491 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:15:01.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:01.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:01.491 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:15:01.491 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:15:01.491 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:15:01.491 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:15:01.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:01.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:01.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:01.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:15:01.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:01.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:01.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:01.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:01.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:01.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:01.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:01.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:01.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:01.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:01.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:01.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:01.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:01.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:01.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:01.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:01.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:01.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:01.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:01.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:01.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:01.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:01.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:01.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:01.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:01.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:01.496 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:15:01.981 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:15:02.011 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:15:02.012 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:15:02.013 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:15:02.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:15:02.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:15:02.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:15:02.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:15:02.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:15:02.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:15:02.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:15:02.016 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:15:02.016 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:15:02.458 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:15:02.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:15:02.496 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:15:02.496 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:15:02.496 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:15:02.936 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:15:03.414 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:15:03.497 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:15:03.498 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:15:03.498 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:15:03.498 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:15:03.892 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:15:04.369 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:15:04.498 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:15:04.499 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:15:04.499 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:15:04.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:15:04.847 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:15:05.325 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:15:05.500 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:15:05.500 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:15:05.500 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:15:05.500 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:15:05.803 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:15:06.281 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:15:06.501 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:15:06.501 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:15:06.501 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:15:06.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:15:06.758 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:15:07.237 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:15:07.714 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:15:08.192 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:15:08.670 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:15:09.148 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:15:09.626 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:15:10.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:15:10.028 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:15:10.033 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:15:10.034 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:15:10.034 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:15:10.034 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:15:10.038 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:15:10.038 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:15:10.038 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:15:10.038 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:15:10.038 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:15:10.038 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:15:10.038 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:15:10.038 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1825 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:15:10.038 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1825 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:15:10.038 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1825 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:15:10.038 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1825 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:15:10.038 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1825 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:15:10.038 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1825 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:15:15.040 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:15:15.040 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:15:15.042 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:15:15.043 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:15:15.043 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:15:15.043 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:15:15.052 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:15:15.053 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:15:15.053 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:15:15.054 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:15:15.054 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:15:15.058 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:15:15.059 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:15:15.059 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:15:15.059 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:15:15.059 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:15:15.060 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:15:15.060 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:15:15.060 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:15:15.063 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:15:15.063 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:15:15.063 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:15:15.063 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:15:15.064 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:15:15.064 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:15:15.064 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:15:15.064 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:15:15.067 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:15:15.067 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:15:15.068 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:15:15.068 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:15:15.068 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:15:15.068 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:15:15.068 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:15:15.068 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:15:15.072 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:15:15.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:15:15.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:15:15.072 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:15:15.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:15:15.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:15:15.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:15:15.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:15:15.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:15.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:15:15.073 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:15:15.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:15.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:15.073 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:15:15.073 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:15:15.073 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:15:15.073 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:15:15.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:15.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:15.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:15.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:15:15.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:15.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:15.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:15.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:15.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:15.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:15.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:15.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:15.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:15.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:15.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:15.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:15.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:15.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:15.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:15.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:15.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:15.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:15.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:15.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:15.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:15.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:15.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:15.076 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:15:15.076 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:15:15.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:15.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:15.076 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:15:15.076 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:15:15.076 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:15:15.076 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:15:15.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:20.082 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:15:20.083 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:15:20.083 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:15:20.084 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:15:20.085 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:15:20.086 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:15:20.096 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:15:20.097 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:15:20.097 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:15:20.098 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:15:20.098 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:15:20.104 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:15:20.104 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:15:20.105 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:15:20.105 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:15:20.105 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:15:20.106 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:15:20.106 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:15:20.106 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:15:20.109 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:15:20.109 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:15:20.109 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:15:20.109 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:15:20.110 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:15:20.110 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:15:20.110 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:15:20.110 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:15:20.113 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:15:20.113 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:15:20.113 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:15:20.113 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:15:20.113 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:15:20.113 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:15:20.113 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:15:20.113 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:15:20.119 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:15:20.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:15:20.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:15:20.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:15:20.119 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:15:20.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:15:20.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:15:20.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:15:20.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:20.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:15:20.120 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:15:20.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:20.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:20.120 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:15:20.120 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:15:20.120 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:15:20.120 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:15:20.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:20.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:20.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:20.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:15:20.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:20.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:20.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:20.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:20.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:20.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:20.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:20.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:20.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:20.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:20.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:20.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:20.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:20.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:20.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:20.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:20.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:20.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:20.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:20.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:20.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:20.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:20.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:20.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:20.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:20.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:20.125 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:15:20.608 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:15:20.641 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:15:20.643 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:15:20.645 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:15:20.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:15:20.648 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:15:20.648 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:15:20.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:15:20.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:15:20.649 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:15:20.650 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:15:20.650 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:15:20.650 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:15:21.085 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:15:21.123 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:15:21.123 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:15:21.124 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:15:21.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:15:21.563 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:15:22.041 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:15:22.124 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:15:22.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:15:22.125 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:15:22.125 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:15:22.519 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:15:22.997 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:15:23.126 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:15:23.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:15:23.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:15:23.126 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:15:23.475 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:15:23.952 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:15:24.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:15:24.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:15:24.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:15:24.127 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:15:24.430 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:15:24.908 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:15:25.128 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:15:25.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:15:25.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:15:25.128 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:15:25.386 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:15:25.864 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:15:26.342 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:15:26.820 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:15:27.298 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:15:27.776 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:15:28.254 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:15:28.702 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:15:28.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:15:28.704 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:15:28.704 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:15:28.704 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:15:28.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:15:28.705 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:15:28.705 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:15:28.705 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:15:28.705 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:15:28.705 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:15:28.705 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:15:28.705 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:15:33.709 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:15:33.709 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:15:33.711 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:15:33.712 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:15:33.712 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:15:33.713 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:15:33.722 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:15:33.724 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:15:33.724 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:15:33.724 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:15:33.724 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:15:33.728 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:15:33.728 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:15:33.728 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:15:33.728 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:15:33.729 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:15:33.729 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:15:33.729 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:15:33.729 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:15:33.731 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:15:33.731 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:15:33.731 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:15:33.731 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:15:33.732 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:15:33.732 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:15:33.732 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:15:33.732 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:15:33.734 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:15:33.734 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:15:33.735 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:15:33.735 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:15:33.735 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:15:33.735 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:15:33.735 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:15:33.735 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:15:33.738 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:15:33.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:15:33.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:15:33.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:15:33.738 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:15:33.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:15:33.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:15:33.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:15:33.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:15:33.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:33.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:33.739 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:15:33.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:33.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:33.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:33.739 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:15:33.739 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:15:33.739 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:15:33.739 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:15:33.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:33.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:33.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:33.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:15:33.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:33.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:33.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:33.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:33.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:33.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:33.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:33.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:33.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:33.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:33.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:33.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:33.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:33.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:33.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:33.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:33.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:33.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:33.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:33.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:33.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:33.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:33.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:33.741 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:15:33.741 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:15:33.741 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:15:33.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:33.741 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:15:33.741 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:15:33.741 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:15:33.741 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:15:38.746 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:15:38.746 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:15:38.748 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:15:38.749 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:15:38.750 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:15:38.750 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:15:38.757 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:15:38.758 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:15:38.759 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:15:38.759 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:15:38.759 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:15:38.762 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:15:38.762 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:15:38.762 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:15:38.762 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:15:38.763 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:15:38.763 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:15:38.763 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:15:38.763 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:15:38.765 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:15:38.765 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:15:38.765 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:15:38.765 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:15:38.766 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:15:38.766 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:15:38.766 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:15:38.766 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:15:38.768 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:15:38.768 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:15:38.768 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:15:38.768 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:15:38.768 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:15:38.768 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:15:38.768 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:15:38.768 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:15:38.772 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:15:38.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:15:38.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:15:38.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:15:38.772 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:15:38.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:15:38.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:15:38.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:15:38.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:38.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:15:38.772 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:15:38.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:38.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:38.773 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:15:38.773 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:15:38.773 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:15:38.773 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:15:38.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:38.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:38.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:38.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:15:38.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:38.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:38.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:38.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:38.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:38.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:38.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:38.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:38.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:38.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:38.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:38.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:38.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:38.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:38.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:38.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:38.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:38.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:38.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:38.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:38.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:38.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:38.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:38.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:38.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:38.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:38.777 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:15:39.261 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:15:39.290 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:15:39.291 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:15:39.292 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:15:39.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:15:39.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:15:39.294 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:15:39.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:15:39.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:15:39.295 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:15:39.295 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:15:39.295 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:15:39.295 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:15:39.738 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:15:39.776 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:15:39.776 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:15:39.777 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:15:39.777 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:15:40.216 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:15:40.694 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:15:40.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:15:40.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:15:40.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:15:40.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:15:41.172 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:15:41.650 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:15:41.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:15:41.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:15:41.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:15:41.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:15:42.128 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:15:42.606 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:15:42.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:15:42.781 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:15:42.781 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:15:42.781 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:15:43.084 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:15:43.563 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:15:43.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:15:43.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:15:43.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:15:43.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:15:44.041 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:15:44.519 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:15:44.997 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:15:45.475 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:15:45.953 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:15:46.431 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:15:46.908 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:15:47.386 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:15:47.864 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:15:48.342 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:15:48.819 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:15:49.298 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:15:49.776 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:15:50.253 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:15:50.731 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:15:51.209 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:15:51.687 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:15:52.165 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:15:52.643 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:15:53.120 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:15:53.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:15:53.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:15:53.313 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:15:53.313 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:15:53.313 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:15:53.313 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:15:53.314 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:15:53.314 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:15:53.314 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:15:53.314 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:15:53.314 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:15:53.314 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:15:53.315 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:15:53.315 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3104 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:15:53.315 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3104 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:15:53.315 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3104 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:15:53.315 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3104 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:15:53.315 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3104 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:15:53.315 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3104 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:15:53.315 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3104 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:15:53.315 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3104 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:15:58.318 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:15:58.318 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:15:58.320 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:15:58.320 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:15:58.321 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:15:58.321 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:15:58.330 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:15:58.331 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:15:58.331 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:15:58.331 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:15:58.331 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:15:58.337 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:15:58.337 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:15:58.338 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:15:58.338 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:15:58.338 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:15:58.338 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:15:58.339 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:15:58.339 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:15:58.341 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:15:58.342 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:15:58.342 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:15:58.342 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:15:58.342 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:15:58.342 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:15:58.342 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:15:58.342 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:15:58.345 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:15:58.346 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:15:58.346 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:15:58.346 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:15:58.346 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:15:58.346 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:15:58.346 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:15:58.346 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:15:58.351 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:15:58.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:15:58.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:15:58.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:15:58.351 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:15:58.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:15:58.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:15:58.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:15:58.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:58.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:15:58.352 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:15:58.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:58.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:58.352 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:15:58.352 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:15:58.352 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:15:58.353 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:15:58.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:58.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:58.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:58.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:15:58.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:58.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:58.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:58.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:58.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:58.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:58.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:58.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:58.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:58.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:58.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:58.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:58.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:58.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:58.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:58.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:15:58.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:58.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:58.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:58.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:58.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:58.355 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:15:58.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:15:58.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:15:58.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:15:58.355 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:15:58.355 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:15:58.355 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:15:58.355 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:15:58.355 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:15:58.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:03.361 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:16:03.361 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:16:03.363 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:16:03.364 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:16:03.365 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:16:03.366 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:16:03.376 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:16:03.377 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:16:03.377 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:16:03.377 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:16:03.377 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:16:03.379 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:16:03.379 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:16:03.379 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:16:03.379 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:16:03.379 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:16:03.380 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:16:03.380 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:16:03.380 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:16:03.381 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:16:03.381 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:16:03.381 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:16:03.381 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:16:03.381 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:16:03.381 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:16:03.381 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:16:03.381 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:16:03.385 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:16:03.385 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:16:03.385 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:16:03.385 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:16:03.385 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:16:03.385 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:16:03.385 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:16:03.385 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:16:03.388 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:16:03.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:16:03.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:16:03.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:16:03.388 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:16:03.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:16:03.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:16:03.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:16:03.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:03.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:16:03.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:03.388 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:16:03.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:03.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:03.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:03.389 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:16:03.389 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:16:03.389 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:16:03.389 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:16:03.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:03.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:03.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:03.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:16:03.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:03.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:03.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:03.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:03.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:03.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:03.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:03.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:03.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:03.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:03.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:03.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:03.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:03.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:03.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:03.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:03.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:03.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:03.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:03.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:03.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:03.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:03.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:03.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:03.393 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:16:03.877 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:16:03.904 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:16:03.905 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:16:03.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:16:03.906 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:16:03.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:16:03.907 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:16:03.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:16:03.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:16:03.908 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:16:03.908 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:16:03.908 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:16:03.908 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:16:04.352 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:16:04.391 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:16:04.391 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:16:04.391 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:16:04.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:16:04.823 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:16:05.295 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:16:05.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:16:05.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:16:05.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:16:05.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:16:05.766 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:16:06.238 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:16:06.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:16:06.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:16:06.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:16:06.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:16:06.712 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:16:07.183 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:16:07.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:16:07.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:16:07.394 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:16:07.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:16:07.653 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:16:08.124 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:16:08.394 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:16:08.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:16:08.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:16:08.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:16:08.594 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:16:09.066 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:16:09.539 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:16:10.013 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:16:10.487 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:16:10.961 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:16:11.432 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:16:11.903 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:16:11.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:16:11.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:16:11.931 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:16:11.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:16:11.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:16:11.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:16:11.933 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:16:11.933 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:16:11.933 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:16:11.933 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:16:11.933 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:16:11.933 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:16:11.934 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:16:16.935 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:16:16.935 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:16:16.936 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:16:16.938 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:16:16.938 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:16:16.939 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:16:16.944 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:16:16.944 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:16:16.944 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:16:16.945 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:16:16.945 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:16:16.946 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:16:16.946 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:16:16.946 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:16:16.946 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:16:16.947 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:16:16.947 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:16:16.947 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:16:16.947 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:16:16.948 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:16:16.949 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:16:16.949 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:16:16.949 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:16:16.949 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:16:16.949 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:16:16.949 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:16:16.949 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:16:16.951 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:16:16.951 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:16:16.951 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:16:16.951 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:16:16.951 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:16:16.951 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:16:16.951 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:16:16.951 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:16:16.954 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:16:16.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:16:16.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:16:16.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:16:16.954 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:16:16.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:16:16.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:16:16.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:16:16.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:16:16.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:16.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:16.954 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:16:16.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:16.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:16.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:16.954 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:16:16.954 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:16:16.954 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:16:16.954 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:16:16.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:16.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:16.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:16.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:16:16.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:16.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:16.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:16.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:16.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:16.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:16.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:16.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:16.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:16.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:16.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:16.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:16.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:16.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:16.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:16.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:16.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:16.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:16.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:16.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:16.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:16.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:16.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:16.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:16.957 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:16:16.957 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:16:16.957 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:16:16.957 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:16:16.957 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:16:16.957 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:16:16.957 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:16:21.959 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:16:21.959 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:16:21.960 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:16:21.962 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:16:21.963 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:16:21.965 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:16:21.974 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:16:21.975 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:16:21.975 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:16:21.975 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:16:21.975 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:16:21.978 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:16:21.978 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:16:21.978 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:16:21.978 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:16:21.978 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:16:21.978 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:16:21.978 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:16:21.978 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:16:21.980 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:16:21.980 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:16:21.980 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:16:21.980 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:16:21.980 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:16:21.980 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:16:21.980 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:16:21.980 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:16:21.982 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:16:21.982 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:16:21.982 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:16:21.982 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:16:21.982 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:16:21.982 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:16:21.982 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:16:21.982 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:16:21.985 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:16:21.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:16:21.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:16:21.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:16:21.985 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:16:21.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:16:21.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:16:21.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:16:21.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:21.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:16:21.985 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:16:21.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:21.986 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:16:21.986 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:16:21.986 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:16:21.986 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:16:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:21.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:16:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:21.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:21.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:21.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:21.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:21.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:21.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:21.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:21.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:21.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:21.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:21.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:21.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:21.990 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:16:22.461 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:16:22.498 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:16:22.499 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:16:22.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:16:22.500 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:16:22.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:16:22.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:16:22.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:16:22.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:16:22.501 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:16:22.501 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:16:22.502 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:16:22.502 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:16:22.932 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:16:22.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:16:22.989 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:16:22.989 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:16:22.989 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:16:23.410 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:16:23.887 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:16:23.989 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:16:23.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:16:23.990 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:16:23.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:16:24.358 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:16:24.826 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:16:24.989 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:16:24.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:16:24.990 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:16:24.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:16:25.296 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:16:25.768 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:16:25.989 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:16:25.991 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:16:25.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:16:25.991 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:16:26.238 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:16:26.708 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:16:26.990 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:16:26.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:16:26.991 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:16:26.991 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:16:27.177 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:16:27.648 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:16:28.123 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:16:28.596 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:16:29.071 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:16:29.545 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:16:30.023 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:16:30.500 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:16:30.975 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:16:31.451 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:16:31.923 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:16:32.393 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:16:32.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:16:32.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:16:32.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:16:32.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:16:32.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:16:32.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:16:32.521 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:16:32.521 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:16:32.521 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:16:32.521 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:16:32.522 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:16:32.522 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:16:32.522 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:16:32.522 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2274 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:16:32.522 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2274 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:16:32.523 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2274 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:16:32.523 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2274 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:16:32.523 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2274 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:16:32.523 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2274 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:16:32.523 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2274 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:16:32.523 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2274 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:16:37.518 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:16:37.518 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:16:37.519 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:16:37.520 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:16:37.522 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:16:37.523 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:16:37.530 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:16:37.530 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:16:37.530 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:16:37.531 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:16:37.531 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:16:37.532 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:16:37.533 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:16:37.533 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:16:37.533 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:16:37.533 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:16:37.533 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:16:37.533 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:16:37.533 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:16:37.535 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:16:37.535 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:16:37.535 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:16:37.535 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:16:37.535 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:16:37.535 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:16:37.535 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:16:37.535 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:16:37.536 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:16:37.536 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:16:37.536 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:16:37.536 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:16:37.536 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:16:37.537 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:16:37.537 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:16:37.537 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:16:37.539 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:16:37.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:16:37.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:16:37.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:16:37.539 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:16:37.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:16:37.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:16:37.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:16:37.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:37.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:16:37.540 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:16:37.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:37.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:37.540 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:16:37.540 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:16:37.540 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:16:37.540 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:16:37.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:37.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:37.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:37.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:16:37.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:37.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:37.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:37.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:37.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:37.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:37.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:37.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:37.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:37.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:37.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:37.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:37.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:37.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:37.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:37.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:37.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:37.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:37.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:37.541 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:16:37.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:37.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:37.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:37.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:37.541 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:16:37.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:37.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:37.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:37.541 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:16:37.541 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:16:37.541 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:16:37.541 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:16:37.541 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:16:42.546 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:16:42.546 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:16:42.549 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:16:42.553 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:16:42.556 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:16:42.558 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:16:42.567 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:16:42.568 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:16:42.568 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:16:42.568 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:16:42.568 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:16:42.570 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:16:42.571 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:16:42.571 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:16:42.571 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:16:42.571 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:16:42.571 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:16:42.571 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:16:42.571 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:16:42.574 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:16:42.574 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:16:42.574 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:16:42.574 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:16:42.574 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:16:42.574 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:16:42.574 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:16:42.574 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:16:42.576 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:16:42.577 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:16:42.577 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:16:42.577 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:16:42.577 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:16:42.577 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:16:42.577 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:16:42.577 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:16:42.580 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:16:42.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:16:42.580 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:16:42.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:16:42.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:16:42.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:16:42.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:16:42.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:16:42.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:16:42.581 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:16:42.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:42.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:42.581 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:16:42.581 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:16:42.581 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:16:42.581 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:16:42.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:42.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:42.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:42.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:16:42.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:42.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:42.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:42.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:42.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:42.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:42.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:42.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:42.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:42.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:42.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:42.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:42.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:42.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:42.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:42.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:42.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:42.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:42.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:42.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:42.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:42.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:42.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:42.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:42.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:42.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:42.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:42.586 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:16:43.059 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:16:43.098 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:16:43.099 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:16:43.100 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:16:43.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:16:43.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:16:43.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:16:43.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:16:43.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:16:43.101 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:16:43.101 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:16:43.101 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:16:43.101 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:16:43.529 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:16:43.583 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:16:43.584 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:16:43.587 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:16:43.588 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:16:44.007 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:16:44.483 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:16:44.585 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:16:44.585 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:16:44.587 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:16:44.589 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:16:44.958 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:16:45.430 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:16:45.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:16:45.587 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:16:45.588 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:16:45.590 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:16:45.905 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:16:46.376 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:16:46.588 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:16:46.588 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:16:46.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:16:46.591 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:16:46.847 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:16:47.319 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:16:47.588 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:16:47.588 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:16:47.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:16:47.593 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:16:47.791 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:16:48.262 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:16:48.736 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:16:49.205 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:16:49.674 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:16:50.146 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:16:50.621 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:16:51.095 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:16:51.566 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:16:52.036 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:16:52.508 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:16:52.984 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:16:53.458 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:16:53.929 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:16:54.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:16:54.153 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:16:54.158 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:16:54.159 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:16:54.159 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:16:54.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:16:54.162 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:16:54.162 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:16:54.162 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:16:54.162 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:16:54.162 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:16:54.162 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:16:54.162 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:16:59.162 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:16:59.162 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:16:59.163 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:16:59.164 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:16:59.165 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:16:59.167 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:16:59.174 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:16:59.175 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:16:59.175 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:16:59.175 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:16:59.175 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:16:59.179 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:16:59.180 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:16:59.180 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:16:59.180 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:16:59.180 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:16:59.180 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:16:59.180 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:16:59.180 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:16:59.181 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:16:59.181 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:16:59.182 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:16:59.182 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:16:59.182 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:16:59.182 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:16:59.182 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:16:59.182 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:16:59.184 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:16:59.184 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:16:59.184 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:16:59.184 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:16:59.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:16:59.184 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:16:59.184 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:16:59.184 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:16:59.187 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:16:59.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:16:59.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:16:59.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:16:59.187 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:16:59.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:16:59.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:16:59.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:16:59.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:16:59.188 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:16:59.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:59.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:59.188 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:16:59.188 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:16:59.188 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:16:59.188 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:16:59.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:59.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:59.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:59.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:16:59.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:59.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:59.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:59.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:59.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:59.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:59.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:59.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:59.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:59.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:59.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:59.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:59.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:59.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:59.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:59.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:59.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:59.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:59.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:59.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:59.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:16:59.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:59.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:59.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:16:59.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:16:59.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:59.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:16:59.190 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:16:59.190 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:16:59.190 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:16:59.190 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:16:59.190 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:16:59.190 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:16:59.190 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:17:04.195 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:17:04.195 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:17:04.197 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:17:04.198 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:17:04.198 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:17:04.199 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:17:04.209 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:17:04.209 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:17:04.209 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:17:04.210 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:17:04.210 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:17:04.212 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:17:04.212 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:17:04.212 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:17:04.212 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:17:04.213 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:17:04.213 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:17:04.213 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:17:04.213 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:17:04.215 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:17:04.216 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:17:04.216 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:17:04.216 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:17:04.216 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:17:04.216 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:17:04.216 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:17:04.216 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:17:04.218 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:17:04.219 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:17:04.219 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:17:04.219 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:17:04.219 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:17:04.219 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:17:04.219 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:17:04.219 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:17:04.223 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:17:04.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:17:04.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:17:04.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:17:04.223 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:17:04.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:17:04.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:17:04.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:17:04.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:04.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:17:04.224 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:17:04.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:04.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:04.224 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:17:04.224 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:17:04.224 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:17:04.224 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:17:04.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:04.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:04.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:04.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:17:04.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:04.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:04.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:04.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:04.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:04.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:04.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:04.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:04.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:04.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:04.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:04.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:04.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:04.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:04.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:04.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:04.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:04.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:04.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:04.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:04.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:04.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:04.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:04.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:04.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:04.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:04.229 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:17:04.712 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:17:04.744 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:17:04.745 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:17:04.746 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:17:04.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:17:04.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:17:04.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:17:04.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:17:04.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:17:04.748 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:17:04.748 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:17:04.749 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:17:04.749 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:17:05.189 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:17:05.227 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:17:05.227 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:17:05.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:17:05.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:17:05.667 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:17:06.145 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:17:06.228 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:17:06.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:17:06.228 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:17:06.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:17:06.623 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:17:07.101 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:17:07.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:17:07.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:17:07.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:17:07.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:17:07.580 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:17:08.057 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:17:08.230 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:17:08.230 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:17:08.230 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:17:08.230 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:17:08.534 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:17:09.012 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:17:09.230 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:17:09.231 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:17:09.231 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:17:09.231 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:17:09.490 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:17:09.967 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:17:10.445 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:17:10.923 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:17:11.401 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:17:11.879 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:17:12.346 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:17:12.815 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:17:13.286 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:17:13.756 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:17:14.224 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:17:14.692 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:17:15.160 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:17:15.629 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:17:16.102 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:17:16.573 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:17:17.042 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:17:17.510 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:17:17.980 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:17:18.449 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:17:18.917 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:17:19.385 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:17:19.854 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 04:17:20.323 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 04:17:20.791 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 04:17:21.259 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 04:17:21.728 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 04:17:22.196 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 04:17:22.665 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 04:17:23.134 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 04:17:23.604 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 04:17:24.072 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 04:17:24.541 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 04:17:24.761 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:17:24.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:17:24.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:17:24.763 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:17:24.763 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:17:24.763 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:17:24.764 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:17:24.764 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:17:24.764 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:17:24.764 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:17:24.764 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:17:24.764 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:17:24.764 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:17:29.765 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:17:29.765 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:17:29.766 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:17:29.767 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:17:29.768 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:17:29.769 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:17:29.783 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:17:29.784 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:17:29.784 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:17:29.784 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:17:29.784 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:17:29.787 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:17:29.788 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:17:29.788 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:17:29.788 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:17:29.788 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:17:29.788 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:17:29.788 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:17:29.788 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:17:29.792 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:17:29.792 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:17:29.792 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:17:29.792 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:17:29.792 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:17:29.792 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:17:29.793 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:17:29.793 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:17:29.795 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:17:29.795 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:17:29.796 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:17:29.796 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:17:29.796 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:17:29.796 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:17:29.796 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:17:29.796 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:17:29.801 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:17:29.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:17:29.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:17:29.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:17:29.802 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:17:29.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:17:29.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:17:29.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:17:29.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:17:29.802 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:17:29.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:29.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:29.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:29.802 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:17:29.802 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:17:29.802 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:17:29.802 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:17:29.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:29.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:29.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:29.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:17:29.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:29.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:29.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:29.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:29.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:29.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:29.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:29.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:29.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:29.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:29.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:29.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:29.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:29.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:29.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:29.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:29.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:29.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:29.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:29.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:29.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:29.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:29.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:29.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:29.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:29.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:29.805 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:17:29.805 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:17:29.805 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:17:29.805 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:17:29.805 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:17:29.805 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:17:29.805 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:17:34.807 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:17:34.807 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:17:34.807 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:17:34.808 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:17:34.809 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:17:34.810 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:17:34.816 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:17:34.817 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:17:34.817 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:17:34.817 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:17:34.817 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:17:34.820 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:17:34.820 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:17:34.820 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:17:34.820 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:17:34.820 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:17:34.820 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:17:34.820 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:17:34.820 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:17:34.822 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:17:34.823 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:17:34.823 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:17:34.823 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:17:34.823 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:17:34.823 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:17:34.823 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:17:34.823 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:17:34.825 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:17:34.825 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:17:34.826 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:17:34.826 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:17:34.826 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:17:34.826 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:17:34.826 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:17:34.826 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:17:34.830 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:17:34.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:17:34.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:17:34.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:17:34.830 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:17:34.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:17:34.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:17:34.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:17:34.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:17:34.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:34.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:34.831 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:17:34.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:34.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:34.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:34.831 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:17:34.831 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:17:34.831 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:17:34.831 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:17:34.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:34.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:34.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:34.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:17:34.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:34.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:34.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:34.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:34.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:34.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:34.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:34.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:34.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:34.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:34.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:34.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:34.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:34.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:34.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:34.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:34.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:34.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:34.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:34.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:34.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:34.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:34.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:34.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:34.835 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:17:35.305 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:17:35.343 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:17:35.344 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:17:35.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:17:35.345 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:17:35.773 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:17:35.834 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:17:35.834 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:17:35.834 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:17:35.834 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:17:36.242 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:17:36.710 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:17:36.834 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:17:36.834 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:17:36.834 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:17:36.834 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:17:37.178 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:17:37.646 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:17:37.835 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:17:37.835 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:17:37.835 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:17:37.835 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:17:38.116 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:17:38.584 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:17:38.836 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:17:38.836 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:17:38.836 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:17:38.836 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:17:39.052 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:17:39.521 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:17:39.836 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:17:39.836 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:17:39.837 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:17:39.837 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:17:39.990 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:17:40.460 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:17:40.931 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:17:41.400 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:17:41.867 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:17:42.337 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:17:42.806 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:17:43.274 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:17:43.742 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:17:44.212 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:17:44.681 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:17:45.150 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:17:45.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:17:45.349 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:17:45.349 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:17:45.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:17:45.350 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:17:45.350 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:17:45.350 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:17:45.350 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:17:45.350 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:17:45.350 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:17:45.351 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:17:45.351 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2289 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:17:45.351 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2289 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:17:45.351 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2289 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:17:45.351 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2289 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:17:45.351 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2289 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:17:50.350 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:17:50.351 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:17:50.351 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:17:50.352 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:17:50.352 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:17:50.353 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:17:50.360 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:17:50.360 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:17:50.360 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:17:50.360 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:17:50.360 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:17:50.362 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:17:50.362 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:17:50.362 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:17:50.362 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:17:50.362 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:17:50.362 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:17:50.363 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:17:50.363 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:17:50.365 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:17:50.365 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:17:50.365 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:17:50.365 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:17:50.365 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:17:50.365 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:17:50.365 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:17:50.365 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:17:50.367 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:17:50.367 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:17:50.367 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:17:50.367 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:17:50.368 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:17:50.368 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:17:50.368 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:17:50.368 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:17:50.371 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:17:50.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:17:50.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:17:50.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:17:50.371 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:17:50.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:17:50.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:17:50.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:17:50.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:50.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:17:50.372 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:17:50.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:50.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:50.372 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:17:50.372 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:17:50.372 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:17:50.372 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:17:50.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:50.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:50.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:50.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:17:50.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:50.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:50.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:50.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:50.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:50.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:50.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:50.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:50.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:50.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:50.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:50.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:50.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:50.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:50.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:50.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:50.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:50.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:50.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:50.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:50.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:50.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:50.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:50.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:50.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:50.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:50.375 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:17:50.375 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:17:50.375 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:17:50.375 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:17:50.375 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:17:50.375 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:17:50.375 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:17:55.376 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:17:55.377 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:17:55.377 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:17:55.377 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:17:55.378 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:17:55.379 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:17:55.384 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:17:55.385 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:17:55.385 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:17:55.385 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:17:55.385 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:17:55.386 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:17:55.386 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:17:55.386 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:17:55.386 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:17:55.386 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:17:55.386 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:17:55.386 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:17:55.386 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:17:55.388 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:17:55.388 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:17:55.388 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:17:55.388 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:17:55.388 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:17:55.388 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:17:55.388 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:17:55.388 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:17:55.391 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:17:55.391 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:17:55.391 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:17:55.391 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:17:55.391 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:17:55.391 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:17:55.391 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:17:55.391 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:17:55.394 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:17:55.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:17:55.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:17:55.395 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:17:55.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:17:55.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:17:55.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:17:55.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:17:55.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:55.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:17:55.395 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:17:55.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:55.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:55.395 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:17:55.395 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:17:55.395 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:17:55.395 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:17:55.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:55.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:55.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:55.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:17:55.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:55.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:55.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:55.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:55.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:55.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:55.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:55.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:55.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:55.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:55.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:55.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:55.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:55.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:55.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:55.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:55.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:55.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:17:55.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:55.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:55.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:55.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:17:55.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:55.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:17:55.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:55.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:17:55.400 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:17:55.869 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:17:55.914 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:17:55.916 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:17:55.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:17:55.916 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:17:56.338 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:17:56.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:17:56.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:17:56.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:17:56.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:17:56.807 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:17:57.278 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:17:57.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:17:57.400 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:17:57.400 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:17:57.400 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:17:57.747 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:17:58.215 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:17:58.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:17:58.400 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:17:58.400 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:17:58.400 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:17:58.683 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:17:59.151 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:17:59.400 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:17:59.401 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:17:59.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:17:59.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:17:59.622 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:18:00.095 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:18:00.400 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:18:00.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:18:00.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:18:00.402 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:18:00.565 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:18:01.033 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:18:01.504 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:18:01.974 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:18:02.445 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:18:02.915 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:18:03.386 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:18:03.855 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:18:04.323 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:18:04.790 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:18:05.258 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:18:05.729 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:18:06.201 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:18:06.672 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:18:07.142 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:18:07.614 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:18:07.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:18:07.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:18:07.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:18:07.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:18:07.937 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:18:07.938 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:18:07.938 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:18:07.938 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:18:07.938 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:18:07.939 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:18:07.939 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:18:07.939 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2725 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:18:07.939 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2725 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:18:12.931 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:18:12.931 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:18:12.932 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:18:12.932 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:18:12.933 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:18:12.933 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:18:12.938 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:18:12.939 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:18:12.939 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:18:12.939 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:18:12.939 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:18:12.940 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:18:12.940 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:18:12.940 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:18:12.940 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:18:12.940 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:18:12.941 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:18:12.941 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:18:12.941 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:18:12.942 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:18:12.942 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:18:12.942 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:18:12.942 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:18:12.942 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:18:12.942 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:18:12.942 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:18:12.942 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:18:12.944 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:18:12.944 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:18:12.944 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:18:12.944 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:18:12.944 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:18:12.944 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:18:12.944 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:18:12.944 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:18:12.946 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:18:12.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:18:12.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:18:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:18:12.947 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:18:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:18:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:18:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:18:12.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:18:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:12.947 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:18:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:12.947 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:18:12.947 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:18:12.947 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:18:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:12.947 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:18:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:12.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:18:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:12.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:12.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:12.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:12.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:12.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:12.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:12.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:12.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:12.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:12.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:12.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:12.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:12.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:12.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:12.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:12.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:12.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:12.949 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:18:12.949 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:18:12.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:12.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:12.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:12.949 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:18:12.949 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:18:12.949 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:18:12.949 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:18:12.949 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:18:17.951 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:18:17.951 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:18:17.952 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:18:17.953 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:18:17.954 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:18:17.955 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:18:17.960 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:18:17.960 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:18:17.960 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:18:17.961 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:18:17.961 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:18:17.962 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:18:17.962 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:18:17.962 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:18:17.962 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:18:17.962 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:18:17.962 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:18:17.962 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:18:17.962 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:18:17.964 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:18:17.964 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:18:17.964 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:18:17.964 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:18:17.964 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:18:17.964 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:18:17.964 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:18:17.964 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:18:17.966 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:18:17.966 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:18:17.966 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:18:17.966 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:18:17.966 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:18:17.966 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:18:17.966 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:18:17.966 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:18:17.969 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:18:17.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:18:17.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:18:17.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:18:17.969 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:18:17.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:18:17.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:18:17.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:18:17.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:18:17.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:17.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:17.969 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:18:17.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:17.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:17.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:17.969 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:18:17.969 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:18:17.969 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:18:17.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:17.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:17.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:17.970 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:18:17.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:18:17.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:17.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:17.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:17.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:17.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:17.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:17.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:17.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:17.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:17.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:17.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:17.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:17.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:17.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:17.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:17.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:17.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:17.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:17.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:17.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:17.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:17.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:17.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:17.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:17.974 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:18:18.445 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:18:18.484 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:18:18.484 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:18:18.485 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:18:18.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:18:18.486 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:18:18.486 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:18:18.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:18:18.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:18:18.486 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:18:18.486 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:18:18.486 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:18:18.486 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:18:18.487 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:18:18.487 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:18:18.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:18:18.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:18:18.916 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:18:18.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:18:18.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:18:18.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:18:18.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:18:19.389 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:18:19.860 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:18:19.973 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:18:19.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:18:19.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:18:19.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:18:20.331 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:18:20.802 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:18:20.974 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:18:20.974 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:18:20.974 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:18:20.974 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:18:21.272 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:18:21.743 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:18:21.974 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:18:21.974 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:18:21.975 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:18:21.975 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:18:22.216 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:18:22.684 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:18:22.975 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:18:22.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:18:22.975 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:18:22.975 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:18:23.152 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:18:23.627 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:18:24.105 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:18:24.578 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:18:25.049 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:18:25.523 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:18:26.002 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:18:26.479 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:18:26.492 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:18:26.492 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:18:26.496 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:18:26.496 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:18:26.496 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:18:26.496 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:18:26.497 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:18:26.497 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:18:26.497 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:18:26.497 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:18:26.497 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:18:26.497 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:18:26.497 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:18:26.497 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1841 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:18:26.497 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1841 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:18:26.497 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1841 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:18:26.497 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1841 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:18:26.497 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1841 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:18:26.497 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1841 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:18:31.501 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:18:31.501 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:18:31.503 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:18:31.503 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:18:31.504 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:18:31.504 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:18:31.512 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:18:31.515 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:18:31.515 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:18:31.516 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:18:31.516 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:18:31.526 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:18:31.527 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:18:31.527 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:18:31.527 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:18:31.527 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:18:31.527 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:18:31.528 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:18:31.528 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:18:31.535 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:18:31.535 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:18:31.535 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:18:31.535 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:18:31.536 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:18:31.536 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:18:31.536 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:18:31.536 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:18:31.542 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:18:31.542 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:18:31.542 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:18:31.543 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:18:31.543 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:18:31.543 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:18:31.543 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:18:31.543 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:18:31.551 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:18:31.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:18:31.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:18:31.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:18:31.551 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:18:31.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:18:31.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:18:31.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:18:31.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:31.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:18:31.553 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:18:31.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:31.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:31.553 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:18:31.553 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:18:31.553 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:18:31.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:31.553 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:18:31.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:31.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:31.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:18:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:31.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:31.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:31.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:31.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:31.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:31.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:31.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:31.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:31.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:31.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:31.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:31.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:31.556 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:18:31.556 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:18:31.557 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:18:31.557 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:18:31.557 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:18:31.557 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:18:31.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:36.561 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:18:36.561 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:18:36.563 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:18:36.563 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:18:36.563 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:18:36.564 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:18:36.573 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:18:36.574 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:18:36.574 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:18:36.574 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:18:36.574 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:18:36.577 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:18:36.577 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:18:36.577 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:18:36.577 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:18:36.577 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:18:36.578 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:18:36.578 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:18:36.578 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:18:36.580 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:18:36.580 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:18:36.580 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:18:36.580 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:18:36.580 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:18:36.580 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:18:36.580 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:18:36.580 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:18:36.582 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:18:36.582 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:18:36.582 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:18:36.582 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:18:36.582 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:18:36.583 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:18:36.583 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:18:36.583 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:18:36.589 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:18:36.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:18:36.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:18:36.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:18:36.589 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:18:36.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:18:36.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:18:36.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:18:36.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:18:36.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:36.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:36.590 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:18:36.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:36.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:36.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:36.590 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:18:36.590 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:18:36.590 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:18:36.590 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:18:36.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:36.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:36.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:36.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:18:36.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:36.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:36.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:36.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:36.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:36.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:36.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:36.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:36.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:36.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:36.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:36.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:36.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:36.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:36.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:36.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:36.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:36.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:36.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:36.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:36.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:36.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:36.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:36.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:36.595 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:18:37.080 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:18:37.115 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:18:37.116 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:18:37.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:18:37.118 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:18:37.120 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:18:37.120 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:18:37.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:18:37.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:18:37.121 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:18:37.121 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:18:37.121 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:18:37.121 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:18:37.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:18:37.123 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:18:37.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:18:37.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:18:37.557 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:18:37.594 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:18:37.594 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:18:37.594 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:18:37.595 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:18:38.035 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:18:38.511 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:18:38.595 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:18:38.595 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:18:38.595 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:18:38.596 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:18:38.989 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:18:39.467 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:18:39.596 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:18:39.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:18:39.597 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:18:39.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:18:39.944 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:18:40.422 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:18:40.597 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:18:40.598 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:18:40.598 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:18:40.598 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:18:40.899 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:18:41.377 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:18:41.599 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:18:41.599 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:18:41.599 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:18:41.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:18:41.855 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:18:42.333 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:18:42.811 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:18:43.289 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:18:43.767 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:18:44.245 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:18:44.722 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:18:45.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:18:45.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:18:45.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:18:45.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:18:45.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:18:45.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:18:45.131 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:18:45.131 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:18:45.131 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:18:45.131 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:18:45.131 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:18:45.131 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1824 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:18:45.131 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:18:45.131 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:18:45.131 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1824 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:18:45.131 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1824 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:18:45.131 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1824 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:18:45.131 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1824 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:18:45.131 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1824 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:18:50.135 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:18:50.135 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:18:50.136 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:18:50.137 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:18:50.137 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:18:50.138 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:18:50.148 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:18:50.150 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:18:50.150 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:18:50.151 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:18:50.151 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:18:50.156 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:18:50.156 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:18:50.157 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:18:50.157 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:18:50.157 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:18:50.157 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:18:50.158 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:18:50.158 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:18:50.161 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:18:50.161 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:18:50.161 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:18:50.161 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:18:50.161 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:18:50.161 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:18:50.162 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:18:50.162 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:18:50.165 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:18:50.165 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:18:50.165 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:18:50.165 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:18:50.165 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:18:50.165 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:18:50.165 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:18:50.165 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:18:50.171 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:18:50.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:18:50.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:18:50.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:18:50.171 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:18:50.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:18:50.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:18:50.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:18:50.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:50.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:18:50.172 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:18:50.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:50.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:50.172 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:18:50.172 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:18:50.172 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:18:50.172 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:18:50.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:50.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:50.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:50.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:18:50.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:50.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:50.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:50.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:50.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:50.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:50.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:50.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:50.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:50.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:50.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:50.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:50.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:50.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:50.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:50.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:50.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:50.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:50.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:50.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:50.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:50.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:50.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:50.175 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:18:50.175 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:18:50.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:50.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:50.175 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:18:50.175 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:18:50.175 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:18:50.175 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:18:50.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:55.180 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:18:55.180 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:18:55.182 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:18:55.183 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:18:55.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:18:55.185 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:18:55.194 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:18:55.195 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:18:55.195 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:18:55.196 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:18:55.196 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:18:55.199 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:18:55.199 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:18:55.199 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:18:55.200 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:18:55.200 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:18:55.200 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:18:55.200 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:18:55.201 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:18:55.203 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:18:55.203 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:18:55.203 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:18:55.203 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:18:55.203 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:18:55.203 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:18:55.203 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:18:55.203 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:18:55.206 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:18:55.206 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:18:55.206 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:18:55.206 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:18:55.206 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:18:55.206 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:18:55.207 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:18:55.207 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:18:55.210 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:18:55.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:18:55.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:18:55.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:18:55.211 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:18:55.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:18:55.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:18:55.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:18:55.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:55.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:18:55.211 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:18:55.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:55.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:55.211 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:18:55.211 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:18:55.211 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:18:55.211 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:18:55.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:55.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:55.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:55.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:18:55.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:55.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:55.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:55.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:55.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:55.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:55.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:55.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:55.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:55.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:55.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:55.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:55.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:55.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:55.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:18:55.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:55.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:55.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:55.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:55.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:55.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:55.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:55.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:18:55.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:18:55.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:55.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:18:55.216 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:18:55.700 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:18:55.733 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:18:55.734 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:18:55.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:18:55.735 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:18:55.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:18:55.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:18:55.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:18:55.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:18:55.737 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:18:55.737 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:18:55.737 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:18:55.737 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:18:55.743 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:18:55.743 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:18:55.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:18:55.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:18:56.178 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:18:56.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:18:56.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:18:56.215 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:18:56.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:18:56.656 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:18:57.134 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:18:57.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:18:57.216 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:18:57.217 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:18:57.217 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:18:57.612 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:18:58.089 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:18:58.217 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:18:58.217 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:18:58.217 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:18:58.217 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:18:58.567 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:18:59.046 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:18:59.218 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:18:59.218 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:18:59.218 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:18:59.218 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:18:59.524 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:19:00.001 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:19:00.218 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:19:00.219 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:19:00.219 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:19:00.219 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:19:00.479 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:19:00.957 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:19:01.435 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:19:01.913 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:19:02.391 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:19:02.868 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:19:03.346 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:19:03.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:19:03.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:19:03.750 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:19:03.750 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:19:03.750 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:19:03.750 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:19:03.751 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:19:03.751 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:19:03.751 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:19:03.751 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:19:03.751 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:19:03.751 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:19:03.751 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:19:08.755 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:19:08.755 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:19:08.757 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:19:08.758 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:19:08.758 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:19:08.759 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:19:08.763 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:19:08.764 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:19:08.764 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:19:08.764 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:19:08.764 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:19:08.766 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:19:08.766 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:19:08.767 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:19:08.767 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:19:08.767 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:19:08.767 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:19:08.767 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:19:08.767 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:19:08.769 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:19:08.769 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:19:08.769 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:19:08.769 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:19:08.770 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:19:08.770 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:19:08.770 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:19:08.770 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:19:08.772 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:19:08.772 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:19:08.772 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:19:08.772 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:19:08.772 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:19:08.773 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:19:08.773 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:19:08.773 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:19:08.778 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:19:08.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:19:08.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:19:08.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:19:08.778 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:19:08.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:19:08.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:19:08.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:19:08.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:08.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:19:08.779 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:19:08.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:08.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:08.779 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:19:08.779 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:19:08.779 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:19:08.779 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:19:08.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:08.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:08.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:08.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:19:08.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:08.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:08.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:08.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:08.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:08.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:08.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:08.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:08.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:08.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:08.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:08.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:08.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:08.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:08.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:08.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:08.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:08.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:08.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:08.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:08.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:08.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:08.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:08.782 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:19:08.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:08.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:08.782 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:19:08.782 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:19:08.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:08.782 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:19:08.782 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:19:08.782 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:19:08.782 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:19:13.788 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:19:13.788 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:19:13.788 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:19:13.788 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:19:13.789 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:19:13.789 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:19:13.799 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:19:13.800 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:19:13.800 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:19:13.801 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:19:13.801 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:19:13.805 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:19:13.805 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:19:13.805 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:19:13.805 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:19:13.806 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:19:13.806 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:19:13.807 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:19:13.807 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:19:13.809 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:19:13.809 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:19:13.810 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:19:13.810 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:19:13.810 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:19:13.810 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:19:13.810 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:19:13.810 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:19:13.813 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:19:13.813 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:19:13.813 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:19:13.813 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:19:13.814 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:19:13.814 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:19:13.814 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:19:13.814 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:19:13.818 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:19:13.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:19:13.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:19:13.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:19:13.818 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:19:13.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:19:13.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:19:13.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:19:13.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:13.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:19:13.819 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:19:13.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:13.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:13.819 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:19:13.819 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:19:13.819 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:19:13.819 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:19:13.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:13.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:13.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:13.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:19:13.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:13.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:13.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:13.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:13.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:13.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:13.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:13.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:13.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:13.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:13.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:13.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:13.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:13.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:13.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:13.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:13.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:13.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:13.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:13.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:13.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:13.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:13.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:13.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:13.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:13.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:13.824 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:19:14.308 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:19:14.337 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:19:14.338 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:19:14.339 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:19:14.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:19:14.340 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:19:14.340 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:19:14.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:19:14.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:19:14.341 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:19:14.341 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:19:14.341 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:19:14.341 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:19:14.351 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:19:14.352 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:19:14.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:19:14.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:19:14.786 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:19:14.822 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:19:14.822 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:19:14.822 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:19:14.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:19:15.264 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:19:15.742 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:19:15.823 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:19:15.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:19:15.824 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:19:15.824 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:19:16.220 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:19:16.697 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:19:16.824 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:19:16.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:19:16.825 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:19:16.825 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:19:17.176 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:19:17.653 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:19:17.843 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:19:17.843 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:19:17.844 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:19:17.844 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:19:18.131 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:19:18.608 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:19:18.845 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:19:18.845 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:19:18.845 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:19:18.845 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:19:19.086 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:19:19.563 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:19:20.041 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:19:20.519 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:19:20.997 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:19:21.475 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:19:21.953 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:19:22.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:19:22.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:19:22.358 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:19:22.358 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:19:22.358 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:19:22.358 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:19:22.359 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:19:22.359 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:19:22.359 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:19:22.359 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:19:22.359 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:19:22.359 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:19:22.359 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:19:27.363 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:19:27.363 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:19:27.365 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:19:27.366 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:19:27.366 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:19:27.367 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:19:27.376 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:19:27.378 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:19:27.378 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:19:27.378 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:19:27.378 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:19:27.386 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:19:27.386 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:19:27.387 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:19:27.387 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:19:27.387 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:19:27.387 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:19:27.388 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:19:27.388 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:19:27.392 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:19:27.392 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:19:27.392 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:19:27.392 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:19:27.392 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:19:27.392 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:19:27.393 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:19:27.393 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:19:27.395 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:19:27.395 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:19:27.395 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:19:27.396 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:19:27.396 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:19:27.396 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:19:27.396 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:19:27.396 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:19:27.399 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:19:27.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:19:27.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:19:27.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:19:27.399 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:19:27.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:19:27.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:19:27.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:19:27.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:27.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:19:27.399 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:19:27.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:27.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:27.399 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:19:27.399 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:19:27.399 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:19:27.399 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:19:27.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:27.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:27.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:27.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:19:27.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:27.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:27.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:27.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:27.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:27.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:27.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:27.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:27.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:27.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:27.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:27.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:27.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:27.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:27.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:27.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:27.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:27.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:27.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:27.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:27.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:27.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:27.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:27.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:27.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:27.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:27.401 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:19:27.401 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:19:27.401 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:19:27.401 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:19:27.401 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:19:27.401 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:19:27.401 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:19:32.407 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:19:32.407 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:19:32.408 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:19:32.409 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:19:32.409 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:19:32.410 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:19:32.419 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:19:32.420 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:19:32.420 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:19:32.421 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:19:32.421 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:19:32.425 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:19:32.426 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:19:32.426 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:19:32.426 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:19:32.426 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:19:32.426 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:19:32.426 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:19:32.426 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:19:32.431 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:19:32.431 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:19:32.431 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:19:32.431 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:19:32.431 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:19:32.432 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:19:32.432 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:19:32.432 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:19:32.436 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:19:32.436 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:19:32.436 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:19:32.436 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:19:32.436 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:19:32.436 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:19:32.436 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:19:32.436 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:19:32.442 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:19:32.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:19:32.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:19:32.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:19:32.442 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:19:32.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:19:32.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:19:32.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:19:32.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:32.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:19:32.443 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:19:32.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:32.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:32.443 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:19:32.443 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:19:32.443 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:19:32.443 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:19:32.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:32.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:32.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:32.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:19:32.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:32.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:32.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:32.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:32.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:32.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:32.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:32.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:32.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:32.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:32.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:32.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:32.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:32.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:32.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:32.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:32.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:32.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:32.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:32.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:32.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:32.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:32.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:32.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:32.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:32.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:32.448 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:19:32.929 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:19:32.970 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:19:32.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:19:32.973 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:19:32.976 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:19:32.980 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:19:32.980 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:19:32.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:19:32.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:19:32.981 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:19:32.982 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:19:32.982 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:19:32.982 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:19:33.020 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:19:33.020 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:19:33.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:19:33.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:19:33.407 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:19:33.447 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:19:33.447 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:19:33.447 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:19:33.448 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:19:33.885 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:19:34.362 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:19:34.448 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:19:34.449 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:19:34.449 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:19:34.449 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:19:34.840 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:19:35.318 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:19:35.450 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:19:35.450 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:19:35.450 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:19:35.450 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:19:35.795 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:19:36.273 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:19:36.451 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:19:36.452 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:19:36.452 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:19:36.452 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:19:36.751 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:19:37.229 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:19:37.452 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:19:37.452 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:19:37.453 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:19:37.453 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:19:37.707 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:19:38.185 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:19:38.662 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:19:39.140 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:19:39.618 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:19:40.096 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:19:40.573 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:19:41.051 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:19:41.529 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:19:42.007 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:19:42.485 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:19:42.963 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:19:43.441 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:19:43.919 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:19:44.397 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:19:44.874 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:19:45.352 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:19:45.829 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:19:46.307 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:19:46.785 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:19:47.026 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:19:47.027 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:19:47.029 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:19:47.029 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:19:47.029 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:19:47.029 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:19:47.030 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:19:47.030 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:19:47.030 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:19:47.030 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:19:47.030 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:19:47.030 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:19:47.030 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:19:52.034 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:19:52.034 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:19:52.036 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:19:52.036 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:19:52.037 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:19:52.037 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:19:52.046 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:19:52.047 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:19:52.047 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:19:52.047 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:19:52.047 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:19:52.050 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:19:52.050 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:19:52.050 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:19:52.051 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:19:52.051 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:19:52.051 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:19:52.051 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:19:52.051 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:19:52.054 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:19:52.054 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:19:52.054 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:19:52.054 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:19:52.054 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:19:52.054 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:19:52.054 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:19:52.054 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:19:52.057 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:19:52.057 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:19:52.057 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:19:52.057 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:19:52.057 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:19:52.057 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:19:52.058 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:19:52.058 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:19:52.062 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:19:52.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:19:52.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:19:52.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:19:52.062 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:19:52.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:19:52.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:19:52.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:19:52.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:52.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:19:52.063 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:19:52.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:52.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:52.063 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:19:52.063 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:19:52.063 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:19:52.063 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:19:52.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:52.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:52.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:52.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:19:52.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:52.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:52.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:52.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:52.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:52.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:52.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:52.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:52.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:52.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:52.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:52.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:52.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:52.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:52.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:52.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:52.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:52.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:52.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:52.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:52.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:52.066 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:19:52.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:52.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:52.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:52.066 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:19:52.066 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:19:52.066 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:19:52.066 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:19:52.066 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:19:52.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:57.072 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:19:57.072 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:19:57.074 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:19:57.074 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:19:57.074 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:19:57.075 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:19:57.084 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:19:57.085 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:19:57.085 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:19:57.086 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:19:57.086 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:19:57.090 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:19:57.090 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:19:57.091 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:19:57.091 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:19:57.091 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:19:57.092 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:19:57.092 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:19:57.092 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:19:57.095 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:19:57.095 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:19:57.095 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:19:57.095 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:19:57.095 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:19:57.095 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:19:57.096 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:19:57.096 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:19:57.099 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:19:57.099 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:19:57.099 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:19:57.099 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:19:57.100 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:19:57.100 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:19:57.100 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:19:57.100 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:19:57.104 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:19:57.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:19:57.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:19:57.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:19:57.104 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:19:57.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:19:57.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:19:57.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:19:57.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:57.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:19:57.104 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:19:57.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:57.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:57.105 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:19:57.105 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:19:57.105 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:19:57.105 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:19:57.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:57.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:57.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:57.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:19:57.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:57.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:57.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:57.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:57.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:57.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:57.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:57.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:57.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:57.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:57.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:57.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:57.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:57.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:57.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:57.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:57.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:57.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:19:57.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:57.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:57.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:57.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:19:57.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:57.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:19:57.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:57.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:19:57.109 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:19:57.594 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:19:57.628 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:19:57.630 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:19:57.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:19:57.633 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:19:57.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:19:57.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:19:57.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:19:57.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:19:57.636 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:19:57.637 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:19:57.637 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:19:57.637 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:19:57.684 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:19:57.685 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:19:57.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:19:57.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:19:58.071 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:19:58.109 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:19:58.109 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:19:58.109 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:19:58.109 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:19:58.549 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:19:59.027 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:19:59.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:19:59.110 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:19:59.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:19:59.110 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:19:59.505 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:19:59.983 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:20:00.111 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:20:00.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:20:00.111 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:20:00.112 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:20:00.461 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:20:00.939 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:20:01.112 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:20:01.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:20:01.113 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:20:01.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:20:01.416 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:20:01.894 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:20:02.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:20:02.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:20:02.113 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:20:02.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:20:02.372 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:20:02.850 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:20:03.328 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:20:03.806 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:20:04.284 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:20:04.761 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:20:05.239 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:20:05.688 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:20:05.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:20:05.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:20:05.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:20:05.695 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:20:05.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:20:05.697 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:20:05.697 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:20:05.697 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:20:05.697 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:20:05.698 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:20:05.698 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:20:05.698 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:20:10.700 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:20:10.700 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:20:10.702 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:20:10.702 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:20:10.703 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:20:10.703 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:20:10.712 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:20:10.713 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:20:10.713 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:20:10.714 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:20:10.714 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:20:10.719 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:20:10.719 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:20:10.720 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:20:10.720 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:20:10.720 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:20:10.721 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:20:10.721 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:20:10.721 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:20:10.724 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:20:10.725 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:20:10.725 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:20:10.725 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:20:10.725 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:20:10.726 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:20:10.726 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:20:10.726 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:20:10.729 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:20:10.730 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:20:10.730 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:20:10.730 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:20:10.730 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:20:10.731 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:20:10.731 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:20:10.731 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:20:10.736 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:20:10.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:20:10.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:20:10.736 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:20:10.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:20:10.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:20:10.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:20:10.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:20:10.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:20:10.737 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:20:10.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:10.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:10.737 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:20:10.737 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:20:10.737 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:20:10.737 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:20:10.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:10.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:10.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:10.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:20:10.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:10.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:10.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:10.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:10.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:10.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:10.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:10.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:10.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:10.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:10.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:10.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:10.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:10.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:10.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:10.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:10.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:10.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:10.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:10.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:10.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:10.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:10.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:10.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:10.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:10.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:10.740 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:20:10.740 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:20:10.740 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:20:10.740 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:20:10.740 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:20:10.740 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:20:10.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:15.745 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:20:15.745 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:20:15.746 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:20:15.747 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:20:15.748 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:20:15.749 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:20:15.757 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:20:15.757 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:20:15.758 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:20:15.758 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:20:15.758 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:20:15.760 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:20:15.761 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:20:15.761 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:20:15.761 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:20:15.761 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:20:15.761 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:20:15.762 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:20:15.762 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:20:15.765 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:20:15.766 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:20:15.766 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:20:15.766 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:20:15.766 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:20:15.766 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:20:15.766 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:20:15.766 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:20:15.769 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:20:15.769 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:20:15.769 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:20:15.769 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:20:15.769 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:20:15.769 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:20:15.769 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:20:15.769 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:20:15.773 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:20:15.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:20:15.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:20:15.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:20:15.773 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:20:15.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:20:15.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:20:15.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:20:15.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:15.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:20:15.774 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:20:15.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:15.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:15.774 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:20:15.774 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:20:15.774 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:20:15.774 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:20:15.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:15.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:15.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:15.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:20:15.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:15.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:15.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:15.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:15.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:15.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:15.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:15.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:15.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:15.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:15.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:15.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:15.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:15.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:15.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:15.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:15.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:15.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:15.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:15.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:15.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:15.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:15.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:15.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:15.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:15.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:15.779 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:20:16.263 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:20:16.299 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:20:16.301 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:20:16.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:20:16.303 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:20:16.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:20:16.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:20:16.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:20:16.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:20:16.305 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:20:16.305 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:20:16.306 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:20:16.306 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:20:16.740 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:20:16.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:20:16.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:20:16.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:20:16.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:20:17.218 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:20:17.696 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:20:17.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:20:17.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:20:17.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:20:17.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:20:18.174 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:20:18.652 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:20:18.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:20:18.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:20:18.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:20:18.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:20:19.130 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:20:19.607 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:20:19.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:20:19.781 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:20:19.781 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:20:19.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:20:20.085 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:20:20.563 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:20:20.782 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:20:20.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:20:20.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:20:20.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:20:21.041 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:20:21.519 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:20:21.997 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:20:22.475 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:20:22.952 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:20:23.430 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:20:23.907 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:20:24.385 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:20:24.863 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:20:25.341 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:20:25.819 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:20:26.297 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:20:26.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:20:26.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:20:26.365 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:20:26.366 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:20:26.366 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:20:26.366 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:20:26.368 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:20:26.368 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:20:26.368 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:20:26.368 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:20:26.368 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:20:26.368 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:20:26.368 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:20:31.371 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:20:31.371 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:20:31.373 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:20:31.374 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:20:31.375 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:20:31.375 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:20:31.383 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:20:31.385 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:20:31.385 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:20:31.386 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:20:31.386 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:20:31.392 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:20:31.392 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:20:31.392 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:20:31.392 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:20:31.393 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:20:31.393 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:20:31.393 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:20:31.393 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:20:31.398 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:20:31.398 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:20:31.398 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:20:31.398 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:20:31.398 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:20:31.398 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:20:31.398 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:20:31.398 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:20:31.402 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:20:31.403 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:20:31.403 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:20:31.403 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:20:31.403 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:20:31.403 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:20:31.403 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:20:31.403 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:20:31.409 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:20:31.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:20:31.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:20:31.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:20:31.409 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:20:31.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:20:31.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:20:31.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:20:31.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:20:31.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:31.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:31.410 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:20:31.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:31.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:31.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:31.410 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:20:31.410 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:20:31.410 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:20:31.410 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:20:31.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:31.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:31.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:31.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:20:31.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:31.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:31.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:31.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:31.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:31.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:31.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:31.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:31.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:31.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:31.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:31.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:31.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:31.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:31.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:31.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:31.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:31.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:31.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:31.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:31.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:31.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:31.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:31.413 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:20:31.413 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:20:31.413 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:20:31.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:31.413 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:20:31.413 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:20:31.413 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:20:31.413 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:20:36.418 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:20:36.418 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:20:36.419 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:20:36.420 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:20:36.420 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:20:36.421 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:20:36.431 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:20:36.432 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:20:36.432 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:20:36.432 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:20:36.432 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:20:36.435 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:20:36.435 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:20:36.435 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:20:36.435 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:20:36.436 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:20:36.436 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:20:36.436 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:20:36.436 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:20:36.438 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:20:36.438 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:20:36.438 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:20:36.438 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:20:36.438 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:20:36.438 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:20:36.438 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:20:36.438 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:20:36.440 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:20:36.440 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:20:36.440 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:20:36.440 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:20:36.441 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:20:36.441 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:20:36.441 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:20:36.441 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:20:36.444 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:20:36.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:20:36.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:20:36.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:20:36.444 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:20:36.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:20:36.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:20:36.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:20:36.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:36.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:20:36.444 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:20:36.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:36.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:36.444 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:20:36.444 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:20:36.444 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:20:36.444 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:20:36.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:36.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:36.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:36.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:20:36.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:36.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:36.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:36.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:36.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:36.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:36.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:36.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:36.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:36.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:36.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:36.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:36.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:36.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:36.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:36.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:36.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:36.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:36.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:36.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:36.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:36.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:36.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:36.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:36.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:36.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:36.449 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:20:36.932 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:20:36.963 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:20:36.964 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:20:36.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:20:36.966 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:20:36.968 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:20:36.968 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:20:36.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:20:36.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:20:36.969 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:20:36.969 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:20:36.969 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:20:36.969 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:20:36.975 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:20:36.975 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:20:36.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:20:36.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:20:37.409 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:20:37.447 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:20:37.447 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:20:37.448 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:20:37.448 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:20:37.887 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:20:38.365 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:20:38.448 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:20:38.448 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:20:38.448 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:20:38.449 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:20:38.842 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:20:39.320 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:20:39.448 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:20:39.449 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:20:39.449 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:20:39.450 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:20:39.797 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:20:40.275 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:20:40.450 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:20:40.450 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:20:40.451 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:20:40.451 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:20:40.753 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:20:41.230 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:20:41.451 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:20:41.451 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:20:41.452 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:20:41.452 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:20:41.707 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:20:42.185 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:20:42.663 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:20:43.140 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:20:43.619 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:20:44.096 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:20:44.575 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:20:45.052 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:20:45.530 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:20:46.008 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:20:46.486 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:20:46.964 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:20:47.442 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:20:47.919 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:20:47.980 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:20:47.980 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:20:47.986 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:20:47.986 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:20:47.986 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:20:47.987 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:20:47.991 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:20:47.992 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:20:47.992 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:20:47.992 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:20:47.992 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:20:47.992 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:20:47.992 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:20:47.993 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2465 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:20:47.993 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2465 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:20:47.993 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2465 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:20:52.990 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:20:52.990 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:20:52.992 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:20:52.993 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:20:52.993 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:20:52.994 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:20:53.001 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:20:53.002 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:20:53.002 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:20:53.002 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:20:53.002 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:20:53.005 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:20:53.005 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:20:53.006 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:20:53.006 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:20:53.006 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:20:53.006 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:20:53.006 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:20:53.006 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:20:53.012 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:20:53.012 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:20:53.012 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:20:53.012 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:20:53.012 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:20:53.012 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:20:53.013 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:20:53.013 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:20:53.016 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:20:53.016 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:20:53.016 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:20:53.016 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:20:53.016 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:20:53.017 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:20:53.017 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:20:53.017 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:20:53.022 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:20:53.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:20:53.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:20:53.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:20:53.022 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:20:53.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:20:53.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:20:53.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:20:53.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:53.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:20:53.023 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:20:53.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:53.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:53.023 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:20:53.023 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:20:53.023 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:20:53.023 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:20:53.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:53.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:53.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:53.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:20:53.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:53.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:53.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:53.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:53.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:53.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:53.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:53.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:53.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:53.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:53.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:53.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:53.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:53.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:53.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:53.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:53.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:53.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:53.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:53.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:53.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:53.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:53.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:53.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:53.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:53.026 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:20:53.026 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:20:53.026 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:20:53.026 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:20:53.026 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:20:53.026 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:20:53.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:58.032 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:20:58.032 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:20:58.032 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:20:58.033 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:20:58.034 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:20:58.034 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:20:58.045 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:20:58.047 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:20:58.047 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:20:58.047 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:20:58.047 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:20:58.052 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:20:58.052 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:20:58.052 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:20:58.052 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:20:58.053 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:20:58.053 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:20:58.053 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:20:58.053 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:20:58.057 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:20:58.058 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:20:58.058 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:20:58.058 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:20:58.058 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:20:58.058 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:20:58.058 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:20:58.058 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:20:58.062 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:20:58.062 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:20:58.063 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:20:58.063 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:20:58.063 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:20:58.063 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:20:58.063 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:20:58.063 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:20:58.069 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:20:58.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:20:58.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:20:58.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:20:58.069 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:20:58.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:20:58.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:20:58.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:20:58.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:58.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:20:58.070 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:20:58.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:58.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:58.070 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:20:58.070 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:20:58.071 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:20:58.071 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:20:58.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:58.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:58.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:58.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:20:58.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:58.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:58.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:58.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:58.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:58.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:58.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:58.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:58.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:58.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:58.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:58.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:58.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:58.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:58.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:58.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:20:58.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:58.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:58.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:58.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:58.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:58.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:20:58.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:58.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:20:58.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:58.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:20:58.075 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:20:58.558 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:20:58.596 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:20:58.597 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:20:58.598 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:20:58.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:20:59.036 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:20:59.074 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:20:59.075 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:20:59.075 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:20:59.077 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:20:59.515 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:20:59.994 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:21:00.076 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:21:00.077 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:21:00.077 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:21:00.079 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:21:00.472 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:21:00.950 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:21:01.078 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:21:01.078 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:21:01.078 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:21:01.080 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:21:01.428 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:21:01.907 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:21:02.079 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:21:02.079 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:21:02.079 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:21:02.082 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:21:02.386 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:21:02.864 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:21:03.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:21:03.081 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:21:03.081 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:21:03.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:21:03.343 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:21:03.822 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:21:04.300 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:21:04.779 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:21:05.258 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:21:05.737 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:21:06.216 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:21:06.695 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:21:07.174 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:21:07.652 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:21:08.131 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:21:08.608 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:21:08.609 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:21:08.609 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:21:08.609 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:21:08.609 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:21:08.610 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:21:08.610 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:21:08.610 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:21:08.611 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:21:08.611 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:21:08.611 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:21:08.611 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:21:13.614 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:21:13.614 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:21:13.616 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:21:13.616 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:21:13.617 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:21:13.617 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:21:13.627 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:21:13.628 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:21:13.628 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:21:13.628 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:21:13.628 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:21:13.631 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:21:13.632 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:21:13.632 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:21:13.632 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:21:13.632 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:21:13.633 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:21:13.633 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:21:13.633 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:21:13.635 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:21:13.635 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:21:13.635 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:21:13.635 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:21:13.635 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:21:13.636 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:21:13.636 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:21:13.636 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:21:13.638 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:21:13.638 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:21:13.639 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:21:13.639 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:21:13.639 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:21:13.639 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:21:13.639 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:21:13.639 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:21:13.643 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:21:13.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:21:13.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:21:13.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:21:13.643 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:21:13.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:21:13.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:21:13.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:21:13.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:21:13.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:21:13.643 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:21:13.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:21:13.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:21:13.643 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:21:13.643 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:21:13.643 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:21:13.643 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:21:13.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:21:13.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:21:13.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:21:13.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:21:13.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:21:13.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:21:13.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:21:13.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:21:13.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:21:13.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:21:13.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:21:13.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:21:13.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:21:13.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:21:13.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:21:13.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:21:13.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:21:13.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:21:13.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:21:13.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:21:13.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:21:13.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:21:13.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:21:13.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:21:13.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:21:13.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:21:13.645 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:21:13.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:21:13.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:21:13.646 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:21:13.646 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:21:13.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:21:13.646 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:21:13.646 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:21:13.646 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:21:13.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:21:18.652 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:21:18.652 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:21:18.653 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:21:18.653 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:21:18.654 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:21:18.654 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:21:18.663 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:21:18.664 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:21:18.664 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:21:18.664 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:21:18.664 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:21:18.668 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:21:18.669 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:21:18.669 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:21:18.669 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:21:18.670 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:21:18.670 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:21:18.670 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:21:18.670 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:21:18.673 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:21:18.674 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:21:18.674 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:21:18.674 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:21:18.674 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:21:18.674 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:21:18.674 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:21:18.674 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:21:18.678 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:21:18.678 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:21:18.678 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:21:18.678 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:21:18.679 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:21:18.679 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:21:18.679 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:21:18.679 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:21:18.685 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:21:18.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:21:18.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:21:18.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:21:18.685 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:21:18.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:21:18.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:21:18.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:21:18.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:21:18.686 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:21:18.686 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:21:18.686 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:21:18.686 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:21:18.686 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:21:18.686 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:21:18.686 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:21:18.686 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:21:18.686 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:21:18.686 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:21:18.686 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:21:18.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:21:18.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:21:18.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:21:18.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:21:18.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:21:18.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:21:18.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:21:18.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:21:18.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:21:18.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:21:18.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:21:18.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:21:18.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:21:18.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:21:18.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:21:18.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:21:18.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:21:18.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:21:18.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:21:18.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:21:18.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:21:18.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:21:18.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:21:18.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:21:18.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:21:18.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:21:18.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:21:18.691 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:21:19.173 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:21:19.214 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:21:19.216 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:21:19.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:21:19.218 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:21:19.651 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:21:19.691 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:21:19.691 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:21:19.692 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:21:19.692 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:21:20.129 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:21:20.607 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:21:20.693 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:21:20.693 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:21:20.693 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:21:20.693 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:21:21.085 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:21:21.564 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:21:21.694 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:21:21.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:21:21.694 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:21:21.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:21:22.042 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:21:22.520 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:21:22.696 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:21:22.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:21:22.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:21:22.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:21:22.998 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:21:23.476 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:21:23.697 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:21:23.698 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:21:23.698 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:21:23.698 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:21:23.954 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:21:24.432 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:21:24.911 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:21:25.389 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:21:25.868 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:21:26.346 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:21:26.824 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:21:27.303 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:21:27.781 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:21:28.260 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:21:28.739 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:21:29.217 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:21:29.696 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:21:30.174 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:21:30.652 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:21:31.130 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:21:31.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:21:31.234 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:21:31.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:21:31.235 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:21:31.240 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:21:31.240 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:21:31.240 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:21:31.240 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:21:31.240 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:21:31.240 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:21:31.240 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:21:36.240 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:21:36.240 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:21:36.241 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:21:36.245 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:21:36.247 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:21:36.250 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:21:36.262 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:21:36.263 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:21:36.263 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:21:36.264 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:21:36.264 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:21:36.269 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:21:36.270 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:21:36.270 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:21:36.270 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:21:36.271 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:21:36.271 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:21:36.272 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:21:36.272 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:21:36.275 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:21:36.275 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:21:36.275 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:21:36.275 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:21:36.275 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:21:36.275 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:21:36.276 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:21:36.276 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:21:36.279 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:21:36.279 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:21:36.279 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:21:36.279 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:21:36.279 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:21:36.279 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:21:36.279 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:21:36.279 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:21:36.284 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:21:36.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:21:36.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:21:36.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:21:36.284 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:21:36.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:21:36.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:21:36.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:21:36.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:21:36.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:21:36.284 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:21:36.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:21:36.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:21:36.285 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:21:36.285 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:21:36.285 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:21:36.285 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:21:36.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:21:36.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:21:36.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:21:36.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:21:36.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:21:36.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:21:36.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:21:36.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:21:36.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:21:36.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:21:36.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:21:36.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:21:36.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:21:36.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:21:36.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:21:36.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:21:36.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:21:36.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:21:36.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:21:36.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:21:36.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:21:36.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:21:36.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:21:36.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:21:36.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:21:36.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:21:36.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:21:36.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:21:36.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:21:36.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:21:36.289 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:21:36.773 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:21:36.802 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:21:36.804 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:21:36.805 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:21:36.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:21:36.806 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:21:36.806 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:21:36.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:21:36.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:21:36.807 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:21:36.807 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:21:36.808 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:21:36.808 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:21:37.251 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:21:37.288 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:21:37.289 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:21:37.289 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:21:37.289 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:21:37.729 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:21:38.207 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:21:38.289 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:21:38.290 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:21:38.290 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:21:38.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:21:38.684 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:21:39.162 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:21:39.291 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:21:39.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:21:39.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:21:39.291 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:21:39.640 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:21:40.118 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:21:40.292 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:21:40.292 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:21:40.292 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:21:40.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:21:40.596 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:21:41.073 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:21:41.293 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:21:41.293 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:21:41.294 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:21:41.294 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:21:41.551 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:21:42.029 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:21:42.507 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:21:42.984 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:21:43.462 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:21:43.940 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:21:44.418 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:21:44.896 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:21:45.374 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:21:45.852 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:21:46.330 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:21:46.807 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:21:47.285 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:21:47.762 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:21:47.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:21:47.823 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:21:47.828 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:21:47.829 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:21:47.829 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:21:47.829 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:21:47.834 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:21:47.834 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:21:47.834 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:21:47.834 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:21:47.834 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:21:47.834 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:21:47.834 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:21:47.835 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2465 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:21:47.835 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2465 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:21:52.832 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:21:52.832 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:21:52.834 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:21:52.834 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:21:52.835 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:21:52.836 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:21:52.845 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:21:52.846 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:21:52.846 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:21:52.846 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:21:52.846 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:21:52.849 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:21:52.849 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:21:52.849 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:21:52.850 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:21:52.850 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:21:52.850 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:21:52.850 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:21:52.851 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:21:52.853 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:21:52.853 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:21:52.853 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:21:52.853 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:21:52.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:21:52.853 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:21:52.853 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:21:52.853 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:21:52.856 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:21:52.856 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:21:52.856 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:21:52.856 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:21:52.856 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:21:52.856 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:21:52.857 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:21:52.857 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:21:52.861 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:21:52.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:21:52.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:21:52.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:21:52.861 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:21:52.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:21:52.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:21:52.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:21:52.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:21:52.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:21:52.861 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:21:52.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:21:52.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:21:52.862 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:21:52.862 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:21:52.862 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:21:52.862 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:21:52.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:21:52.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:21:52.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:21:52.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:21:52.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:21:52.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:21:52.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:21:52.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:21:52.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:21:52.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:21:52.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:21:52.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:21:52.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:21:52.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:21:52.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:21:52.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:21:52.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:21:52.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:21:52.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:21:52.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:21:52.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:21:52.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:21:52.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:21:52.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:21:52.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:21:52.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:21:52.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:21:52.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:21:52.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:21:52.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:21:52.867 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:21:53.351 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:21:53.385 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:21:53.386 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:21:53.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:21:53.387 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:21:53.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:21:53.389 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:21:53.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:21:53.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:21:53.389 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:21:53.389 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:21:53.389 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:21:53.390 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:21:53.827 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:21:53.865 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:21:53.865 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:21:53.866 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:21:53.866 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:21:54.304 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:21:54.782 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:21:54.866 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:21:54.866 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:21:54.867 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:21:54.867 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:21:55.254 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:21:55.727 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:21:55.867 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:21:55.867 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:21:55.867 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:21:55.867 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:21:56.202 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:21:56.676 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:21:56.867 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:21:56.868 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:21:56.868 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:21:56.868 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:21:57.151 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:21:57.628 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:21:57.868 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:21:57.869 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:21:57.869 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:21:57.869 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:21:58.103 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:21:58.576 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:21:59.045 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:21:59.518 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:21:59.995 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:22:00.467 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:22:00.941 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:22:01.416 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:22:01.892 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:22:02.369 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:22:02.846 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:22:03.321 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:22:03.796 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:22:04.267 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:22:04.742 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:22:05.215 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:22:05.690 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:22:06.164 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:22:06.638 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:22:07.111 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:22:07.583 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:22:08.057 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:22:08.396 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:22:08.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:22:08.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:22:08.398 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:22:08.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:22:08.398 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:22:08.401 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:22:08.401 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:22:08.401 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:22:08.401 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:22:08.401 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:22:08.401 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:22:08.402 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:22:08.402 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3340 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:22:08.402 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3340 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:22:08.402 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3340 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:22:08.402 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3340 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:22:08.402 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3340 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:22:08.402 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3340 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:22:08.402 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3340 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:22:13.403 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:22:13.403 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:22:13.403 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:22:13.403 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:22:13.404 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:22:13.405 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:22:13.412 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:22:13.413 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:22:13.413 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:22:13.413 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:22:13.413 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:22:13.417 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:22:13.417 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:22:13.417 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:22:13.418 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:22:13.418 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:22:13.418 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:22:13.418 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:22:13.418 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:22:13.423 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:22:13.423 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:22:13.423 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:22:13.423 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:22:13.424 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:22:13.424 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:22:13.424 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:22:13.424 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:22:13.427 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:22:13.427 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:22:13.427 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:22:13.427 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:22:13.427 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:22:13.427 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:22:13.428 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:22:13.428 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:22:13.432 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:22:13.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:22:13.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:22:13.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:22:13.432 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:22:13.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:22:13.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:22:13.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:22:13.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:22:13.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:22:13.433 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:22:13.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:22:13.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:22:13.433 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:22:13.433 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:22:13.433 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:22:13.433 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:22:13.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:22:13.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:22:13.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:22:13.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:22:13.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:22:13.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:22:13.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:22:13.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:22:13.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:22:13.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:22:13.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:22:13.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:22:13.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:22:13.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:22:13.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:22:13.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:22:13.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:22:13.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:22:13.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:22:13.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:22:13.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:22:13.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:22:13.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:22:13.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:22:13.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:22:13.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:22:13.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:22:13.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:22:13.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:22:13.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:22:13.438 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:22:13.909 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:22:13.962 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:22:13.963 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:22:13.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:22:13.966 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:22:13.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:22:13.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:22:13.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:22:13.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:13.974 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:22:13.974 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:22:13.974 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:22:13.974 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:22:14.023 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:22:14.023 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:22:14.028 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:22:14.028 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:22:14.029 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:22:14.029 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:22:14.034 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:22:14.034 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:22:14.035 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:22:14.035 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:22:14.036 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:22:14.036 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:22:14.036 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:22:19.030 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:22:19.030 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:22:19.030 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:22:19.031 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:22:19.031 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:22:19.032 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:22:19.036 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:22:19.037 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:22:19.037 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:22:19.037 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:22:19.037 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:22:19.039 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:22:19.039 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:22:19.039 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:22:19.039 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:22:19.039 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:22:19.039 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:22:19.039 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:22:19.039 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:22:19.041 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:22:19.041 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:22:19.041 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:22:19.041 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:22:19.041 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:22:19.041 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:22:19.041 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:22:19.041 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:22:19.042 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:22:19.042 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:22:19.042 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:22:19.042 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:22:19.042 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:22:19.042 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:22:19.043 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:22:19.043 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:22:19.045 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:22:19.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:22:19.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:22:19.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:22:19.045 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:22:19.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:22:19.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:22:19.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:22:19.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:22:19.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:22:19.045 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:22:19.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:22:19.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:22:19.046 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:22:19.046 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:22:19.046 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:22:19.046 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:22:19.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:22:19.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:22:19.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:22:19.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:22:19.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:22:19.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:22:19.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:22:19.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:22:19.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:22:19.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:22:19.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:22:19.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:22:19.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:22:19.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:22:19.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:22:19.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:22:19.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:22:19.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:22:19.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:22:19.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:22:19.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:22:19.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:22:19.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:22:19.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:22:19.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:22:19.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:22:19.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:22:19.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:22:19.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:22:19.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:22:19.050 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:22:19.521 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:22:19.569 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:22:19.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:22:19.571 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:22:19.573 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:22:19.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:22:19.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:22:19.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:22:19.599 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:22:19.599 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:22:19.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:22:19.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:22:19.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:19.618 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:22:19.619 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:22:19.619 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:22:19.619 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:22:19.659 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:22:19.659 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:22:19.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:19.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:19.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:19.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:22:19.783 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:22:19.784 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:22:19.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:22:19.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:22:19.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:22:19.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:22:19.807 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:22:19.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:22:19.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:22:19.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:19.809 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:22:19.809 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:22:19.809 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:22:19.809 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:22:19.848 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:22:19.849 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:22:19.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:19.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:19.995 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:22:20.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:20.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:22:20.043 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:22:20.043 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:22:20.048 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:22:20.048 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:22:20.049 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:22:20.049 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:22:20.062 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:22:20.062 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:22:20.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:22:20.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:22:20.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:22:20.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:22:20.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:22:20.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:20.070 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:22:20.070 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:22:20.070 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:22:20.070 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:22:20.083 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:22:20.083 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:22:20.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:20.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:20.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:20.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:22:20.390 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:22:20.390 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:22:20.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:22:20.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:22:20.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:22:20.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:22:20.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:22:20.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:22:20.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:22:20.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:20.414 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:22:20.414 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:22:20.414 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:22:20.414 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:22:20.461 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:22:20.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:22:20.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:20.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:20.469 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:22:20.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:20.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:22:20.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:22:20.790 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:22:20.802 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:22:20.802 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:22:20.802 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:22:20.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:22:20.808 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:22:20.809 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:22:20.809 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:22:20.809 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:22:20.809 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:22:20.809 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:22:20.810 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:22:25.806 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:22:25.807 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:22:25.808 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:22:25.808 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:22:25.809 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:22:25.809 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:22:25.818 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:22:25.819 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:22:25.820 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:22:25.820 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:22:25.820 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:22:25.825 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:22:25.825 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:22:25.825 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:22:25.825 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:22:25.825 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:22:25.825 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:22:25.826 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:22:25.826 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:22:25.830 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:22:25.830 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:22:25.830 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:22:25.830 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:22:25.830 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:22:25.830 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:22:25.831 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:22:25.831 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:22:25.834 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:22:25.835 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:22:25.835 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:22:25.835 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:22:25.835 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:22:25.835 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:22:25.835 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:22:25.835 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:22:25.841 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:22:25.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:22:25.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:22:25.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:22:25.841 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:22:25.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:22:25.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:22:25.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:22:25.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:22:25.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:22:25.842 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:22:25.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:22:25.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:22:25.842 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:22:25.842 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:22:25.842 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:22:25.842 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:22:25.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:22:25.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:22:25.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:22:25.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:22:25.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:22:25.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:22:25.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:22:25.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:22:25.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:22:25.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:22:25.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:22:25.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:22:25.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:22:25.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:22:25.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:22:25.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:22:25.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:22:25.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:22:25.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:22:25.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:22:25.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:22:25.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:22:25.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:22:25.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:22:25.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:22:25.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:22:25.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:22:25.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:22:25.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:22:25.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:22:25.847 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:22:26.320 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:22:26.371 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:22:26.373 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:22:26.375 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:22:26.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:22:26.396 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:22:26.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:22:26.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:22:26.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:22:26.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:22:26.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:22:26.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:22:26.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:26.424 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:22:26.424 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:22:26.425 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:22:26.425 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:22:26.458 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:22:26.458 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:22:26.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:26.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:26.797 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:22:26.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:22:26.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:22:26.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:22:26.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:22:27.274 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:22:27.747 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:22:27.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:22:27.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:22:27.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:22:27.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:22:28.217 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:22:28.689 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:22:28.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:22:28.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:22:28.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:22:28.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:22:29.161 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:22:29.639 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:22:29.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:22:29.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:22:29.849 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:22:29.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:22:30.115 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:22:30.593 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:22:30.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:22:30.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:22:30.850 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:22:30.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:22:31.068 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:22:31.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:31.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:22:31.468 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:22:31.468 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:22:31.486 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:22:31.486 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:22:31.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:22:31.492 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:22:31.492 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:22:31.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:22:31.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:22:31.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:31.493 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:22:31.493 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:22:31.494 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:22:31.494 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:22:31.539 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:22:31.539 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:22:31.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:31.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:31.545 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:22:32.021 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:22:32.499 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:22:32.977 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:22:33.449 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:22:33.924 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:22:34.395 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:22:34.866 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:22:35.336 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:22:35.806 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:22:36.274 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:22:36.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:36.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:22:36.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:22:36.543 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:22:36.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:22:36.550 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:22:36.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:22:36.556 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:22:36.556 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:22:36.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:22:36.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:22:36.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:36.558 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:22:36.558 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:22:36.558 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:22:36.558 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:22:36.597 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:22:36.598 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:22:36.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:36.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:36.742 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:22:37.215 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:22:37.690 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:22:38.165 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:22:38.642 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:22:39.118 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:22:39.593 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:22:40.069 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:22:40.546 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:22:41.023 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:22:41.499 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 04:22:41.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:41.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:22:41.606 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:22:41.606 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:22:41.623 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:22:41.623 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:22:41.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:22:41.629 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:22:41.629 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:22:41.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:22:41.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:22:41.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:41.630 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:22:41.630 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:22:41.631 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:22:41.631 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:22:41.678 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:22:41.679 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:22:41.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:41.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:41.974 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 04:22:42.450 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 04:22:42.925 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 04:22:43.400 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 04:22:43.876 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 04:22:44.350 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 04:22:44.828 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 04:22:45.306 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 04:22:45.783 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 04:22:46.259 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 04:22:46.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:46.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:22:46.685 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:22:46.685 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:22:46.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:22:46.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:22:46.695 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:22:46.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:22:46.700 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:22:46.700 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:22:46.701 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:22:46.701 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:22:46.701 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:22:46.701 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:22:46.701 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:22:46.701 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4483 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:22:46.702 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4483 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:22:46.702 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4483 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:22:46.702 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4483 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:22:46.702 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4483 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:22:46.702 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4483 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:22:51.697 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:22:51.698 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:22:51.700 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:22:51.702 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:22:51.705 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:22:51.709 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:22:51.719 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:22:51.720 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:22:51.720 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:22:51.720 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:22:51.720 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:22:51.721 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:22:51.721 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:22:51.721 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:22:51.721 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:22:51.721 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:22:51.721 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:22:51.721 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:22:51.721 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:22:51.723 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:22:51.723 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:22:51.723 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:22:51.723 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:22:51.723 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:22:51.723 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:22:51.723 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:22:51.723 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:22:51.725 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:22:51.725 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:22:51.725 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:22:51.725 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:22:51.725 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:22:51.725 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:22:51.725 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:22:51.725 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:22:51.728 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:22:51.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:22:51.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:22:51.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:22:51.728 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:22:51.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:22:51.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:22:51.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:22:51.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:22:51.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:22:51.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:22:51.728 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:22:51.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:22:51.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:22:51.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:22:51.728 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:22:51.728 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:22:51.728 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:22:51.728 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:22:51.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:22:51.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:22:51.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:22:51.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:22:51.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:22:51.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:22:51.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:22:51.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:22:51.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:22:51.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:22:51.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:22:51.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:22:51.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:22:51.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:22:51.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:22:51.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:22:51.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:22:51.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:22:51.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:22:51.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:22:51.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:22:51.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:22:51.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:22:51.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:22:51.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:22:51.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:22:51.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:22:51.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:22:51.733 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:22:52.203 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:22:52.243 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:22:52.245 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:22:52.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:22:52.245 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:22:52.256 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:22:52.256 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:22:52.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:22:52.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:22:52.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:22:52.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:22:52.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:22:52.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:52.279 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:22:52.279 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:22:52.279 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:22:52.279 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:22:52.294 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:22:52.295 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:22:52.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:52.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:52.675 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:22:52.732 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:22:52.733 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:22:52.733 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:22:52.733 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:22:53.153 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:22:53.630 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:22:53.733 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:22:53.734 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:22:53.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:22:53.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:22:54.108 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:22:54.583 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:22:54.735 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:22:54.735 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:22:54.735 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:22:54.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:22:55.061 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:22:55.538 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:22:55.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:22:55.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:22:55.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:22:55.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:22:56.016 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:22:56.494 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:22:56.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:22:56.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:22:56.738 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:22:56.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:22:56.972 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:22:57.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:57.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:22:57.307 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:22:57.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:22:57.321 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:22:57.321 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:22:57.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:22:57.327 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:22:57.327 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:22:57.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:22:57.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:22:57.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:57.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:22:57.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:22:57.329 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:22:57.329 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:22:57.343 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:22:57.343 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:22:57.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:57.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:22:57.449 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:22:57.923 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:22:58.399 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:22:58.875 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:22:59.353 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:22:59.829 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:23:00.305 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:23:00.780 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:23:01.256 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:23:01.730 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:23:02.206 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:23:02.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:02.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:23:02.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:23:02.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:23:02.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:23:02.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:23:02.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:23:02.367 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:23:02.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:23:02.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:23:02.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:23:02.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:02.369 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:23:02.369 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:23:02.369 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:23:02.369 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:23:02.389 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:23:02.389 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:23:02.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:02.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:02.681 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:23:03.157 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:23:03.632 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:23:04.106 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:23:04.581 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:23:05.058 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:23:05.536 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:23:06.012 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:23:06.484 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:23:06.961 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:23:07.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:07.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:23:07.400 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:23:07.400 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:23:07.418 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:23:07.418 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:23:07.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:23:07.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:23:07.424 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:23:07.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:23:07.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:23:07.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:07.426 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:23:07.426 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:23:07.426 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:23:07.426 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:23:07.428 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:23:07.428 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:23:07.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:07.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:07.433 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 04:23:07.909 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 04:23:08.386 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 04:23:08.861 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 04:23:09.338 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 04:23:09.814 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 04:23:10.291 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 04:23:10.768 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 04:23:11.246 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 04:23:11.722 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 04:23:12.199 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 04:23:12.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:12.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:23:12.437 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:23:12.437 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:23:12.448 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:23:12.449 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:23:12.449 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:23:12.449 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:23:12.458 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:23:12.458 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:23:12.458 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:23:12.458 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:23:12.460 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:23:12.460 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:23:12.460 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:23:17.450 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:23:17.451 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:23:17.451 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:23:17.451 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:23:17.452 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:23:17.453 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:23:17.461 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:23:17.462 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:23:17.462 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:23:17.462 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:23:17.462 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:23:17.464 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:23:17.464 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:23:17.464 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:23:17.464 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:23:17.464 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:23:17.464 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:23:17.464 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:23:17.464 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:23:17.467 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:23:17.467 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:23:17.467 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:23:17.467 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:23:17.467 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:23:17.467 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:23:17.467 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:23:17.467 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:23:17.469 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:23:17.469 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:23:17.469 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:23:17.469 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:23:17.469 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:23:17.469 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:23:17.469 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:23:17.469 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:23:17.472 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:23:17.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:23:17.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:23:17.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:23:17.472 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:23:17.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:23:17.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:23:17.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:23:17.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:23:17.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:23:17.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:23:17.473 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:23:17.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:23:17.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:23:17.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:23:17.473 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:23:17.473 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:23:17.473 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:23:17.473 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:23:17.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:23:17.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:23:17.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:23:17.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:23:17.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:23:17.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:23:17.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:23:17.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:23:17.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:23:17.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:23:17.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:23:17.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:23:17.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:23:17.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:23:17.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:23:17.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:23:17.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:23:17.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:23:17.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:23:17.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:23:17.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:23:17.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:23:17.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:23:17.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:23:17.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:23:17.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:23:17.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:23:17.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:23:17.478 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:23:17.950 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:23:18.002 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:23:18.004 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:23:18.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:23:18.006 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:23:18.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:23:18.028 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:23:18.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:23:18.043 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:23:18.043 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:23:18.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:23:18.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:23:18.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:18.058 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:23:18.058 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:23:18.059 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:23:18.059 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:23:18.088 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:23:18.089 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:23:18.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:18.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:18.426 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:23:18.476 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:23:18.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:23:18.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:23:18.476 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:23:18.901 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:23:19.379 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:23:19.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:23:19.478 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:23:19.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:23:19.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:23:19.856 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:23:20.333 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:23:20.478 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:23:20.478 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:23:20.479 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:23:20.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:23:20.809 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:23:21.287 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:23:21.478 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:23:21.479 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:23:21.480 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:23:21.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:23:21.761 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:23:22.239 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:23:22.480 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:23:22.480 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:23:22.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:23:22.480 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:23:22.715 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:23:23.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:23.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:23:23.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:23:23.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:23:23.115 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:23:23.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:23:23.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:23:23.120 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:23:23.120 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:23:23.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:23:23.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:23:23.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:23.122 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:23:23.122 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:23:23.122 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:23:23.122 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:23:23.132 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:23:23.132 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:23:23.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:23.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:23.193 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:23:23.669 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:23:24.145 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:23:24.621 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:23:25.098 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:23:25.575 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:23:26.053 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:23:26.531 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:23:27.009 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:23:27.483 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:23:27.957 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:23:28.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:28.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:23:28.142 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:23:28.142 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:23:28.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:23:28.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:23:28.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:23:28.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:23:28.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:23:28.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:23:28.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:23:28.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:28.167 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:23:28.167 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:23:28.167 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:23:28.167 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:23:28.192 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:23:28.192 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:23:28.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:28.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:28.433 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:23:28.904 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:23:29.375 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:23:29.849 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:23:30.327 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:23:30.805 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:23:31.282 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:23:31.760 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:23:32.231 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:23:32.706 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:23:33.182 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 04:23:33.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:33.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:23:33.197 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:23:33.197 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:23:33.204 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:23:33.204 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:23:33.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:23:33.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:23:33.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:23:33.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:23:33.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:23:33.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:33.211 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:23:33.211 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:23:33.211 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:23:33.211 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:23:33.225 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:23:33.225 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:23:33.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:33.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:33.654 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 04:23:34.127 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 04:23:34.603 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 04:23:35.082 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 04:23:35.559 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 04:23:36.037 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 04:23:36.514 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 04:23:36.993 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 04:23:37.471 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 04:23:37.949 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 04:23:38.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:38.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:23:38.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:23:38.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:23:38.241 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:23:38.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:23:38.242 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:23:38.242 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:23:38.243 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:23:38.243 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:23:38.243 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:23:38.243 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:23:38.243 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:23:38.243 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:23:38.243 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:23:43.246 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:23:43.246 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:23:43.248 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:23:43.249 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:23:43.249 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:23:43.250 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:23:43.255 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:23:43.255 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:23:43.255 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:23:43.256 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:23:43.256 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:23:43.257 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:23:43.257 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:23:43.257 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:23:43.257 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:23:43.257 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:23:43.257 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:23:43.258 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:23:43.258 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:23:43.260 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:23:43.260 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:23:43.260 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:23:43.260 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:23:43.260 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:23:43.260 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:23:43.260 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:23:43.260 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:23:43.261 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:23:43.262 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:23:43.262 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:23:43.262 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:23:43.262 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:23:43.262 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:23:43.262 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:23:43.262 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:23:43.265 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:23:43.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:23:43.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:23:43.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:23:43.265 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:23:43.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:23:43.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:23:43.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:23:43.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:23:43.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:23:43.266 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:23:43.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:23:43.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:23:43.266 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:23:43.266 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:23:43.266 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:23:43.266 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:23:43.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:23:43.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:23:43.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:23:43.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:23:43.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:23:43.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:23:43.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:23:43.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:23:43.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:23:43.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:23:43.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:23:43.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:23:43.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:23:43.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:23:43.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:23:43.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:23:43.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:23:43.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:23:43.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:23:43.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:23:43.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:23:43.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:23:43.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:23:43.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:23:43.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:23:43.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:23:43.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:23:43.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:23:43.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:23:43.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:23:43.271 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:23:43.743 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:23:43.781 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:23:43.782 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:23:43.782 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:23:43.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:23:43.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:23:43.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:23:43.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:23:43.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:23:43.792 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:23:43.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:23:43.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:23:43.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:43.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:23:43.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:23:43.834 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:23:43.834 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:23:43.880 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:23:43.880 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:23:43.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:43.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:44.215 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:23:44.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:23:44.270 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:23:44.270 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:23:44.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:23:44.690 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:23:45.167 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:23:45.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:23:45.272 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:23:45.272 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:23:45.272 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:23:45.644 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:23:46.116 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:23:46.272 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:23:46.272 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:23:46.272 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:23:46.273 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:23:46.590 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:23:47.063 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:23:47.272 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:23:47.273 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:23:47.273 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:23:47.274 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:23:47.536 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:23:48.009 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:23:48.273 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:23:48.274 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:23:48.274 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:23:48.275 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:23:48.482 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:23:48.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:48.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:23:48.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:23:48.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:23:48.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:23:48.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:23:48.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:23:48.913 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:23:48.913 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:23:48.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:23:48.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:23:48.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:48.916 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:23:48.916 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:23:48.916 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:23:48.916 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:23:48.950 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:23:48.950 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:23:48.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:48.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:48.957 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:23:49.433 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:23:49.902 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:23:50.374 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:23:50.844 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:23:51.316 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:23:51.787 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:23:52.259 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:23:52.730 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:23:53.208 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:23:53.685 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:23:53.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:53.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:23:53.959 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:23:53.959 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:23:53.979 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:23:53.979 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:23:53.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:23:53.985 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:23:53.985 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:23:53.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:23:53.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:23:53.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:53.987 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:23:53.987 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:23:53.987 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:23:53.987 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:23:54.011 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:23:54.012 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:23:54.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:54.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:54.161 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:23:54.638 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:23:55.115 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:23:55.588 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:23:56.065 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:23:56.534 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:23:57.005 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:23:57.483 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:23:57.956 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:23:58.430 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:23:58.903 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 04:23:59.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:59.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:23:59.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:23:59.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:23:59.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:23:59.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:23:59.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:23:59.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:23:59.045 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:23:59.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:23:59.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:23:59.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:59.046 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:23:59.046 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:23:59.046 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:23:59.046 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:23:59.087 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:23:59.087 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:23:59.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:59.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:23:59.376 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 04:23:59.851 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 04:24:00.324 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 04:24:00.794 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 04:24:01.261 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 04:24:01.732 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 04:24:02.208 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 04:24:02.681 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 04:24:03.156 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 04:24:03.629 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 04:24:04.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:24:04.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:24:04.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:24:04.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:24:04.104 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:24:04.104 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:24:04.104 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:24:04.104 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:24:04.105 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:24:04.105 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:24:04.105 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:24:04.105 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:24:04.105 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:24:04.105 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:24:04.105 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:24:09.106 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:24:09.106 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:24:09.107 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:24:09.107 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:24:09.108 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:24:09.109 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:24:09.113 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:24:09.114 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:24:09.114 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:24:09.114 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:24:09.114 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:24:09.115 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:24:09.115 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:24:09.116 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:24:09.116 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:24:09.116 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:24:09.116 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:24:09.116 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:24:09.116 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:24:09.117 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:24:09.118 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:24:09.118 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:24:09.118 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:24:09.118 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:24:09.118 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:24:09.118 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:24:09.118 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:24:09.120 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:24:09.120 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:24:09.120 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:24:09.120 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:24:09.120 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:24:09.120 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:24:09.120 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:24:09.120 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:24:09.123 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:24:09.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:24:09.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:24:09.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:24:09.123 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:24:09.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:24:09.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:24:09.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:24:09.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:24:09.124 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:24:09.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:24:09.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:24:09.124 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:24:09.124 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:24:09.124 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:24:09.124 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:24:09.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:24:09.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:24:09.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:24:09.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:24:09.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:24:09.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:24:09.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:24:09.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:24:09.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:24:09.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:24:09.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:24:09.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:24:09.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:24:09.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:24:09.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:24:09.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:24:09.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:24:09.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:24:09.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:24:09.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:24:09.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:24:09.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:24:09.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:24:09.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:24:09.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:24:09.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:24:09.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:24:09.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:24:09.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:24:09.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:24:09.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:24:09.128 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:24:09.599 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:24:09.637 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:24:09.637 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:24:09.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:24:09.638 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:24:09.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:24:09.643 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:24:09.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:24:09.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:24:09.649 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:24:09.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:24:09.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:24:09.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:24:09.683 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:24:09.683 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:24:09.683 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:24:09.683 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:24:09.688 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:24:09.689 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:24:09.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:24:09.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:24:09.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:24:09.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:24:09.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:24:09.916 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:24:09.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:24:09.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:24:09.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:24:09.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:24:09.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:24:09.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:24:09.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:24:09.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:24:09.932 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:24:09.932 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:24:09.932 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:24:09.932 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:24:09.970 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:24:09.970 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:24:09.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:24:09.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:24:10.068 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:24:10.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:24:10.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:24:10.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:24:10.127 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:24:10.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:24:10.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:24:10.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:24:10.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:24:10.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:24:10.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:24:10.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:24:10.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:24:10.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:24:10.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:24:10.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:24:10.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:24:10.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:24:10.363 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:24:10.363 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:24:10.363 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:24:10.389 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:24:10.389 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:24:10.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:24:10.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:24:10.537 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:24:11.005 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:24:11.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:24:11.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:24:11.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:24:11.127 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:24:11.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:24:11.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:24:11.157 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:24:11.157 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:24:11.164 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:24:11.164 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:24:11.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:24:11.170 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:24:11.170 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:24:11.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:24:11.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:24:11.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:24:11.172 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:24:11.172 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:24:11.172 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:24:11.172 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:24:11.184 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:24:11.184 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:24:11.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:24:11.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:24:11.474 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:24:11.942 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:24:12.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:24:12.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:24:12.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:24:12.020 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:24:12.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:24:12.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:24:12.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:24:12.024 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:24:12.026 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:24:12.026 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:24:12.026 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:24:12.026 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:24:12.026 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:24:12.026 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:24:12.026 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=632 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:24:12.026 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:24:12.026 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=632 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:24:12.026 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=632 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:24:12.026 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=632 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:24:12.026 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=632 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:24:12.026 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=632 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:24:17.026 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:24:17.026 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:24:17.027 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:24:17.028 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:24:17.029 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:24:17.030 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:24:17.040 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:24:17.041 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:24:17.041 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:24:17.041 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:24:17.041 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:24:17.044 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:24:17.044 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:24:17.044 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:24:17.044 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:24:17.044 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:24:17.044 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:24:17.044 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:24:17.044 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:24:17.048 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:24:17.048 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:24:17.048 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:24:17.048 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:24:17.048 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:24:17.048 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:24:17.048 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:24:17.048 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:24:17.052 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:24:17.052 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:24:17.052 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:24:17.052 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:24:17.052 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:24:17.052 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:24:17.052 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:24:17.052 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:24:17.058 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:24:17.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:24:17.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:24:17.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:24:17.058 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:24:17.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:24:17.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:24:17.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:24:17.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:24:17.058 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:24:17.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:24:17.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:24:17.058 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:24:17.058 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:24:17.058 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:24:17.058 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:24:17.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:24:17.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:24:17.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:24:17.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:24:17.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:24:17.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:24:17.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:24:17.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:24:17.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:24:17.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:24:17.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:24:17.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:24:17.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:24:17.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:24:17.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:24:17.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:24:17.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:24:17.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:24:17.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:24:17.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:24:17.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:24:17.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:24:17.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:24:17.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:24:17.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:24:17.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:24:17.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:24:17.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:24:17.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:24:17.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:24:17.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:24:17.063 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:24:17.534 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:24:17.581 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:24:17.582 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:24:17.583 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:24:17.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:24:17.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:24:17.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:24:17.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:24:17.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:24:17.610 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:24:17.610 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:24:17.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:24:17.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:24:17.614 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:24:17.614 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:24:17.614 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:24:17.614 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:24:17.625 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:24:17.625 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:24:17.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:24:17.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:24:18.005 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:24:18.063 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:24:18.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:24:18.063 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:24:18.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:24:18.476 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:24:18.945 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:24:19.064 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:24:19.064 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:24:19.064 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:24:19.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:24:19.414 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:24:19.884 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:24:20.065 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:24:20.065 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:24:20.065 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:24:20.066 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:24:20.353 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:24:20.822 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:24:21.065 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:24:21.066 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:24:21.066 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:24:21.067 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:24:21.291 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:24:21.759 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:24:22.066 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:24:22.066 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:24:22.066 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:24:22.068 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:24:22.229 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:24:22.700 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:24:23.169 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:24:23.637 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:24:24.109 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:24:24.579 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:24:25.047 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:24:25.515 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:24:25.984 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:24:26.454 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:24:26.923 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:24:27.393 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:24:27.862 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:24:28.331 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:24:28.801 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:24:29.271 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:24:29.742 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:24:30.213 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:24:30.684 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:24:31.155 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:24:31.625 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:24:32.100 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:24:32.574 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 04:24:33.048 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 04:24:33.521 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 04:24:33.992 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 04:24:34.462 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 04:24:34.933 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 04:24:35.412 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 04:24:35.891 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 04:24:36.368 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 04:24:36.847 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 04:24:37.325 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 04:24:37.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:24:37.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:24:37.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:24:37.633 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:24:37.658 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:24:37.658 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:24:37.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:24:37.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:24:37.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:24:37.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:24:37.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:24:37.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:24:37.667 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:24:37.667 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:24:37.667 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:24:37.667 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:24:37.698 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:24:37.699 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:24:37.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:24:37.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:24:37.802 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 04:24:38.280 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 04:24:38.758 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 04:24:39.237 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 04:24:39.715 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 04:24:40.193 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 04:24:40.671 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 04:24:41.149 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 04:24:41.627 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 04:24:42.106 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 04:24:42.584 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 04:24:43.063 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 04:24:43.541 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 04:24:44.020 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 04:24:44.499 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 04:24:44.977 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 04:24:45.456 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-15 04:24:45.934 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-15 04:24:46.413 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-15 04:24:46.891 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-15 04:24:47.370 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-15 04:24:47.848 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-15 04:24:48.327 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-15 04:24:48.805 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-15 04:24:49.283 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-15 04:24:49.762 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-15 04:24:50.240 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-15 04:24:50.719 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-15 04:24:51.197 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-15 04:24:51.676 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-15 04:24:52.154 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-15 04:24:52.633 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-15 04:24:53.111 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-15 04:24:53.588 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-15 04:24:54.067 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-15 04:24:54.546 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-15 04:24:55.024 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-15 04:24:55.503 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-15 04:24:55.981 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-15 04:24:56.459 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-15 04:24:56.938 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-15 04:24:57.416 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-15 04:24:57.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:24:57.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:24:57.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:24:57.711 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:24:57.726 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:24:57.726 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:24:57.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:24:57.731 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:24:57.731 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:24:57.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:24:57.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:24:57.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:24:57.732 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:24:57.732 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:24:57.732 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:24:57.732 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:24:57.741 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:24:57.741 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:24:57.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:24:57.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:24:57.894 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-15 04:24:58.372 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-15 04:24:58.850 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2025-12-15 04:24:59.327 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2025-12-15 04:24:59.806 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2025-12-15 04:25:00.284 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2025-12-15 04:25:00.762 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2025-12-15 04:25:01.239 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2025-12-15 04:25:01.717 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2025-12-15 04:25:02.195 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2025-12-15 04:25:02.673 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2025-12-15 04:25:03.151 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2025-12-15 04:25:03.629 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2025-12-15 04:25:04.107 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2025-12-15 04:25:04.584 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2025-12-15 04:25:05.063 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2025-12-15 04:25:05.540 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2025-12-15 04:25:06.018 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2025-12-15 04:25:06.496 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2025-12-15 04:25:06.974 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2025-12-15 04:25:07.453 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2025-12-15 04:25:07.931 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2025-12-15 04:25:08.409 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2025-12-15 04:25:08.887 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2025-12-15 04:25:09.365 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2025-12-15 04:25:09.843 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2025-12-15 04:25:10.321 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2025-12-15 04:25:10.799 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2025-12-15 04:25:11.277 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2025-12-15 04:25:11.755 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2025-12-15 04:25:12.233 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2025-12-15 04:25:12.711 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2025-12-15 04:25:13.189 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2025-12-15 04:25:13.667 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2025-12-15 04:25:14.144 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2025-12-15 04:25:14.622 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2025-12-15 04:25:15.100 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2025-12-15 04:25:15.578 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2025-12-15 04:25:16.055 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2025-12-15 04:25:16.534 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2025-12-15 04:25:17.011 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2025-12-15 04:25:17.489 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2025-12-15 04:25:17.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:17.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:25:17.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:25:17.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:25:17.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:25:17.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:25:17.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:25:17.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:25:17.773 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:25:17.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:25:17.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:25:17.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:17.775 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:25:17.775 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:25:17.775 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:25:17.775 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:25:17.816 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:25:17.817 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:25:17.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:17.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:17.967 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2025-12-15 04:25:18.444 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2025-12-15 04:25:18.922 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2025-12-15 04:25:19.399 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2025-12-15 04:25:19.877 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2025-12-15 04:25:20.355 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2025-12-15 04:25:20.833 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2025-12-15 04:25:21.311 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2025-12-15 04:25:21.788 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2025-12-15 04:25:22.267 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2025-12-15 04:25:22.744 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2025-12-15 04:25:23.222 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2025-12-15 04:25:23.699 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2025-12-15 04:25:24.176 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2025-12-15 04:25:24.654 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2025-12-15 04:25:25.132 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2025-12-15 04:25:25.609 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2025-12-15 04:25:26.087 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2025-12-15 04:25:26.564 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2025-12-15 04:25:27.042 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2025-12-15 04:25:27.520 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2025-12-15 04:25:27.998 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2025-12-15 04:25:28.475 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2025-12-15 04:25:28.953 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2025-12-15 04:25:29.431 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2025-12-15 04:25:29.908 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2025-12-15 04:25:30.386 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2025-12-15 04:25:30.863 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2025-12-15 04:25:31.341 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2025-12-15 04:25:31.819 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2025-12-15 04:25:32.297 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2025-12-15 04:25:32.775 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2025-12-15 04:25:33.252 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2025-12-15 04:25:33.730 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2025-12-15 04:25:34.208 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2025-12-15 04:25:34.686 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2025-12-15 04:25:35.164 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2025-12-15 04:25:35.641 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2025-12-15 04:25:36.120 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2025-12-15 04:25:36.599 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2025-12-15 04:25:37.076 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2025-12-15 04:25:37.554 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2025-12-15 04:25:37.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:37.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:25:37.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:25:37.831 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:25:37.846 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:25:37.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:25:37.846 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:25:37.846 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:25:37.847 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:25:37.847 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:25:37.847 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:25:37.848 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:25:37.848 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:25:37.848 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:25:37.848 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:25:42.850 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:25:42.851 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:25:42.852 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:25:42.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:25:42.853 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:25:42.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:25:42.867 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:25:42.869 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:25:42.869 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:25:42.870 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:25:42.870 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:25:42.876 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:25:42.877 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:25:42.877 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:25:42.877 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:25:42.878 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:25:42.878 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:25:42.879 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:25:42.879 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:25:42.883 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:25:42.884 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:25:42.884 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:25:42.884 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:25:42.885 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:25:42.885 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:25:42.886 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:25:42.886 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:25:42.889 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:25:42.890 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:25:42.890 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:25:42.890 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:25:42.890 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:25:42.890 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:25:42.891 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:25:42.891 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:25:42.897 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:25:42.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:25:42.897 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:25:42.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:25:42.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:25:42.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:25:42.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:25:42.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:25:42.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:25:42.898 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:25:42.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:25:42.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:25:42.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:25:42.899 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:25:42.899 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:25:42.899 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:25:42.899 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:25:42.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:25:42.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:25:42.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:25:42.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:25:42.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:25:42.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:25:42.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:25:42.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:25:42.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:25:42.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:25:42.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:25:42.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:25:42.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:25:42.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:25:42.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:25:42.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:25:42.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:25:42.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:25:42.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:25:42.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:25:42.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:25:42.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:25:42.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:25:42.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:25:42.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:25:42.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:25:42.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:25:42.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:25:42.902 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:25:42.902 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:25:42.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:25:42.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:25:42.902 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:25:42.902 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:25:42.902 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:25:42.902 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:25:42.902 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:25:47.906 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:25:47.906 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:25:47.908 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:25:47.908 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:25:47.909 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:25:47.909 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:25:47.917 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:25:47.918 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:25:47.918 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:25:47.919 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:25:47.919 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:25:47.927 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:25:47.928 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:25:47.928 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:25:47.929 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:25:47.929 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:25:47.930 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:25:47.930 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:25:47.930 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:25:47.938 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:25:47.939 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:25:47.940 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:25:47.940 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:25:47.940 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:25:47.941 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:25:47.942 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:25:47.942 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:25:47.946 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:25:47.946 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:25:47.947 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:25:47.947 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:25:47.947 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:25:47.948 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:25:47.948 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:25:47.948 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:25:47.957 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:25:47.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:25:47.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:25:47.958 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:25:47.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:25:47.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:25:47.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:25:47.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:25:47.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:25:47.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:25:47.959 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:25:47.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:25:47.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:25:47.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:25:47.959 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:25:47.959 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:25:47.959 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:25:47.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:25:47.960 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:25:47.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:25:47.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:25:47.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:25:47.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:25:47.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:25:47.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:25:47.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:25:47.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:25:47.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:25:47.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:25:47.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:25:47.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:25:47.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:25:47.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:25:47.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:25:47.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:25:47.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:25:47.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:25:47.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:25:47.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:25:47.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:25:47.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:25:47.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:25:47.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:25:47.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:25:47.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:25:47.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:25:47.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:25:47.965 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:25:48.449 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:25:48.480 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:25:48.481 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:25:48.481 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:25:48.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:25:48.492 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:25:48.492 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:25:48.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:25:48.504 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:25:48.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:25:48.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:25:48.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:25:48.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:48.535 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:25:48.535 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:25:48.536 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:25:48.536 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:25:48.542 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:25:48.543 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:25:48.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:48.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:48.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:48.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:25:48.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:25:48.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:25:48.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:25:48.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:25:48.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:25:48.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:25:48.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:48.766 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:25:48.766 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:25:48.766 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:25:48.766 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:25:48.773 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:25:48.773 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:25:48.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:48.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:48.927 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:25:48.964 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:25:48.965 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:25:48.965 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:25:48.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:25:48.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:48.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:25:48.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:25:48.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:25:49.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:25:49.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:25:49.011 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:25:49.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:25:49.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:49.013 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:25:49.013 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:25:49.013 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:25:49.013 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:25:49.015 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:25:49.015 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:25:49.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:49.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:49.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:49.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:25:49.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:25:49.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:25:49.235 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:25:49.235 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:25:49.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:25:49.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:25:49.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:25:49.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:25:49.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:25:49.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:49.242 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:25:49.242 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:25:49.242 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:25:49.242 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:25:49.251 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:25:49.252 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:25:49.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:49.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:49.404 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:25:49.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:49.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:25:49.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:25:49.542 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:25:49.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:25:49.553 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:25:49.553 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:25:49.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:25:49.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:49.554 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:25:49.554 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:25:49.554 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:25:49.554 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:25:49.587 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:25:49.587 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:25:49.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:49.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:49.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:49.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:25:49.864 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:25:49.865 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:25:49.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:25:49.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:25:49.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:25:49.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:25:49.881 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:25:49.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:49.883 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:25:49.883 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:25:49.883 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:25:49.883 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:25:49.927 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:25:49.927 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:25:49.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:49.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:49.965 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:25:49.965 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:25:49.966 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:25:49.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:25:50.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:50.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:25:50.231 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:25:50.231 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:25:50.248 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:25:50.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:25:50.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:25:50.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:25:50.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:25:50.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:25:50.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:25:50.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:50.256 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:25:50.256 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:25:50.256 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:25:50.256 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:25:50.300 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:25:50.301 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:25:50.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:50.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:50.358 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:25:50.836 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:25:50.965 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:25:50.966 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:25:50.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:25:50.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:25:51.314 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:25:51.791 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:25:51.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:25:51.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:25:51.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:25:51.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:25:52.269 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:25:52.747 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:25:52.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:52.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:25:52.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:25:52.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:25:52.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:25:52.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:25:52.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:25:52.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:25:52.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:52.927 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:25:52.927 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:25:52.927 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:25:52.927 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:25:52.968 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:25:52.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:25:52.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:25:52.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:25:52.982 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:25:52.982 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:25:52.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:52.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:53.224 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:25:53.702 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:25:54.180 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:25:54.657 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:25:55.135 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:25:55.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:55.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:25:55.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:25:55.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:25:55.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:25:55.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:25:55.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:25:55.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:25:55.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:55.549 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:25:55.549 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:25:55.549 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:25:55.549 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:25:55.551 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:25:55.551 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:25:55.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:55.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:55.612 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:25:56.090 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:25:56.567 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:25:57.045 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:25:57.523 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:25:58.001 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:25:58.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:58.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:25:58.162 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:25:58.163 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:25:58.179 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:25:58.179 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:25:58.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:25:58.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:25:58.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:25:58.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:25:58.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:25:58.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:58.187 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:25:58.187 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:25:58.187 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:25:58.187 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:25:58.236 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:25:58.236 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:25:58.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:58.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:25:58.479 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:25:58.957 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:25:59.434 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:25:59.912 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:26:00.390 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:26:00.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:00.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:26:00.713 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:00.713 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:00.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:26:00.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:00.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:00.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:26:00.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:00.731 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:26:00.731 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:26:00.731 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:26:00.731 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:26:00.764 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:26:00.764 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:26:00.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:00.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:00.867 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:26:01.345 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:26:01.823 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:26:02.301 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:26:02.779 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:26:03.256 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:26:03.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:03.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:26:03.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:03.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:03.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:26:03.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:03.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:03.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:26:03.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:03.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:26:03.363 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:26:03.363 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:26:03.363 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:26:03.394 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:26:03.395 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:26:03.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:03.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:03.734 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 04:26:04.212 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 04:26:04.690 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 04:26:05.169 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 04:26:05.647 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 04:26:05.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:05.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:26:05.970 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:05.970 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:05.985 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:26:05.985 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:26:05.986 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:26:05.986 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:26:05.987 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:26:05.987 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:26:05.987 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:26:05.987 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:26:05.988 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:26:05.988 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:26:05.988 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:26:10.992 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:26:10.992 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:26:10.992 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:26:10.993 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:26:10.994 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:26:10.995 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:26:11.003 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:26:11.005 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:26:11.005 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:26:11.005 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:26:11.005 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:26:11.009 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:26:11.009 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:26:11.009 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:26:11.009 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:26:11.010 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:26:11.010 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:26:11.010 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:26:11.010 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:26:11.012 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:26:11.012 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:26:11.013 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:26:11.013 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:26:11.013 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:26:11.013 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:26:11.013 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:26:11.013 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:26:11.015 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:26:11.015 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:26:11.016 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:26:11.016 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:26:11.016 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:26:11.016 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:26:11.016 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:26:11.016 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:26:11.019 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:26:11.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:26:11.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:26:11.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:26:11.020 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:26:11.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:26:11.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:26:11.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:26:11.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:26:11.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:26:11.020 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:26:11.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:26:11.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:26:11.020 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:26:11.020 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:26:11.020 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:26:11.020 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:26:11.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:26:11.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:26:11.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:26:11.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:26:11.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:26:11.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:26:11.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:26:11.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:26:11.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:26:11.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:26:11.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:26:11.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:26:11.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:26:11.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:26:11.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:26:11.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:26:11.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:26:11.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:26:11.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:26:11.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:26:11.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:26:11.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:26:11.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:26:11.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:26:11.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:26:11.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:26:11.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:26:11.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:26:11.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:26:11.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:26:11.025 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:26:11.510 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:26:11.540 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:26:11.542 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:26:11.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:26:11.544 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:26:11.563 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:11.563 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:11.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:26:11.584 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:11.584 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:11.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:26:11.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:26:11.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:11.590 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:26:11.590 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:26:11.590 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:26:11.590 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:26:11.602 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:26:11.602 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:26:11.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:11.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:11.986 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:26:12.023 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:26:12.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:26:12.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:26:12.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:26:12.465 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:26:12.943 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:26:13.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:26:13.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:26:13.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:26:13.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:26:13.421 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:26:13.899 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:26:14.027 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:26:14.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:26:14.027 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:26:14.027 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:26:14.377 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:26:14.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:14.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:26:14.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:14.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:14.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:14.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:14.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:26:14.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:14.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:14.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:26:14.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:26:14.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:14.749 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:26:14.749 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:26:14.749 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:26:14.749 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:26:14.797 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:26:14.797 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:26:14.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:14.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:14.855 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:26:15.037 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:26:15.037 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:26:15.037 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:26:15.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:26:15.333 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:26:15.811 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:26:16.038 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:26:16.039 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:26:16.039 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:26:16.039 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:26:16.290 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:26:16.768 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:26:17.246 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:26:17.725 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:26:17.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:17.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:26:17.981 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:17.981 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:17.997 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:17.997 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:17.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:26:18.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:26:18.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:18.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:18.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:26:18.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:18.005 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:26:18.005 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:26:18.005 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:26:18.005 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:26:18.054 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:26:18.054 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:26:18.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:18.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:18.201 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:26:18.680 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:26:19.159 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:26:19.636 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:26:20.114 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:26:20.592 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:26:21.070 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:26:21.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:21.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:26:21.192 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:21.192 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:21.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:21.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:21.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:26:21.207 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:21.207 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:21.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:26:21.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:26:21.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:21.208 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:26:21.208 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:26:21.208 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:26:21.208 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:26:21.254 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:26:21.254 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:26:21.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:21.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:21.546 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:26:22.024 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:26:22.502 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:26:22.980 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:26:23.457 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:26:23.935 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:26:24.413 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:26:24.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:24.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:26:24.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:24.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:24.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:26:24.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:26:24.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:26:24.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:26:24.479 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:26:24.479 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:26:24.479 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:26:24.479 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:26:24.479 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:26:24.479 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:26:24.480 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:26:24.480 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2872 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:26:24.480 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2872 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:26:24.480 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2872 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:26:29.482 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:26:29.482 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:26:29.485 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:26:29.485 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:26:29.485 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:26:29.488 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:26:29.497 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:26:29.498 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:26:29.498 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:26:29.498 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:26:29.498 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:26:29.502 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:26:29.502 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:26:29.502 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:26:29.502 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:26:29.502 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:26:29.503 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:26:29.503 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:26:29.503 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:26:29.506 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:26:29.506 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:26:29.506 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:26:29.506 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:26:29.506 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:26:29.506 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:26:29.507 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:26:29.507 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:26:29.510 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:26:29.510 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:26:29.510 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:26:29.510 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:26:29.510 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:26:29.510 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:26:29.511 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:26:29.511 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:26:29.515 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:26:29.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:26:29.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:26:29.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:26:29.515 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:26:29.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:26:29.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:26:29.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:26:29.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:26:29.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:26:29.516 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:26:29.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:26:29.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:26:29.516 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:26:29.516 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:26:29.516 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:26:29.516 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:26:29.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:26:29.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:26:29.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:26:29.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:26:29.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:26:29.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:26:29.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:26:29.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:26:29.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:26:29.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:26:29.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:26:29.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:26:29.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:26:29.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:26:29.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:26:29.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:26:29.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:26:29.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:26:29.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:26:29.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:26:29.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:26:29.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:26:29.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:26:29.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:26:29.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:26:29.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:26:29.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:26:29.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:26:29.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:26:29.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:26:29.521 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:26:30.005 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:26:30.034 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:26:30.035 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:26:30.036 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:26:30.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:26:30.046 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:30.046 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:30.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:26:30.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:30.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:30.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:26:30.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:26:30.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:30.085 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:26:30.085 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:26:30.085 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:26:30.085 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:26:30.098 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:26:30.098 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:26:30.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:30.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:30.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:30.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:26:30.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:30.424 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:30.441 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:30.441 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:30.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:26:30.447 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:30.447 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:30.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:26:30.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:26:30.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:30.449 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:26:30.449 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:26:30.449 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:26:30.449 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:26:30.476 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:26:30.476 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:26:30.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:30.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:30.481 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:26:30.519 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:26:30.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:26:30.520 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:26:30.521 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:26:30.958 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:26:30.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:30.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:26:30.965 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:30.965 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:30.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:30.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:30.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:26:30.988 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:30.988 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:30.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:26:30.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:26:30.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:30.990 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:26:30.990 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:26:30.990 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:26:30.990 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:26:31.001 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:26:31.001 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:26:31.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:31.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:31.435 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:26:31.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:26:31.521 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:26:31.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:26:31.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:26:31.913 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:26:32.391 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:26:32.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:26:32.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:26:32.522 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:26:32.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:26:32.869 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:26:33.347 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:26:33.523 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:26:33.523 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:26:33.523 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:26:33.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:26:33.825 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:26:33.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:33.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:26:33.985 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:33.985 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:34.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:34.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:34.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:26:34.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:34.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:34.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:26:34.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:26:34.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:34.011 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:26:34.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:26:34.011 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:26:34.011 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:26:34.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:26:34.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:26:34.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:34.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:34.301 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:26:34.524 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:26:34.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:26:34.524 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:26:34.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:26:34.780 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:26:35.258 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:26:35.736 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:26:36.214 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:26:36.692 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:26:37.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:37.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:26:37.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:37.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:37.028 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:26:37.028 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:26:37.029 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:26:37.029 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:26:37.035 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:26:37.035 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:26:37.035 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:26:37.035 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:26:37.035 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:26:37.035 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:26:37.036 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:26:37.036 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1605 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:26:37.036 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1605 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:26:37.036 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1605 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:26:37.036 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1605 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:26:37.036 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1605 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:26:37.037 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1605 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:26:37.037 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1606 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:26:37.037 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1606 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:26:37.037 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1606 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:26:37.037 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1606 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:26:37.037 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1606 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:26:37.037 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1606 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:26:37.037 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1606 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:26:37.037 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1606 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:26:42.032 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:26:42.032 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:26:42.034 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:26:42.034 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:26:42.035 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:26:42.036 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:26:42.043 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:26:42.044 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:26:42.044 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:26:42.045 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:26:42.045 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:26:42.048 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:26:42.049 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:26:42.049 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:26:42.049 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:26:42.049 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:26:42.050 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:26:42.050 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:26:42.050 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:26:42.052 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:26:42.052 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:26:42.052 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:26:42.052 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:26:42.052 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:26:42.052 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:26:42.052 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:26:42.053 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:26:42.055 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:26:42.055 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:26:42.055 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:26:42.055 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:26:42.055 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:26:42.055 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:26:42.055 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:26:42.055 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:26:42.059 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:26:42.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:26:42.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:26:42.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:26:42.059 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:26:42.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:26:42.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:26:42.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:26:42.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:26:42.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:26:42.060 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:26:42.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:26:42.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:26:42.060 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:26:42.060 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:26:42.060 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:26:42.060 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:26:42.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:26:42.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:26:42.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:26:42.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:26:42.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:26:42.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:26:42.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:26:42.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:26:42.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:26:42.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:26:42.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:26:42.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:26:42.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:26:42.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:26:42.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:26:42.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:26:42.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:26:42.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:26:42.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:26:42.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:26:42.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:26:42.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:26:42.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:26:42.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:26:42.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:26:42.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:26:42.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:26:42.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:26:42.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:26:42.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:26:42.065 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:26:42.549 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:26:42.578 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:26:42.579 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:26:42.580 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:26:42.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:26:42.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:42.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:42.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:26:42.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:42.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:42.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:26:42.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:26:42.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:42.634 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:26:42.634 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:26:42.634 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:26:42.634 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:26:42.643 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:26:42.643 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:26:42.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:42.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:43.025 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:26:43.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:26:43.064 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:26:43.064 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:26:43.064 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:26:43.503 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:26:43.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:43.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:26:43.965 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:43.965 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:43.982 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:26:43.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:43.983 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:43.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:26:43.989 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:43.989 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:43.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:26:43.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:26:43.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:43.991 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:26:43.991 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:26:43.991 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:26:43.991 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:26:44.027 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:26:44.027 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:26:44.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:44.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:44.064 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:26:44.064 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:26:44.064 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:26:44.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:26:44.458 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:26:44.937 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:26:45.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:26:45.066 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:26:45.066 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:26:45.066 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:26:45.415 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:26:45.894 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:26:46.066 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:26:46.066 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:26:46.067 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:26:46.067 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:26:46.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:46.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:26:46.183 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:46.183 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:46.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:46.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:46.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:26:46.205 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:46.205 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:46.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:26:46.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:26:46.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:46.207 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:26:46.207 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:26:46.207 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:26:46.207 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:26:46.219 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:26:46.219 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:26:46.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:46.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:46.372 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:26:46.850 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:26:47.067 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:26:47.067 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:26:47.067 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:26:47.067 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:26:47.328 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:26:47.806 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:26:48.284 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:26:48.762 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:26:49.241 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:26:49.719 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:26:50.196 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:26:50.674 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:26:51.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:51.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:26:51.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:51.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:51.152 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:26:51.157 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:51.157 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:51.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:26:51.164 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:51.164 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:51.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:26:51.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:26:51.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:51.166 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:26:51.166 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:26:51.166 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:26:51.166 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:26:51.198 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:26:51.198 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:26:51.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:51.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:51.629 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:26:52.106 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:26:52.584 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:26:53.061 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:26:53.539 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:26:54.017 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:26:54.495 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:26:54.973 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:26:55.450 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:26:55.929 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:26:56.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:26:56.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:26:56.087 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:26:56.087 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:26:56.087 [WARNING] transceiver.py:250 (MS@172.18.144.22:6700) RX TRXD message (fn=2994 tn=5 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:26:56.099 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:26:56.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:26:56.100 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:26:56.100 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:26:56.106 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:26:56.106 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:26:56.107 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:26:56.107 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:26:56.107 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:26:56.107 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2998 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:26:56.108 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:26:56.108 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:26:56.108 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2998 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:26:56.108 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2998 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:26:56.108 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2998 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:26:56.108 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2998 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:27:01.104 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:27:01.104 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:27:01.107 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:27:01.108 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:27:01.108 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:27:01.109 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:27:01.121 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:27:01.122 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:27:01.123 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:27:01.123 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:27:01.123 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:27:01.126 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:27:01.126 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:27:01.126 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:27:01.126 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:27:01.126 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:27:01.126 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:27:01.127 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:27:01.127 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:27:01.129 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:27:01.129 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:27:01.129 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:27:01.129 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:27:01.129 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:27:01.129 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:27:01.130 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:27:01.130 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:27:01.132 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:27:01.132 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:27:01.132 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:27:01.132 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:27:01.132 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:27:01.132 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:27:01.132 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:27:01.132 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:27:01.135 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:27:01.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:27:01.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:27:01.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:27:01.135 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:27:01.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:27:01.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:27:01.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:27:01.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:27:01.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:27:01.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:27:01.136 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:27:01.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:27:01.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:27:01.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:27:01.136 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:27:01.136 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:27:01.136 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:27:01.136 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:27:01.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:27:01.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:27:01.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:27:01.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:27:01.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:27:01.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:27:01.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:27:01.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:27:01.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:27:01.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:27:01.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:27:01.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:27:01.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:27:01.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:27:01.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:27:01.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:27:01.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:27:01.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:27:01.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:27:01.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:27:01.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:27:01.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:27:01.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:27:01.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:27:01.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:27:01.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:27:01.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:27:01.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:27:01.141 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:27:01.612 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:27:01.653 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:27:01.654 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:27:01.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:27:01.655 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:27:01.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:01.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:01.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:27:01.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:01.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:01.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:27:01.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:27:01.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:01.708 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:27:01.709 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:27:01.709 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:27:01.709 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:27:01.749 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:27:01.750 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:27:01.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:01.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:02.081 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:27:02.139 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:27:02.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:27:02.140 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:27:02.140 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:27:02.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:02.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:27:02.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:02.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:02.376 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:02.376 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:02.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:27:02.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:02.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:02.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:27:02.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:27:02.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:02.389 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:27:02.389 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:27:02.389 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:27:02.389 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:27:02.403 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:27:02.403 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:27:02.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:02.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:02.550 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:27:03.024 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:27:03.140 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:27:03.140 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:27:03.141 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:27:03.141 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:27:03.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:03.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:27:03.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:03.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:03.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:03.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:03.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:27:03.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:03.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:03.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:27:03.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:27:03.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:03.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:27:03.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:27:03.345 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:27:03.345 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:27:03.393 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:27:03.393 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:27:03.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:03.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:03.501 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:27:03.976 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:27:04.140 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:27:04.140 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:27:04.141 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:27:04.141 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:27:04.447 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:27:04.918 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:27:05.141 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:27:05.141 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:27:05.142 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:27:05.142 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:27:05.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:05.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:27:05.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:05.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:05.315 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:05.315 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:05.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:27:05.320 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:05.320 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:05.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:27:05.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:27:05.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:05.321 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:27:05.321 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:27:05.321 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:27:05.321 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:27:05.334 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:27:05.334 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:27:05.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:05.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:05.388 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:27:05.858 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:27:06.141 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:27:06.141 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:27:06.142 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:27:06.143 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:27:06.330 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:27:06.801 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:27:07.272 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:27:07.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:27:07.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:07.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:07.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:07.351 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:27:07.351 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:27:07.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:27:07.351 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:27:07.352 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:27:07.352 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:27:07.353 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:27:07.353 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:27:07.353 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:27:07.353 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:27:07.353 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:27:07.353 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1346 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:27:07.353 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1346 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:27:07.353 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1346 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:27:07.353 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1346 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:27:07.353 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1346 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:27:07.353 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1346 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:27:07.353 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1346 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:27:12.356 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:27:12.356 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:27:12.358 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:27:12.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:27:12.362 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:27:12.365 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:27:12.374 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:27:12.375 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:27:12.375 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:27:12.375 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:27:12.375 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:27:12.377 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:27:12.377 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:27:12.378 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:27:12.378 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:27:12.378 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:27:12.378 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:27:12.378 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:27:12.378 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:27:12.381 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:27:12.381 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:27:12.381 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:27:12.381 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:27:12.381 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:27:12.381 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:27:12.381 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:27:12.381 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:27:12.383 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:27:12.383 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:27:12.383 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:27:12.383 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:27:12.383 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:27:12.383 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:27:12.383 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:27:12.383 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:27:12.387 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:27:12.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:27:12.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:27:12.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:27:12.388 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:27:12.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:27:12.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:27:12.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:27:12.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:27:12.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:27:12.388 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:27:12.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:27:12.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:27:12.388 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:27:12.388 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:27:12.388 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:27:12.388 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:27:12.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:27:12.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:27:12.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:27:12.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:27:12.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:27:12.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:27:12.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:27:12.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:27:12.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:27:12.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:27:12.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:27:12.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:27:12.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:27:12.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:27:12.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:27:12.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:27:12.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:27:12.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:27:12.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:27:12.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:27:12.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:27:12.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:27:12.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:27:12.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:27:12.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:27:12.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:27:12.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:27:12.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:27:12.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:27:12.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:27:12.393 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:27:12.869 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:27:12.902 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:27:12.902 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:27:12.903 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:27:12.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:27:12.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:12.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:12.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:27:12.913 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:12.913 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:12.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:27:12.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:27:12.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:12.947 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:27:12.947 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:27:12.947 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:27:12.947 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:27:12.959 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:27:12.959 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:27:12.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:12.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:13.342 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:27:13.391 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:27:13.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:27:13.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:27:13.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:27:13.814 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:27:14.289 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:27:14.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:27:14.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:27:14.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:27:14.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:27:14.763 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:27:15.236 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:27:15.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:15.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:27:15.381 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:15.381 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:15.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:27:15.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:27:15.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:27:15.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:27:15.394 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:15.394 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:15.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:27:15.400 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:15.400 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:15.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:27:15.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:27:15.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:15.402 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:27:15.403 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:27:15.403 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:27:15.403 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:27:15.417 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:27:15.417 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:27:15.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:15.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:15.708 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:27:16.179 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:27:16.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:27:16.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:27:16.394 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:27:16.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:27:16.649 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:27:17.120 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:27:17.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:27:17.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:27:17.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:27:17.395 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:27:17.593 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:27:18.062 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:27:18.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:18.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:27:18.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:18.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:18.126 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:18.126 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:18.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:27:18.132 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:18.132 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:18.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:27:18.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:27:18.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:18.134 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:27:18.134 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:27:18.134 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:27:18.134 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:27:18.150 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:27:18.150 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:27:18.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:18.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:18.536 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:27:19.009 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:27:19.478 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:27:19.947 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:27:20.417 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:27:20.889 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:27:21.359 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:27:21.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:21.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:27:21.521 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:21.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:21.545 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:21.545 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:21.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:27:21.558 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:21.558 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:21.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:27:21.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:27:21.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:21.564 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:27:21.564 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:27:21.565 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:27:21.565 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:27:21.590 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:27:21.590 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:27:21.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:21.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:21.831 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:27:22.306 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:27:22.784 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:27:23.258 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:27:23.729 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:27:24.199 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:27:24.669 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:27:24.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:24.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:27:24.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:24.984 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:24.987 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:27:24.987 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:27:24.987 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:27:24.987 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:27:24.988 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:27:24.988 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:27:24.988 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:27:24.988 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:27:24.988 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:27:24.988 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:27:24.988 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:27:29.989 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:27:29.989 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:27:29.990 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:27:29.991 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:27:29.991 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:27:29.992 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:27:29.996 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:27:29.996 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:27:29.996 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:27:29.997 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:27:29.997 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:27:29.998 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:27:29.998 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:27:29.998 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:27:29.998 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:27:29.998 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:27:29.998 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:27:29.998 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:27:29.998 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:27:29.999 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:27:30.000 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:27:30.000 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:27:30.000 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:27:30.000 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:27:30.000 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:27:30.000 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:27:30.000 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:27:30.001 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:27:30.001 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:27:30.001 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:27:30.001 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:27:30.001 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:27:30.001 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:27:30.002 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:27:30.002 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:27:30.004 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:27:30.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:27:30.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:27:30.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:27:30.004 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:27:30.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:27:30.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:27:30.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:27:30.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:27:30.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:27:30.004 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:27:30.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:27:30.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:27:30.005 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:27:30.005 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:27:30.005 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:27:30.005 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:27:30.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:27:30.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:27:30.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:27:30.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:27:30.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:27:30.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:27:30.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:27:30.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:27:30.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:27:30.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:27:30.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:27:30.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:27:30.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:27:30.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:27:30.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:27:30.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:27:30.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:27:30.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:27:30.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:27:30.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:27:30.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:27:30.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:27:30.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:27:30.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:27:30.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:27:30.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:27:30.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:27:30.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:27:30.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:27:30.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:27:30.009 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:27:30.481 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:27:30.524 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:27:30.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:27:30.526 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:27:30.528 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:27:30.540 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:30.540 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:30.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:27:30.549 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:30.550 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:30.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:27:30.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:27:30.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:30.575 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:27:30.575 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:27:30.575 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:27:30.575 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:27:30.616 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:27:30.616 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:27:30.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:30.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:30.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:30.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:27:30.816 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:30.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:30.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:30.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:30.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:27:30.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:30.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:30.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:27:30.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:27:30.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:30.830 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:27:30.830 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:27:30.830 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:27:30.830 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:27:30.852 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:27:30.852 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:27:30.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:30.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:30.949 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:27:31.007 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:27:31.007 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:27:31.008 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:27:31.008 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:27:31.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:31.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:27:31.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:31.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:31.205 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:31.205 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:31.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:27:31.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:31.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:31.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:27:31.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:27:31.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:31.213 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:27:31.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:27:31.213 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:27:31.213 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:27:31.226 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:27:31.226 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:27:31.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:31.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:31.419 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:27:31.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:31.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:27:31.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:31.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:31.829 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:31.829 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:31.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:27:31.834 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:31.834 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:31.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:27:31.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:27:31.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:31.836 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:27:31.836 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:27:31.836 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:27:31.836 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:27:31.887 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:27:31.887 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:27:31.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:31.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:31.894 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:27:32.008 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:27:32.009 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:27:32.009 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:27:32.009 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:27:32.368 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:27:32.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:32.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:27:32.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:32.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:32.460 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:27:32.460 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:27:32.460 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:27:32.460 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:27:32.462 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:27:32.462 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:27:32.462 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:27:32.462 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:27:32.462 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:27:32.462 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:27:32.462 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:27:32.462 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=533 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:27:37.462 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:27:37.462 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:27:37.463 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:27:37.463 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:27:37.464 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:27:37.465 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:27:37.471 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:27:37.472 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:27:37.472 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:27:37.472 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:27:37.472 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:27:37.473 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:27:37.473 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:27:37.474 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:27:37.474 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:27:37.474 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:27:37.474 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:27:37.474 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:27:37.474 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:27:37.475 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:27:37.475 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:27:37.475 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:27:37.475 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:27:37.475 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:27:37.475 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:27:37.476 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:27:37.476 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:27:37.477 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:27:37.477 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:27:37.477 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:27:37.477 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:27:37.477 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:27:37.477 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:27:37.477 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:27:37.477 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:27:37.480 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:27:37.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:27:37.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:27:37.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:27:37.480 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:27:37.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:27:37.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:27:37.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:27:37.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:27:37.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:27:37.480 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:27:37.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:27:37.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:27:37.481 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:27:37.481 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:27:37.481 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:27:37.481 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:27:37.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:27:37.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:27:37.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:27:37.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:27:37.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:27:37.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:27:37.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:27:37.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:27:37.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:27:37.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:27:37.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:27:37.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:27:37.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:27:37.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:27:37.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:27:37.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:27:37.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:27:37.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:27:37.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:27:37.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:27:37.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:27:37.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:27:37.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:27:37.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:27:37.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:27:37.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:27:37.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:27:37.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:27:37.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:27:37.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:27:37.485 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:27:37.956 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:27:37.997 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:27:37.997 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:27:37.998 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:27:37.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:27:38.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:38.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:38.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:27:38.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:27:38.012 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:27:38.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:27:38.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:27:38.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:38.014 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:27:38.014 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:27:38.014 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:27:38.014 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:27:38.046 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:27:38.046 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:27:38.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:38.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:27:38.428 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:27:38.483 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:27:38.483 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:27:38.484 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:27:38.485 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:27:38.900 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:27:39.373 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:27:39.484 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:27:39.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:27:39.485 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:27:39.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:27:39.844 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:27:40.319 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:27:40.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:27:40.485 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:27:40.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:27:40.487 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:27:40.792 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:27:41.264 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:27:41.487 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:27:41.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:27:41.487 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:27:41.488 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:27:41.739 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:27:42.214 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:27:42.487 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:27:42.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:27:42.488 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:27:42.488 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:27:42.684 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:27:43.157 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:27:43.633 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:27:44.112 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:27:44.590 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:27:45.068 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:27:45.545 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:27:46.024 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:27:46.502 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:27:46.981 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:27:47.459 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:27:47.937 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:27:48.415 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:27:48.893 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:27:49.371 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:27:49.850 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:27:50.329 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:27:50.803 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:27:51.275 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:27:51.745 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:27:52.214 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:27:52.686 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:27:53.165 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 04:27:53.639 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 04:27:54.110 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 04:27:54.580 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 04:27:55.052 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 04:27:55.521 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 04:27:55.992 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 04:27:56.460 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 04:27:56.929 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 04:27:57.398 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 04:27:57.866 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 04:27:58.335 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 04:27:58.803 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 04:27:59.272 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 04:27:59.740 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 04:28:00.208 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 04:28:00.678 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 04:28:01.147 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 04:28:01.616 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 04:28:02.085 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 04:28:02.554 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 04:28:03.023 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 04:28:03.491 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 04:28:03.960 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 04:28:04.430 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 04:28:04.908 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 04:28:05.385 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 04:28:05.856 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-15 04:28:06.327 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-15 04:28:06.795 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-15 04:28:07.263 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-15 04:28:07.733 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-15 04:28:08.204 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-15 04:28:08.673 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-15 04:28:09.142 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-15 04:28:09.611 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-15 04:28:10.079 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-15 04:28:10.549 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-15 04:28:11.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:28:11.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:28:11.018 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-15 04:28:11.026 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:28:11.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:28:11.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:28:11.050 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:28:11.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:28:11.058 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:28:11.058 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:28:11.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:28:11.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:28:11.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:28:11.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:28:11.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:28:11.060 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:28:11.060 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:28:11.108 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:28:11.108 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:28:11.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:28:11.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:28:11.496 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-15 04:28:11.973 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-15 04:28:12.444 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-15 04:28:12.914 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-15 04:28:13.383 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-15 04:28:13.854 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-15 04:28:14.324 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-15 04:28:14.795 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-15 04:28:15.265 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-15 04:28:15.734 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-15 04:28:16.202 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-15 04:28:16.672 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-15 04:28:17.141 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-15 04:28:17.616 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-15 04:28:18.095 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-15 04:28:18.566 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-15 04:28:19.036 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2025-12-15 04:28:19.505 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2025-12-15 04:28:19.973 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2025-12-15 04:28:20.442 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2025-12-15 04:28:20.910 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2025-12-15 04:28:21.379 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2025-12-15 04:28:21.847 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2025-12-15 04:28:22.316 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2025-12-15 04:28:22.786 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2025-12-15 04:28:23.262 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2025-12-15 04:28:23.732 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2025-12-15 04:28:24.200 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2025-12-15 04:28:24.671 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2025-12-15 04:28:25.143 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2025-12-15 04:28:25.611 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2025-12-15 04:28:26.079 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2025-12-15 04:28:26.546 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2025-12-15 04:28:27.016 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2025-12-15 04:28:27.491 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2025-12-15 04:28:27.961 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2025-12-15 04:28:28.429 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2025-12-15 04:28:28.897 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2025-12-15 04:28:29.365 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2025-12-15 04:28:29.835 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2025-12-15 04:28:30.306 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2025-12-15 04:28:30.775 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2025-12-15 04:28:31.244 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2025-12-15 04:28:31.712 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2025-12-15 04:28:32.180 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2025-12-15 04:28:32.651 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2025-12-15 04:28:33.120 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2025-12-15 04:28:33.589 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2025-12-15 04:28:34.057 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2025-12-15 04:28:34.527 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2025-12-15 04:28:34.995 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2025-12-15 04:28:35.463 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2025-12-15 04:28:35.931 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2025-12-15 04:28:36.400 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2025-12-15 04:28:36.869 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2025-12-15 04:28:37.338 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2025-12-15 04:28:37.807 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2025-12-15 04:28:38.278 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2025-12-15 04:28:38.748 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2025-12-15 04:28:39.219 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2025-12-15 04:28:39.690 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2025-12-15 04:28:40.159 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2025-12-15 04:28:40.628 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2025-12-15 04:28:41.096 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2025-12-15 04:28:41.565 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2025-12-15 04:28:42.034 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2025-12-15 04:28:42.503 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2025-12-15 04:28:42.971 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2025-12-15 04:28:43.439 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2025-12-15 04:28:43.907 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2025-12-15 04:28:44.375 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2025-12-15 04:28:44.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:28:44.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:28:44.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:28:44.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:28:44.639 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:28:44.639 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:28:44.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:28:44.644 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:28:44.644 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:28:44.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:28:44.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:28:44.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:28:44.646 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:28:44.646 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:28:44.646 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:28:44.646 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:28:44.652 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:28:44.652 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:28:44.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:28:44.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:28:44.847 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2025-12-15 04:28:45.324 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2025-12-15 04:28:45.796 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2025-12-15 04:28:46.266 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2025-12-15 04:28:46.736 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2025-12-15 04:28:47.206 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2025-12-15 04:28:47.676 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2025-12-15 04:28:48.144 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2025-12-15 04:28:48.613 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2025-12-15 04:28:49.082 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2025-12-15 04:28:49.551 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2025-12-15 04:28:50.021 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2025-12-15 04:28:50.492 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2025-12-15 04:28:50.962 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2025-12-15 04:28:51.432 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2025-12-15 04:28:51.901 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2025-12-15 04:28:52.372 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2025-12-15 04:28:52.842 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2025-12-15 04:28:53.310 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2025-12-15 04:28:53.778 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2025-12-15 04:28:54.247 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2025-12-15 04:28:54.718 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2025-12-15 04:28:55.191 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2025-12-15 04:28:55.659 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2025-12-15 04:28:56.129 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2025-12-15 04:28:56.600 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2025-12-15 04:28:57.071 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2025-12-15 04:28:57.541 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2025-12-15 04:28:58.011 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2025-12-15 04:28:58.480 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2025-12-15 04:28:58.949 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2025-12-15 04:28:59.417 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2025-12-15 04:28:59.885 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2025-12-15 04:29:00.355 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2025-12-15 04:29:00.831 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2025-12-15 04:29:01.304 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2025-12-15 04:29:01.774 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2025-12-15 04:29:02.245 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2025-12-15 04:29:02.715 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2025-12-15 04:29:03.188 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2025-12-15 04:29:03.661 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2025-12-15 04:29:04.137 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2025-12-15 04:29:04.614 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2025-12-15 04:29:05.088 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2025-12-15 04:29:05.564 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2025-12-15 04:29:06.040 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2025-12-15 04:29:06.513 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2025-12-15 04:29:06.983 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2025-12-15 04:29:07.456 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2025-12-15 04:29:07.928 [DEBUG] clck_gen.py:113 IND CLOCK 19584
2025-12-15 04:29:08.401 [DEBUG] clck_gen.py:113 IND CLOCK 19686
2025-12-15 04:29:08.871 [DEBUG] clck_gen.py:113 IND CLOCK 19788
2025-12-15 04:29:09.342 [DEBUG] clck_gen.py:113 IND CLOCK 19890
2025-12-15 04:29:09.814 [DEBUG] clck_gen.py:113 IND CLOCK 19992
2025-12-15 04:29:10.284 [DEBUG] clck_gen.py:113 IND CLOCK 20094
2025-12-15 04:29:10.762 [DEBUG] clck_gen.py:113 IND CLOCK 20196
2025-12-15 04:29:11.240 [DEBUG] clck_gen.py:113 IND CLOCK 20298
2025-12-15 04:29:11.709 [DEBUG] clck_gen.py:113 IND CLOCK 20400
2025-12-15 04:29:12.180 [DEBUG] clck_gen.py:113 IND CLOCK 20502
2025-12-15 04:29:12.655 [DEBUG] clck_gen.py:113 IND CLOCK 20604
2025-12-15 04:29:13.133 [DEBUG] clck_gen.py:113 IND CLOCK 20706
2025-12-15 04:29:13.609 [DEBUG] clck_gen.py:113 IND CLOCK 20808
2025-12-15 04:29:14.084 [DEBUG] clck_gen.py:113 IND CLOCK 20910
2025-12-15 04:29:14.560 [DEBUG] clck_gen.py:113 IND CLOCK 21012
2025-12-15 04:29:15.035 [DEBUG] clck_gen.py:113 IND CLOCK 21114
2025-12-15 04:29:15.509 [DEBUG] clck_gen.py:113 IND CLOCK 21216
2025-12-15 04:29:15.983 [DEBUG] clck_gen.py:113 IND CLOCK 21318
2025-12-15 04:29:16.456 [DEBUG] clck_gen.py:113 IND CLOCK 21420
2025-12-15 04:29:16.929 [DEBUG] clck_gen.py:113 IND CLOCK 21522
2025-12-15 04:29:17.404 [DEBUG] clck_gen.py:113 IND CLOCK 21624
2025-12-15 04:29:17.878 [DEBUG] clck_gen.py:113 IND CLOCK 21726
2025-12-15 04:29:18.354 [DEBUG] clck_gen.py:113 IND CLOCK 21828
2025-12-15 04:29:18.827 [DEBUG] clck_gen.py:113 IND CLOCK 21930
2025-12-15 04:29:19.302 [DEBUG] clck_gen.py:113 IND CLOCK 22032
2025-12-15 04:29:19.777 [DEBUG] clck_gen.py:113 IND CLOCK 22134
2025-12-15 04:29:19.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:29:19.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:29:19.821 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:29:19.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:29:19.829 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:29:19.829 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:29:19.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:29:19.835 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:29:19.835 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:29:19.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:29:19.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:29:19.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:29:19.836 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:29:19.836 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:29:19.836 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:29:19.836 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:29:19.862 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:29:19.862 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:29:19.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:29:19.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:29:20.250 [DEBUG] clck_gen.py:113 IND CLOCK 22236
2025-12-15 04:29:20.724 [DEBUG] clck_gen.py:113 IND CLOCK 22338
2025-12-15 04:29:21.199 [DEBUG] clck_gen.py:113 IND CLOCK 22440
2025-12-15 04:29:21.673 [DEBUG] clck_gen.py:113 IND CLOCK 22542
2025-12-15 04:29:22.147 [DEBUG] clck_gen.py:113 IND CLOCK 22644
2025-12-15 04:29:22.622 [DEBUG] clck_gen.py:113 IND CLOCK 22746
2025-12-15 04:29:23.096 [DEBUG] clck_gen.py:113 IND CLOCK 22848
2025-12-15 04:29:23.571 [DEBUG] clck_gen.py:113 IND CLOCK 22950
2025-12-15 04:29:24.044 [DEBUG] clck_gen.py:113 IND CLOCK 23052
2025-12-15 04:29:24.518 [DEBUG] clck_gen.py:113 IND CLOCK 23154
2025-12-15 04:29:24.993 [DEBUG] clck_gen.py:113 IND CLOCK 23256
2025-12-15 04:29:25.468 [DEBUG] clck_gen.py:113 IND CLOCK 23358
2025-12-15 04:29:25.942 [DEBUG] clck_gen.py:113 IND CLOCK 23460
2025-12-15 04:29:26.416 [DEBUG] clck_gen.py:113 IND CLOCK 23562
2025-12-15 04:29:26.891 [DEBUG] clck_gen.py:113 IND CLOCK 23664
2025-12-15 04:29:27.364 [DEBUG] clck_gen.py:113 IND CLOCK 23766
2025-12-15 04:29:27.839 [DEBUG] clck_gen.py:113 IND CLOCK 23868
2025-12-15 04:29:28.315 [DEBUG] clck_gen.py:113 IND CLOCK 23970
2025-12-15 04:29:28.788 [DEBUG] clck_gen.py:113 IND CLOCK 24072
2025-12-15 04:29:29.261 [DEBUG] clck_gen.py:113 IND CLOCK 24174
2025-12-15 04:29:29.736 [DEBUG] clck_gen.py:113 IND CLOCK 24276
2025-12-15 04:29:30.212 [DEBUG] clck_gen.py:113 IND CLOCK 24378
2025-12-15 04:29:30.686 [DEBUG] clck_gen.py:113 IND CLOCK 24480
2025-12-15 04:29:31.161 [DEBUG] clck_gen.py:113 IND CLOCK 24582
2025-12-15 04:29:31.635 [DEBUG] clck_gen.py:113 IND CLOCK 24684
2025-12-15 04:29:32.109 [DEBUG] clck_gen.py:113 IND CLOCK 24786
2025-12-15 04:29:32.583 [DEBUG] clck_gen.py:113 IND CLOCK 24888
2025-12-15 04:29:33.056 [DEBUG] clck_gen.py:113 IND CLOCK 24990
2025-12-15 04:29:33.531 [DEBUG] clck_gen.py:113 IND CLOCK 25092
2025-12-15 04:29:34.005 [DEBUG] clck_gen.py:113 IND CLOCK 25194
2025-12-15 04:29:34.482 [DEBUG] clck_gen.py:113 IND CLOCK 25296
2025-12-15 04:29:34.958 [DEBUG] clck_gen.py:113 IND CLOCK 25398
2025-12-15 04:29:35.434 [DEBUG] clck_gen.py:113 IND CLOCK 25500
2025-12-15 04:29:35.909 [DEBUG] clck_gen.py:113 IND CLOCK 25602
2025-12-15 04:29:36.382 [DEBUG] clck_gen.py:113 IND CLOCK 25704
2025-12-15 04:29:36.858 [DEBUG] clck_gen.py:113 IND CLOCK 25806
2025-12-15 04:29:37.336 [DEBUG] clck_gen.py:113 IND CLOCK 25908
2025-12-15 04:29:37.813 [DEBUG] clck_gen.py:113 IND CLOCK 26010
2025-12-15 04:29:38.291 [DEBUG] clck_gen.py:113 IND CLOCK 26112
2025-12-15 04:29:38.769 [DEBUG] clck_gen.py:113 IND CLOCK 26214
2025-12-15 04:29:39.247 [DEBUG] clck_gen.py:113 IND CLOCK 26316
2025-12-15 04:29:39.724 [DEBUG] clck_gen.py:113 IND CLOCK 26418
2025-12-15 04:29:40.202 [DEBUG] clck_gen.py:113 IND CLOCK 26520
2025-12-15 04:29:40.680 [DEBUG] clck_gen.py:113 IND CLOCK 26622
2025-12-15 04:29:41.158 [DEBUG] clck_gen.py:113 IND CLOCK 26724
2025-12-15 04:29:41.636 [DEBUG] clck_gen.py:113 IND CLOCK 26826
2025-12-15 04:29:42.114 [DEBUG] clck_gen.py:113 IND CLOCK 26928
2025-12-15 04:29:42.591 [DEBUG] clck_gen.py:113 IND CLOCK 27030
2025-12-15 04:29:43.069 [DEBUG] clck_gen.py:113 IND CLOCK 27132
2025-12-15 04:29:43.548 [DEBUG] clck_gen.py:113 IND CLOCK 27234
2025-12-15 04:29:44.025 [DEBUG] clck_gen.py:113 IND CLOCK 27336
2025-12-15 04:29:44.503 [DEBUG] clck_gen.py:113 IND CLOCK 27438
2025-12-15 04:29:44.981 [DEBUG] clck_gen.py:113 IND CLOCK 27540
2025-12-15 04:29:45.459 [DEBUG] clck_gen.py:113 IND CLOCK 27642
2025-12-15 04:29:45.936 [DEBUG] clck_gen.py:113 IND CLOCK 27744
2025-12-15 04:29:46.414 [DEBUG] clck_gen.py:113 IND CLOCK 27846
2025-12-15 04:29:46.893 [DEBUG] clck_gen.py:113 IND CLOCK 27948
2025-12-15 04:29:47.371 [DEBUG] clck_gen.py:113 IND CLOCK 28050
2025-12-15 04:29:47.849 [DEBUG] clck_gen.py:113 IND CLOCK 28152
2025-12-15 04:29:48.327 [DEBUG] clck_gen.py:113 IND CLOCK 28254
2025-12-15 04:29:48.805 [DEBUG] clck_gen.py:113 IND CLOCK 28356
2025-12-15 04:29:49.282 [DEBUG] clck_gen.py:113 IND CLOCK 28458
2025-12-15 04:29:49.760 [DEBUG] clck_gen.py:113 IND CLOCK 28560
2025-12-15 04:29:50.238 [DEBUG] clck_gen.py:113 IND CLOCK 28662
2025-12-15 04:29:50.715 [DEBUG] clck_gen.py:113 IND CLOCK 28764
2025-12-15 04:29:51.193 [DEBUG] clck_gen.py:113 IND CLOCK 28866
2025-12-15 04:29:51.671 [DEBUG] clck_gen.py:113 IND CLOCK 28968
2025-12-15 04:29:52.149 [DEBUG] clck_gen.py:113 IND CLOCK 29070
2025-12-15 04:29:52.627 [DEBUG] clck_gen.py:113 IND CLOCK 29172
2025-12-15 04:29:53.105 [DEBUG] clck_gen.py:113 IND CLOCK 29274
2025-12-15 04:29:53.582 [DEBUG] clck_gen.py:113 IND CLOCK 29376
2025-12-15 04:29:54.060 [DEBUG] clck_gen.py:113 IND CLOCK 29478
2025-12-15 04:29:54.539 [DEBUG] clck_gen.py:113 IND CLOCK 29580
2025-12-15 04:29:55.017 [DEBUG] clck_gen.py:113 IND CLOCK 29682
2025-12-15 04:29:55.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:29:55.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:29:55.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:29:55.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:29:55.120 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:29:55.121 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:29:55.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:29:55.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:29:55.124 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:29:55.124 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:29:55.124 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:29:55.125 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:29:55.125 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:29:55.125 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:29:55.125 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=29706 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:29:55.125 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:29:55.125 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=29706 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:29:55.125 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=29706 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:29:55.125 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=29707 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:29:55.125 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=29707 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:29:55.125 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=29707 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:29:55.125 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=29707 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:29:55.125 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=29707 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:29:55.125 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=29707 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:29:55.125 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=29707 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:29:55.125 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=29707 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:30:00.126 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:30:00.126 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:30:00.128 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:30:00.128 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:30:00.129 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:30:00.129 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:30:00.138 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:30:00.139 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:30:00.139 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:30:00.139 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:30:00.139 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:30:00.143 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:30:00.144 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:30:00.144 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:30:00.144 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:30:00.144 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:30:00.145 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:30:00.145 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:30:00.145 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:30:00.147 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:30:00.147 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:30:00.148 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:30:00.148 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:30:00.148 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:30:00.148 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:30:00.148 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:30:00.148 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:30:00.150 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:30:00.151 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:30:00.151 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:30:00.151 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:30:00.151 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:30:00.151 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:30:00.151 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:30:00.151 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:30:00.155 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:30:00.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:30:00.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:30:00.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:30:00.155 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:30:00.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:30:00.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:30:00.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:30:00.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:30:00.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:30:00.155 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:30:00.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:30:00.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:30:00.155 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:30:00.155 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:30:00.155 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:30:00.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:30:00.155 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:30:00.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:30:00.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:30:00.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:30:00.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:30:00.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:30:00.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:30:00.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:30:00.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:30:00.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:30:00.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:30:00.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:30:00.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:30:00.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:30:00.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:30:00.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:30:00.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:30:00.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:30:00.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:30:00.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:30:00.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:30:00.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:30:00.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:30:00.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:30:00.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:30:00.157 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:30:00.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:30:00.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:30:00.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:30:00.157 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:30:00.158 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:30:00.158 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:30:00.158 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:30:00.158 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:30:00.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:30:05.164 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:30:05.164 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:30:05.164 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:30:05.164 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:30:05.165 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:30:05.166 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:30:05.175 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:30:05.177 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:30:05.177 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:30:05.177 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:30:05.178 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:30:05.183 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:30:05.183 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:30:05.184 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:30:05.184 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:30:05.184 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:30:05.185 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:30:05.185 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:30:05.185 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:30:05.188 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:30:05.188 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:30:05.189 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:30:05.189 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:30:05.189 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:30:05.189 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:30:05.189 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:30:05.190 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:30:05.192 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:30:05.193 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:30:05.193 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:30:05.193 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:30:05.193 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:30:05.193 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:30:05.193 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:30:05.193 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:30:05.198 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:30:05.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:30:05.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:30:05.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:30:05.198 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:30:05.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:30:05.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:30:05.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:30:05.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:30:05.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:30:05.199 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:30:05.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:30:05.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:30:05.199 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:30:05.199 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:30:05.199 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:30:05.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:30:05.199 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:30:05.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:30:05.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:30:05.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:30:05.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:30:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:30:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:30:05.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:30:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:30:05.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:30:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:30:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:30:05.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:30:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:30:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:30:05.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:30:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:30:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:30:05.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:30:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:30:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:30:05.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:30:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:30:05.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:30:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:30:05.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:30:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:30:05.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:30:05.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:30:05.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:30:05.204 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:30:05.687 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:30:05.723 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:30:05.724 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:30:05.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:30:05.726 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:30:05.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:30:05.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:30:05.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:30:05.771 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:30:05.771 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:30:05.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:30:05.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:30:05.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:30:05.779 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:30:05.779 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:30:05.780 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:30:05.780 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:30:05.825 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:30:05.826 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:30:05.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:30:05.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:30:06.165 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:30:06.202 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:30:06.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:30:06.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:30:06.204 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:30:06.643 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:30:07.121 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:30:07.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:30:07.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:30:07.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:30:07.204 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:30:07.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:30:07.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:30:07.291 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:30:07.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:30:07.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:30:07.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:30:07.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:30:07.315 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:30:07.315 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:30:07.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:30:07.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:30:07.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:30:07.317 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:30:07.317 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:30:07.317 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:30:07.317 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:30:07.356 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:30:07.356 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:30:07.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:30:07.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:30:07.598 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:30:08.077 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:30:08.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:30:08.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:30:08.206 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:30:08.206 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:30:08.554 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:30:09.033 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:30:09.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:30:09.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:30:09.207 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:30:09.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:30:09.511 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:30:09.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:30:09.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:30:09.668 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:30:09.668 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:30:09.685 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:30:09.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:30:09.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:30:09.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:30:09.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:30:09.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:30:09.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:30:09.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:30:09.693 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:30:09.693 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:30:09.693 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:30:09.693 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:30:09.746 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:30:09.747 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:30:09.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:30:09.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:30:09.989 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:30:10.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:30:10.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:30:10.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:30:10.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:30:10.467 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:30:10.945 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:30:11.423 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:30:11.901 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:30:12.379 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:30:12.856 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:30:13.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:30:13.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:30:13.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:30:13.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:30:13.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:30:13.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:30:13.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:30:13.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:30:13.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:30:13.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:30:13.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:30:13.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:30:13.279 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:30:13.279 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:30:13.279 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:30:13.279 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:30:13.326 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:30:13.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:30:13.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:30:13.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:30:13.333 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:30:13.811 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:30:14.288 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:30:14.766 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:30:15.245 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:30:15.722 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:30:16.198 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:30:16.668 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:30:16.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:30:16.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:30:16.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:30:16.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:30:16.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:30:16.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:30:16.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:30:16.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:30:16.767 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:30:16.768 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:30:16.768 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:30:16.768 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:30:16.768 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:30:16.768 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:30:16.768 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:30:16.769 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2471 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:30:16.769 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2471 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:30:16.769 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2471 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:30:16.769 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2471 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:30:16.769 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2471 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:30:16.769 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2471 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:30:16.769 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2472 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:30:16.769 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2472 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:30:16.769 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2472 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:30:16.769 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2472 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:30:16.770 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2472 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:30:16.770 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2472 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:30:16.770 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2472 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:30:16.770 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2472 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:30:21.762 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:30:21.762 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:30:21.762 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:30:21.762 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:30:21.763 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:30:21.764 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:30:21.769 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:30:21.769 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:30:21.769 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:30:21.770 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:30:21.770 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:30:21.772 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:30:21.772 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:30:21.773 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:30:21.773 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:30:21.773 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:30:21.773 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:30:21.773 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:30:21.773 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:30:21.774 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:30:21.774 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:30:21.774 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:30:21.774 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:30:21.774 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:30:21.774 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:30:21.774 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:30:21.775 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:30:21.776 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:30:21.776 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:30:21.776 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:30:21.776 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:30:21.776 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:30:21.776 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:30:21.776 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:30:21.776 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:30:21.779 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:30:21.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:30:21.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:30:21.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:30:21.779 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:30:21.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:30:21.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:30:21.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:30:21.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:30:21.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:30:21.780 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:30:21.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:30:21.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:30:21.780 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:30:21.780 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:30:21.780 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:30:21.780 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:30:21.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:30:21.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:30:21.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:30:21.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:30:21.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:30:21.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:30:21.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:30:21.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:30:21.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:30:21.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:30:21.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:30:21.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:30:21.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:30:21.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:30:21.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:30:21.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:30:21.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:30:21.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:30:21.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:30:21.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:30:21.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:30:21.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:30:21.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:30:21.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:30:21.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:30:21.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:30:21.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:30:21.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:30:21.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:30:21.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:30:21.785 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:30:22.256 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:30:22.291 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:30:22.292 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:30:22.292 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:30:22.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:30:22.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:30:22.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:30:22.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:30:22.302 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:30:22.302 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:30:22.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:30:22.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:30:22.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:30:22.304 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:30:22.304 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:30:22.304 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:30:22.304 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:30:22.345 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:30:22.345 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:30:22.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:30:22.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:30:22.725 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:30:22.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:30:22.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:30:22.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:30:22.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:30:23.197 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:30:23.665 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:30:23.783 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:30:23.784 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:30:23.784 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:30:23.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:30:24.136 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:30:24.608 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:30:24.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:30:24.784 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:30:24.784 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:30:24.784 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:30:25.076 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:30:25.551 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:30:25.785 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:30:25.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:30:25.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:30:25.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:30:26.024 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:30:26.500 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:30:26.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:30:26.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:30:26.787 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:30:26.787 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:30:26.973 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:30:27.445 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:30:27.919 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:30:28.394 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:30:28.870 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:30:29.345 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:30:29.815 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:30:30.289 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:30:30.760 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:30:31.231 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:30:31.702 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:30:32.172 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:30:32.642 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:30:33.114 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:30:33.584 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:30:34.055 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:30:34.529 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:30:35.000 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:30:35.470 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:30:35.940 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:30:36.411 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:30:36.880 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:30:37.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:30:37.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:30:37.162 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:30:37.162 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:30:37.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:30:37.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:30:37.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:30:37.173 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:30:37.173 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:30:37.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:30:37.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:30:37.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:30:37.175 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:30:37.175 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:30:37.175 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:30:37.175 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:30:37.202 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:30:37.202 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:30:37.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:30:37.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:30:37.350 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 04:30:37.822 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 04:30:38.296 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 04:30:38.766 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 04:30:39.239 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 04:30:39.713 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 04:30:40.188 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 04:30:40.658 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 04:30:41.131 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 04:30:41.610 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 04:30:42.088 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 04:30:42.559 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 04:30:43.032 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 04:30:43.502 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 04:30:43.974 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 04:30:44.446 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 04:30:44.918 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 04:30:45.388 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 04:30:45.859 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 04:30:46.329 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 04:30:46.801 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 04:30:47.272 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 04:30:47.743 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 04:30:48.218 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 04:30:48.696 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 04:30:49.169 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 04:30:49.638 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 04:30:50.111 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-15 04:30:50.581 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-15 04:30:51.051 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-15 04:30:51.521 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-15 04:30:51.998 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-15 04:30:52.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:30:52.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:30:52.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:30:52.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:30:52.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:30:52.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:30:52.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:30:52.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:30:52.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:30:52.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:30:52.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:30:52.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:30:52.372 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:30:52.372 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:30:52.372 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:30:52.372 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:30:52.419 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:30:52.419 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:30:52.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:30:52.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:30:52.475 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-15 04:30:52.948 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-15 04:30:53.418 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-15 04:30:53.889 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-15 04:30:54.362 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-15 04:30:54.833 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-15 04:30:55.303 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-15 04:30:55.775 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-15 04:30:56.247 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-15 04:30:56.718 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-15 04:30:57.192 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-15 04:30:57.666 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-15 04:30:58.136 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-15 04:30:58.613 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-15 04:30:59.089 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-15 04:30:59.564 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-15 04:31:00.036 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-15 04:31:00.506 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-15 04:31:00.976 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-15 04:31:01.448 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-15 04:31:01.921 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-15 04:31:02.396 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-15 04:31:02.874 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-15 04:31:03.350 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2025-12-15 04:31:03.820 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2025-12-15 04:31:04.290 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2025-12-15 04:31:04.764 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2025-12-15 04:31:05.235 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2025-12-15 04:31:05.707 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2025-12-15 04:31:06.179 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2025-12-15 04:31:06.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:31:06.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:31:06.616 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:31:06.616 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:31:06.630 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:31:06.630 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:31:06.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:31:06.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:31:06.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:31:06.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:31:06.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:31:06.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:31:06.638 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:31:06.638 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:31:06.638 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:31:06.638 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:31:06.644 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:31:06.644 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:31:06.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:31:06.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:31:06.653 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2025-12-15 04:31:07.121 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2025-12-15 04:31:07.591 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2025-12-15 04:31:08.062 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2025-12-15 04:31:08.533 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2025-12-15 04:31:09.008 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2025-12-15 04:31:09.482 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2025-12-15 04:31:09.955 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2025-12-15 04:31:10.425 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2025-12-15 04:31:10.895 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2025-12-15 04:31:11.365 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2025-12-15 04:31:11.841 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2025-12-15 04:31:12.311 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2025-12-15 04:31:12.781 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2025-12-15 04:31:13.248 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2025-12-15 04:31:13.717 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2025-12-15 04:31:14.192 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2025-12-15 04:31:14.671 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2025-12-15 04:31:15.144 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2025-12-15 04:31:15.614 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2025-12-15 04:31:16.082 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2025-12-15 04:31:16.553 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2025-12-15 04:31:17.026 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2025-12-15 04:31:17.496 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2025-12-15 04:31:17.965 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2025-12-15 04:31:18.437 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2025-12-15 04:31:18.906 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2025-12-15 04:31:19.379 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2025-12-15 04:31:19.852 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2025-12-15 04:31:20.327 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2025-12-15 04:31:20.798 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2025-12-15 04:31:21.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:31:21.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:31:21.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:31:21.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:31:21.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:31:21.197 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:31:21.197 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:31:21.197 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:31:21.199 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:31:21.199 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:31:21.199 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:31:21.199 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:31:21.199 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:31:21.199 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:31:21.199 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:31:21.199 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=12839 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:31:21.200 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=12839 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:31:21.200 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=12839 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:31:21.200 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=12839 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:31:21.200 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=12839 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:31:21.200 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=12839 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:31:26.198 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:31:26.198 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:31:26.198 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:31:26.199 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:31:26.199 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:31:26.200 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:31:26.205 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:31:26.205 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:31:26.205 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:31:26.205 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:31:26.205 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:31:26.207 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:31:26.207 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:31:26.207 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:31:26.207 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:31:26.207 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:31:26.207 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:31:26.207 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:31:26.207 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:31:26.208 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:31:26.209 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:31:26.209 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:31:26.209 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:31:26.209 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:31:26.209 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:31:26.209 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:31:26.209 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:31:26.210 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:31:26.210 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:31:26.210 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:31:26.210 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:31:26.210 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:31:26.210 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:31:26.210 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:31:26.210 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:31:26.213 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:31:26.213 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:31:26.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:31:26.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:31:26.213 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:31:26.213 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:31:26.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:31:26.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:31:26.213 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:31:26.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:31:26.213 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:31:26.213 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:31:26.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:31:26.213 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:31:26.213 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:31:26.213 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:31:26.214 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:31:26.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:31:26.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:31:26.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:31:26.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:31:26.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:31:26.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:31:26.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:31:26.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:31:26.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:31:26.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:31:26.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:31:26.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:31:26.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:31:26.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:31:26.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:31:26.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:31:26.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:31:26.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:31:26.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:31:26.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:31:26.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:31:26.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:31:26.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:31:26.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:31:26.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:31:26.215 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:31:26.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:31:26.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:31:26.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:31:26.215 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:31:26.215 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:31:26.215 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:31:26.215 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:31:26.215 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:31:26.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:31:31.219 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:31:31.220 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:31:31.221 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:31:31.223 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:31:31.224 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:31:31.225 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:31:31.231 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:31:31.231 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:31:31.231 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:31:31.231 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:31:31.232 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:31:31.233 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:31:31.233 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:31:31.233 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:31:31.233 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:31:31.234 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:31:31.234 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:31:31.234 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:31:31.234 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:31:31.235 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:31:31.235 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:31:31.235 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:31:31.235 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:31:31.235 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:31:31.235 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:31:31.236 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:31:31.236 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:31:31.237 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:31:31.237 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:31:31.237 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:31:31.237 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:31:31.237 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:31:31.237 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:31:31.237 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:31:31.237 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:31:31.241 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:31:31.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:31:31.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:31:31.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:31:31.241 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:31:31.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:31:31.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:31:31.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:31:31.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:31:31.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:31:31.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:31:31.241 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:31:31.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:31:31.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:31:31.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:31:31.242 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:31:31.242 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:31:31.242 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:31:31.242 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:31:31.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:31:31.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:31:31.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:31:31.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:31:31.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:31:31.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:31:31.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:31:31.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:31:31.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:31:31.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:31:31.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:31:31.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:31:31.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:31:31.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:31:31.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:31:31.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:31:31.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:31:31.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:31:31.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:31:31.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:31:31.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:31:31.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:31:31.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:31:31.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:31:31.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:31:31.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:31:31.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:31:31.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:31:31.246 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:31:31.721 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:31:31.769 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:31:31.771 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:31:31.773 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:31:31.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:31:31.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:31:31.794 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:31:31.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:31:31.818 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:31:31.818 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:31:31.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:31:31.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:31:31.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:31:31.826 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:31:31.827 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:31:31.827 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:31:31.827 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:31:31.862 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:31:31.862 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:31:31.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:31:31.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:31:32.198 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:31:32.245 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:31:32.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:31:32.246 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:31:32.246 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:31:32.671 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:31:33.144 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:31:33.246 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:31:33.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:31:33.246 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:31:33.247 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:31:33.617 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:31:34.091 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:31:34.248 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:31:34.248 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:31:34.248 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:31:34.248 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:31:34.566 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:31:35.040 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:31:35.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:31:35.249 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:31:35.249 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:31:35.249 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:31:35.514 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:31:35.987 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:31:36.250 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:31:36.250 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:31:36.250 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:31:36.250 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:31:36.460 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:31:36.932 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:31:37.404 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:31:37.877 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:31:38.346 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:31:38.816 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:31:39.286 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:31:39.757 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:31:40.227 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:31:40.696 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:31:41.165 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:31:41.635 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:31:42.105 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:31:42.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:31:42.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:31:42.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:31:42.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:31:42.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:31:42.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:31:42.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:31:42.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:31:42.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:31:42.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:31:42.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:31:42.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:31:42.334 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:31:42.334 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:31:42.334 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:31:42.334 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:31:42.381 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:31:42.382 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:31:42.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:31:42.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:31:42.578 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:31:43.052 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:31:43.521 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:31:43.991 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:31:44.461 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:31:44.934 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:31:45.403 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:31:45.874 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:31:46.344 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:31:46.814 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 04:31:47.283 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 04:31:47.752 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 04:31:48.223 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 04:31:48.694 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 04:31:49.165 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 04:31:49.635 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 04:31:50.106 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 04:31:50.575 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 04:31:51.045 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 04:31:51.514 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 04:31:51.985 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 04:31:52.455 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 04:31:52.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:31:52.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:31:52.622 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:31:52.622 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:31:52.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:31:52.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:31:52.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:31:52.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:31:52.644 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:31:52.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:31:52.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:31:52.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:31:52.648 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:31:52.648 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:31:52.648 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:31:52.648 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:31:52.688 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:31:52.688 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:31:52.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:31:52.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:31:52.926 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 04:31:53.396 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 04:31:53.866 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 04:31:54.335 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 04:31:54.805 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 04:31:55.275 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 04:31:55.746 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 04:31:56.217 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 04:31:56.687 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 04:31:57.158 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 04:31:57.628 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 04:31:58.098 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 04:31:58.567 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 04:31:59.037 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 04:31:59.508 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-15 04:31:59.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:31:59.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:31:59.545 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:31:59.545 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:31:59.556 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:31:59.557 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:31:59.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:31:59.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:31:59.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:31:59.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:31:59.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:31:59.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:31:59.570 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:31:59.570 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:31:59.570 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:31:59.570 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:31:59.597 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:31:59.598 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:31:59.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:31:59.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:31:59.978 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-15 04:32:00.449 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-15 04:32:00.920 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-15 04:32:01.391 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-15 04:32:01.860 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-15 04:32:02.330 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-15 04:32:02.799 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-15 04:32:03.269 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-15 04:32:03.739 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-15 04:32:04.208 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-15 04:32:04.677 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-15 04:32:05.148 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-15 04:32:05.618 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-15 04:32:06.089 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-15 04:32:06.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:06.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:32:06.551 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:06.551 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:06.557 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:32:06.557 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:32:06.557 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:32:06.557 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:32:06.559 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:32:06.559 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:32:06.559 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:32:06.559 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:32:06.559 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:32:06.559 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:32:06.559 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:32:11.561 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:32:11.562 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:32:11.564 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:32:11.566 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:32:11.569 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:32:11.571 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:32:11.581 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:32:11.582 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:32:11.582 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:32:11.582 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:32:11.582 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:32:11.585 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:32:11.585 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:32:11.585 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:32:11.585 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:32:11.585 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:32:11.585 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:32:11.586 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:32:11.586 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:32:11.587 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:32:11.587 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:32:11.587 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:32:11.587 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:32:11.587 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:32:11.587 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:32:11.588 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:32:11.588 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:32:11.589 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:32:11.589 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:32:11.589 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:32:11.589 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:32:11.590 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:32:11.590 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:32:11.590 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:32:11.590 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:32:11.592 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:32:11.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:32:11.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:32:11.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:32:11.592 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:32:11.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:32:11.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:32:11.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:32:11.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:32:11.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:32:11.593 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:32:11.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:32:11.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:32:11.593 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:32:11.593 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:32:11.593 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:32:11.593 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:32:11.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:32:11.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:32:11.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:32:11.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:32:11.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:32:11.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:32:11.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:32:11.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:32:11.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:32:11.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:32:11.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:32:11.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:32:11.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:32:11.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:32:11.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:32:11.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:32:11.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:32:11.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:32:11.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:32:11.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:32:11.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:32:11.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:32:11.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:32:11.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:32:11.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:32:11.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:32:11.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:32:11.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:32:11.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:32:11.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:32:11.598 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:32:12.070 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:32:12.109 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:32:12.110 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:32:12.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:32:12.111 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:32:12.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:12.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:12.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:32:12.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:12.129 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:12.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:32:12.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:32:12.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:12.132 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:32:12.132 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:32:12.132 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:32:12.132 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:32:12.160 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:32:12.160 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:32:12.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:12.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:12.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:12.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:32:12.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:12.467 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:12.477 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:12.477 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:12.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:32:12.487 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:12.487 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:12.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:32:12.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:32:12.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:12.491 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:32:12.491 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:32:12.491 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:32:12.491 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:32:12.538 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:32:12.538 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:32:12.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:12.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:12.540 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:32:12.596 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:32:12.596 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:32:12.596 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:32:12.596 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:32:13.009 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:32:13.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:13.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:32:13.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:13.020 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:13.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:13.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:13.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:32:13.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:13.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:13.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:32:13.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:32:13.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:13.044 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:32:13.044 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:32:13.044 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:32:13.044 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:32:13.051 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:32:13.051 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:32:13.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:13.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:13.479 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:32:13.596 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:32:13.596 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:32:13.596 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:32:13.596 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:32:13.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:13.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:32:13.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:13.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:13.879 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:13.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:13.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:32:13.888 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:13.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:13.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:32:13.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:32:13.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:13.892 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:32:13.892 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:32:13.892 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:32:13.892 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:32:13.896 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:32:13.896 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:32:13.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:13.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:13.949 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:32:14.419 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:32:14.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:32:14.597 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:32:14.597 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:32:14.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:32:14.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:14.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:32:14.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:14.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:14.753 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:32:14.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:32:14.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:32:14.754 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:32:14.757 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:32:14.758 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:32:14.758 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:32:14.758 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:32:14.758 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:32:14.758 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=687 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:32:14.758 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:32:14.759 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:32:14.759 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=687 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:32:14.759 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=688 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:32:14.759 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=688 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:32:14.759 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=688 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:32:14.759 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=688 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:32:14.759 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=688 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:32:14.759 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=688 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:32:14.759 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=688 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:32:14.759 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=688 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:32:19.755 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:32:19.755 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:32:19.755 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:32:19.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:32:19.756 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:32:19.757 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:32:19.762 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:32:19.762 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:32:19.762 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:32:19.762 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:32:19.762 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:32:19.764 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:32:19.764 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:32:19.764 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:32:19.764 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:32:19.764 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:32:19.764 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:32:19.764 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:32:19.764 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:32:19.765 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:32:19.765 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:32:19.765 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:32:19.765 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:32:19.766 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:32:19.766 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:32:19.766 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:32:19.766 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:32:19.767 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:32:19.767 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:32:19.767 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:32:19.767 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:32:19.767 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:32:19.767 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:32:19.767 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:32:19.767 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:32:19.770 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:32:19.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:32:19.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:32:19.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:32:19.770 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:32:19.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:32:19.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:32:19.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:32:19.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:32:19.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:32:19.770 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:32:19.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:32:19.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:32:19.770 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:32:19.770 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:32:19.770 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:32:19.770 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:32:19.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:32:19.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:32:19.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:32:19.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:32:19.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:32:19.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:32:19.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:32:19.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:32:19.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:32:19.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:32:19.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:32:19.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:32:19.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:32:19.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:32:19.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:32:19.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:32:19.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:32:19.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:32:19.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:32:19.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:32:19.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:32:19.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:32:19.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:32:19.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:32:19.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:32:19.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:32:19.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:32:19.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:32:19.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:32:19.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:32:19.775 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:32:20.243 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:32:20.282 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:32:20.282 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:32:20.282 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:32:20.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:32:20.288 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:20.288 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:20.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:32:20.293 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:20.293 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:20.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:32:20.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:32:20.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:20.327 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:32:20.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:32:20.327 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:32:20.327 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:32:20.332 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:32:20.332 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:32:20.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:20.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:20.713 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:32:20.773 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:32:20.773 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:32:20.774 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:32:20.774 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:32:21.185 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:32:21.656 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:32:21.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:32:21.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:32:21.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:32:21.775 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:32:22.127 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:32:22.597 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:32:22.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:32:22.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:32:22.775 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:32:22.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:32:23.065 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:32:23.537 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:32:23.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:23.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:32:23.555 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:23.555 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:23.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:23.561 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:23.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:32:23.567 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:23.567 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:23.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:32:23.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:32:23.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:23.569 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:32:23.569 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:32:23.569 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:32:23.569 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:32:23.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:32:23.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:32:23.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:23.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:23.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:32:23.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:32:23.776 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:32:23.776 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:32:24.008 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:32:24.475 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:32:24.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:32:24.775 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:32:24.776 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:32:24.776 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:32:24.942 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:32:25.413 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:32:25.884 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:32:26.354 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:32:26.828 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:32:26.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:26.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:32:26.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:26.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:26.956 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:26.956 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:26.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:32:26.961 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:26.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:26.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:32:26.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:32:26.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:26.964 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:32:26.964 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:32:26.964 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:32:26.964 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:32:27.010 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:32:27.010 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:32:27.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:27.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:27.302 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:32:27.776 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:32:28.252 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:32:28.726 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:32:29.200 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:32:29.677 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:32:30.149 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:32:30.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:30.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:32:30.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:30.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:30.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:30.543 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:30.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:32:30.549 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:30.549 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:30.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:32:30.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:32:30.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:30.551 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:32:30.551 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:32:30.551 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:32:30.551 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:32:30.564 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:32:30.564 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:32:30.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:30.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:30.619 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:32:31.090 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:32:31.564 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:32:32.042 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:32:32.520 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:32:32.991 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:32:33.461 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:32:33.938 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:32:34.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:34.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:32:34.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:34.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:34.257 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:32:34.257 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:32:34.257 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:32:34.257 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:32:34.258 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:32:34.258 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:32:34.258 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:32:34.258 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:32:34.258 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:32:34.259 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:32:34.259 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:32:39.259 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:32:39.260 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:32:39.260 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:32:39.261 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:32:39.262 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:32:39.263 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:32:39.267 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:32:39.268 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:32:39.268 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:32:39.268 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:32:39.268 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:32:39.269 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:32:39.269 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:32:39.270 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:32:39.270 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:32:39.270 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:32:39.270 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:32:39.270 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:32:39.270 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:32:39.271 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:32:39.271 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:32:39.271 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:32:39.271 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:32:39.271 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:32:39.271 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:32:39.271 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:32:39.271 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:32:39.273 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:32:39.273 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:32:39.273 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:32:39.273 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:32:39.273 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:32:39.273 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:32:39.273 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:32:39.273 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:32:39.275 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:32:39.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:32:39.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:32:39.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:32:39.275 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:32:39.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:32:39.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:32:39.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:32:39.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:32:39.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:32:39.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:32:39.276 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:32:39.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:32:39.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:32:39.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:32:39.276 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:32:39.276 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:32:39.276 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:32:39.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:32:39.276 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:32:39.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:32:39.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:32:39.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:32:39.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:32:39.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:32:39.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:32:39.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:32:39.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:32:39.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:32:39.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:32:39.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:32:39.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:32:39.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:32:39.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:32:39.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:32:39.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:32:39.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:32:39.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:32:39.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:32:39.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:32:39.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:32:39.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:32:39.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:32:39.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:32:39.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:32:39.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:32:39.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:32:39.281 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:32:39.751 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:32:39.789 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:32:39.790 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:32:39.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:32:39.790 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:32:39.796 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:39.796 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:39.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:32:39.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:39.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:39.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:32:39.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:32:39.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:39.839 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:32:39.839 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:32:39.839 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:32:39.839 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:32:39.840 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:32:39.840 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:32:39.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:39.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:40.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:40.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:32:40.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:40.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:40.222 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:32:40.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:40.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:40.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:32:40.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:40.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:40.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:32:40.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:32:40.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:40.235 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:32:40.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:32:40.235 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:32:40.235 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:32:40.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:32:40.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:32:40.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:40.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:40.278 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:32:40.278 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:32:40.279 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:32:40.280 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:32:40.695 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:32:40.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:40.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:32:40.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:40.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:40.837 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:40.837 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:40.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:32:40.842 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:40.842 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:40.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:32:40.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:32:40.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:40.844 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:32:40.844 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:32:40.844 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:32:40.844 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:32:40.877 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:32:40.877 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:32:40.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:40.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:41.166 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:32:41.279 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:32:41.280 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:32:41.280 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:32:41.280 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:32:41.643 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:32:41.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:41.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:32:41.803 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:41.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:41.821 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:41.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:41.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:32:41.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:41.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:41.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:32:41.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:32:41.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:41.828 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:32:41.828 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:32:41.828 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:32:41.828 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:32:41.878 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:32:41.878 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:32:41.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:41.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:42.119 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:32:42.281 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:32:42.281 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:32:42.281 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:32:42.281 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:32:42.590 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:32:42.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:42.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:32:42.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:42.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:42.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:32:42.908 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:32:42.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:32:42.908 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:32:42.909 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:32:42.910 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:32:42.910 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:32:42.910 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:32:42.910 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:32:42.910 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:32:42.910 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:32:42.910 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=785 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:32:47.914 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:32:47.914 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:32:47.918 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:32:47.921 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:32:47.923 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:32:47.925 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:32:47.934 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:32:47.935 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:32:47.935 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:32:47.935 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:32:47.935 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:32:47.937 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:32:47.937 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:32:47.937 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:32:47.937 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:32:47.937 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:32:47.937 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:32:47.938 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:32:47.938 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:32:47.939 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:32:47.939 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:32:47.939 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:32:47.939 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:32:47.940 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:32:47.940 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:32:47.940 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:32:47.940 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:32:47.941 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:32:47.941 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:32:47.941 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:32:47.941 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:32:47.942 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:32:47.942 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:32:47.942 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:32:47.942 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:32:47.944 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:32:47.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:32:47.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:32:47.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:32:47.944 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:32:47.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:32:47.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:32:47.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:32:47.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:32:47.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:32:47.945 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:32:47.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:32:47.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:32:47.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:32:47.945 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:32:47.945 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:32:47.945 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:32:47.945 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:32:47.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:32:47.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:32:47.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:32:47.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:32:47.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:32:47.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:32:47.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:32:47.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:32:47.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:32:47.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:32:47.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:32:47.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:32:47.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:32:47.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:32:47.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:32:47.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:32:47.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:32:47.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:32:47.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:32:47.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:32:47.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:32:47.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:32:47.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:32:47.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:32:47.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:32:47.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:32:47.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:32:47.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:32:47.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:32:47.950 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:32:48.426 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:32:48.459 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:32:48.459 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:32:48.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:32:48.460 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:32:48.465 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:48.465 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:48.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:32:48.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:48.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:48.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:32:48.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:32:48.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:48.511 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:32:48.511 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:32:48.511 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:32:48.511 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:32:48.517 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:32:48.517 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:32:48.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:48.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:48.898 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:32:48.948 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:32:48.948 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:32:48.948 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:32:48.948 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:32:49.368 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:32:49.838 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:32:49.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:32:49.949 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:32:49.949 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:32:49.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:32:50.311 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:32:50.785 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:32:50.950 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:32:50.950 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:32:50.950 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:32:50.950 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:32:51.254 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:32:51.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:51.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:32:51.367 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:51.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:51.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:51.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:51.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:32:51.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:51.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:51.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:32:51.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:32:51.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:51.388 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:32:51.388 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:32:51.388 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:32:51.388 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:32:51.434 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:32:51.434 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:32:51.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:51.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:51.722 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:32:51.950 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:32:51.950 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:32:51.950 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:32:51.951 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:32:52.190 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:32:52.657 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:32:52.950 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:32:52.950 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:32:52.950 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:32:52.952 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:32:53.127 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:32:53.599 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:32:54.069 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:32:54.545 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:32:55.023 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:32:55.502 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:32:55.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:55.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:32:55.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:55.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:55.979 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:32:55.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:55.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:55.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:32:55.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:32:55.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:32:55.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:32:55.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:32:55.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:55.992 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:32:55.992 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:32:55.992 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:32:55.992 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:32:56.026 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:32:56.026 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:32:56.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:56.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:32:56.455 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:32:56.933 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:32:57.411 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:32:57.889 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:32:58.367 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:32:58.845 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:32:59.323 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:32:59.800 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:33:00.278 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:33:00.756 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:33:01.233 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:33:01.711 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:33:02.189 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:33:02.667 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:33:02.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:33:02.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:02.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:33:02.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:33:02.845 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:33:02.845 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:33:02.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:33:02.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:33:02.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:33:02.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:33:02.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:02.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:33:02.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:33:02.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:33:02.853 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:33:02.853 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:33:02.902 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:33:02.902 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:33:02.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:33:02.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:33:03.144 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:33:03.622 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 04:33:04.101 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 04:33:04.579 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 04:33:05.057 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 04:33:05.535 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 04:33:06.013 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 04:33:06.491 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 04:33:06.968 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 04:33:07.447 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 04:33:07.925 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 04:33:08.403 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 04:33:08.880 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 04:33:09.358 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 04:33:09.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:33:09.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:09.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:33:09.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:33:09.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:33:09.694 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:33:09.695 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:33:09.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:33:09.699 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:33:09.700 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:33:09.700 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:33:09.700 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:33:09.700 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:33:09.700 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:33:09.700 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:33:09.701 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4665 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:33:09.701 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4665 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:33:09.701 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4666 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:33:09.701 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4666 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:33:09.701 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4666 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:33:09.701 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4666 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:33:09.702 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4666 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:33:09.702 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4666 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:33:09.702 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4666 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:33:09.702 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4666 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:33:14.699 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:33:14.699 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:33:14.700 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:33:14.701 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:33:14.701 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:33:14.702 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:33:14.717 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:33:14.718 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:33:14.718 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:33:14.718 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:33:14.718 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:33:14.720 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:33:14.720 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:33:14.721 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:33:14.721 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:33:14.721 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:33:14.721 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:33:14.721 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:33:14.721 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:33:14.723 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:33:14.723 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:33:14.723 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:33:14.723 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:33:14.723 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:33:14.723 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:33:14.723 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:33:14.723 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:33:14.726 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:33:14.726 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:33:14.726 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:33:14.726 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:33:14.726 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:33:14.726 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:33:14.726 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:33:14.726 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:33:14.733 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:33:14.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:33:14.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:33:14.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:33:14.734 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:33:14.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:33:14.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:33:14.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:33:14.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:14.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:33:14.735 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:33:14.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:14.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:14.735 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:33:14.735 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:33:14.735 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:33:14.735 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:33:14.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:14.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:14.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:14.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:33:14.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:14.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:14.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:14.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:14.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:14.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:14.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:14.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:14.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:14.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:14.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:14.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:14.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:14.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:14.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:14.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:14.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:14.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:14.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:14.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:14.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:14.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:14.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:14.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:14.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:14.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:14.740 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:33:15.224 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:33:15.263 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:33:15.265 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:33:15.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:15.268 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:33:15.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:33:15.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:33:15.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:33:15.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:33:15.304 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:33:15.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:33:15.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:15.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:33:15.320 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:33:15.320 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:33:15.320 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:33:15.320 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:33:15.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:33:15.363 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:33:15.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:33:15.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:33:15.702 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:33:15.740 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:33:15.740 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:33:15.741 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:33:15.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:33:16.180 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:33:16.658 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:33:16.741 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:33:16.741 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:33:16.741 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:33:16.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:33:17.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:33:17.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:17.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:33:17.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:33:17.137 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:33:17.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:33:17.146 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:33:17.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:33:17.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:33:17.153 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:33:17.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:33:17.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:17.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:33:17.155 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:33:17.155 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:33:17.155 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:33:17.155 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:33:17.182 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:33:17.182 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:33:17.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:33:17.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:33:17.613 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:33:17.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:33:17.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:33:17.742 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:33:17.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:33:18.092 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:33:18.570 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:33:18.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:33:18.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:33:18.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:33:18.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:33:19.048 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:33:19.526 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:33:19.744 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:33:19.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:33:19.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:33:19.745 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:33:19.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:33:19.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:19.970 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:33:19.970 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:33:19.989 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:33:19.989 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:33:19.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:33:19.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:33:19.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:33:19.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:33:19.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:19.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:33:19.997 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:33:19.998 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:33:19.998 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:33:19.998 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:33:20.004 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:33:20.050 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:33:20.050 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:33:20.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:33:20.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:33:20.482 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:33:20.960 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:33:21.438 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:33:21.915 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:33:22.393 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:33:22.871 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:33:23.349 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:33:23.827 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:33:24.302 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:33:24.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:33:24.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:24.459 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:33:24.459 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:33:24.474 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:33:24.474 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:33:24.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:33:24.480 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:33:24.480 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:33:24.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:33:24.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:24.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:33:24.482 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:33:24.482 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:33:24.482 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:33:24.482 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:33:24.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:33:24.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:33:24.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:33:24.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:33:24.779 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:33:25.258 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:33:25.736 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:33:26.213 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:33:26.691 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:33:27.169 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:33:27.647 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:33:28.125 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:33:28.604 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:33:28.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:33:28.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:28.927 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:33:28.927 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:33:28.942 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:33:28.942 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:33:28.942 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:33:28.942 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:33:28.950 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:33:28.951 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:33:28.951 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:33:28.951 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:33:28.953 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:33:28.953 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:33:28.953 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:33:33.947 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:33:33.948 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:33:33.949 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:33:33.950 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:33:33.950 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:33:33.951 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:33:33.958 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:33:33.959 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:33:33.959 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:33:33.959 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:33:33.959 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:33:33.961 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:33:33.961 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:33:33.962 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:33:33.962 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:33:33.962 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:33:33.962 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:33:33.962 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:33:33.962 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:33:33.964 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:33:33.964 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:33:33.964 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:33:33.964 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:33:33.965 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:33:33.965 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:33:33.965 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:33:33.965 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:33:33.967 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:33:33.967 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:33:33.967 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:33:33.967 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:33:33.967 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:33:33.967 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:33:33.967 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:33:33.967 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:33:33.971 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:33:33.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:33:33.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:33:33.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:33:33.971 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:33:33.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:33:33.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:33:33.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:33:33.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:33.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:33:33.971 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:33:33.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:33.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:33.971 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:33:33.971 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:33:33.971 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:33:33.971 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:33:33.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:33.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:33.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:33.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:33:33.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:33.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:33.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:33.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:33.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:33.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:33.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:33.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:33.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:33.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:33.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:33.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:33.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:33.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:33.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:33.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:33.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:33.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:33.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:33.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:33.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:33.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:33.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:33.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:33.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:33.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:33.976 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:33:34.457 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:33:34.494 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:33:34.496 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:33:34.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:34.498 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:33:34.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:34.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:34.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:34.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:34.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:34.933 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:33:34.975 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:33:34.975 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:33:34.975 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:33:34.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:33:35.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:35.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:35.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:35.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:35.407 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:33:35.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:35.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:35.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:35.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:35.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:35.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:35.857 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:33:35.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:33:35.857 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:33:35.857 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:33:35.858 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:33:35.858 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:33:35.858 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:33:35.858 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:33:35.858 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:33:35.858 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:33:35.858 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:33:40.864 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:33:40.864 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:33:40.864 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:33:40.864 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:33:40.865 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:33:40.865 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:33:40.875 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:33:40.876 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:33:40.876 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:33:40.877 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:33:40.877 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:33:40.880 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:33:40.881 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:33:40.881 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:33:40.881 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:33:40.881 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:33:40.881 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:33:40.881 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:33:40.881 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:33:40.886 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:33:40.886 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:33:40.886 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:33:40.886 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:33:40.886 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:33:40.886 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:33:40.886 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:33:40.886 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:33:40.890 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:33:40.890 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:33:40.891 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:33:40.891 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:33:40.891 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:33:40.891 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:33:40.891 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:33:40.891 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:33:40.897 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:33:40.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:33:40.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:33:40.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:33:40.897 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:33:40.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:33:40.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:33:40.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:33:40.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:40.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:33:40.898 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:33:40.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:40.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:40.898 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:33:40.898 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:33:40.898 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:33:40.898 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:33:40.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:40.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:40.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:40.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:33:40.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:40.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:40.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:40.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:40.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:40.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:40.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:40.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:40.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:40.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:40.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:40.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:40.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:40.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:40.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:40.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:40.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:40.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:40.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:40.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:40.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:40.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:40.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:40.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:40.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:40.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:40.903 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:33:41.378 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:33:41.417 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:33:41.418 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:33:41.420 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:33:41.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:41.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:41.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:41.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:41.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:41.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:41.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:41.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:41.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:41.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:41.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:41.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:41.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:41.853 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:33:41.903 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:33:41.903 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:33:41.903 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:33:41.904 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:33:42.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:42.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:42.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:42.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:42.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:42.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:42.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:42.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:42.328 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:33:42.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:42.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:42.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:42.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:42.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:42.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:42.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:42.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:42.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:42.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:42.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:42.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:42.791 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:33:42.791 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:33:42.791 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:33:42.791 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:33:42.792 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:33:42.792 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:33:42.792 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:33:42.792 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:33:42.792 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:33:42.793 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:33:42.793 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:33:47.796 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:33:47.796 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:33:47.798 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:33:47.798 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:33:47.798 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:33:47.799 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:33:47.810 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:33:47.811 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:33:47.811 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:33:47.811 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:33:47.811 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:33:47.813 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:33:47.813 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:33:47.813 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:33:47.813 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:33:47.814 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:33:47.814 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:33:47.814 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:33:47.814 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:33:47.815 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:33:47.815 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:33:47.815 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:33:47.815 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:33:47.815 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:33:47.815 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:33:47.815 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:33:47.815 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:33:47.817 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:33:47.817 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:33:47.817 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:33:47.817 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:33:47.817 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:33:47.817 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:33:47.817 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:33:47.817 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:33:47.820 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:33:47.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:33:47.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:33:47.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:33:47.820 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:33:47.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:33:47.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:33:47.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:33:47.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:33:47.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:47.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:47.821 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:33:47.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:47.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:47.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:47.821 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:33:47.821 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:33:47.821 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:33:47.821 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:33:47.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:47.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:47.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:47.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:33:47.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:47.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:47.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:47.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:47.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:47.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:47.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:47.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:47.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:47.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:47.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:47.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:47.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:47.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:47.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:47.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:47.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:47.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:47.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:47.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:47.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:47.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:47.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:47.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:47.826 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:33:48.304 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:33:48.345 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:33:48.348 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:33:48.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:48.350 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:33:48.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:48.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:48.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:48.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:48.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:48.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:48.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:48.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:48.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:48.779 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:33:48.825 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:33:48.825 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:33:48.825 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:33:48.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:33:49.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:49.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:49.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:49.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:49.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:49.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:49.256 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:33:49.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:49.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:49.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:49.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:49.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:49.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:49.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:49.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:49.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:49.679 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:33:49.679 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:33:49.679 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:33:49.679 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:33:49.680 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:33:49.680 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:33:49.680 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:33:49.680 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:33:49.680 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:33:49.680 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:33:49.680 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:33:54.684 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:33:54.684 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:33:54.686 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:33:54.687 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:33:54.687 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:33:54.687 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:33:54.707 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:33:54.708 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:33:54.708 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:33:54.709 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:33:54.709 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:33:54.712 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:33:54.713 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:33:54.713 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:33:54.713 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:33:54.713 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:33:54.714 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:33:54.714 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:33:54.714 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:33:54.716 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:33:54.717 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:33:54.717 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:33:54.717 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:33:54.717 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:33:54.717 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:33:54.717 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:33:54.717 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:33:54.720 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:33:54.720 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:33:54.720 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:33:54.720 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:33:54.720 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:33:54.720 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:33:54.720 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:33:54.720 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:33:54.725 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:33:54.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:33:54.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:33:54.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:33:54.725 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:33:54.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:33:54.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:33:54.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:33:54.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:54.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:33:54.725 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:33:54.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:54.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:54.726 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:33:54.726 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:33:54.726 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:33:54.726 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:33:54.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:54.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:54.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:54.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:33:54.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:54.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:54.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:54.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:54.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:54.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:54.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:54.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:54.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:54.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:54.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:54.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:54.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:54.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:54.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:54.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:54.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:54.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:54.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:54.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:33:54.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:54.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:33:54.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:54.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:33:54.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:54.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:33:54.730 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:33:55.215 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:33:55.246 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:33:55.247 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:33:55.248 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:33:55.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:55.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:55.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:55.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:55.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:55.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:55.692 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:33:55.730 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:33:55.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:33:55.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:33:55.730 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:33:55.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:55.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:55.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:55.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:56.167 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:33:56.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:56.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:56.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:56.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:56.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:56.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:33:56.608 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:33:56.608 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:33:56.608 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:33:56.608 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:33:56.609 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:33:56.609 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:33:56.609 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:33:56.609 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:33:56.609 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:33:56.609 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:33:56.609 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:33:56.609 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=404 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:33:56.609 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=404 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:33:56.609 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=404 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:33:56.609 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=404 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:33:56.609 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=404 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:33:56.609 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=404 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:01.614 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:34:01.614 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:34:01.618 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:34:01.622 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:34:01.626 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:34:01.633 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:34:01.642 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:34:01.643 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:34:01.643 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:01.643 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:34:01.643 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:34:01.646 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:34:01.647 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:34:01.647 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:34:01.647 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:01.647 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:34:01.648 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:34:01.648 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:34:01.648 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:34:01.650 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:34:01.650 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:34:01.650 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:34:01.650 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:01.650 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:34:01.650 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:34:01.651 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:34:01.651 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:34:01.653 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:34:01.653 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:34:01.653 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:34:01.653 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:01.653 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:34:01.653 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:34:01.653 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:34:01.653 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:34:01.657 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:34:01.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:34:01.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:34:01.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:34:01.657 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:34:01.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:34:01.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:34:01.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:34:01.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:01.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:34:01.658 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:34:01.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:01.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:01.658 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:34:01.658 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:34:01.658 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:34:01.658 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:34:01.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:01.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:01.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:01.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:34:01.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:01.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:01.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:01.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:01.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:01.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:01.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:01.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:01.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:01.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:01.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:01.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:01.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:01.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:01.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:01.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:01.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:01.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:01.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:01.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:01.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:01.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:01.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:01.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:01.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:01.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:01.663 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:34:02.146 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:34:02.188 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:34:02.191 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:34:02.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:02.195 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:34:02.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:02.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:02.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:02.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:02.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:02.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:02.623 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:34:02.661 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:34:02.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:34:02.662 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:34:02.662 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:34:02.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:02.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:02.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:02.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:03.100 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:34:03.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:03.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:03.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:03.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:03.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:03.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:03.543 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:34:03.543 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:34:03.543 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:34:03.543 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:34:03.544 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:34:03.544 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:34:03.544 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:34:03.544 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:34:03.544 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:34:03.544 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:34:03.544 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:34:03.544 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=404 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:03.544 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=404 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:03.544 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=404 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:03.544 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=404 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:03.544 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=404 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:08.549 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:34:08.550 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:34:08.550 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:34:08.551 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:34:08.552 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:34:08.553 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:34:08.560 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:34:08.562 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:34:08.562 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:08.562 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:34:08.562 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:34:08.569 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:34:08.569 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:34:08.569 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:34:08.570 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:08.570 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:34:08.571 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:34:08.571 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:34:08.571 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:34:08.575 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:34:08.575 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:34:08.575 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:34:08.575 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:08.576 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:34:08.576 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:34:08.577 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:34:08.577 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:34:08.580 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:34:08.580 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:34:08.580 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:34:08.580 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:08.580 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:34:08.580 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:34:08.580 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:34:08.580 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:34:08.586 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:34:08.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:34:08.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:34:08.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:34:08.586 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:34:08.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:34:08.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:34:08.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:34:08.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:08.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:34:08.587 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:34:08.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:08.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:08.587 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:34:08.587 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:34:08.587 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:34:08.588 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:34:08.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:08.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:08.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:08.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:34:08.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:08.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:08.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:08.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:08.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:08.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:08.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:08.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:08.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:08.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:08.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:08.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:08.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:08.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:08.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:08.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:08.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:08.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:08.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:08.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:08.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:08.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:08.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:08.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:08.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:08.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:08.592 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:34:09.072 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:34:09.108 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:34:09.109 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:34:09.109 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:34:09.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:09.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:09.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:09.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:09.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:09.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:09.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:09.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:09.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:09.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:09.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:09.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:09.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:09.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:09.546 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:34:09.591 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:34:09.592 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:34:09.592 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:34:09.592 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:34:09.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:09.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:09.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:09.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:09.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:09.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:09.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:09.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:10.023 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:34:10.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:10.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:10.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:10.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:10.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:10.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:10.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:10.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:10.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:10.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:10.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:10.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:10.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:34:10.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:34:10.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:34:10.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:34:10.492 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:34:10.492 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:34:10.492 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:34:10.492 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:34:10.493 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:34:10.493 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:34:10.493 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:34:10.493 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=409 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:10.493 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=409 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:10.493 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=409 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:10.494 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=409 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:10.494 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=409 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:10.494 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=409 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:15.490 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:34:15.490 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:34:15.492 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:34:15.493 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:34:15.494 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:34:15.495 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:34:15.500 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:34:15.501 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:34:15.501 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:15.501 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:34:15.501 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:34:15.504 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:34:15.504 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:34:15.505 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:34:15.505 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:15.505 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:34:15.505 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:34:15.505 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:34:15.505 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:34:15.508 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:34:15.508 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:34:15.509 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:34:15.509 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:15.509 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:34:15.509 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:34:15.509 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:34:15.509 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:34:15.512 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:34:15.512 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:34:15.512 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:34:15.512 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:15.512 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:34:15.513 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:34:15.513 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:34:15.513 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:34:15.517 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:34:15.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:34:15.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:34:15.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:34:15.518 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:34:15.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:34:15.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:34:15.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:34:15.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:34:15.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:15.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:15.518 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:34:15.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:15.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:15.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:15.518 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:34:15.518 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:34:15.518 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:34:15.519 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:34:15.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:15.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:15.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:15.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:34:15.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:15.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:15.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:15.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:15.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:15.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:15.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:15.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:15.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:15.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:15.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:15.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:15.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:15.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:15.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:15.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:15.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:15.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:15.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:15.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:15.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:15.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:15.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:15.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:15.523 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:34:16.008 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:34:16.039 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:34:16.042 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:34:16.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:16.044 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:34:16.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:16.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:16.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:16.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:16.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:16.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:16.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:16.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:16.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:16.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:16.484 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:34:16.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:34:16.522 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:34:16.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:34:16.523 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:34:16.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:16.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:16.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:16.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:16.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:16.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:16.961 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:34:17.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:17.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:17.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:17.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:17.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:17.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:17.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:17.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:17.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:17.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:34:17.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:34:17.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:34:17.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:34:17.399 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:34:17.400 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:34:17.400 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:34:17.400 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:34:17.401 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:34:17.401 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:34:17.401 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:34:17.401 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=403 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:17.401 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=403 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:17.402 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=403 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:17.402 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=403 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:17.402 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=403 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:17.402 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=403 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:17.402 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=403 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:22.399 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:34:22.399 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:34:22.400 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:34:22.401 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:34:22.402 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:34:22.402 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:34:22.412 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:34:22.413 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:34:22.414 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:22.414 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:34:22.414 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:34:22.418 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:34:22.418 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:34:22.418 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:34:22.418 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:22.418 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:34:22.419 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:34:22.419 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:34:22.419 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:34:22.423 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:34:22.423 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:34:22.423 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:34:22.423 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:22.423 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:34:22.423 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:34:22.424 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:34:22.424 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:34:22.427 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:34:22.427 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:34:22.427 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:34:22.427 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:22.428 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:34:22.428 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:34:22.428 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:34:22.428 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:34:22.433 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:34:22.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:34:22.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:34:22.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:34:22.433 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:34:22.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:34:22.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:34:22.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:34:22.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:22.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:34:22.434 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:34:22.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:22.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:22.434 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:34:22.434 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:34:22.434 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:34:22.434 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:34:22.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:22.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:22.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:22.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:34:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:22.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:22.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:22.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:22.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:22.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:22.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:22.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:22.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:22.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:22.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:22.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:22.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:22.439 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:34:22.923 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:34:22.957 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:34:22.958 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:34:22.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:22.960 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:34:23.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:23.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:23.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:23.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:23.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:23.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:23.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:23.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:23.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:23.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:23.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:23.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:23.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:23.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:23.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:23.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:23.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:23.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:23.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:23.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:23.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:23.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:23.069 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:34:23.069 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:34:23.069 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:34:23.069 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:34:23.071 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:34:23.071 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:34:23.071 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:34:23.071 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:34:23.071 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:34:23.071 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:34:23.072 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:34:23.072 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=136 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:23.072 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=136 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:23.072 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=136 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:23.072 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=136 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:23.072 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=136 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:23.072 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=136 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:23.072 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=136 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:23.072 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=136 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:28.074 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:34:28.074 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:34:28.077 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:34:28.077 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:34:28.078 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:34:28.079 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:34:28.087 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:34:28.089 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:34:28.089 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:28.090 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:34:28.090 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:34:28.095 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:34:28.096 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:34:28.096 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:34:28.096 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:28.097 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:34:28.097 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:34:28.098 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:34:28.098 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:34:28.101 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:34:28.102 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:34:28.102 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:34:28.102 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:28.102 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:34:28.102 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:34:28.103 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:34:28.103 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:34:28.108 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:34:28.108 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:34:28.108 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:34:28.108 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:28.109 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:34:28.109 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:34:28.109 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:34:28.109 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:34:28.113 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:34:28.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:34:28.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:34:28.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:34:28.113 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:34:28.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:34:28.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:34:28.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:34:28.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:34:28.114 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:34:28.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:28.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:28.114 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:34:28.114 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:34:28.114 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:34:28.114 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:34:28.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:28.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:28.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:28.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:34:28.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:28.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:28.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:28.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:28.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:28.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:28.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:28.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:28.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:28.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:28.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:28.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:28.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:28.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:28.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:28.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:28.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:28.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:28.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:28.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:28.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:28.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:28.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:28.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:28.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:28.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:28.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:28.119 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:34:28.605 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:34:28.640 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:34:28.641 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:34:28.642 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:34:28.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:28.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:34:28.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:34:28.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:34:28.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:34:28.780 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:34:28.780 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:34:28.780 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:34:28.780 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:34:28.780 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:34:28.780 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:34:28.780 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:34:33.785 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:34:33.785 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:34:33.786 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:34:33.787 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:34:33.788 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:34:33.788 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:34:33.794 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:34:33.794 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:34:33.794 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:33.794 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:34:33.794 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:34:33.796 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:34:33.796 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:34:33.796 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:34:33.796 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:33.796 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:34:33.796 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:34:33.796 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:34:33.796 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:34:33.798 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:34:33.798 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:34:33.798 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:34:33.798 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:33.798 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:34:33.798 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:34:33.798 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:34:33.798 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:34:33.801 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:34:33.801 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:34:33.801 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:34:33.801 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:33.801 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:34:33.801 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:34:33.801 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:34:33.801 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:34:33.805 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:34:33.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:34:33.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:34:33.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:34:33.805 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:34:33.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:34:33.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:34:33.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:34:33.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:33.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:34:33.806 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:34:33.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:33.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:33.806 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:34:33.806 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:34:33.806 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:34:33.806 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:34:33.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:33.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:33.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:33.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:34:33.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:33.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:33.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:33.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:33.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:33.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:33.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:33.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:33.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:33.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:33.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:33.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:33.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:33.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:33.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:33.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:33.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:33.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:33.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:33.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:33.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:33.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:33.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:33.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:33.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:33.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:33.811 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:34:34.296 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:34:34.326 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:34:34.327 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:34:34.329 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:34:34.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:34.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:34.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:34.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:34.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:34.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:34.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:34.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:34.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:34.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:34.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:34.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:34.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:34.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:34.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:34.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:34.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:34.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:34.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:34.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:34.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:34.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:34.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:34.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:34.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:34.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:34.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:34.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:34.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:34.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:34.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:34.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:34.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:34.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:34.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:34.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:34.447 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:34:34.447 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:34:34.447 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:34:34.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:34:34.448 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:34:34.448 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:34:34.448 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:34:34.448 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:34:34.448 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:34:34.448 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:34:34.448 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:34:39.454 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:34:39.454 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:34:39.455 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:34:39.455 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:34:39.456 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:34:39.456 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:34:39.473 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:34:39.475 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:34:39.475 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:39.476 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:34:39.476 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:34:39.481 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:34:39.481 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:34:39.482 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:34:39.482 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:39.482 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:34:39.483 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:34:39.483 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:34:39.483 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:34:39.486 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:34:39.486 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:34:39.486 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:34:39.486 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:39.487 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:34:39.487 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:34:39.487 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:34:39.487 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:34:39.490 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:34:39.490 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:34:39.491 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:34:39.491 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:39.491 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:34:39.491 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:34:39.491 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:34:39.491 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:34:39.495 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:34:39.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:34:39.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:34:39.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:34:39.496 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:34:39.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:34:39.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:34:39.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:34:39.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:34:39.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:39.496 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:34:39.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:39.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:39.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:39.496 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:34:39.496 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:34:39.496 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:34:39.497 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:34:39.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:39.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:39.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:39.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:34:39.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:39.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:39.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:39.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:39.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:39.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:39.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:39.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:39.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:39.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:39.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:39.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:39.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:39.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:39.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:39.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:39.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:39.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:39.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:39.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:39.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:39.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:39.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:39.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:39.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:39.501 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:34:39.985 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:34:40.015 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:34:40.016 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:34:40.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:40.017 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:34:40.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:40.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:40.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:40.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:40.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:40.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:40.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:40.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:40.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:40.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:40.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:40.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:40.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:40.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:40.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:40.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:40.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:40.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:40.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:40.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:40.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:40.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:40.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:34:40.128 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:34:40.129 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:34:40.129 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:34:40.129 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:34:40.129 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:34:40.130 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:34:40.130 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:34:40.130 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:34:40.130 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:34:40.130 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:34:40.130 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=135 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:40.130 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=135 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:40.130 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=135 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:40.130 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=135 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:40.130 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=135 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:40.130 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=135 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:45.134 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:34:45.134 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:34:45.135 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:34:45.136 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:34:45.137 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:34:45.138 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:34:45.143 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:34:45.143 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:34:45.143 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:45.144 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:34:45.144 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:34:45.145 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:34:45.146 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:34:45.146 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:34:45.146 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:45.146 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:34:45.146 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:34:45.146 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:34:45.146 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:34:45.148 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:34:45.148 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:34:45.148 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:34:45.148 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:45.148 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:34:45.148 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:34:45.148 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:34:45.148 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:34:45.150 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:34:45.150 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:34:45.150 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:34:45.150 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:45.150 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:34:45.150 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:34:45.150 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:34:45.150 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:34:45.153 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:34:45.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:34:45.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:34:45.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:34:45.153 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:34:45.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:34:45.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:34:45.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:34:45.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:34:45.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:45.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:45.153 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:34:45.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:45.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:45.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:45.153 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:34:45.153 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:34:45.153 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:34:45.153 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:34:45.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:45.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:45.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:45.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:34:45.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:45.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:45.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:45.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:45.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:45.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:45.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:45.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:45.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:45.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:45.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:45.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:45.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:45.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:45.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:45.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:45.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:45.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:45.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:45.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:45.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:45.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:45.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:45.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:45.158 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:34:45.639 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:34:45.673 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:34:45.675 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:34:45.676 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:34:45.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:45.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:45.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:45.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:45.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:45.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:45.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:45.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:45.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:45.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:45.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:45.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:45.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:45.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:45.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:45.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:45.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:45.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:45.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:45.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:45.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:45.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:45.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:45.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:45.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:45.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:45.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:34:45.759 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:34:45.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:34:45.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:34:45.761 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:34:45.761 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:34:45.761 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:34:45.761 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:34:45.761 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:34:45.761 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:34:45.761 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:34:45.761 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=130 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:45.761 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=130 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:45.761 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=130 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:45.761 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=130 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:45.761 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=130 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:45.761 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=130 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:45.761 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=130 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:45.761 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=130 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:50.764 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:34:50.764 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:34:50.767 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:34:50.768 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:34:50.768 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:34:50.768 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:34:50.779 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:34:50.780 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:34:50.780 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:50.781 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:34:50.781 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:34:50.786 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:34:50.787 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:34:50.787 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:34:50.787 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:50.787 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:34:50.787 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:34:50.788 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:34:50.788 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:34:50.790 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:34:50.790 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:34:50.790 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:34:50.791 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:50.791 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:34:50.791 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:34:50.791 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:34:50.791 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:34:50.794 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:34:50.794 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:34:50.794 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:34:50.794 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:50.794 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:34:50.794 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:34:50.794 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:34:50.794 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:34:50.799 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:34:50.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:34:50.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:34:50.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:34:50.799 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:34:50.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:34:50.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:34:50.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:34:50.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:50.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:34:50.799 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:34:50.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:50.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:50.800 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:34:50.800 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:34:50.800 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:34:50.800 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:34:50.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:50.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:50.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:50.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:34:50.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:50.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:50.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:50.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:50.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:50.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:50.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:50.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:50.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:50.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:50.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:50.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:50.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:50.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:50.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:50.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:50.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:50.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:50.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:50.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:50.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:50.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:50.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:50.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:50.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:50.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:50.804 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:34:51.287 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:34:51.318 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:34:51.319 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:34:51.319 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:34:51.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:51.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:51.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:34:51.411 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:34:51.411 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:34:51.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:34:51.412 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:34:51.413 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:34:51.413 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:34:51.413 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:34:51.413 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:34:51.413 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:34:51.413 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:34:51.413 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=131 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:51.413 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=131 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:51.413 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=131 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:51.413 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=131 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:56.417 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:34:56.417 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:34:56.418 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:34:56.419 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:34:56.420 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:34:56.420 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:34:56.429 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:34:56.430 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:34:56.430 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:56.431 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:34:56.431 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:34:56.434 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:34:56.434 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:34:56.434 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:34:56.434 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:56.434 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:34:56.435 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:34:56.435 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:34:56.435 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:34:56.439 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:34:56.439 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:34:56.439 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:34:56.439 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:56.439 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:34:56.439 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:34:56.440 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:34:56.440 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:34:56.443 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:34:56.443 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:34:56.444 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:34:56.444 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:34:56.444 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:34:56.444 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:34:56.444 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:34:56.444 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:34:56.450 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:34:56.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:34:56.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:34:56.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:34:56.451 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:34:56.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:34:56.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:34:56.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:34:56.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:56.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:34:56.451 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:34:56.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:56.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:56.452 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:34:56.452 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:34:56.452 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:34:56.452 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:34:56.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:56.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:56.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:56.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:34:56.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:56.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:56.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:56.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:56.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:56.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:56.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:56.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:56.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:56.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:56.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:56.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:56.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:56.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:56.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:56.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:34:56.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:56.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:56.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:56.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:56.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:56.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:56.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:34:56.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:56.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:56.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:34:56.457 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:34:56.941 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:34:56.978 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:34:56.980 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:34:56.981 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:34:56.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:57.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:34:57.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:57.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:57.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:57.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:57.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:57.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:57.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:57.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:57.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:57.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:57.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:57.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:57.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:57.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:57.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:57.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:57.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:57.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:57.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:57.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:57.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:57.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:57.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:57.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:57.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:57.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:57.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:57.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:57.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:57.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:57.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:57.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:57.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:57.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:57.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:57.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:34:57.102 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:34:57.102 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:34:57.102 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:34:57.102 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:34:57.103 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:34:57.103 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:34:57.103 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:34:57.103 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:34:57.103 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:34:57.103 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:34:57.103 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:34:57.103 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=139 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:57.103 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=139 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:57.103 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=139 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:57.103 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=139 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:57.103 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=139 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:57.103 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=139 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:57.103 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=139 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:34:57.103 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=139 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:35:02.108 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:35:02.109 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:35:02.109 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:35:02.110 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:35:02.111 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:35:02.112 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:35:02.116 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:35:02.116 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:35:02.116 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:35:02.117 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:35:02.117 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:35:02.120 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:35:02.120 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:35:02.120 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:35:02.120 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:35:02.120 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:35:02.120 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:35:02.121 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:35:02.121 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:35:02.122 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:35:02.122 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:35:02.122 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:35:02.122 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:35:02.122 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:35:02.122 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:35:02.122 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:35:02.122 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:35:02.124 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:35:02.124 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:35:02.124 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:35:02.124 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:35:02.124 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:35:02.124 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:35:02.124 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:35:02.124 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:35:02.127 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:35:02.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:35:02.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:35:02.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:35:02.127 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:35:02.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:35:02.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:35:02.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:35:02.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:02.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:35:02.127 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:35:02.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:02.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:02.127 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:35:02.127 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:35:02.127 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:35:02.127 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:35:02.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:02.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:02.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:02.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:35:02.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:02.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:02.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:02.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:02.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:02.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:02.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:02.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:02.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:02.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:02.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:02.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:02.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:02.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:02.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:02.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:02.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:02.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:02.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:02.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:02.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:02.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:02.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:02.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:02.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:02.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:02.132 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:35:02.617 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:35:02.644 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:35:02.645 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:35:02.646 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:35:02.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:35:02.656 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:35:02.656 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:35:02.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:35:02.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:35:02.657 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:35:02.657 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:35:02.657 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:35:02.657 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:35:03.095 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:35:03.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:35:03.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:35:03.131 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:35:03.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:35:03.573 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:35:04.050 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:35:04.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:35:04.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:35:04.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:35:04.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:35:04.528 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:35:05.007 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:35:05.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:35:05.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:35:05.133 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:35:05.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:35:05.485 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:35:05.963 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:35:06.133 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:35:06.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:35:06.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:35:06.134 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:35:06.134 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:35:06.134 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:35:06.136 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:35:06.136 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:35:06.136 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:35:06.137 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:35:06.137 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:35:06.137 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:35:06.138 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:35:06.138 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:35:06.138 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:35:06.138 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:35:06.138 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:35:11.143 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:35:11.143 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:35:11.144 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:35:11.144 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:35:11.145 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:35:11.146 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:35:11.154 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:35:11.156 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:35:11.156 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:35:11.156 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:35:11.156 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:35:11.160 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:35:11.161 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:35:11.161 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:35:11.161 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:35:11.161 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:35:11.161 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:35:11.161 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:35:11.161 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:35:11.166 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:35:11.166 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:35:11.166 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:35:11.166 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:35:11.167 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:35:11.167 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:35:11.167 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:35:11.167 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:35:11.171 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:35:11.171 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:35:11.171 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:35:11.171 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:35:11.171 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:35:11.171 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:35:11.171 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:35:11.171 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:35:11.177 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:35:11.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:35:11.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:35:11.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:35:11.177 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:35:11.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:35:11.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:35:11.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:35:11.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:11.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:35:11.178 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:35:11.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:11.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:11.178 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:35:11.178 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:35:11.178 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:35:11.178 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:35:11.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:11.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:11.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:11.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:35:11.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:11.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:11.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:11.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:11.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:11.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:11.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:11.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:11.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:11.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:11.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:11.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:11.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:11.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:11.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:11.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:11.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:11.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:11.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:11.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:11.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:11.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:11.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:11.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:11.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:11.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:11.183 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:35:11.667 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:35:11.697 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:35:11.698 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:35:11.698 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:35:11.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:35:11.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:35:11.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:35:11.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:35:11.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:35:11.711 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:35:11.711 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:35:11.711 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:35:11.711 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:35:11.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:35:11.764 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:35:11.764 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:35:11.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:35:11.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:35:12.144 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:35:12.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:35:12.183 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:35:12.183 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:35:12.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:35:12.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:35:12.267 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:35:12.267 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:35:12.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:35:12.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:35:12.268 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:35:12.268 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:35:12.268 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:35:12.268 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:35:12.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:35:12.285 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:35:12.285 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:35:12.294 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:35:12.295 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:35:12.295 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:35:12.295 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:35:12.297 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:35:12.297 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:35:12.297 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:35:12.297 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:35:12.297 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:35:12.297 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:35:12.297 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:35:12.297 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=239 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:35:12.297 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=239 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:35:12.298 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=239 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:35:12.298 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=239 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:35:12.298 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=239 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:35:12.298 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=239 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:35:17.301 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:35:17.301 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:35:17.301 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:35:17.302 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:35:17.302 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:35:17.303 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:35:17.312 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:35:17.314 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:35:17.314 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:35:17.314 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:35:17.314 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:35:17.319 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:35:17.319 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:35:17.319 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:35:17.319 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:35:17.320 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:35:17.320 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:35:17.320 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:35:17.320 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:35:17.323 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:35:17.323 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:35:17.324 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:35:17.324 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:35:17.324 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:35:17.324 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:35:17.324 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:35:17.324 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:35:17.327 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:35:17.327 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:35:17.328 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:35:17.328 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:35:17.328 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:35:17.328 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:35:17.328 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:35:17.328 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:35:17.331 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:35:17.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:35:17.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:35:17.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:35:17.331 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:35:17.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:35:17.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:35:17.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:35:17.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:35:17.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:17.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:17.332 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:35:17.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:17.332 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:35:17.332 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:35:17.332 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:35:17.332 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:35:17.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:17.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:17.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:17.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:35:17.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:17.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:17.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:17.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:17.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:17.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:17.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:17.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:17.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:17.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:17.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:17.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:17.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:17.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:17.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:17.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:17.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:17.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:17.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:17.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:17.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:17.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:17.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:17.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:17.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:17.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:17.337 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:35:17.822 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:35:17.847 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:35:17.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:35:17.848 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:35:17.849 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:35:17.861 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:35:17.861 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:35:17.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:35:17.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:35:17.866 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:35:17.866 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:35:17.866 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:35:17.866 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:35:17.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:35:17.924 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:35:17.924 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:35:17.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:35:17.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:35:17.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:35:18.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:35:18.038 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:35:18.038 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:35:18.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:35:18.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:35:18.039 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:35:18.039 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:35:18.039 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:35:18.039 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:35:18.300 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:35:18.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:35:18.336 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:35:18.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:35:18.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:35:18.778 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:35:19.257 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:35:19.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:35:19.337 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:35:19.337 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:35:19.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:35:19.735 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:35:20.214 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:35:20.338 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:35:20.338 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:35:20.338 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:35:20.338 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:35:20.692 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:35:21.170 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:35:21.339 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:35:21.339 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:35:21.340 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:35:21.340 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:35:21.648 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:35:22.127 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:35:22.340 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:35:22.341 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:35:22.341 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:35:22.341 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:35:22.605 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:35:23.083 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:35:23.561 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:35:24.039 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:35:24.517 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:35:24.995 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:35:25.474 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:35:25.952 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:35:26.429 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:35:26.908 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:35:27.386 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:35:27.864 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:35:28.342 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:35:28.820 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:35:29.299 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:35:29.777 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:35:30.254 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:35:30.732 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:35:31.211 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:35:31.689 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:35:32.167 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:35:32.645 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:35:33.123 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 04:35:33.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:35:33.420 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:35:33.420 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:35:33.420 [WARNING] transceiver.py:250 (MS@172.18.144.22:6700) RX TRXD message (fn=3432 tn=2 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:35:33.421 [WARNING] transceiver.py:250 (MS@172.18.144.22:6700) RX TRXD message (fn=3432 tn=3 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:35:33.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:35:33.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:35:33.429 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:35:33.429 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:35:33.429 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:35:33.429 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:35:33.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:35:33.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:35:33.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:35:33.463 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:35:33.464 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:35:33.464 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:35:33.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:35:33.466 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:35:33.466 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:35:33.466 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:35:33.466 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:35:33.466 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:35:33.466 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:35:33.466 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:35:33.466 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3442 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:35:33.466 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3442 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:35:33.466 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3442 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:35:33.466 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3442 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:35:33.466 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3442 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:35:33.466 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3442 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:35:38.464 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:35:38.464 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:35:38.466 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:35:38.466 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:35:38.467 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:35:38.467 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:35:38.480 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:35:38.481 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:35:38.481 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:35:38.481 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:35:38.481 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:35:38.484 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:35:38.484 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:35:38.484 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:35:38.484 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:35:38.484 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:35:38.484 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:35:38.485 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:35:38.485 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:35:38.488 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:35:38.488 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:35:38.488 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:35:38.489 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:35:38.489 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:35:38.489 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:35:38.489 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:35:38.489 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:35:38.491 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:35:38.491 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:35:38.491 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:35:38.491 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:35:38.491 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:35:38.491 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:35:38.491 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:35:38.491 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:35:38.494 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:35:38.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:35:38.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:35:38.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:35:38.494 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:35:38.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:35:38.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:35:38.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:35:38.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:38.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:35:38.495 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:35:38.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:38.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:38.495 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:35:38.495 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:35:38.495 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:35:38.495 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:35:38.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:38.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:38.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:38.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:35:38.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:38.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:38.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:38.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:38.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:38.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:38.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:38.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:38.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:38.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:38.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:38.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:38.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:38.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:38.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:38.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:38.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:38.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:38.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:38.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:38.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:38.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:38.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:38.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:38.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:38.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:38.499 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:35:38.984 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:35:39.011 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:35:39.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:35:39.013 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:35:39.014 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:35:39.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:35:39.029 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:35:39.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:35:39.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:35:39.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:35:39.031 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:35:39.031 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:35:39.031 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:35:39.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:35:39.088 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:35:39.088 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:35:39.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:35:39.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:35:39.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:35:39.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:35:39.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:35:39.379 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:35:39.379 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:35:39.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:35:39.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:35:39.380 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:35:39.380 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:35:39.380 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:35:39.380 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:35:39.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:35:39.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:35:39.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:35:39.416 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:35:39.416 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:35:39.417 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:35:39.417 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:35:39.422 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:35:39.422 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:35:39.422 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:35:39.422 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:35:39.422 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:35:39.422 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:35:39.423 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:35:44.421 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:35:44.422 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:35:44.423 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:35:44.424 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:35:44.425 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:35:44.425 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:35:44.432 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:35:44.433 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:35:44.433 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:35:44.434 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:35:44.434 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:35:44.436 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:35:44.436 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:35:44.436 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:35:44.436 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:35:44.437 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:35:44.437 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:35:44.437 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:35:44.437 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:35:44.439 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:35:44.439 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:35:44.439 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:35:44.439 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:35:44.439 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:35:44.439 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:35:44.439 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:35:44.439 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:35:44.441 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:35:44.441 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:35:44.441 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:35:44.441 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:35:44.441 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:35:44.441 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:35:44.442 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:35:44.442 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:35:44.445 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:35:44.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:35:44.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:35:44.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:35:44.445 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:35:44.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:35:44.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:35:44.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:35:44.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:35:44.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:44.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:44.445 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:35:44.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:44.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:44.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:44.445 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:35:44.445 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:35:44.445 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:35:44.446 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:35:44.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:44.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:44.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:44.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:35:44.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:44.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:44.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:44.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:44.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:44.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:44.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:44.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:44.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:44.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:44.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:44.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:44.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:44.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:44.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:44.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:44.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:44.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:44.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:44.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:44.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:44.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:44.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:44.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:44.450 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:35:44.936 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:35:44.962 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:35:44.963 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:35:44.964 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:35:44.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:35:44.979 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:35:44.980 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:35:44.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:35:44.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:35:44.986 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:35:44.986 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:35:44.987 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:35:44.987 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:35:45.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:35:45.039 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:35:45.039 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:35:45.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:35:45.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:35:45.414 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:35:45.448 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:35:45.449 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:35:45.449 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:35:45.449 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:35:45.893 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:35:46.370 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:35:46.449 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:35:46.450 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:35:46.450 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:35:46.450 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:35:46.849 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:35:47.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:35:47.049 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:35:47.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:35:47.049 [WARNING] transceiver.py:250 (MS@172.18.144.22:6700) RX TRXD message (fn=555 tn=6 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:35:47.049 [WARNING] transceiver.py:250 (MS@172.18.144.22:6700) RX TRXD message (fn=555 tn=7 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:35:47.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:35:47.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:35:47.069 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:35:47.069 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:35:47.069 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:35:47.069 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:35:47.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:35:47.086 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:35:47.086 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:35:47.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:35:47.095 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:35:47.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:35:47.095 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:35:47.097 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:35:47.097 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:35:47.097 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:35:47.097 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:35:47.097 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:35:47.097 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:35:47.097 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:35:47.097 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=565 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:35:47.097 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=565 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:35:47.097 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=565 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:35:47.097 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=565 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:35:47.097 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=565 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:35:47.097 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=565 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:35:52.098 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:35:52.098 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:35:52.099 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:35:52.101 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:35:52.101 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:35:52.102 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:35:52.108 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:35:52.108 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:35:52.108 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:35:52.109 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:35:52.109 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:35:52.110 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:35:52.110 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:35:52.110 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:35:52.111 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:35:52.111 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:35:52.111 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:35:52.111 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:35:52.111 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:35:52.112 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:35:52.112 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:35:52.112 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:35:52.112 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:35:52.112 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:35:52.112 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:35:52.112 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:35:52.112 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:35:52.114 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:35:52.114 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:35:52.114 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:35:52.114 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:35:52.115 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:35:52.115 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:35:52.115 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:35:52.115 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:35:52.119 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:35:52.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:35:52.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:35:52.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:35:52.119 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:35:52.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:35:52.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:35:52.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:35:52.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:52.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:35:52.120 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:35:52.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:52.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:52.120 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:35:52.120 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:35:52.120 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:35:52.120 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:35:52.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:52.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:52.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:52.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:35:52.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:52.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:52.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:52.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:52.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:52.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:52.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:52.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:52.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:52.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:52.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:52.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:52.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:52.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:52.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:52.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:52.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:52.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:52.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:52.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:52.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:52.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:52.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:52.122 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:35:52.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:52.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:52.122 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:35:52.122 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:35:52.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:52.122 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:35:52.122 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:35:52.122 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:35:52.122 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:35:57.124 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:35:57.124 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:35:57.124 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:35:57.125 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:35:57.126 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:35:57.126 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:35:57.131 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:35:57.131 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:35:57.131 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:35:57.131 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:35:57.131 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:35:57.133 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:35:57.133 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:35:57.133 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:35:57.133 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:35:57.133 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:35:57.133 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:35:57.133 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:35:57.133 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:35:57.135 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:35:57.135 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:35:57.135 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:35:57.135 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:35:57.135 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:35:57.135 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:35:57.135 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:35:57.135 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:35:57.137 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:35:57.137 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:35:57.137 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:35:57.137 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:35:57.137 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:35:57.137 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:35:57.137 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:35:57.137 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:35:57.139 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:35:57.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:35:57.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:35:57.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:35:57.139 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:35:57.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:35:57.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:35:57.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:35:57.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:57.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:35:57.140 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:35:57.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:57.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:57.140 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:35:57.140 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:35:57.140 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:35:57.140 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:35:57.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:57.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:57.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:57.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:35:57.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:57.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:57.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:57.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:57.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:57.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:57.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:57.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:57.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:57.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:57.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:57.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:57.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:57.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:57.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:57.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:57.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:35:57.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:57.141 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:35:57.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:57.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:57.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:57.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:35:57.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:57.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:57.141 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:35:57.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:35:57.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:35:57.141 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:35:57.141 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:35:57.141 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:35:57.141 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:35:57.141 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:36:01.329 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.144.20:5700'
2025-12-15 04:36:01.329 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.144.20:5802)
2025-12-15 04:36:01.329 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.144.20:5801)
2025-12-15 04:36:01.329 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.144.22:6700'
2025-12-15 04:36:01.329 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.144.22:6802)
2025-12-15 04:36:01.329 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.144.22:6801)
2025-12-15 04:36:01.329 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.144.20:5700/1'
2025-12-15 04:36:01.329 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.144.20:5804)
2025-12-15 04:36:01.329 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.144.20:5803)
2025-12-15 04:36:01.329 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.144.20:5700/2'
2025-12-15 04:36:01.330 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.144.20:5806)
2025-12-15 04:36:01.330 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.144.20:5805)
2025-12-15 04:36:01.330 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.144.20:5700/3'
2025-12-15 04:36:01.330 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.144.20:5808)
2025-12-15 04:36:01.330 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.144.20:5807)
2025-12-15 04:36:01.330 [INFO] fake_trx.py:424 Init complete
2025-12-15 04:36:01.330 [INFO] fake_trx.py:455 Setting real time process scheduler to SCHED_RR, priority 30
2025-12-15 04:36:01.852 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:36:01.852 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:36:01.852 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:36:01.852 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:36:01.852 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:36:01.852 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:36:13.910 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:36:13.910 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:36:13.910 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:36:13.910 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:36:18.943 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:36:18.943 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:36:18.944 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:36:18.944 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:36:18.945 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:36:18.946 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:36:18.967 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:36:18.967 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:36:18.967 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:36:18.967 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:36:23.996 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:36:23.996 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:36:23.998 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:36:24.001 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:36:24.002 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:36:24.003 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:36:24.023 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:36:24.023 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:36:24.023 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:36:24.023 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:36:29.053 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:36:29.053 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:36:29.056 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:36:29.058 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:36:29.059 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:36:29.060 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:36:29.081 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:36:29.081 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:36:29.081 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:36:29.081 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:36:34.110 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:36:34.110 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:36:34.113 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:36:34.115 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:36:34.115 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:36:34.116 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:36:34.137 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:36:34.137 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:36:34.137 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:36:34.137 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:36:39.167 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:36:39.167 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:36:39.169 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:36:39.171 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:36:39.172 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:36:39.173 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:36:39.193 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:36:39.193 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:36:39.193 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:36:39.193 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:36:44.222 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:36:44.222 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:36:44.224 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:36:44.227 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:36:44.228 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:36:44.229 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:36:44.251 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:36:44.252 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:36:44.252 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:36:44.252 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:36:49.268 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:36:49.268 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:36:49.271 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:36:49.275 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:36:49.276 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:36:49.279 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:36:49.303 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:36:49.303 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:36:49.304 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:36:49.304 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:36:54.333 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:36:54.333 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:36:54.335 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:36:54.338 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:36:54.339 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:36:54.340 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:36:54.356 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:36:54.356 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:36:54.356 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:36:54.356 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:36:59.385 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:36:59.386 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:36:59.388 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:36:59.390 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:36:59.391 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:36:59.392 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:36:59.413 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:36:59.413 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:36:59.413 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:36:59.413 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:37:04.445 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:37:04.445 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:37:04.447 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:37:04.448 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:37:04.449 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:37:04.450 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:37:04.469 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:37:04.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:37:04.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:37:04.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:37:04.469 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:37:04.469 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:37:04.469 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:37:04.469 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:37:04.469 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:37:04.469 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:37:04.469 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:37:04.469 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:37:04.469 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 0 -> 1
2025-12-15 04:37:04.469 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:37:04.469 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:37:04.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:37:04.469 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:37:04.469 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 0 -> 1
2025-12-15 04:37:04.469 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:37:04.469 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 0 -> 1
2025-12-15 04:37:04.469 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:37:04.469 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:37:04.469 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 0 -> 1
2025-12-15 04:37:04.473 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:37:04.473 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:37:04.473 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:37:04.473 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:37:09.482 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:37:09.482 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:37:09.485 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:37:09.489 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:37:09.493 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:37:09.496 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:37:09.518 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:37:09.518 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:37:09.518 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:37:09.518 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:37:14.527 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:37:14.528 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:37:14.530 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:37:14.532 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:37:14.533 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:37:14.534 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:37:14.534 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:37:14.534 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:37:14.534 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:37:14.534 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:37:14.555 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:37:14.555 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:37:14.555 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:37:14.555 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:37:19.567 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:37:19.567 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:37:19.567 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:37:19.568 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:37:19.570 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:37:19.570 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:37:19.591 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:37:19.591 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:37:19.591 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:37:19.591 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:37:24.603 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:37:24.603 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:37:24.605 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:37:24.606 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:37:24.607 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:37:24.608 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:37:24.629 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:37:24.630 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:37:24.630 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:37:24.630 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:37:29.642 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:37:29.642 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:37:29.644 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:37:29.645 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:37:29.646 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:37:29.647 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:37:31.680 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:37:31.681 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:37:31.681 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:37:31.682 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:37:36.690 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:37:36.690 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:37:36.693 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:37:36.695 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:37:36.696 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:37:36.697 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:37:36.717 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:37:36.717 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:37:36.717 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:37:36.717 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:37:42.916 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.144.20:5700'
2025-12-15 04:37:42.917 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.144.20:5802)
2025-12-15 04:37:42.917 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.144.20:5801)
2025-12-15 04:37:42.917 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.144.22:6700'
2025-12-15 04:37:42.917 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.144.22:6802)
2025-12-15 04:37:42.917 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.144.22:6801)
2025-12-15 04:37:42.917 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.144.20:5700/1'
2025-12-15 04:37:42.917 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.144.20:5804)
2025-12-15 04:37:42.917 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.144.20:5803)
2025-12-15 04:37:42.917 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.144.20:5700/2'
2025-12-15 04:37:42.917 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.144.20:5806)
2025-12-15 04:37:42.917 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.144.20:5805)
2025-12-15 04:37:42.917 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.144.20:5700/3'
2025-12-15 04:37:42.917 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.144.20:5808)
2025-12-15 04:37:42.917 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.144.20:5807)
2025-12-15 04:37:42.917 [INFO] fake_trx.py:424 Init complete
2025-12-15 04:37:42.917 [INFO] fake_trx.py:455 Setting real time process scheduler to SCHED_RR, priority 30
2025-12-15 04:37:43.484 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:37:43.484 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:37:43.485 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:37:43.485 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:37:43.485 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:37:43.485 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:37:47.479 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:37:47.481 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:37:47.481 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:37:47.481 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:37:47.482 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 0 -> 1
2025-12-15 04:37:47.487 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:37:47.488 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:37:47.488 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:37:47.488 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:37:47.489 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:37:47.489 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:37:47.489 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:37:47.489 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 0 -> 1
2025-12-15 04:37:47.493 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:37:47.493 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:37:47.494 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:37:47.494 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:37:47.494 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:37:47.494 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:37:47.494 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:37:47.494 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 0 -> 1
2025-12-15 04:37:47.498 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:37:47.499 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:37:47.499 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:37:47.499 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:37:47.499 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:37:47.499 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:37:47.499 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:37:47.499 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 0 -> 1
2025-12-15 04:37:47.502 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:37:47.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:37:47.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:37:47.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:37:47.503 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:37:47.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:37:47.503 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:37:47.503 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:37:47.503 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:37:47.503 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:37:47.503 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:37:47.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:37:47.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:37:47.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:37:47.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:37:47.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:37:47.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:37:47.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:37:47.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:37:47.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:37:47.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:37:47.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:37:47.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:37:47.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:37:47.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:37:47.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:37:47.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:37:47.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:37:47.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:37:47.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:37:47.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:37:47.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:37:47.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:37:47.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:37:47.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:37:47.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:37:47.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:37:47.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:37:47.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:37:47.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:37:47.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:37:47.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:37:47.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:37:47.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:37:47.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:37:47.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:37:47.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:37:47.508 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:37:47.991 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:37:48.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:37:48.049 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:37:48.051 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:37:48.052 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:37:48.071 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:37:48.071 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:37:48.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:37:48.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:48.076 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:37:48.077 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:37:48.077 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:37:48.077 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:37:48.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:37:48.263 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:37:48.264 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:37:48.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:48.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:48.468 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:37:48.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:37:48.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:37:48.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:37:48.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:37:48.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:48.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:37:48.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:37:48.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:37:48.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:37:48.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:37:48.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:37:48.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:48.692 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:37:48.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:37:48.692 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:37:48.692 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:37:48.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:37:48.767 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:37:48.767 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:37:48.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:48.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:48.944 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:37:49.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:49.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:37:49.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:37:49.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:37:49.184 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:37:49.184 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:37:49.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:37:49.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:49.186 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:37:49.186 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:37:49.186 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:37:49.186 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:37:49.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:37:49.423 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:37:49.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:37:49.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:37:49.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:49.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:49.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:37:49.511 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:37:49.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:37:49.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:37:49.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:49.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:37:49.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:37:49.864 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:37:49.872 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:37:49.872 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:37:49.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:37:49.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:49.873 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:37:49.873 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:37:49.873 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:37:49.873 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:37:49.901 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:37:49.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:37:49.964 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:37:49.965 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:37:49.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:49.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:50.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:50.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:37:50.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:37:50.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:37:50.378 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:37:50.378 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:37:50.378 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:37:50.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:37:50.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:50.380 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:37:50.380 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:37:50.380 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:37:50.380 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:37:50.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:37:50.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:37:50.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:37:50.512 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:37:50.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:37:50.651 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:37:50.651 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:37:50.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:50.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:50.857 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:37:51.335 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:37:51.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:51.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:37:51.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:37:51.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:37:51.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:37:51.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:37:51.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:37:51.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:51.421 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:37:51.421 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:37:51.421 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:37:51.421 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:37:51.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:37:51.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:37:51.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:37:51.513 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:37:51.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:37:51.608 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:37:51.608 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-12-15 04:37:51.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:51.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:51.813 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:37:52.292 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:37:52.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:52.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:37:52.437 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:37:52.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:37:52.438 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:37:52.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:37:52.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:37:52.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:37:52.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:52.456 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:37:52.456 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:37:52.456 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:37:52.456 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:37:52.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:37:52.564 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:37:52.565 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2025-12-15 04:37:52.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:52.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:52.771 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:37:52.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:52.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:37:52.986 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:37:52.986 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:37:52.986 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:37:53.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:37:53.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:37:53.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:37:53.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:53.006 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:37:53.006 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:37:53.006 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:37:53.006 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:37:53.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:37:53.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:37:53.250 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:37:53.286 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:37:53.286 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:37:53.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:53.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:53.726 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:37:54.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:54.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:37:54.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:37:54.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:37:54.038 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:37:54.038 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:37:54.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:37:54.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:54.040 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:37:54.040 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:37:54.040 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:37:54.040 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:37:54.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:37:54.204 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:37:54.240 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:37:54.241 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:37:54.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:54.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:54.683 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:37:55.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:55.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:37:55.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:37:55.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:37:55.073 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:37:55.073 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:37:55.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:37:55.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:55.075 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:37:55.075 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:37:55.076 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:37:55.076 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:37:55.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:37:55.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:37:55.161 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:37:55.198 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:37:55.198 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:37:55.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:55.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:55.640 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:37:55.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:55.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:37:55.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:37:55.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:37:55.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:37:55.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:37:55.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:37:55.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:55.992 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:37:55.992 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:37:55.992 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:37:55.992 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:37:56.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:37:56.118 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:37:56.155 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:37:56.155 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 04:37:56.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:56.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:56.597 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:37:56.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:56.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:37:56.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:37:56.946 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:37:56.946 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:37:56.964 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:37:56.964 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:37:56.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:37:56.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:56.966 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:37:56.966 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:37:56.966 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:37:56.966 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:37:56.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:37:57.075 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:37:57.112 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:37:57.112 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 04:37:57.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:57.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:57.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:57.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:37:57.494 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:37:57.494 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:37:57.495 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:37:57.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:37:57.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:37:57.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:37:57.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:57.514 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:37:57.514 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:37:57.514 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:37:57.514 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:37:57.553 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:37:57.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:37:57.617 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:37:57.617 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:37:57.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:57.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:57.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:57.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:37:57.714 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:37:57.714 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:37:57.715 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:37:57.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:37:57.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:37:57.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:37:57.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:57.725 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:37:57.725 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:37:57.725 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:37:57.725 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:37:57.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:37:57.825 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:37:57.825 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:37:57.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:57.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:58.031 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:37:58.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:58.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:37:58.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:37:58.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:37:58.211 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:37:58.229 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:37:58.229 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:37:58.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:37:58.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:58.231 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:37:58.231 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:37:58.231 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:37:58.231 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:37:58.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:37:58.331 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:37:58.331 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:37:58.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:58.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:58.510 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:37:58.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:58.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:37:58.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:37:58.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:37:58.717 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:37:58.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:37:58.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:37:58.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:37:58.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:58.736 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:37:58.736 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:37:58.736 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:37:58.736 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:37:58.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:37:58.818 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:37:58.818 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:37:58.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:58.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:58.996 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:37:59.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:59.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:37:59.212 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:37:59.212 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:37:59.212 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:37:59.231 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:37:59.231 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:37:59.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:37:59.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:59.232 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:37:59.232 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:37:59.232 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:37:59.233 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:37:59.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:37:59.474 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:37:59.511 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:37:59.511 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:37:59.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:59.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:59.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:59.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:37:59.871 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:37:59.871 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:37:59.871 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:37:59.880 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:37:59.880 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:37:59.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:37:59.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:59.881 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:37:59.881 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:37:59.881 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:37:59.881 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:37:59.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:37:59.953 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:37:59.990 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:37:59.990 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:37:59.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:37:59.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:38:00.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:38:00.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:00.367 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:38:00.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:38:00.367 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:38:00.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:38:00.387 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:38:00.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:38:00.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:38:00.388 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:38:00.388 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:38:00.389 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:38:00.389 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:38:00.431 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:38:00.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:00.495 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:38:00.495 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:38:00.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:38:00.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:38:00.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:38:00.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:00.862 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:38:00.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:38:00.863 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:38:00.877 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:38:00.877 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:38:00.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:38:00.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:38:00.879 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:38:00.879 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:38:00.879 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:38:00.879 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:38:00.909 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:38:00.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:00.973 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:38:00.973 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:38:00.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:38:00.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:38:01.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:38:01.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:01.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:38:01.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:38:01.360 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:38:01.375 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:38:01.375 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:38:01.375 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:38:01.375 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:38:01.381 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:38:01.381 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:38:01.381 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:38:01.381 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:38:01.381 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:38:01.381 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:38:01.381 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:38:06.382 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:38:06.382 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:38:06.384 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:38:06.384 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:38:06.385 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:38:06.386 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:38:06.397 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:38:06.398 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:38:06.398 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:38:06.399 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:38:06.399 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:38:06.403 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:38:06.403 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:38:06.403 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:38:06.403 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:38:06.404 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:38:06.404 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:38:06.404 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:38:06.404 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:38:06.407 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:38:06.407 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:38:06.407 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:38:06.407 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:38:06.408 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:38:06.408 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:38:06.408 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:38:06.408 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:38:06.411 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:38:06.411 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:38:06.411 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:38:06.411 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:38:06.411 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:38:06.411 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:38:06.411 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:38:06.411 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:38:06.416 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:38:06.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:38:06.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:38:06.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:38:06.416 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:38:06.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:38:06.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:38:06.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:38:06.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:06.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:38:06.416 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:38:06.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:06.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:06.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:06.416 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:38:06.416 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:38:06.416 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:38:06.417 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:38:06.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:06.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:06.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:06.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:38:06.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:06.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:06.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:06.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:06.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:06.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:06.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:06.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:06.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:06.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:06.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:06.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:06.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:06.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:06.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:06.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:06.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:06.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:06.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:06.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:06.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:06.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:06.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:06.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:06.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:06.421 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:38:06.906 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:38:06.939 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:38:06.941 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:38:06.942 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:38:06.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:06.964 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:38:06.964 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:38:06.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:38:06.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:06.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:06.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.376 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:38:07.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.420 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:38:07.421 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:38:07.421 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:38:07.421 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:38:07.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:07.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
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2025-12-15 04:38:07.845 [DEBUG] clck_gen.py:113 IND CLOCK 306
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2025-12-15 04:38:08.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.314 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:38:08.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
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2025-12-15 04:38:08.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
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2025-12-15 04:38:08.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
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2025-12-15 04:38:08.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.421 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:38:08.421 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:38:08.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.421 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:38:08.421 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:38:08.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
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2025-12-15 04:38:08.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
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2025-12-15 04:38:08.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
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2025-12-15 04:38:08.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:08.690 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:38:08.690 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:38:08.690 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:38:08.690 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:38:08.692 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:38:08.692 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:38:08.692 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:38:08.692 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:38:08.692 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:38:08.693 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:38:08.693 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:38:08.693 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=492 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:38:08.693 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=492 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:38:08.693 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=492 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:38:08.693 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=492 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:38:08.693 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=492 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:38:08.693 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=492 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:38:08.693 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=492 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:38:08.693 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=492 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:38:13.697 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:38:13.697 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:38:13.698 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:38:13.699 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:38:13.700 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:38:13.701 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:38:13.711 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:38:13.713 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:38:13.713 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:38:13.713 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:38:13.713 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:38:13.724 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:38:13.724 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:38:13.725 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:38:13.725 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:38:13.725 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:38:13.725 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:38:13.725 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:38:13.725 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:38:13.732 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:38:13.732 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:38:13.733 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:38:13.733 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:38:13.733 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:38:13.733 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:38:13.733 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:38:13.733 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:38:13.740 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:38:13.740 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:38:13.740 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:38:13.740 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:38:13.741 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:38:13.741 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:38:13.741 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:38:13.741 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:38:13.750 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:38:13.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:38:13.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:38:13.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:38:13.751 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:38:13.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:38:13.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:38:13.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:38:13.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:38:13.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:13.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:13.752 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:38:13.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:13.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:13.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:13.752 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:38:13.752 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:38:13.752 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:38:13.752 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:38:13.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:13.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:13.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:13.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:38:13.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:13.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:13.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:13.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:13.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:13.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:13.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:13.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:13.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:13.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:13.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:13.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:13.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:13.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:13.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:13.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:13.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:13.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:13.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:13.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:13.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:13.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:13.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:13.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:13.757 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:38:14.241 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:38:14.274 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:38:14.275 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:38:14.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:14.278 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:38:14.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:38:14.300 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:38:14.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:38:14.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:14.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:14.324 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:38:14.324 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:38:14.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:38:14.325 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:38:14.327 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:38:14.327 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:38:14.327 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:38:14.327 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:38:14.327 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:38:14.327 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:38:14.327 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:38:14.327 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=122 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:38:14.327 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:38:14.327 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:38:14.327 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:38:14.327 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:38:14.327 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:38:14.327 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:38:14.327 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:38:19.331 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:38:19.331 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:38:19.331 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:38:19.332 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:38:19.333 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:38:19.334 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:38:19.344 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:38:19.346 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:38:19.346 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:38:19.346 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:38:19.346 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:38:19.350 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:38:19.350 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:38:19.351 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:38:19.351 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:38:19.351 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:38:19.351 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:38:19.351 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:38:19.352 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:38:19.356 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:38:19.356 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:38:19.357 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:38:19.357 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:38:19.357 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:38:19.357 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:38:19.357 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:38:19.357 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:38:19.362 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:38:19.362 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:38:19.362 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:38:19.362 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:38:19.362 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:38:19.362 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:38:19.363 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:38:19.363 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:38:19.369 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:38:19.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:38:19.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:38:19.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:38:19.369 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:38:19.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:38:19.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:38:19.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:38:19.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:19.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:38:19.370 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:38:19.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:19.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:19.370 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:38:19.370 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:38:19.370 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:38:19.370 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:38:19.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:19.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:19.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:19.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:38:19.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:19.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:19.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:19.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:19.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:19.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:19.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:19.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:19.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:19.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:19.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:19.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:19.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:19.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:19.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:19.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:19.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:19.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:19.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:19.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:19.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:19.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:19.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:19.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:19.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:19.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:19.375 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:38:19.860 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:38:19.898 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:38:19.900 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:38:19.902 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:38:19.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:19.919 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:38:19.919 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:38:19.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:38:19.960 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:38:19.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:38:19.960 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:38:19.960 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:38:19.961 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:38:19.961 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:38:19.961 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:38:19.961 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:38:19.961 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:38:19.961 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:38:19.961 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:38:24.966 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:38:24.967 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:38:24.975 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:38:24.978 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:38:24.979 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:38:24.981 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:38:24.992 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:38:24.994 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:38:24.994 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:38:24.994 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:38:24.994 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:38:24.998 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:38:24.998 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:38:24.998 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:38:24.998 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:38:24.999 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:38:24.999 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:38:24.999 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:38:24.999 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:38:25.002 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:38:25.002 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:38:25.002 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:38:25.002 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:38:25.002 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:38:25.002 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:38:25.003 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:38:25.003 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:38:25.005 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:38:25.006 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:38:25.006 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:38:25.006 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:38:25.006 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:38:25.006 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:38:25.006 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:38:25.006 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:38:25.010 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:38:25.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:38:25.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:38:25.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:38:25.010 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:38:25.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:38:25.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:38:25.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:38:25.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:38:25.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:25.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:25.011 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:38:25.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:25.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:25.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:25.011 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:38:25.011 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:38:25.011 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:38:25.011 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:38:25.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:25.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:25.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:25.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:38:25.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:25.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:25.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:25.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:25.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:25.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:25.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:25.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:25.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:25.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:25.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:25.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:25.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:25.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:25.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:25.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:25.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:25.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:25.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:25.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:25.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:25.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:25.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:25.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:25.016 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:38:25.501 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:38:25.530 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:38:25.532 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:38:25.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:25.533 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:38:25.552 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:38:25.552 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:38:25.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:38:25.599 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:38:25.599 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:38:25.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:38:25.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:38:25.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:38:25.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:38:25.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:38:25.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:38:25.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:38:25.622 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:38:25.622 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:38:25.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:38:25.629 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:38:25.629 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:38:25.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:38:25.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:38:25.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:38:25.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:38:25.644 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:38:25.644 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:38:25.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:38:25.651 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:38:25.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:38:25.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:38:25.660 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:38:25.660 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:38:25.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:38:25.667 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:38:25.667 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:38:25.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:38:25.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:38:25.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:38:25.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:38:25.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:38:25.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:38:25.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:38:25.686 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:38:25.686 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:38:25.686 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:38:25.686 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:38:25.687 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:38:25.687 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:38:25.687 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:38:25.687 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:38:25.687 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:38:25.687 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:38:25.687 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:38:25.687 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=144 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:38:25.687 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=144 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:38:25.687 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=144 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:38:25.687 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=144 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:38:25.687 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=144 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:38:25.687 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=144 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:38:30.692 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:38:30.692 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:38:30.693 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:38:30.694 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:38:30.695 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:38:30.696 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:38:30.706 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:38:30.707 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:38:30.707 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:38:30.708 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:38:30.708 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:38:30.711 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:38:30.711 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:38:30.711 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:38:30.711 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:38:30.712 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:38:30.712 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:38:30.712 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:38:30.712 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:38:30.715 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:38:30.715 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:38:30.715 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:38:30.716 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:38:30.716 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:38:30.716 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:38:30.716 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:38:30.716 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:38:30.719 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:38:30.719 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:38:30.719 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:38:30.719 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:38:30.719 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:38:30.719 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:38:30.719 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:38:30.719 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:38:30.724 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:38:30.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:38:30.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:38:30.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:38:30.724 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:38:30.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:38:30.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:38:30.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:38:30.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:38:30.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:30.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:30.724 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:38:30.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:30.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:30.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:30.724 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:38:30.724 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:38:30.724 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:38:30.725 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:38:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:30.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:38:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:30.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:30.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:30.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:30.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:30.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:30.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:30.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:38:30.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:38:30.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:30.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:30.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:38:30.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:38:30.729 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:38:31.213 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:38:31.244 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:38:31.245 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:38:31.246 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:38:31.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:31.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:38:31.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:38:31.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:38:31.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:38:31.269 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:38:31.270 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:38:31.270 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:38:31.270 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:38:31.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:31.316 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:38:31.317 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:38:31.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:38:31.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:38:31.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:31.691 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:38:31.728 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:38:31.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:38:31.729 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:38:31.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:38:32.169 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:38:32.647 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:38:32.729 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:38:32.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:38:32.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:38:32.730 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:38:33.126 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:38:33.604 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:38:33.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:38:33.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:38:33.730 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:38:33.731 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:38:34.082 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:38:34.560 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:38:34.732 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:38:34.732 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:38:34.732 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:38:34.732 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:38:35.039 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:38:35.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:35.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:38:35.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:38:35.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:38:35.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:38:35.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:38:35.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:38:35.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:38:35.439 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:38:35.439 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:38:35.439 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:38:35.439 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:38:35.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:35.467 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:38:35.467 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:38:35.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:38:35.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:38:35.516 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:38:35.733 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:38:35.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:38:35.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:38:35.734 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:38:35.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:35.994 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:38:36.472 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:38:36.950 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:38:37.429 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:38:37.907 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:38:38.385 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:38:38.862 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:38:39.340 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:38:39.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:39.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:38:39.740 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:38:39.740 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:38:39.749 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:38:39.749 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:38:39.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:38:39.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:38:39.750 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:38:39.750 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:38:39.750 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:38:39.750 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:38:39.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:39.759 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:38:39.759 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:38:39.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:38:39.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:38:39.817 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:38:40.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:40.295 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:38:40.774 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:38:41.252 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:38:41.730 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:38:42.209 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:38:42.687 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:38:43.165 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:38:43.643 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:38:44.122 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:38:44.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:44.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:38:44.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:38:44.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:38:44.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:38:44.276 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:38:44.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:38:44.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:38:44.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:38:44.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:38:44.278 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:38:44.278 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:38:44.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:44.313 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:38:44.314 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:38:44.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:38:44.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:38:44.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:44.600 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:38:45.078 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:38:45.557 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:38:46.035 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:38:46.513 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 04:38:46.992 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 04:38:47.470 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 04:38:47.948 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 04:38:48.427 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 04:38:48.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:48.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:38:48.583 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:38:48.583 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:38:48.597 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:38:48.597 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:38:48.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:38:48.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:38:48.599 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:38:48.599 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:38:48.599 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:38:48.599 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:38:48.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:48.610 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:38:48.610 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:38:48.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:38:48.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:38:48.905 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 04:38:49.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:49.383 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 04:38:49.862 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 04:38:50.340 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 04:38:50.819 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 04:38:51.297 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 04:38:51.776 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 04:38:52.254 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 04:38:52.733 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 04:38:53.211 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 04:38:53.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:53.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:38:53.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:38:53.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:38:53.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:38:53.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:38:53.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:38:53.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:38:53.273 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:38:53.273 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:38:53.273 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:38:53.273 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:38:53.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:53.312 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:38:53.312 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-12-15 04:38:53.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:38:53.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:38:53.689 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 04:38:53.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:54.168 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 04:38:54.647 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 04:38:55.126 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 04:38:55.605 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 04:38:56.084 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 04:38:56.563 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 04:38:57.042 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 04:38:57.521 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 04:38:57.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:57.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:38:57.709 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:38:57.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:38:57.709 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:38:57.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:38:57.728 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:38:57.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:38:57.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:38:57.730 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:38:57.730 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:38:57.730 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:38:57.730 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:38:57.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:57.762 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:38:57.762 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2025-12-15 04:38:57.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:38:57.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:38:57.999 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 04:38:58.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:38:58.479 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 04:38:58.957 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 04:38:59.436 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-15 04:38:59.916 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-15 04:39:00.395 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-15 04:39:00.874 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-15 04:39:01.352 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-15 04:39:01.832 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-15 04:39:02.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:02.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:02.162 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:39:02.162 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:39:02.162 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:39:02.180 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:39:02.180 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:39:02.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:39:02.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:02.181 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:39:02.181 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:39:02.181 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:39:02.181 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:39:02.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:39:02.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:02.210 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:39:02.210 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:39:02.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:02.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:02.311 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-15 04:39:02.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:02.789 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-15 04:39:03.268 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-15 04:39:03.747 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-15 04:39:04.225 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-15 04:39:04.704 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-15 04:39:05.183 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-15 04:39:05.662 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-15 04:39:06.136 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-15 04:39:06.613 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-15 04:39:06.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:06.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:06.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:39:06.619 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:39:06.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:39:06.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:39:06.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:39:06.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:06.637 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:39:06.638 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:39:06.638 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:39:06.638 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:39:06.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:06.666 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:39:06.667 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:39:06.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:06.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:07.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:07.091 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-15 04:39:07.570 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-15 04:39:08.049 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-15 04:39:08.527 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-15 04:39:09.005 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-15 04:39:09.483 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-15 04:39:09.962 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-15 04:39:10.440 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-15 04:39:10.919 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-15 04:39:11.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:11.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:11.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:39:11.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:39:11.081 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:39:11.081 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:39:11.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:39:11.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:11.083 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:39:11.083 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:39:11.083 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:39:11.083 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:39:11.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:39:11.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:11.110 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:39:11.110 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:39:11.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:11.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:11.397 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-15 04:39:11.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:11.875 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-15 04:39:12.354 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-15 04:39:12.832 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2025-12-15 04:39:13.310 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2025-12-15 04:39:13.788 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2025-12-15 04:39:14.266 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2025-12-15 04:39:14.745 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2025-12-15 04:39:15.223 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2025-12-15 04:39:15.701 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2025-12-15 04:39:15.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:15.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:15.877 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:39:15.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:39:15.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:39:15.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:39:15.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:39:15.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:15.896 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:39:15.896 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:39:15.896 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:39:15.896 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:39:15.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:15.947 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:39:15.947 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 04:39:15.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:15.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:16.179 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2025-12-15 04:39:16.657 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2025-12-15 04:39:16.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:17.137 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2025-12-15 04:39:17.616 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2025-12-15 04:39:18.095 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2025-12-15 04:39:18.574 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2025-12-15 04:39:19.053 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2025-12-15 04:39:19.531 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2025-12-15 04:39:20.011 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2025-12-15 04:39:20.490 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2025-12-15 04:39:20.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:20.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:20.761 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:39:20.761 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:39:20.761 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:39:20.778 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:39:20.778 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:39:20.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:39:20.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:20.780 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:39:20.780 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:39:20.780 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:39:20.780 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:39:20.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:20.827 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:39:20.827 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 04:39:20.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:20.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:20.968 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2025-12-15 04:39:21.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:21.448 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2025-12-15 04:39:21.927 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2025-12-15 04:39:22.405 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2025-12-15 04:39:22.885 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2025-12-15 04:39:23.363 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2025-12-15 04:39:23.841 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2025-12-15 04:39:24.320 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2025-12-15 04:39:24.798 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2025-12-15 04:39:25.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:25.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:25.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:39:25.215 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:39:25.216 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:39:25.235 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:39:25.235 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:39:25.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:39:25.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:25.237 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:39:25.237 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:39:25.237 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:39:25.237 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:39:25.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:25.276 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2025-12-15 04:39:25.278 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:39:25.278 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:39:25.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:25.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:25.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:25.753 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2025-12-15 04:39:26.232 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2025-12-15 04:39:26.711 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2025-12-15 04:39:27.189 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2025-12-15 04:39:27.668 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2025-12-15 04:39:28.147 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2025-12-15 04:39:28.625 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2025-12-15 04:39:29.104 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2025-12-15 04:39:29.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:29.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:29.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:39:29.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:39:29.436 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:39:29.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:39:29.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:39:29.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:39:29.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:29.446 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:39:29.446 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:39:29.446 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:39:29.446 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:39:29.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:29.486 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:39:29.487 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:39:29.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:29.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:29.582 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2025-12-15 04:39:29.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:30.061 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2025-12-15 04:39:30.539 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2025-12-15 04:39:31.018 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2025-12-15 04:39:31.497 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2025-12-15 04:39:31.976 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2025-12-15 04:39:32.454 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2025-12-15 04:39:32.933 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2025-12-15 04:39:33.411 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2025-12-15 04:39:33.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:33.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:33.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:39:33.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:39:33.762 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:39:33.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:39:33.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:39:33.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:39:33.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:33.778 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:39:33.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:39:33.778 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:39:33.778 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:39:33.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:33.783 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:39:33.783 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:39:33.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:33.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:33.889 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2025-12-15 04:39:34.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:34.368 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2025-12-15 04:39:34.847 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2025-12-15 04:39:35.326 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2025-12-15 04:39:35.804 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2025-12-15 04:39:36.283 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2025-12-15 04:39:36.761 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2025-12-15 04:39:37.254 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2025-12-15 04:39:37.733 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2025-12-15 04:39:38.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:38.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:38.087 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:39:38.087 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:39:38.087 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:39:38.096 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:39:38.096 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:39:38.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:39:38.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:38.097 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:39:38.097 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:39:38.097 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:39:38.097 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:39:38.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:38.105 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:39:38.105 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:39:38.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:38.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:38.211 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2025-12-15 04:39:38.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:38.688 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2025-12-15 04:39:39.166 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2025-12-15 04:39:39.645 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2025-12-15 04:39:40.124 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2025-12-15 04:39:40.602 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2025-12-15 04:39:41.081 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2025-12-15 04:39:41.559 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2025-12-15 04:39:42.037 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2025-12-15 04:39:42.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:42.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:42.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:39:42.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:39:42.427 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:39:42.442 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:39:42.442 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:39:42.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:39:42.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:42.444 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:39:42.445 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:39:42.445 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:39:42.445 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:39:42.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:42.457 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:39:42.457 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:39:42.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:42.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:42.516 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2025-12-15 04:39:42.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:42.995 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2025-12-15 04:39:43.474 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2025-12-15 04:39:43.953 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2025-12-15 04:39:44.430 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2025-12-15 04:39:44.909 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2025-12-15 04:39:45.387 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2025-12-15 04:39:45.866 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2025-12-15 04:39:46.344 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2025-12-15 04:39:46.823 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2025-12-15 04:39:46.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:46.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:46.913 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:39:46.913 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:39:46.913 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:39:46.914 [WARNING] transceiver.py:250 (MS@172.18.144.22:6700) RX TRXD message (fn=16239 tn=3 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:39:46.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:39:46.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:39:46.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:39:46.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:46.933 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:39:46.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:39:46.934 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:39:46.934 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:39:46.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:46.974 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:39:46.974 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:39:46.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:46.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:47.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:47.301 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2025-12-15 04:39:47.780 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2025-12-15 04:39:48.258 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2025-12-15 04:39:48.737 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2025-12-15 04:39:49.216 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2025-12-15 04:39:49.694 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2025-12-15 04:39:50.173 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2025-12-15 04:39:50.652 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2025-12-15 04:39:51.131 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2025-12-15 04:39:51.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:51.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:51.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:39:51.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:39:51.240 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:39:51.257 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:39:51.257 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:39:51.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:39:51.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:51.258 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:39:51.258 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:39:51.258 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:39:51.258 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:39:51.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:51.268 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:39:51.268 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:39:51.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:51.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:51.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:51.608 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2025-12-15 04:39:52.086 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2025-12-15 04:39:52.565 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2025-12-15 04:39:53.044 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2025-12-15 04:39:53.522 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2025-12-15 04:39:54.001 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2025-12-15 04:39:54.480 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2025-12-15 04:39:54.958 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2025-12-15 04:39:55.437 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2025-12-15 04:39:55.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:55.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:55.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:39:55.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:39:55.565 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:39:55.583 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:39:55.583 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:39:55.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:39:55.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:55.584 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:39:55.584 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:39:55.585 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:39:55.585 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:39:55.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:55.624 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:39:55.624 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:39:55.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:55.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:55.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:55.913 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2025-12-15 04:39:56.392 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2025-12-15 04:39:56.870 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2025-12-15 04:39:57.349 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2025-12-15 04:39:57.828 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2025-12-15 04:39:58.306 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2025-12-15 04:39:58.785 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2025-12-15 04:39:59.263 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2025-12-15 04:39:59.742 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2025-12-15 04:39:59.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:39:59.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:39:59.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:39:59.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:39:59.889 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:39:59.899 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:39:59.900 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:39:59.900 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:39:59.900 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:39:59.905 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:39:59.905 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:39:59.906 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:39:59.906 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:39:59.906 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:39:59.906 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:39:59.906 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:40:04.905 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:40:04.905 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:40:04.906 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:40:04.907 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:40:04.907 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:40:04.908 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:40:04.922 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:40:04.923 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:40:04.923 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:40:04.924 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:40:04.924 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:40:04.927 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:40:04.927 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:40:04.927 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:40:04.927 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:40:04.927 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:40:04.928 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:40:04.928 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:40:04.928 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:40:04.931 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:40:04.931 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:40:04.931 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:40:04.931 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:40:04.931 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:40:04.931 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:40:04.931 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:40:04.931 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:40:04.935 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:40:04.935 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:40:04.935 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:40:04.935 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:40:04.935 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:40:04.935 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:40:04.935 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:40:04.935 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:40:04.942 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:40:04.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:40:04.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:40:04.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:40:04.943 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:40:04.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:40:04.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:40:04.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:40:04.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:40:04.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:40:04.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:40:04.944 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:40:04.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:40:04.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:40:04.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:40:04.944 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:40:04.944 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:40:04.944 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:40:04.944 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:40:04.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:40:04.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:40:04.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:40:04.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:40:04.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:40:04.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:40:04.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:40:04.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:40:04.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:40:04.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:40:04.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:40:04.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:40:04.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:40:04.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:40:04.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:40:04.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:40:04.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:40:04.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:40:04.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:40:04.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:40:04.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:40:04.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:40:04.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:40:04.947 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:40:04.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:40:04.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:40:04.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:40:04.947 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:40:04.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:40:04.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:40:04.947 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:40:04.947 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:40:04.947 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:40:04.948 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:40:04.948 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:40:09.952 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:40:09.952 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:40:09.953 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:40:09.954 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:40:09.954 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:40:09.955 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:40:09.965 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:40:09.966 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:40:09.966 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:40:09.967 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:40:09.967 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:40:09.970 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:40:09.970 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:40:09.971 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:40:09.971 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:40:09.971 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:40:09.971 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:40:09.971 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:40:09.971 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:40:09.974 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:40:09.974 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:40:09.974 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:40:09.974 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:40:09.975 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:40:09.975 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:40:09.975 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:40:09.975 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:40:09.977 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:40:09.977 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:40:09.978 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:40:09.978 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:40:09.978 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:40:09.978 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:40:09.978 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:40:09.978 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:40:09.982 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:40:09.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:40:09.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:40:09.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:40:09.982 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:40:09.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:40:09.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:40:09.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:40:09.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:40:09.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:40:09.983 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:40:09.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:40:09.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:40:09.983 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:40:09.983 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:40:09.983 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:40:09.983 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:40:09.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:40:09.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:40:09.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:40:09.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:40:09.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:40:09.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:40:09.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:40:09.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:40:09.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:40:09.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:40:09.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:40:09.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:40:09.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:40:09.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:40:09.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:40:09.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:40:09.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:40:09.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:40:09.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:40:09.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:40:09.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:40:09.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:40:09.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:40:09.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:40:09.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:40:09.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:40:09.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:40:09.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:40:09.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:40:09.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:40:09.988 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:40:10.472 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:40:10.498 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:40:10.498 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:40:10.498 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:40:10.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:10.504 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:10.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:10.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:10.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:10.505 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:10.505 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:10.505 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:10.505 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:10.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:10.547 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:10.547 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:10.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:10.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:10.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:10.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:10.677 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:10.677 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:10.677 [WARNING] transceiver.py:250 (MS@172.18.144.22:6700) RX TRXD message (fn=148 tn=4 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:40:10.695 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:10.695 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:10.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:10.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:10.697 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:10.697 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:10.698 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:10.698 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:10.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:10.747 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:10.748 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:10.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:10.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:10.948 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:40:10.985 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:40:10.986 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:40:10.986 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:40:10.987 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:40:11.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:11.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:11.173 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:11.173 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:11.189 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:11.190 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:11.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:11.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:11.192 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:11.192 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:11.192 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:11.192 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:11.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:11.238 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:11.238 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:11.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:11.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:11.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:11.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:11.388 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:11.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:11.407 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:11.407 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:11.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:11.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:11.410 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:11.410 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:11.410 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:11.410 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:11.425 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:40:11.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:11.458 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:11.458 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:11.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:11.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:11.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:11.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:11.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:11.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:11.902 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:11.902 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:11.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:11.903 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:40:11.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:11.903 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:11.903 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:11.903 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:11.903 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:11.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:11.956 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:11.956 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:11.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:11.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:11.986 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:40:11.987 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:40:11.987 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:40:11.987 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:40:12.381 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:40:12.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:12.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:12.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:12.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:12.437 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:12.437 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:12.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:12.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:12.439 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:12.439 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:12.439 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:12.439 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:12.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:12.487 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:40:12.487 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-12-15 04:40:12.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:12.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:12.859 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:40:12.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:12.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:12.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:12.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:12.969 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:40:12.987 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:40:12.988 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:40:12.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:40:12.988 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:40:12.988 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:12.989 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:12.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:12.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:12.990 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:12.990 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:12.990 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:12.990 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:13.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:13.039 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:40:13.039 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2025-12-15 04:40:13.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:13.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:13.338 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:40:13.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:13.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:13.516 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:13.516 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:13.516 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:40:13.534 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:13.534 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:13.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:13.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:13.536 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:13.536 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:13.536 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:13.536 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:13.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:40:13.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:13.587 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:13.587 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:13.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:13.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:13.816 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:40:13.988 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:40:13.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:40:13.989 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:40:13.989 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:40:14.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:14.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:14.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:14.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:14.081 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:14.081 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:14.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:14.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:14.083 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:14.083 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:14.083 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:14.083 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:14.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:14.134 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:14.134 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:14.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:14.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:14.294 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:40:14.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:14.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:14.610 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:14.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:14.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:14.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:14.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:14.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:14.629 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:14.629 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:14.629 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:14.629 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:14.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:40:14.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:14.679 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:14.680 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:14.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:14.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:14.772 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:40:14.989 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:40:14.990 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:40:14.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:40:14.990 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:40:15.250 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:40:15.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:15.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:15.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:15.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:15.544 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:15.544 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:15.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:15.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:15.547 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:15.547 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:15.547 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:15.547 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:15.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:15.594 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:40:15.595 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 04:40:15.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:15.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:15.728 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:40:16.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:16.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:16.014 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:16.014 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:16.014 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:40:16.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:16.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:16.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:16.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:16.033 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:16.034 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:16.034 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:16.034 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:16.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:16.086 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:40:16.086 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 04:40:16.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:16.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:16.206 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:40:16.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:16.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:16.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:16.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:16.560 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:40:16.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:16.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:16.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:16.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:16.580 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:16.580 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:16.580 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:16.580 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:16.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:16.632 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:40:16.632 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:40:16.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:16.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:16.685 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:40:16.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:16.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:16.845 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:16.845 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:16.845 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:40:16.854 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:16.854 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:16.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:16.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:16.855 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:16.855 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:16.855 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:16.855 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:16.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:16.902 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:40:16.902 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:40:16.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:16.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:17.162 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:40:17.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:17.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:17.340 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:17.341 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:17.341 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:40:17.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:17.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:17.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:17.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:17.351 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:17.351 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:17.351 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:17.351 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:17.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:17.403 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:40:17.403 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:40:17.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:17.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:17.639 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:40:17.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:17.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:17.837 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:17.837 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:17.837 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:40:17.852 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:17.852 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:17.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:17.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:17.854 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:17.854 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:17.855 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:17.855 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:17.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:17.902 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:40:17.902 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:40:17.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:17.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:18.116 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:40:18.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:18.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:18.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:18.331 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:18.331 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:40:18.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:18.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:18.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:18.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:18.352 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:18.352 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:18.352 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:18.352 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:18.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:18.404 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:40:18.405 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:40:18.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:18.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:18.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:18.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:18.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:18.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:18.511 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:40:18.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:18.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:18.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:18.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:18.528 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:18.528 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:18.528 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:18.528 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:18.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:18.579 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:40:18.579 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:40:18.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:18.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:18.593 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:40:19.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:19.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:19.008 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:19.008 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:19.008 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:40:19.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:19.028 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:19.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:19.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:19.030 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:19.030 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:19.030 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:19.030 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:19.072 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:40:19.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:19.078 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:40:19.078 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:40:19.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:19.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:19.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:19.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:19.504 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:19.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:19.504 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:40:19.513 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:19.513 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:19.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:19.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:19.515 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:19.515 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:19.515 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:19.515 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:19.550 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:40:19.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:19.562 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:40:19.562 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:40:19.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:19.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:19.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:19.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:20.000 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:20.000 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:20.000 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:40:20.012 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:40:20.012 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:40:20.012 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:40:20.012 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:40:20.018 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:40:20.018 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:40:20.018 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:40:20.018 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:40:20.018 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:40:20.018 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:40:20.019 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:40:25.015 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:40:25.016 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:40:25.018 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:40:25.019 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:40:25.019 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:40:25.020 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:40:25.029 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:40:25.031 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:40:25.031 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:40:25.031 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:40:25.031 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:40:25.036 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:40:25.037 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:40:25.037 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:40:25.037 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:40:25.038 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:40:25.038 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:40:25.038 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:40:25.038 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:40:25.042 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:40:25.042 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:40:25.042 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:40:25.042 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:40:25.042 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:40:25.042 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:40:25.043 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:40:25.043 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:40:25.047 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:40:25.047 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:40:25.047 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:40:25.047 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:40:25.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:40:25.047 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:40:25.048 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:40:25.048 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:40:25.054 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:40:25.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:40:25.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:40:25.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:40:25.054 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:40:25.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:40:25.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:40:25.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:40:25.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:40:25.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:40:25.055 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:40:25.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:40:25.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:40:25.055 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:40:25.055 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:40:25.055 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:40:25.055 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:40:25.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:40:25.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:40:25.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:40:25.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:40:25.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:40:25.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:40:25.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:40:25.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:40:25.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:40:25.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:40:25.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:40:25.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:40:25.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:40:25.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:40:25.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:40:25.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:40:25.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:40:25.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:40:25.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:40:25.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:40:25.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:40:25.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:40:25.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:40:25.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:40:25.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:40:25.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:40:25.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:40:25.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:40:25.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:40:25.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:40:25.060 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:40:25.543 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:40:25.583 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:40:25.584 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:40:25.585 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:40:25.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:25.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:25.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:25.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:25.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:25.609 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:25.609 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:25.609 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:25.609 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:25.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:25.644 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:25.644 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:25.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:25.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:26.020 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:40:26.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:40:26.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:40:26.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:40:26.061 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:40:26.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:26.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:26.498 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:40:26.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:26.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:26.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:26.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:26.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:26.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:26.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:26.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:26.714 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:26.714 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:26.714 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:26.714 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:26.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:26.763 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:26.763 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:26.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:26.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:26.975 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:40:27.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:40:27.061 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:40:27.061 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:40:27.061 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:40:27.453 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:40:27.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:27.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:27.931 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:40:28.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:40:28.061 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:40:28.062 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:40:28.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:40:28.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:28.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:28.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:28.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:28.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:28.163 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:28.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:28.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:28.165 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:28.165 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:28.165 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:28.165 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:28.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:28.219 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:28.220 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:28.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:28.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:28.409 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:40:28.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:28.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:28.887 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:40:29.063 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:40:29.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:40:29.063 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:40:29.063 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:40:29.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:29.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:29.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:29.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:29.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:29.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:29.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:29.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:29.349 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:29.349 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:29.349 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:29.349 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:29.364 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:40:29.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:29.398 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:29.398 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:29.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:29.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:29.842 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:40:30.064 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:40:30.064 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:40:30.064 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:40:30.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:40:30.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:30.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:30.320 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:40:30.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:30.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:30.782 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:30.782 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:30.798 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:40:30.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:30.812 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:30.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:30.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:30.823 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:30.823 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:30.823 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:30.823 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:30.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:30.866 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:30.867 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:30.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:30.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:31.275 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:40:31.753 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:40:31.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:31.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:32.232 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:40:32.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:32.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:32.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:32.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:32.382 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:32.382 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:32.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:32.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:32.385 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:32.385 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:32.385 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:32.385 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:32.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:32.434 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:40:32.435 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-12-15 04:40:32.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:32.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:32.710 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:40:33.189 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:40:33.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:33.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:33.667 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:40:33.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:33.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:33.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:33.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:33.886 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:40:33.904 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:33.904 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:33.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:33.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:33.906 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:33.906 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:33.906 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:33.906 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:33.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:33.955 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:40:33.955 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2025-12-15 04:40:33.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:33.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:34.145 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:40:34.623 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:40:34.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:34.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:35.101 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:40:35.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:35.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:35.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:35.410 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:35.410 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:40:35.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:35.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:35.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:35.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:35.430 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:35.430 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:35.430 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:35.430 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:35.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:40:35.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:35.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:35.483 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:35.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:35.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:35.579 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:40:36.057 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:40:36.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:36.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:36.536 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:40:36.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:36.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:36.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:36.931 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:36.951 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:36.951 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:36.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:36.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:36.954 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:36.954 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:36.954 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:36.954 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:37.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:37.009 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:40:37.014 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:37.014 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:37.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:37.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:37.487 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:40:37.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:37.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:37.965 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:40:38.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:38.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:38.442 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:38.443 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:38.443 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:40:38.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:38.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:38.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:38.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:38.450 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:38.451 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:38.451 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:38.451 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:38.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:40:38.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:38.501 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:38.501 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:38.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:38.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:38.919 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:40:39.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:39.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:39.396 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:40:39.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:39.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:39.847 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:39.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:39.865 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:39.865 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:39.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:39.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:39.868 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:39.868 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:39.868 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:39.868 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:39.874 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:40:39.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:39.927 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:40:39.927 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 04:40:39.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:39.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:40.353 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:40:40.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:40.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:40.832 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 04:40:41.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:41.311 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 04:40:41.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:41.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:41.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:41.313 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:40:41.330 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:41.330 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:41.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:41.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:41.332 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:41.333 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:41.333 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:41.333 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:41.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:41.383 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:40:41.383 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 04:40:41.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:41.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:41.790 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 04:40:42.268 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 04:40:42.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:42.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:42.747 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 04:40:42.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:42.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:42.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:42.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:42.844 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:40:42.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:42.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:42.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:42.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:42.865 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:42.865 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:42.865 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:42.865 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:42.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:42.915 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:40:42.915 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:40:42.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:42.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:43.225 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 04:40:43.704 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 04:40:43.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:43.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:44.182 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 04:40:44.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:44.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:44.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:44.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:44.343 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:40:44.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:44.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:44.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:44.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:44.365 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:44.365 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:44.365 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:44.365 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:44.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:44.424 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:40:44.425 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:40:44.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:44.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:44.661 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 04:40:45.139 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 04:40:45.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:45.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:45.618 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 04:40:45.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:45.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:45.797 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:45.797 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:45.797 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:40:45.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:45.807 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:45.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:45.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:45.809 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:45.809 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:45.809 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:45.809 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:45.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:45.862 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:40:45.862 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:40:45.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:45.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:46.096 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 04:40:46.574 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 04:40:46.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:46.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:47.053 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 04:40:47.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:47.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:47.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:47.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:47.250 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:40:47.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:47.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:47.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:47.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:47.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:47.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:47.261 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:47.261 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:47.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:47.310 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:40:47.310 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:40:47.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:47.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:47.531 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 04:40:48.010 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 04:40:48.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:48.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:48.488 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 04:40:48.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:48.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:48.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:48.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:48.704 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:40:48.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:48.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:48.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:48.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:48.714 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:48.714 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:48.714 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:48.714 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:48.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:48.763 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:40:48.764 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:40:48.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:48.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:48.966 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 04:40:49.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:49.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:49.445 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 04:40:49.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:49.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:49.841 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:49.841 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:49.841 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:40:49.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:49.849 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:49.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:49.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:49.851 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:49.851 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:49.851 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:49.851 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:49.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:49.898 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:40:49.899 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:40:49.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:49.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:49.922 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 04:40:50.399 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 04:40:50.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:50.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:50.877 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 04:40:51.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:51.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:51.291 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:51.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:51.291 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:40:51.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:51.300 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:51.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:51.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:51.302 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:51.302 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:51.302 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:51.302 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:51.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:51.355 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 04:40:51.356 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:40:51.356 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:40:51.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:51.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:51.834 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 04:40:52.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:52.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:52.312 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 04:40:52.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:52.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:52.745 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:52.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:52.745 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:40:52.765 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:52.765 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:52.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:52.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:52.767 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:52.767 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:52.767 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:52.767 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:52.790 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 04:40:52.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:52.816 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:40:52.816 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:40:52.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:52.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:53.269 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 04:40:53.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:53.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:53.746 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-15 04:40:54.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:54.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:54.196 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:54.196 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:54.196 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:40:54.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:40:54.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:40:54.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:40:54.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:40:54.209 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:40:54.210 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:40:54.210 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:40:54.210 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:40:54.210 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:40:54.210 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:40:54.210 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:40:59.212 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:40:59.212 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:40:59.214 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:40:59.215 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:40:59.215 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:40:59.215 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:40:59.226 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:40:59.227 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:40:59.227 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:40:59.227 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:40:59.228 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:40:59.231 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:40:59.231 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:40:59.231 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:40:59.231 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:40:59.231 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:40:59.231 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:40:59.231 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:40:59.231 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:40:59.235 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:40:59.235 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:40:59.235 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:40:59.235 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:40:59.235 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:40:59.235 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:40:59.235 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:40:59.235 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:40:59.238 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:40:59.238 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:40:59.238 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:40:59.238 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:40:59.239 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:40:59.239 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:40:59.239 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:40:59.239 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:40:59.243 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:40:59.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:40:59.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:40:59.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:40:59.243 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:40:59.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:40:59.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:40:59.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:40:59.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:40:59.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:40:59.243 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:40:59.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:40:59.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:40:59.243 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:40:59.243 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:40:59.243 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:40:59.243 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:40:59.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:40:59.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:40:59.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:40:59.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:40:59.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:40:59.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:40:59.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:40:59.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:40:59.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:40:59.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:40:59.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:40:59.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:40:59.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:40:59.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:40:59.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:40:59.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:40:59.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:40:59.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:40:59.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:40:59.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:40:59.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:40:59.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:40:59.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:40:59.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:40:59.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:40:59.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:40:59.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:40:59.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:40:59.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:40:59.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:40:59.248 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:40:59.733 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:40:59.763 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:40:59.764 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:40:59.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:59.766 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:40:59.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:40:59.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:40:59.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:40:59.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:59.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:59.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:59.795 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:40:59.795 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:40:59.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:40:59.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:40:59.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:40:59.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:40:59.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:00.210 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:41:00.246 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:41:00.247 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:41:00.247 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:41:00.247 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:41:00.688 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:41:01.167 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:41:01.248 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:41:01.249 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:41:01.249 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:41:01.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:41:01.645 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:41:02.123 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:41:02.249 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:41:02.249 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:41:02.250 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:41:02.250 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:41:02.601 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:41:03.079 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:41:03.250 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:41:03.251 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:41:03.251 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:41:03.251 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:41:03.557 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:41:03.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:41:03.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:03.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:41:03.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:41:03.780 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:41:03.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:41:03.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:41:03.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:03.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:41:03.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:41:03.784 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:41:03.784 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:41:03.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:41:03.831 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:41:03.831 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:41:03.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:03.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:04.035 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:41:04.252 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:41:04.252 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:41:04.252 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:41:04.252 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:41:04.513 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:41:04.991 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:41:05.469 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:41:05.947 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:41:06.425 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:41:06.903 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:41:07.381 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:41:07.858 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:41:08.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:41:08.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:08.083 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:41:08.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:41:08.100 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:41:08.100 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:41:08.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:41:08.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:08.103 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:41:08.103 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:41:08.103 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:41:08.103 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:41:08.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:41:08.151 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:41:08.151 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:41:08.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:08.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:08.337 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:41:08.814 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:41:09.292 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:41:09.770 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:41:10.247 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:41:10.726 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:41:11.203 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:41:11.681 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:41:12.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:41:12.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:12.122 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:41:12.122 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:41:12.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:41:12.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:41:12.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:41:12.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:12.143 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:41:12.143 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:41:12.143 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:41:12.143 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:41:12.159 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:41:12.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:41:12.191 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:41:12.191 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:41:12.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:12.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:12.637 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:41:13.115 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:41:13.593 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:41:14.071 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:41:14.549 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:41:15.027 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 04:41:15.506 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 04:41:15.984 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 04:41:16.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:41:16.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:16.443 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:41:16.443 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:41:16.459 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:41:16.459 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:41:16.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:41:16.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:16.462 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:41:16.462 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:41:16.462 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:41:16.462 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:41:16.462 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 04:41:16.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:41:16.514 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:41:16.514 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:41:16.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:16.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:16.939 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 04:41:17.417 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 04:41:17.895 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 04:41:18.373 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 04:41:18.851 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 04:41:19.329 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 04:41:19.807 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 04:41:20.286 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 04:41:20.765 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 04:41:21.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:41:21.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:21.174 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:41:21.174 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:41:21.190 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:41:21.190 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:41:21.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:41:21.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:21.193 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:41:21.193 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:41:21.193 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:41:21.193 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:41:21.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:41:21.242 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 04:41:21.243 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:41:21.244 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-12-15 04:41:21.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:21.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:21.720 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 04:41:22.200 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 04:41:22.678 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 04:41:23.157 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 04:41:23.635 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 04:41:24.114 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 04:41:24.592 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 04:41:25.071 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 04:41:25.550 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 04:41:25.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:41:25.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:25.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:41:25.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:41:25.632 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:41:25.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:41:25.649 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:41:25.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:41:25.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:25.651 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:41:25.651 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:41:25.651 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:41:25.651 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:41:25.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:41:25.699 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:41:25.699 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2025-12-15 04:41:25.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:25.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:26.028 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 04:41:26.506 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 04:41:26.983 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 04:41:27.462 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 04:41:27.940 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-15 04:41:28.418 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-15 04:41:28.897 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-15 04:41:29.376 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-15 04:41:29.855 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-15 04:41:30.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:41:30.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:30.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:41:30.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:41:30.079 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:41:30.096 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:41:30.096 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:41:30.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:41:30.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:30.098 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:41:30.098 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:41:30.098 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:41:30.098 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:41:30.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:41:30.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:41:30.148 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:41:30.149 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:41:30.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:30.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:30.332 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-15 04:41:30.811 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-15 04:41:31.289 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-15 04:41:31.768 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-15 04:41:32.246 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-15 04:41:32.725 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-15 04:41:33.203 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-15 04:41:33.681 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-15 04:41:34.159 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-15 04:41:34.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:41:34.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:34.527 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:41:34.527 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:41:34.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:41:34.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:41:34.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:41:34.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:34.550 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:41:34.550 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:41:34.550 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:41:34.550 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:41:34.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:41:34.599 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:41:34.600 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:41:34.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:34.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:34.637 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-15 04:41:35.115 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-15 04:41:35.593 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-15 04:41:36.072 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-15 04:41:36.551 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-15 04:41:37.029 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-15 04:41:37.508 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-15 04:41:37.986 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-15 04:41:38.464 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-15 04:41:38.941 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-15 04:41:38.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:41:38.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:38.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:41:38.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:41:38.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:41:38.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:41:38.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:41:39.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:39.002 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:41:39.002 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:41:39.002 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:41:39.002 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:41:39.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:41:39.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:41:39.051 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:41:39.051 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:41:39.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:39.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:39.419 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-15 04:41:39.897 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-15 04:41:40.376 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-15 04:41:40.854 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-15 04:41:41.333 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2025-12-15 04:41:41.810 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2025-12-15 04:41:42.289 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2025-12-15 04:41:42.766 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2025-12-15 04:41:43.245 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2025-12-15 04:41:43.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:41:43.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:43.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:41:43.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:41:43.324 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:41:43.324 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:41:43.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:41:43.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:43.327 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:41:43.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:41:43.327 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:41:43.327 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:41:43.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:41:43.375 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:41:43.375 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 04:41:43.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:43.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:43.723 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2025-12-15 04:41:44.201 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2025-12-15 04:41:44.679 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2025-12-15 04:41:45.158 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2025-12-15 04:41:45.637 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2025-12-15 04:41:46.116 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2025-12-15 04:41:46.594 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2025-12-15 04:41:47.072 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2025-12-15 04:41:47.551 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2025-12-15 04:41:47.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:41:47.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:47.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:41:47.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:41:47.697 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:41:47.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:41:47.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:41:47.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:41:47.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:47.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:41:47.717 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:41:47.718 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:41:47.718 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:41:47.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:41:47.767 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:41:47.767 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 04:41:47.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:47.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:48.028 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2025-12-15 04:41:48.507 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2025-12-15 04:41:48.986 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2025-12-15 04:41:49.465 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2025-12-15 04:41:49.942 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2025-12-15 04:41:50.416 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2025-12-15 04:41:50.893 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2025-12-15 04:41:51.372 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2025-12-15 04:41:51.852 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2025-12-15 04:41:52.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:41:52.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:52.142 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:41:52.142 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:41:52.142 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:41:52.158 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:41:52.158 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:41:52.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:41:52.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:52.161 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:41:52.161 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:41:52.161 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:41:52.161 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:41:52.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:41:52.211 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:41:52.211 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:41:52.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:52.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:52.329 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2025-12-15 04:41:52.806 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2025-12-15 04:41:53.281 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2025-12-15 04:41:53.759 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2025-12-15 04:41:54.237 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2025-12-15 04:41:54.716 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2025-12-15 04:41:55.195 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2025-12-15 04:41:55.673 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2025-12-15 04:41:56.151 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2025-12-15 04:41:56.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:41:56.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:56.310 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:41:56.310 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:41:56.311 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:41:56.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:41:56.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:41:56.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:41:56.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:56.330 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:41:56.330 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:41:56.330 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:41:56.330 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:41:56.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:41:56.379 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:41:56.379 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:41:56.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:56.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:41:56.629 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2025-12-15 04:41:57.107 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2025-12-15 04:41:57.585 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2025-12-15 04:41:58.063 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2025-12-15 04:41:58.542 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2025-12-15 04:41:59.019 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2025-12-15 04:41:59.498 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2025-12-15 04:41:59.976 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2025-12-15 04:42:00.455 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2025-12-15 04:42:00.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:42:00.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:00.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:42:00.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:42:00.634 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:42:00.642 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:42:00.642 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:42:00.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:42:00.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:00.644 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:42:00.644 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:42:00.644 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:42:00.644 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:42:00.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:42:00.730 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:42:00.730 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:42:00.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:00.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:00.933 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2025-12-15 04:42:01.411 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2025-12-15 04:42:01.890 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2025-12-15 04:42:02.369 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2025-12-15 04:42:02.847 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2025-12-15 04:42:03.325 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2025-12-15 04:42:03.804 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2025-12-15 04:42:04.282 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2025-12-15 04:42:04.761 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2025-12-15 04:42:04.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:42:04.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:04.959 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:42:04.959 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:42:04.959 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:42:04.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:42:04.977 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:42:04.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:42:04.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:04.979 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:42:04.979 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:42:04.979 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:42:04.979 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:42:05.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:42:05.031 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:42:05.031 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:42:05.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:05.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:05.239 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2025-12-15 04:42:05.718 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2025-12-15 04:42:06.197 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2025-12-15 04:42:06.675 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2025-12-15 04:42:07.153 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2025-12-15 04:42:07.631 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2025-12-15 04:42:08.109 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2025-12-15 04:42:08.586 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2025-12-15 04:42:09.064 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2025-12-15 04:42:09.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:42:09.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:09.280 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:42:09.280 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:42:09.280 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:42:09.289 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:42:09.289 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:42:09.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:42:09.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:09.291 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:42:09.291 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:42:09.291 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:42:09.291 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:42:09.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:42:09.338 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:42:09.339 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:42:09.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:09.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:09.542 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2025-12-15 04:42:10.020 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2025-12-15 04:42:10.498 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2025-12-15 04:42:10.976 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2025-12-15 04:42:11.454 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2025-12-15 04:42:11.932 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2025-12-15 04:42:12.410 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2025-12-15 04:42:12.888 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2025-12-15 04:42:13.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:42:13.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:13.283 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:42:13.283 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:42:13.283 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:42:13.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:42:13.300 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:42:13.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:42:13.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:13.303 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:42:13.303 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:42:13.303 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:42:13.303 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:42:13.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:42:13.354 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:42:13.355 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:42:13.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:13.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:13.367 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2025-12-15 04:42:13.845 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2025-12-15 04:42:14.324 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2025-12-15 04:42:14.802 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2025-12-15 04:42:15.281 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2025-12-15 04:42:15.760 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2025-12-15 04:42:16.237 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2025-12-15 04:42:16.713 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2025-12-15 04:42:17.192 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2025-12-15 04:42:17.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:42:17.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:17.606 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:42:17.606 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:42:17.606 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:42:17.624 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:42:17.624 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:42:17.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:42:17.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:17.626 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:42:17.626 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:42:17.626 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:42:17.626 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:42:17.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:42:17.670 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2025-12-15 04:42:17.675 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:42:17.675 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:42:17.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:17.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:18.149 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2025-12-15 04:42:18.628 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2025-12-15 04:42:19.106 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2025-12-15 04:42:19.584 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2025-12-15 04:42:20.063 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2025-12-15 04:42:20.541 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2025-12-15 04:42:21.019 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2025-12-15 04:42:21.498 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2025-12-15 04:42:21.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:42:21.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:21.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:42:21.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:42:21.929 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:42:21.948 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:42:21.948 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:42:21.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:42:21.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:21.950 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:42:21.950 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:42:21.950 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:42:21.950 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:42:21.975 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2025-12-15 04:42:21.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:42:22.003 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:42:22.003 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:42:22.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:22.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:22.453 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2025-12-15 04:42:22.932 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2025-12-15 04:42:23.410 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2025-12-15 04:42:23.888 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2025-12-15 04:42:24.366 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2025-12-15 04:42:24.845 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2025-12-15 04:42:25.323 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2025-12-15 04:42:25.801 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2025-12-15 04:42:26.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:42:26.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:26.253 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:42:26.253 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:42:26.253 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:42:26.262 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:42:26.262 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:42:26.262 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:42:26.262 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:42:26.263 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:42:26.263 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:42:26.263 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:42:26.263 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:42:26.263 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:42:26.263 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:42:26.263 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:42:26.263 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=18564 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:42:26.263 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=18564 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:42:26.263 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=18564 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:42:26.263 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=18564 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:42:26.263 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=18564 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:42:26.263 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=18564 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:42:26.263 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=18564 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:42:31.267 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:42:31.267 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:42:31.269 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:42:31.270 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:42:31.271 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:42:31.271 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:42:31.281 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:42:31.283 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:42:31.283 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:42:31.283 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:42:31.283 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:42:31.286 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:42:31.287 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:42:31.287 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:42:31.287 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:42:31.287 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:42:31.287 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:42:31.288 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:42:31.288 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:42:31.290 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:42:31.291 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:42:31.291 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:42:31.291 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:42:31.291 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:42:31.291 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:42:31.291 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:42:31.291 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:42:31.294 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:42:31.294 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:42:31.294 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:42:31.294 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:42:31.294 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:42:31.294 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:42:31.294 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:42:31.294 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:42:31.298 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:42:31.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:42:31.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:42:31.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:42:31.298 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:42:31.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:42:31.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:42:31.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:42:31.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:42:31.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:42:31.299 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:42:31.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:42:31.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:42:31.299 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:42:31.299 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:42:31.299 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:42:31.299 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:42:31.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:42:31.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:42:31.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:42:31.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:42:31.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:42:31.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:42:31.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:42:31.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:42:31.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:42:31.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:42:31.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:42:31.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:42:31.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:42:31.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:42:31.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:42:31.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:42:31.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:42:31.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:42:31.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:42:31.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:42:31.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:42:31.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:42:31.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:42:31.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:42:31.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:42:31.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:42:31.301 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:42:31.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:42:31.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:42:31.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:42:31.301 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:42:31.301 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:42:31.301 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:42:31.301 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:42:31.301 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:42:31.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:42:36.308 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:42:36.308 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:42:36.308 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:42:36.309 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:42:36.309 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:42:36.310 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:42:36.321 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:42:36.322 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:42:36.323 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:42:36.323 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:42:36.323 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:42:36.326 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:42:36.326 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:42:36.327 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:42:36.327 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:42:36.327 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:42:36.327 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:42:36.328 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:42:36.328 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:42:36.330 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:42:36.330 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:42:36.331 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:42:36.331 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:42:36.331 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:42:36.331 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:42:36.331 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:42:36.331 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:42:36.334 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:42:36.334 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:42:36.334 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:42:36.334 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:42:36.334 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:42:36.334 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:42:36.334 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:42:36.334 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:42:36.338 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:42:36.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:42:36.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:42:36.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:42:36.338 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:42:36.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:42:36.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:42:36.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:42:36.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:42:36.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:42:36.339 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:42:36.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:42:36.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:42:36.339 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:42:36.339 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:42:36.339 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:42:36.339 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:42:36.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:42:36.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:42:36.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:42:36.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:42:36.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:42:36.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:42:36.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:42:36.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:42:36.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:42:36.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:42:36.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:42:36.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:42:36.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:42:36.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:42:36.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:42:36.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:42:36.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:42:36.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:42:36.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:42:36.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:42:36.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:42:36.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:42:36.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:42:36.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:42:36.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:42:36.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:42:36.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:42:36.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:42:36.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:42:36.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:42:36.344 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:42:36.828 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:42:36.857 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:42:36.857 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:42:36.858 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:42:36.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:42:36.867 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:42:36.867 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:42:36.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:42:36.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:36.872 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:42:36.872 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:42:36.873 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:42:36.873 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:42:36.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:42:36.928 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:42:36.929 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:42:36.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:36.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:37.306 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:42:37.343 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:42:37.343 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:42:37.343 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:42:37.344 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:42:37.784 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:42:38.262 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:42:38.344 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:42:38.345 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:42:38.345 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:42:38.345 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:42:38.739 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:42:39.217 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:42:39.346 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:42:39.346 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:42:39.346 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:42:39.346 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:42:39.695 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:42:40.174 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:42:40.347 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:42:40.348 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:42:40.348 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:42:40.348 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:42:40.652 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:42:40.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:42:40.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:40.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:42:40.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:42:41.000 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:42:41.000 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:42:41.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:42:41.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:41.001 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:42:41.002 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:42:41.002 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:42:41.002 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:42:41.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:42:41.051 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:42:41.051 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:42:41.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:41.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:41.130 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:42:41.348 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:42:41.348 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:42:41.349 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:42:41.349 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:42:41.608 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:42:42.086 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:42:42.564 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:42:43.042 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:42:43.520 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:42:43.998 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:42:44.476 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:42:44.954 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:42:45.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:42:45.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:45.311 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:42:45.311 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:42:45.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:42:45.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:42:45.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:42:45.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:45.327 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:42:45.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:42:45.327 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:42:45.327 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:42:45.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:42:45.394 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:42:45.394 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:42:45.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:45.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:45.432 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:42:45.910 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:42:46.388 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:42:46.866 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:42:47.344 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:42:47.822 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:42:48.300 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:42:48.779 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:42:49.257 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:42:49.735 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:42:49.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:42:49.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:49.829 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:42:49.829 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:42:49.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:42:49.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:42:49.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:42:49.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:49.846 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:42:49.846 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:42:49.846 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:42:49.847 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:42:49.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:42:49.895 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:42:49.896 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:42:49.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:49.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:50.213 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:42:50.692 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:42:51.170 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:42:51.648 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:42:52.126 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 04:42:52.604 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 04:42:53.082 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 04:42:53.560 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 04:42:54.038 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 04:42:54.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:42:54.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:54.152 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:42:54.152 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:42:54.170 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:42:54.170 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:42:54.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:42:54.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:54.175 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:42:54.175 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:42:54.175 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:42:54.175 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:42:54.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:42:54.229 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:42:54.229 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:42:54.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:54.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:54.514 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 04:42:54.992 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 04:42:55.471 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 04:42:55.948 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 04:42:56.426 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 04:42:56.904 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 04:42:57.383 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 04:42:57.860 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 04:42:58.339 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 04:42:58.817 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 04:42:58.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:42:58.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:58.834 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:42:58.834 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:42:58.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:42:58.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:42:58.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:42:58.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:58.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:42:58.854 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:42:58.854 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:42:58.854 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:42:58.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:42:58.902 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:42:58.902 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-12-15 04:42:58.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:58.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:42:59.295 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 04:42:59.773 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 04:43:00.252 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 04:43:00.731 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 04:43:01.209 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 04:43:01.688 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 04:43:02.166 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 04:43:02.645 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 04:43:03.124 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 04:43:03.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:43:03.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:03.287 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:43:03.287 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:43:03.288 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:43:03.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:43:03.304 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:43:03.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:43:03.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:03.306 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:43:03.307 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:43:03.307 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:43:03.307 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:43:03.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:43:03.365 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:43:03.365 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2025-12-15 04:43:03.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:03.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:03.602 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 04:43:04.081 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 04:43:04.560 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 04:43:05.038 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-15 04:43:05.517 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-15 04:43:05.996 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-15 04:43:06.474 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-15 04:43:06.953 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-15 04:43:07.432 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-15 04:43:07.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:43:07.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:07.738 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:43:07.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:43:07.739 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:43:07.755 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:43:07.755 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:43:07.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:43:07.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:07.758 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:43:07.758 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:43:07.758 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:43:07.758 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:43:07.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:43:07.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:43:07.814 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:43:07.814 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:43:07.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:07.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:07.910 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-15 04:43:08.387 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-15 04:43:08.865 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-15 04:43:09.343 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-15 04:43:09.822 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-15 04:43:10.301 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-15 04:43:10.780 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-15 04:43:11.258 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-15 04:43:11.737 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-15 04:43:12.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:43:12.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:12.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:43:12.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:43:12.203 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:43:12.203 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:43:12.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:43:12.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:12.205 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:43:12.205 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:43:12.205 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:43:12.205 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:43:12.214 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-15 04:43:12.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:43:12.266 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:43:12.267 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:43:12.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:12.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:12.693 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-15 04:43:13.171 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-15 04:43:13.649 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-15 04:43:14.127 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-15 04:43:14.605 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-15 04:43:15.084 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-15 04:43:15.562 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-15 04:43:16.040 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-15 04:43:16.519 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-15 04:43:16.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:43:16.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:16.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:43:16.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:43:16.635 [WARNING] transceiver.py:250 (MS@172.18.144.22:6700) RX TRXD message (fn=8595 tn=2 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:43:16.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:43:16.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:43:16.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:43:16.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:16.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:43:16.655 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:43:16.655 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:43:16.655 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:43:16.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:43:16.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:43:16.709 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:43:16.710 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:43:16.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:16.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:16.996 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-15 04:43:17.474 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-15 04:43:17.953 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-15 04:43:18.431 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2025-12-15 04:43:18.909 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2025-12-15 04:43:19.386 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2025-12-15 04:43:19.864 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2025-12-15 04:43:20.342 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2025-12-15 04:43:20.820 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2025-12-15 04:43:21.296 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2025-12-15 04:43:21.773 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2025-12-15 04:43:21.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:43:21.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:21.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:43:21.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:43:21.945 [WARNING] transceiver.py:250 (MS@172.18.144.22:6700) RX TRXD message (fn=9729 tn=2 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:43:21.962 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:43:21.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:43:21.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:43:21.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:21.964 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:43:21.964 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:43:21.964 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:43:21.964 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:43:22.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:43:22.015 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:43:22.015 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 04:43:22.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:22.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:22.251 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2025-12-15 04:43:22.729 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2025-12-15 04:43:23.208 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2025-12-15 04:43:23.686 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2025-12-15 04:43:24.165 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2025-12-15 04:43:24.643 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2025-12-15 04:43:25.122 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2025-12-15 04:43:25.601 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2025-12-15 04:43:26.080 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2025-12-15 04:43:26.559 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2025-12-15 04:43:26.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:43:26.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:26.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:43:26.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:43:26.815 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:43:26.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:43:26.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:43:26.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:43:26.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:26.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:43:26.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:43:26.835 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:43:26.835 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:43:26.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:43:26.883 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:43:26.883 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 04:43:26.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:26.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:27.038 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2025-12-15 04:43:27.517 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2025-12-15 04:43:27.996 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2025-12-15 04:43:28.475 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2025-12-15 04:43:28.954 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2025-12-15 04:43:29.433 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2025-12-15 04:43:29.912 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2025-12-15 04:43:30.392 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2025-12-15 04:43:30.871 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2025-12-15 04:43:31.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:43:31.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:31.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:43:31.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:43:31.268 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:43:31.287 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:43:31.287 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:43:31.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:43:31.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:31.289 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:43:31.289 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:43:31.289 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:43:31.289 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:43:31.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:43:31.348 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:43:31.349 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:43:31.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:31.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:31.350 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2025-12-15 04:43:31.829 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2025-12-15 04:43:32.307 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2025-12-15 04:43:32.785 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2025-12-15 04:43:33.263 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2025-12-15 04:43:33.742 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2025-12-15 04:43:34.220 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2025-12-15 04:43:34.699 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2025-12-15 04:43:35.177 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2025-12-15 04:43:35.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:43:35.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:35.467 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:43:35.467 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:43:35.467 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:43:35.484 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:43:35.484 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:43:35.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:43:35.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:35.487 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:43:35.487 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:43:35.487 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:43:35.487 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:43:35.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:43:35.536 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:43:35.536 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:43:35.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:35.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:35.655 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2025-12-15 04:43:36.132 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2025-12-15 04:43:36.611 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2025-12-15 04:43:37.089 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2025-12-15 04:43:37.568 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2025-12-15 04:43:38.045 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2025-12-15 04:43:38.523 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2025-12-15 04:43:39.002 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2025-12-15 04:43:39.481 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2025-12-15 04:43:39.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:43:39.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:39.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:43:39.790 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:43:39.790 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:43:39.808 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:43:39.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:43:39.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:43:39.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:39.810 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:43:39.810 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:43:39.810 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:43:39.810 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:43:39.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:43:39.861 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:43:39.861 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:43:39.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:39.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:39.959 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2025-12-15 04:43:40.437 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2025-12-15 04:43:40.916 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2025-12-15 04:43:41.394 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2025-12-15 04:43:41.872 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2025-12-15 04:43:42.351 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2025-12-15 04:43:42.830 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2025-12-15 04:43:43.309 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2025-12-15 04:43:43.787 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2025-12-15 04:43:44.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:43:44.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:44.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:43:44.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:43:44.113 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:43:44.132 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:43:44.132 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:43:44.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:43:44.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:44.134 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:43:44.134 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:43:44.134 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:43:44.134 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:43:44.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:43:44.183 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:43:44.183 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:43:44.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:44.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:44.265 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2025-12-15 04:43:44.743 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2025-12-15 04:43:45.222 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2025-12-15 04:43:45.700 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2025-12-15 04:43:46.178 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2025-12-15 04:43:46.657 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2025-12-15 04:43:47.135 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2025-12-15 04:43:47.613 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2025-12-15 04:43:48.091 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2025-12-15 04:43:48.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:43:48.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:48.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:43:48.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:43:48.438 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:43:48.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:43:48.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:43:48.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:43:48.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:48.458 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:43:48.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:43:48.459 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:43:48.459 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:43:48.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:43:48.507 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:43:48.507 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:43:48.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:48.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:48.569 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2025-12-15 04:43:49.047 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2025-12-15 04:43:49.526 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2025-12-15 04:43:50.004 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2025-12-15 04:43:50.482 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2025-12-15 04:43:50.960 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2025-12-15 04:43:51.439 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2025-12-15 04:43:51.916 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2025-12-15 04:43:52.395 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2025-12-15 04:43:52.874 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2025-12-15 04:43:52.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:43:52.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:52.922 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:43:52.922 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:43:52.923 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:43:52.933 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:43:52.933 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:43:52.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:43:52.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:52.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:43:52.935 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:43:52.935 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:43:52.935 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:43:52.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:43:52.983 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:43:52.984 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:43:52.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:52.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:53.351 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2025-12-15 04:43:53.829 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2025-12-15 04:43:54.307 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2025-12-15 04:43:54.786 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2025-12-15 04:43:55.264 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2025-12-15 04:43:55.743 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2025-12-15 04:43:56.222 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2025-12-15 04:43:56.700 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2025-12-15 04:43:57.179 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2025-12-15 04:43:57.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:43:57.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:57.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:43:57.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:43:57.243 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:43:57.262 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:43:57.262 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:43:57.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:43:57.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:57.264 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:43:57.265 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:43:57.265 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:43:57.265 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:43:57.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:43:57.315 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:43:57.315 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:43:57.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:57.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:43:57.657 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2025-12-15 04:43:58.135 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2025-12-15 04:43:58.614 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2025-12-15 04:43:59.092 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2025-12-15 04:43:59.571 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2025-12-15 04:44:00.049 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2025-12-15 04:44:00.528 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2025-12-15 04:44:01.006 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2025-12-15 04:44:01.485 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2025-12-15 04:44:01.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:01.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:01.569 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:01.569 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:01.569 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:44:01.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:01.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:01.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:44:01.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:01.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:44:01.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:44:01.589 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:44:01.589 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:44:01.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:01.639 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:44:01.639 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:44:01.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:01.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:01.963 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2025-12-15 04:44:02.441 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2025-12-15 04:44:02.920 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2025-12-15 04:44:03.398 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2025-12-15 04:44:03.876 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2025-12-15 04:44:04.355 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2025-12-15 04:44:04.833 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2025-12-15 04:44:05.312 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2025-12-15 04:44:05.790 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2025-12-15 04:44:05.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:05.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:05.911 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:05.911 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:05.911 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:44:05.911 [WARNING] transceiver.py:250 (MS@172.18.144.22:6700) RX TRXD message (fn=19102 tn=1 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:44:05.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:44:05.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:44:05.927 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:44:05.928 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:44:05.934 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:44:05.934 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:44:05.934 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:44:05.934 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:44:05.935 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:44:05.935 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:44:05.935 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:44:10.932 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:44:10.933 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:44:10.935 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:44:10.936 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:44:10.936 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:44:10.937 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:44:10.949 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:44:10.950 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:44:10.950 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:44:10.950 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:44:10.950 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:44:10.952 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:44:10.953 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:44:10.953 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:44:10.953 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:44:10.953 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:44:10.953 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:44:10.953 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:44:10.953 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:44:10.955 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:44:10.955 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:44:10.955 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:44:10.956 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:44:10.956 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:44:10.956 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:44:10.956 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:44:10.956 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:44:10.958 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:44:10.958 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:44:10.958 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:44:10.958 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:44:10.958 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:44:10.958 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:44:10.958 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:44:10.958 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:44:10.962 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:44:10.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:44:10.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:44:10.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:44:10.963 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:44:10.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:44:10.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:44:10.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:44:10.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:44:10.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:44:10.963 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:44:10.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:44:10.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:44:10.963 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:44:10.963 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:44:10.963 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:44:10.963 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:44:10.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:44:10.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:44:10.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:44:10.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:44:10.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:44:10.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:44:10.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:44:10.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:44:10.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:44:10.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:44:10.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:44:10.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:44:10.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:44:10.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:44:10.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:44:10.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:44:10.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:44:10.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:44:10.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:44:10.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:44:10.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:44:10.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:44:10.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:44:10.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:44:10.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:44:10.964 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:44:10.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:44:10.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:44:10.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:44:10.965 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:44:10.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:44:10.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:44:10.965 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:44:10.965 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:44:10.965 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:44:10.965 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:44:10.965 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:44:15.989 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:44:15.989 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:44:15.991 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:44:15.992 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:44:15.992 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:44:15.993 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:44:16.003 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:44:16.004 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:44:16.004 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:44:16.004 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:44:16.004 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:44:16.008 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:44:16.008 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:44:16.009 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:44:16.009 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:44:16.009 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:44:16.009 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:44:16.009 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:44:16.009 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:44:16.013 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:44:16.014 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:44:16.014 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:44:16.014 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:44:16.014 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:44:16.014 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:44:16.014 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:44:16.014 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:44:16.018 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:44:16.018 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:44:16.018 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:44:16.018 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:44:16.018 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:44:16.018 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:44:16.018 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:44:16.019 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:44:16.024 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:44:16.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:44:16.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:44:16.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:44:16.025 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:44:16.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:44:16.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:44:16.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:44:16.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:44:16.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:44:16.025 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:44:16.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:44:16.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:44:16.026 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:44:16.026 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:44:16.026 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:44:16.026 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:44:16.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:44:16.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:44:16.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:44:16.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:44:16.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:44:16.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:44:16.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:44:16.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:44:16.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:44:16.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:44:16.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:44:16.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:44:16.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:44:16.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:44:16.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:44:16.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:44:16.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:44:16.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:44:16.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:44:16.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:44:16.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:44:16.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:44:16.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:44:16.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:44:16.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:44:16.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:44:16.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:44:16.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:44:16.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:44:16.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:44:16.031 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:44:16.516 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:44:16.546 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:44:16.548 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:44:16.548 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:44:16.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:16.566 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:16.566 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:16.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:44:16.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:16.573 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:44:16.573 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:44:16.573 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:44:16.573 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:44:16.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:16.620 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:44:16.620 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:44:16.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:16.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:16.993 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:44:17.029 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:44:17.030 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:44:17.030 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:44:17.031 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:44:17.471 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:44:17.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:17.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:17.677 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:17.677 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:17.695 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:17.695 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:17.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:44:17.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:17.698 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:44:17.698 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:44:17.698 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:44:17.698 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:44:17.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:17.747 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:44:17.747 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:44:17.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:17.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:17.948 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:44:18.030 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:44:18.030 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:44:18.031 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:44:18.031 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:44:18.426 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:44:18.904 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:44:19.031 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:44:19.032 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:44:19.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:44:19.032 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:44:19.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:19.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:19.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:19.129 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:19.144 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:19.144 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:19.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:44:19.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:19.146 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:44:19.146 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:44:19.146 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:44:19.146 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:44:19.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:19.199 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:44:19.199 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:44:19.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:19.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:19.382 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:44:19.860 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:44:20.032 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:44:20.032 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:44:20.033 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:44:20.033 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:44:20.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:20.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:20.302 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:20.302 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:20.320 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:20.320 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:20.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:44:20.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:20.323 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:44:20.323 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:44:20.323 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:44:20.323 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:44:20.337 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:44:20.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:20.371 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:44:20.371 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:44:20.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:20.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:20.816 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:44:21.033 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:44:21.034 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:44:21.034 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:44:21.034 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:44:21.294 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:44:21.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:21.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:21.754 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:21.754 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:21.765 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:21.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:21.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:44:21.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:21.769 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:44:21.769 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:44:21.769 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:44:21.769 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:44:21.772 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:44:21.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:21.826 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:44:21.826 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:44:21.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:21.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:22.249 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:44:22.727 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:44:23.206 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:44:23.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:23.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:23.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:23.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:23.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:23.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:23.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:44:23.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:23.358 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:44:23.358 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:44:23.358 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:44:23.358 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:44:23.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:23.410 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:44:23.410 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-12-15 04:44:23.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:23.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:23.683 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:44:24.162 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:44:24.641 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:44:24.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:24.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:24.860 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:24.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:24.860 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:44:24.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:24.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:24.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:44:24.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:24.881 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:44:24.881 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:44:24.881 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:44:24.881 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:44:24.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:24.930 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:44:24.930 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2025-12-15 04:44:24.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:24.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:25.119 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:44:25.598 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:44:26.076 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:44:26.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:26.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:26.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:26.385 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:26.385 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:44:26.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:26.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:26.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:44:26.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:26.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:44:26.408 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:44:26.408 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:44:26.408 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:44:26.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:44:26.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:26.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:44:26.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:44:26.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:26.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:26.555 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:44:27.029 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:44:27.507 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:44:27.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:27.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:27.903 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:27.903 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:27.918 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:27.918 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:27.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:44:27.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:27.921 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:44:27.921 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:44:27.921 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:44:27.921 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:44:27.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:27.976 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:44:27.976 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:44:27.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:27.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:27.986 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:44:28.465 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:44:28.943 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:44:29.421 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:44:29.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:29.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:29.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:29.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:29.442 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:29.442 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:29.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:44:29.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:29.445 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:44:29.445 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:44:29.445 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:44:29.445 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:44:29.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:44:29.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:29.495 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:44:29.495 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:44:29.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:29.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:29.899 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:44:30.378 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:44:30.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:30.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:30.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:30.829 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:30.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:30.847 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:30.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:44:30.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:30.849 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:44:30.849 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:44:30.849 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:44:30.849 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:44:30.855 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:44:30.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:30.910 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:44:30.910 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 04:44:30.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:30.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:31.333 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:44:31.806 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 04:44:32.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:32.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:32.284 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 04:44:32.285 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:32.285 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:32.285 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:44:32.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:32.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:32.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:44:32.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:32.300 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:44:32.300 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:44:32.300 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:44:32.300 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:44:32.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:32.355 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:44:32.355 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 04:44:32.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:32.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:32.763 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 04:44:33.242 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 04:44:33.721 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 04:44:33.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:33.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:33.818 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:33.818 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:33.818 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:44:33.836 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:33.836 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:33.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:44:33.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:33.838 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:44:33.839 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:44:33.839 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:44:33.839 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:44:33.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:33.890 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:44:33.890 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:44:33.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:33.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:34.199 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 04:44:34.678 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 04:44:35.156 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 04:44:35.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:35.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:35.318 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:35.318 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:35.318 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:44:35.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:35.335 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:35.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:44:35.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:35.338 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:44:35.338 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:44:35.338 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:44:35.338 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:44:35.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:35.399 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:44:35.399 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:44:35.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:35.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:35.633 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 04:44:36.112 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 04:44:36.590 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 04:44:36.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:36.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:36.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:36.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:36.769 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:44:36.782 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:36.782 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:36.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:44:36.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:36.785 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:44:36.785 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:44:36.785 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:44:36.785 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:44:36.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:36.835 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:44:36.835 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:44:36.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:36.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:37.067 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 04:44:37.546 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 04:44:38.024 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 04:44:38.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:38.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:38.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:38.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:38.221 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:44:38.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:38.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:38.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:44:38.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:38.244 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:44:38.244 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:44:38.244 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:44:38.244 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:44:38.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:38.291 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:44:38.291 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:44:38.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:38.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:38.501 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 04:44:38.980 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 04:44:39.459 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 04:44:39.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:39.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:39.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:39.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:39.674 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:44:39.685 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:39.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:39.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:44:39.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:39.688 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:44:39.688 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:44:39.688 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:44:39.688 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:44:39.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:39.738 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:44:39.739 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:44:39.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:39.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:39.936 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 04:44:40.414 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 04:44:40.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:40.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:40.810 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:40.810 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:40.810 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:44:40.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:40.829 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:40.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:44:40.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:40.831 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:44:40.831 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:44:40.831 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:44:40.831 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:44:40.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:40.891 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:44:40.892 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:44:40.892 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 04:44:40.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:40.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:41.370 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 04:44:41.849 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 04:44:42.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:42.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:42.263 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:42.263 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:42.263 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:44:42.283 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:42.283 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:42.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:44:42.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:42.286 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:44:42.287 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:44:42.287 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:44:42.287 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:44:42.327 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 04:44:42.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:42.335 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:44:42.335 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:44:42.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:42.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:42.805 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 04:44:43.283 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 04:44:43.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:43.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:43.716 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:43.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:43.717 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:44:43.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:43.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:43.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:44:43.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:43.738 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:44:43.738 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:44:43.738 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:44:43.738 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:44:43.761 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 04:44:43.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:43.786 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:44:43.787 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:44:43.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:43.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:44.240 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 04:44:44.718 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-15 04:44:45.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:45.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:45.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:45.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:45.168 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:44:45.181 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:44:45.182 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:44:45.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:44:45.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:44:45.185 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:44:45.185 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:44:45.185 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:44:45.185 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:44:45.185 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:44:45.185 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:44:45.185 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:44:45.186 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6223 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:44:45.186 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6223 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:44:45.186 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6223 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:44:45.186 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6223 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:44:45.186 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6223 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:44:45.186 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6223 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:44:50.185 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:44:50.186 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:44:50.188 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:44:50.188 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:44:50.189 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:44:50.190 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:44:50.198 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:44:50.199 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:44:50.199 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:44:50.199 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:44:50.199 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:44:50.202 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:44:50.202 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:44:50.202 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:44:50.202 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:44:50.202 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:44:50.202 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:44:50.202 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:44:50.202 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:44:50.204 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:44:50.204 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:44:50.204 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:44:50.204 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:44:50.204 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:44:50.204 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:44:50.205 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:44:50.205 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:44:50.206 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:44:50.206 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:44:50.206 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:44:50.206 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:44:50.206 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:44:50.207 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:44:50.207 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:44:50.207 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:44:50.209 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:44:50.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:44:50.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:44:50.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:44:50.209 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:44:50.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:44:50.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:44:50.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:44:50.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:44:50.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:44:50.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:44:50.210 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:44:50.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:44:50.210 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:44:50.210 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:44:50.210 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:44:50.210 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:44:50.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:44:50.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:44:50.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:44:50.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:44:50.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:44:50.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:44:50.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:44:50.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:44:50.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:44:50.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:44:50.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:44:50.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:44:50.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:44:50.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:44:50.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:44:50.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:44:50.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:44:50.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:44:50.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:44:50.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:44:50.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:44:50.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:44:50.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:44:50.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:44:50.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:44:50.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:44:50.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:44:50.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:44:50.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:44:50.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:44:50.215 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:44:50.699 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:44:50.727 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:44:50.728 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:44:50.730 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:44:50.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:50.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:50.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:50.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:44:50.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:50.758 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:44:50.759 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:44:50.759 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:44:50.759 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:44:50.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:44:50.801 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:44:50.801 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:44:50.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:50.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:51.176 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:44:51.213 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:44:51.213 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:44:51.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:44:51.214 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:44:51.655 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:44:52.133 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:44:52.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:44:52.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:44:52.215 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:44:52.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:44:52.611 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:44:53.089 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:44:53.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:44:53.216 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:44:53.216 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:44:53.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:44:53.567 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:44:53.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:54.045 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:44:54.216 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:44:54.217 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:44:54.217 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:44:54.217 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:44:54.523 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:44:54.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:54.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:54.599 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:54.599 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:54.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:44:54.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:54.601 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:44:54.601 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:44:54.601 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:44:54.602 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:44:54.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:44:54.618 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:44:54.618 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:44:54.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:54.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:55.001 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:44:55.218 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:44:55.218 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:44:55.218 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:44:55.218 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:44:55.479 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:44:55.958 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:44:56.437 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:44:56.915 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:44:57.393 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:44:57.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:57.872 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:44:58.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:44:58.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:58.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:58.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:58.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:44:58.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:44:58.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:44:58.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:58.033 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:44:58.033 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:44:58.033 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:44:58.033 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:44:58.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:44:58.082 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:44:58.082 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 04:44:58.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:58.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:44:58.350 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:44:58.828 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:44:59.307 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:44:59.786 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:45:00.264 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:45:00.742 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:45:01.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:45:01.221 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:45:01.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:45:01.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:01.668 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:45:01.668 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:45:01.669 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:45:01.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:45:01.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:01.669 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:45:01.669 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:45:01.670 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:45:01.670 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:45:01.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:45:01.695 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:45:01.695 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 04:45:01.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:01.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:01.700 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:45:02.178 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:45:02.656 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:45:03.135 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:45:03.614 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:45:04.093 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:45:04.572 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:45:04.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:45:05.051 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:45:05.530 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:45:05.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:45:05.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:05.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:45:05.580 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:45:05.580 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:45:05.598 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:45:05.598 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:45:05.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:45:05.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:05.601 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:45:05.601 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:45:05.601 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:45:05.601 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:45:05.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:45:05.652 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:45:05.653 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:45:05.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:05.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:06.008 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 04:45:06.485 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 04:45:06.963 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 04:45:07.442 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 04:45:07.920 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 04:45:08.398 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 04:45:08.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:45:08.875 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 04:45:09.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:45:09.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:09.316 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:45:09.316 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:45:09.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:45:09.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:09.317 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:45:09.317 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:45:09.317 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:45:09.317 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:45:09.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:45:09.348 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:45:09.349 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:45:09.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:09.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:09.353 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 04:45:09.832 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 04:45:10.310 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 04:45:10.788 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 04:45:11.267 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 04:45:11.744 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 04:45:12.222 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 04:45:12.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:45:12.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:45:12.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:12.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:45:12.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:45:12.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:45:12.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:45:12.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:45:12.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:12.684 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:45:12.684 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:45:12.684 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:45:12.684 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:45:12.700 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 04:45:12.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:45:12.730 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:45:12.730 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:45:12.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:12.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:13.178 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 04:45:13.657 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 04:45:14.136 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 04:45:14.614 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 04:45:15.093 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 04:45:15.572 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 04:45:15.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:45:16.048 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 04:45:16.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:45:16.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:16.443 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:45:16.443 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:45:16.444 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:45:16.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:45:16.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:16.444 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:45:16.444 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:45:16.444 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:45:16.444 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:45:16.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:45:16.471 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:45:16.471 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:45:16.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:16.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:16.526 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 04:45:17.005 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 04:45:17.484 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 04:45:17.963 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 04:45:18.441 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 04:45:18.919 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-15 04:45:19.398 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-15 04:45:19.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:45:19.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:45:19.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:19.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:45:19.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:45:19.793 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:45:19.805 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:45:19.805 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:45:19.805 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:45:19.805 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:45:19.809 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:45:19.809 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:45:19.809 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:45:19.809 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:45:19.810 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:45:19.810 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:45:19.810 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:45:24.811 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:45:24.811 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:45:24.812 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:45:24.812 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:45:24.812 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:45:24.813 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:45:24.822 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:45:24.823 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:45:24.823 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:45:24.824 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:45:24.824 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:45:24.827 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:45:24.828 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:45:24.828 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:45:24.828 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:45:24.828 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:45:24.829 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:45:24.829 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:45:24.829 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:45:24.832 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:45:24.833 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:45:24.833 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:45:24.833 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:45:24.834 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:45:24.834 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:45:24.834 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:45:24.834 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:45:24.838 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:45:24.839 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:45:24.839 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:45:24.839 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:45:24.839 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:45:24.839 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:45:24.839 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:45:24.839 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:45:24.844 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:45:24.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:45:24.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:45:24.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:45:24.844 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:45:24.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:45:24.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:45:24.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:45:24.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:45:24.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:45:24.844 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:45:24.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:45:24.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:45:24.845 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:45:24.845 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:45:24.845 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:45:24.845 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:45:24.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:45:24.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:45:24.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:45:24.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:45:24.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:45:24.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:45:24.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:45:24.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:45:24.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:45:24.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:45:24.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:45:24.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:45:24.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:45:24.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:45:24.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:45:24.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:45:24.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:45:24.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:45:24.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:45:24.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:45:24.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:45:24.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:45:24.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:45:24.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:45:24.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:45:24.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:45:24.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:45:24.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:45:24.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:45:24.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:45:24.849 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:45:25.333 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:45:25.367 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:45:25.369 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:45:25.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:45:25.370 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:45:25.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:45:25.389 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:45:25.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:45:25.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:25.396 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:45:25.396 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:45:25.396 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:45:25.396 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:45:25.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:45:25.433 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:45:25.434 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:45:25.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:25.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:25.810 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:45:25.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:45:25.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:45:25.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:45:25.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:45:26.289 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:45:26.767 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:45:26.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:45:26.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:45:26.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:45:26.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:45:27.246 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:45:27.724 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:45:27.849 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:45:27.850 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:45:27.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:45:27.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:45:28.202 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:45:28.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:45:28.680 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:45:28.851 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:45:28.851 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:45:28.851 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:45:28.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:45:29.158 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:45:29.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:45:29.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:29.236 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:45:29.236 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:45:29.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:45:29.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:29.237 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:45:29.237 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:45:29.237 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:45:29.237 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:45:29.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:45:29.253 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:45:29.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:45:29.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:29.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:29.635 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:45:29.853 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:45:29.853 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:45:29.853 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:45:29.853 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:45:30.113 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:45:30.591 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:45:31.069 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:45:31.548 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:45:32.026 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:45:32.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:45:32.504 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:45:32.982 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:45:33.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:45:33.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:33.132 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:45:33.132 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:45:33.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:45:33.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:33.134 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:45:33.135 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:45:33.135 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:45:33.135 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:45:33.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:45:33.169 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:45:33.170 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:45:33.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:33.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:33.461 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:45:33.939 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:45:34.417 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:45:34.895 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:45:35.373 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:45:35.851 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:45:36.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:45:36.329 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:45:36.808 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:45:37.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:45:37.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:37.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:45:37.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:45:37.032 [WARNING] transceiver.py:250 (MS@172.18.144.22:6700) RX TRXD message (fn=2600 tn=6 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:45:37.032 [WARNING] transceiver.py:250 (MS@172.18.144.22:6700) RX TRXD message (fn=2600 tn=7 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:45:37.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:45:37.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:37.032 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:45:37.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:45:37.032 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:45:37.032 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:45:37.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:45:37.045 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:45:37.045 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:45:37.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:37.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:37.286 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:45:37.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:45:37.764 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:45:38.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:45:38.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:38.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:45:38.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:45:38.024 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:45:38.024 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:45:38.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:45:38.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:38.027 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:45:38.027 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:45:38.027 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:45:38.027 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:45:38.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:45:38.078 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:45:38.078 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 04:45:38.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:38.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:38.242 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:45:38.718 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:45:39.197 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:45:39.676 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:45:40.155 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:45:40.634 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 04:45:41.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:45:41.113 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 04:45:41.595 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 04:45:41.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:45:41.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:41.672 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:45:41.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:45:41.673 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:45:41.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:45:41.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:41.673 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:45:41.673 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:45:41.674 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:45:41.674 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:45:41.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:45:41.690 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:45:41.690 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 04:45:41.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:41.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:42.074 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 04:45:42.553 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 04:45:43.032 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 04:45:43.510 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 04:45:43.989 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 04:45:44.468 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 04:45:44.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:45:44.947 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 04:45:45.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:45:45.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:45.090 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:45:45.090 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:45:45.090 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:45:45.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:45:45.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:45.090 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:45:45.091 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:45:45.091 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:45:45.091 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:45:45.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:45:45.135 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:45:45.135 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 04:45:45.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:45.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:45.425 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 04:45:45.904 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 04:45:46.384 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 04:45:46.862 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 04:45:47.341 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 04:45:47.819 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 04:45:48.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:45:48.299 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 04:45:48.777 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 04:45:48.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:45:48.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:48.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:45:48.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:45:48.994 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:45:48.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:45:48.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:48.995 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:45:48.995 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:45:48.995 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:45:48.995 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:45:49.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:45:49.015 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:45:49.015 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 04:45:49.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:49.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:49.255 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 04:45:49.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:45:49.733 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 04:45:49.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:45:49.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:49.967 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:45:49.967 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:45:49.967 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:45:49.976 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:45:49.976 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:45:49.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:45:49.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:49.977 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:45:49.977 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:45:49.977 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:45:49.977 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:45:50.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:45:50.027 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:45:50.027 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:45:50.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:50.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:50.211 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 04:45:50.689 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 04:45:51.167 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 04:45:51.644 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 04:45:52.123 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 04:45:52.601 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 04:45:53.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:45:53.079 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 04:45:53.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:45:53.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:53.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:45:53.517 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:45:53.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:45:53.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:53.517 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:45:53.517 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:45:53.517 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:45:53.517 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:45:53.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:45:53.552 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:45:53.552 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:45:53.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:53.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:53.556 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-15 04:45:54.033 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-15 04:45:54.512 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-15 04:45:54.989 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-15 04:45:55.467 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-15 04:45:55.945 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-15 04:45:56.423 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-15 04:45:56.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:45:56.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:45:56.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:56.864 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:45:56.864 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:45:56.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:45:56.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:56.866 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:45:56.867 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:45:56.867 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:45:56.867 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:45:56.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:45:56.896 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:45:56.897 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:45:56.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:56.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:45:56.901 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-15 04:45:57.378 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-15 04:45:57.856 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-15 04:45:58.334 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-15 04:45:58.811 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-15 04:45:59.289 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-15 04:45:59.767 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-15 04:45:59.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:46:00.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:46:00.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:46:00.203 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:46:00.203 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:46:00.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:46:00.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:46:00.203 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:46:00.204 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:46:00.204 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:46:00.204 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:46:00.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:46:00.240 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:46:00.241 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:46:00.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:46:00.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:46:00.245 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-15 04:46:00.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:46:00.723 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-15 04:46:01.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:46:01.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:46:01.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:46:01.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:46:01.191 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:46:01.191 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:46:01.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:46:01.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:46:01.193 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:46:01.193 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:46:01.193 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:46:01.193 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:46:01.200 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-15 04:46:01.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:46:01.253 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:46:01.253 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:46:01.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:46:01.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:46:01.678 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-15 04:46:02.157 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-15 04:46:02.635 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-15 04:46:03.114 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-15 04:46:03.592 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-15 04:46:04.071 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-15 04:46:04.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:46:04.549 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-15 04:46:04.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:46:04.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:46:04.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:46:04.944 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:46:04.944 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:46:04.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:46:04.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:46:04.944 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:46:04.944 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:46:04.944 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:46:04.945 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:46:04.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:46:04.971 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:46:04.971 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:46:04.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:46:04.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:46:05.026 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-15 04:46:05.504 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-15 04:46:05.983 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-15 04:46:06.462 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-15 04:46:06.940 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2025-12-15 04:46:07.418 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2025-12-15 04:46:07.897 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2025-12-15 04:46:08.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:46:08.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:46:08.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:46:08.291 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:46:08.292 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:46:08.292 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:46:08.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:46:08.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:46:08.292 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:46:08.292 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:46:08.293 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:46:08.293 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:46:08.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:46:08.320 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:46:08.320 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:46:08.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:46:08.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:46:08.375 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2025-12-15 04:46:08.852 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2025-12-15 04:46:09.331 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2025-12-15 04:46:09.809 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2025-12-15 04:46:10.288 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2025-12-15 04:46:10.767 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2025-12-15 04:46:11.245 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2025-12-15 04:46:11.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:46:11.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:46:11.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:46:11.639 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:46:11.639 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:46:11.639 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:46:11.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:46:11.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:46:11.640 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:46:11.640 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:46:11.640 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:46:11.640 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:46:11.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:46:11.670 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:46:11.670 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:46:11.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:46:11.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:46:11.723 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2025-12-15 04:46:12.201 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2025-12-15 04:46:12.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:46:12.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:46:12.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:46:12.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:46:12.597 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:46:12.597 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:46:12.603 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:46:12.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:46:12.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:46:12.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:46:12.604 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:46:12.604 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:46:12.604 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:46:12.604 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:46:12.605 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:46:12.605 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:46:12.605 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:46:17.607 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:46:17.608 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:46:17.609 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:46:17.610 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:46:17.610 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:46:17.611 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:46:17.620 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:46:17.621 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:46:17.621 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:46:17.622 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:46:17.622 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:46:17.625 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:46:17.625 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:46:17.626 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:46:17.626 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:46:17.626 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:46:17.626 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:46:17.627 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:46:17.627 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:46:17.629 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:46:17.629 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:46:17.629 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:46:17.629 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:46:17.630 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:46:17.630 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:46:17.630 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:46:17.630 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:46:17.634 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:46:17.635 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:46:17.635 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:46:17.635 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:46:17.635 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:46:17.635 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:46:17.635 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:46:17.635 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:46:17.640 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:46:17.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:46:17.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:46:17.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:46:17.640 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:46:17.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:46:17.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:46:17.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:46:17.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:46:17.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:46:17.641 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:46:17.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:46:17.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:46:17.641 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:46:17.641 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:46:17.641 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:46:17.641 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:46:17.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:46:17.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:46:17.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:46:17.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:46:17.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:46:17.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:46:17.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:46:17.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:46:17.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:46:17.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:46:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:46:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:46:17.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:46:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:46:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:46:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:46:17.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:46:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:46:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:46:17.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:46:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:46:17.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:46:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:46:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:46:17.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:46:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:46:17.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:46:17.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:46:17.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:46:17.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:46:17.646 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:46:18.128 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:46:18.168 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:46:18.170 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:46:18.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:46:18.172 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:46:18.177 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:46:18.178 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:46:18.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:46:18.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:46:18.180 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:46:18.180 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:46:18.180 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:46:18.180 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:46:18.606 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:46:18.646 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:46:18.646 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:46:18.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:46:18.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:46:19.084 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:46:19.562 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:46:19.647 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:46:19.647 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:46:19.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:46:19.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:46:20.040 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:46:20.513 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:46:20.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:46:20.648 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:46:20.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:46:20.650 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:46:20.989 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:46:21.466 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:46:21.649 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:46:21.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:46:21.649 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:46:21.651 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:46:21.942 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:46:22.416 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:46:22.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:46:22.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:46:22.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:46:22.652 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:46:22.891 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:46:23.367 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:46:23.844 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:46:24.322 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:46:24.794 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:46:25.267 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:46:25.739 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:46:26.213 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:46:26.685 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:46:27.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:46:27.032 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:46:27.038 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:46:27.038 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:46:27.038 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:46:27.038 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:46:27.044 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:46:27.044 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:46:27.045 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:46:27.045 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:46:27.046 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:46:27.046 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:46:27.046 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:46:32.044 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:46:32.044 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:46:32.046 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:46:32.047 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:46:32.048 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:46:32.048 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:46:32.059 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:46:32.061 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:46:32.061 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:46:32.062 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:46:32.062 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:46:32.068 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:46:32.068 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:46:32.069 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:46:32.069 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:46:32.069 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:46:32.070 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:46:32.070 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:46:32.070 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:46:32.073 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:46:32.074 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:46:32.074 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:46:32.074 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:46:32.074 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:46:32.075 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:46:32.075 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:46:32.075 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:46:32.078 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:46:32.078 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:46:32.078 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:46:32.079 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:46:32.079 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:46:32.079 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:46:32.079 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:46:32.079 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:46:32.084 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:46:32.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:46:32.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:46:32.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:46:32.084 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:46:32.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:46:32.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:46:32.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:46:32.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:46:32.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:46:32.085 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:46:32.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:46:32.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:46:32.085 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:46:32.085 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:46:32.085 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:46:32.085 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:46:32.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:46:32.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:46:32.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:46:32.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:46:32.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:46:32.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:46:32.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:46:32.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:46:32.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:46:32.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:46:32.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:46:32.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:46:32.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:46:32.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:46:32.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:46:32.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:46:32.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:46:32.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:46:32.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:46:32.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:46:32.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:46:32.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:46:32.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:46:32.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:46:32.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:46:32.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:46:32.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:46:32.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:46:32.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:46:32.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:46:32.090 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:46:32.573 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:46:32.611 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:46:32.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:46:32.615 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:46:32.618 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:46:32.623 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:46:32.624 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:46:32.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:46:32.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:46:32.625 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:46:32.626 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:46:32.626 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:46:32.626 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:46:33.050 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:46:33.088 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:46:33.089 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:46:33.089 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:46:33.090 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:46:33.527 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:46:34.001 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:46:34.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:46:34.090 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:46:34.090 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:46:34.091 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:46:34.478 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:46:34.956 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:46:35.090 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:46:35.091 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:46:35.091 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:46:35.091 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:46:35.433 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:46:35.908 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:46:36.092 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:46:36.092 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:46:36.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:46:36.092 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:46:36.385 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:46:36.861 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:46:37.092 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:46:37.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:46:37.093 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:46:37.093 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:46:37.336 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:46:37.812 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:46:38.289 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:46:38.766 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:46:39.244 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:46:39.720 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:46:40.193 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:46:40.665 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:46:41.140 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:46:41.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:46:41.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:46:41.533 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:46:41.533 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:46:41.533 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:46:41.533 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:46:41.534 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:46:41.534 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:46:41.534 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:46:41.535 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:46:41.535 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:46:41.535 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:46:41.535 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:46:46.539 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:46:46.539 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:46:46.540 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:46:46.540 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:46:46.541 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:46:46.542 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:46:46.551 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:46:46.553 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:46:46.553 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:46:46.554 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:46:46.554 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:46:46.558 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:46:46.559 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:46:46.559 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:46:46.559 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:46:46.560 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:46:46.560 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:46:46.561 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:46:46.561 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:46:46.564 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:46:46.564 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:46:46.564 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:46:46.564 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:46:46.565 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:46:46.565 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:46:46.565 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:46:46.565 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:46:46.568 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:46:46.569 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:46:46.569 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:46:46.569 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:46:46.569 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:46:46.569 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:46:46.569 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:46:46.569 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:46:46.574 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:46:46.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:46:46.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:46:46.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:46:46.575 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:46:46.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:46:46.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:46:46.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:46:46.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:46:46.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:46:46.575 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:46:46.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:46:46.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:46:46.576 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:46:46.576 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:46:46.576 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:46:46.576 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:46:46.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:46:46.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:46:46.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:46:46.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:46:46.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:46:46.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:46:46.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:46:46.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:46:46.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:46:46.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:46:46.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:46:46.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:46:46.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:46:46.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:46:46.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:46:46.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:46:46.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:46:46.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:46:46.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:46:46.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:46:46.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:46:46.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:46:46.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:46:46.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:46:46.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:46:46.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:46:46.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:46:46.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:46:46.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:46:46.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:46:46.581 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:46:47.065 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:46:47.097 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:46:47.098 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:46:47.100 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:46:47.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:46:47.103 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:46:47.103 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:46:47.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:46:47.544 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:46:47.579 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:46:47.580 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:46:47.580 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:46:47.580 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:46:48.020 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:46:48.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:46:48.105 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:46:48.105 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:46:48.106 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:46:48.106 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:46:48.497 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:46:48.581 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:46:48.581 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:46:48.581 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:46:48.582 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:46:48.975 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:46:49.453 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:46:49.582 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:46:49.582 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:46:49.582 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:46:49.582 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:46:49.932 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:46:50.410 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:46:50.582 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:46:50.582 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:46:50.583 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:46:50.583 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:46:50.887 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:46:51.364 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:46:51.583 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:46:51.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:46:51.585 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:46:51.585 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:46:51.838 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:46:52.309 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:46:52.785 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:46:53.263 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:46:53.736 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:46:54.208 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:46:54.682 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:46:55.157 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:46:55.631 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:46:56.104 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:46:56.576 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:46:57.052 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:46:57.530 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:46:58.008 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:46:58.484 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:46:58.961 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:46:59.438 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:46:59.917 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:46:59.951 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:46:59.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:46:59.954 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:46:59.954 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:46:59.954 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:46:59.954 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:46:59.955 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:46:59.955 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:46:59.955 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:46:59.955 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:46:59.955 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:46:59.955 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:46:59.955 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:47:04.960 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:47:04.960 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:47:04.961 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:47:04.961 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:47:04.962 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:47:04.963 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:47:04.975 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:47:04.976 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:47:04.976 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:47:04.977 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:47:04.977 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:47:04.979 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:47:04.979 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:47:04.980 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:47:04.980 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:47:04.980 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:47:04.980 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:47:04.980 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:47:04.980 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:47:04.982 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:47:04.982 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:47:04.982 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:47:04.982 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:47:04.982 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:47:04.983 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:47:04.983 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:47:04.983 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:47:04.985 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:47:04.985 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:47:04.985 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:47:04.985 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:47:04.985 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:47:04.985 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:47:04.985 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:47:04.985 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:47:04.988 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:47:04.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:47:04.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:47:04.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:47:04.988 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:47:04.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:47:04.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:47:04.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:47:04.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:04.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:47:04.988 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:47:04.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:04.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:04.988 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:47:04.988 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:47:04.989 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:47:04.989 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:47:04.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:04.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:04.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:04.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:47:04.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:04.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:04.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:04.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:04.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:04.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:04.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:04.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:04.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:04.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:04.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:04.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:04.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:04.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:04.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:04.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:04.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:04.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:04.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:04.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:04.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:04.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:04.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:04.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:04.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:04.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:04.993 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:47:05.470 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:47:05.504 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:47:05.505 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:47:05.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:05.506 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:47:05.507 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:05.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:05.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:47:05.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:05.507 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:47:05.507 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:47:05.507 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:47:05.507 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:47:05.947 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:47:05.991 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:47:05.991 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:47:05.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:47:05.991 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:47:06.425 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:47:06.513 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:47:06.903 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:47:06.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:47:06.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:47:06.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:47:06.992 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:47:07.021 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:47:07.380 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:47:07.527 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:47:07.858 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:47:07.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:47:07.993 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:47:07.993 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:47:07.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:47:08.336 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:47:08.813 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:47:08.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:47:08.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:47:08.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:47:08.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:47:09.291 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:47:09.558 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:47:09.769 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:47:09.995 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:47:09.995 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:47:09.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:47:09.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:47:10.067 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:47:10.247 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:47:10.574 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:47:10.725 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:47:11.084 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:47:11.202 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:47:11.680 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:47:12.158 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:47:12.636 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:47:13.092 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:47:13.113 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:47:13.591 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:47:14.069 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:47:14.547 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:47:15.025 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:47:15.107 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:15.107 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:15.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:47:15.113 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:47:15.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:47:15.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:47:15.114 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:47:15.114 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:47:15.114 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:47:15.115 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:47:15.115 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:47:15.115 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:47:15.115 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:47:15.115 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2163 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:47:20.120 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:47:20.120 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:47:20.122 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:47:20.122 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:47:20.123 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:47:20.123 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:47:20.132 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:47:20.134 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:47:20.134 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:47:20.135 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:47:20.135 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:47:20.141 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:47:20.141 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:47:20.141 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:47:20.141 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:47:20.142 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:47:20.142 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:47:20.142 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:47:20.142 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:47:20.145 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:47:20.145 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:47:20.145 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:47:20.145 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:47:20.146 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:47:20.146 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:47:20.146 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:47:20.146 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:47:20.149 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:47:20.149 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:47:20.149 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:47:20.149 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:47:20.149 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:47:20.150 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:47:20.150 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:47:20.150 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:47:20.154 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:47:20.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:47:20.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:47:20.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:47:20.154 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:47:20.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:47:20.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:47:20.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:47:20.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:47:20.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:20.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:20.155 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:47:20.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:20.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:20.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:20.155 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:47:20.155 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:47:20.155 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:47:20.155 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:47:20.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:20.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:20.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:20.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:47:20.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:20.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:20.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:20.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:20.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:20.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:20.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:20.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:20.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:20.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:20.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:20.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:20.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:20.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:20.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:20.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:20.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:20.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:20.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:20.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:20.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:20.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:20.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:20.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:20.160 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:47:20.644 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:47:20.675 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:47:20.677 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:47:20.678 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:47:20.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:20.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:20.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:20.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:47:20.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:20.697 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:47:20.697 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:47:20.697 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:47:20.697 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:47:20.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:47:20.747 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:47:20.747 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:47:20.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:20.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:20.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:20.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:20.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:20.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:20.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:20.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:20.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:20.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:47:20.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:20.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:47:20.835 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:47:20.835 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:47:20.835 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:47:20.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:47:20.889 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:47:20.889 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:47:20.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:20.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:21.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:21.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.070 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:21.070 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:21.089 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:21.089 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:21.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:47:21.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.091 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:47:21.091 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:47:21.091 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:47:21.091 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:47:21.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:47:21.121 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:47:21.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:47:21.124 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:47:21.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:47:21.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:47:21.159 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:47:21.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:47:21.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:21.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:21.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.339 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:21.339 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:21.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:21.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:21.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:47:21.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.358 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:47:21.358 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:47:21.358 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:47:21.358 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:47:21.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:47:21.413 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:47:21.414 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:47:21.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:21.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:21.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.588 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:21.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:21.599 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:47:21.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:21.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:21.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:47:21.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.605 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:47:21.605 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:47:21.605 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:47:21.605 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:47:21.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:47:21.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:47:21.655 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:47:21.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:21.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:21.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:21.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:21.676 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:21.676 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:21.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:47:21.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.678 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:47:21.678 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:47:21.678 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:47:21.678 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:47:21.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:47:21.691 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:47:21.691 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-12-15 04:47:21.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:21.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:21.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.695 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:21.695 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:21.695 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:47:21.707 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:21.707 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:21.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:47:21.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.709 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:47:21.709 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:47:21.709 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:47:21.709 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:47:21.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:47:21.745 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:47:21.745 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2025-12-15 04:47:21.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:21.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:21.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.756 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:21.756 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:21.757 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:47:21.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:21.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:21.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:47:21.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.771 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:47:21.771 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:47:21.771 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:47:21.771 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:47:21.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:21.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:47:21.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:47:21.783 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:47:21.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:21.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:21.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.787 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:21.787 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:21.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:21.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:21.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:47:21.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.800 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:47:21.801 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:47:21.801 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:47:21.801 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:47:21.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:47:21.841 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:47:21.842 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:47:21.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:21.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:21.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.858 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:21.858 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:21.875 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:21.875 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:21.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:47:21.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.877 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:47:21.877 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:47:21.877 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:47:21.877 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:47:21.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:21.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:47:21.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:47:21.936 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:47:21.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:21.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:21.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:21.946 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:21.961 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:21.961 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:21.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:47:21.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.962 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:47:21.962 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:47:21.962 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:47:21.962 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:47:21.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:47:21.971 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:47:21.971 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 04:47:21.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:21.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:21.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:21.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:21.982 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:47:21.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:21.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:21.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:47:21.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:21.995 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:47:21.995 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:47:21.995 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:47:21.995 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:47:22.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:47:22.024 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:47:22.024 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 04:47:22.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:22.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:22.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:22.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:22.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:22.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:22.050 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:22.051 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:47:22.067 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:22.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:22.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:47:22.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:22.068 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:47:22.068 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:47:22.068 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:47:22.068 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:47:22.071 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:47:22.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:47:22.119 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:47:22.119 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:47:22.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:22.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:22.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:22.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:22.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:22.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:22.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:22.139 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:47:22.157 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:22.157 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:22.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:47:22.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:22.159 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:47:22.159 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:47:22.159 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:47:22.159 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:47:22.160 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:47:22.160 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:47:22.160 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:47:22.160 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:47:22.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:47:22.217 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:47:22.217 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:47:22.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:22.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:22.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:22.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:22.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:22.394 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:22.394 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:22.394 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:47:22.410 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:22.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:22.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:47:22.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:22.412 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:47:22.412 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:47:22.412 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:47:22.412 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:47:22.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:47:22.451 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:47:22.452 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:47:22.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:22.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:22.546 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:47:22.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:22.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:22.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:22.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:22.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:22.663 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:47:22.682 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:22.682 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:22.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:47:22.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:22.683 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:47:22.683 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:47:22.683 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:47:22.683 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:47:22.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:47:22.742 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:47:22.742 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:47:22.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:22.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:22.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:22.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:22.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:22.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:22.907 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:22.908 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:47:22.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:22.927 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:22.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:47:22.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:22.928 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:47:22.928 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:47:22.928 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:47:22.928 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:47:22.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:47:22.974 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:47:22.974 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:47:22.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:22.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:23.024 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:47:23.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:23.160 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:47:23.161 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:47:23.161 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:47:23.161 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:47:23.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:23.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:23.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:23.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:23.169 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:47:23.186 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:23.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:23.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:47:23.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:23.188 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:47:23.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:47:23.188 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:47:23.188 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:47:23.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:47:23.220 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:47:23.220 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:47:23.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:23.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:23.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:23.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:23.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:23.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:23.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:23.421 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:47:23.430 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:23.430 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:23.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:47:23.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:23.432 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:47:23.432 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:47:23.432 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:47:23.432 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:47:23.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:47:23.443 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:47:23.443 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:47:23.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:23.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:23.500 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:47:23.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:23.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:23.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:23.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:23.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:23.691 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:47:23.710 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:23.710 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:23.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:47:23.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:23.711 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:47:23.711 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:47:23.712 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:47:23.712 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:47:23.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:47:23.743 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:47:23.743 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:47:23.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:23.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:23.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:23.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:23.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:23.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:23.935 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:23.935 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:47:23.939 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:47:23.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:47:23.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:47:23.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:47:23.941 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:47:23.941 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:47:23.941 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:47:23.941 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:47:23.941 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:47:23.941 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:47:23.941 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:47:28.946 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:47:28.946 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:47:28.947 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:47:28.948 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:47:28.949 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:47:28.949 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:47:28.958 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:47:28.959 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:47:28.960 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:47:28.960 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:47:28.960 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:47:28.963 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:47:28.963 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:47:28.963 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:47:28.963 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:47:28.964 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:47:28.964 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:47:28.964 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:47:28.964 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:47:28.966 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:47:28.967 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:47:28.967 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:47:28.967 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:47:28.967 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:47:28.967 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:47:28.968 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:47:28.968 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:47:28.970 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:47:28.970 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:47:28.970 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:47:28.970 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:47:28.970 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:47:28.970 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:47:28.970 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:47:28.970 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:47:28.974 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:47:28.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:47:28.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:47:28.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:47:28.974 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:47:28.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:47:28.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:47:28.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:47:28.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:28.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:47:28.975 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:47:28.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:28.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:28.975 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:47:28.975 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:47:28.975 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:47:28.975 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:47:28.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:28.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:28.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:28.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:47:28.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:28.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:28.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:28.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:28.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:28.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:28.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:28.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:28.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:28.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:28.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:28.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:28.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:28.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:28.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:28.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:28.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:28.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:28.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:28.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:28.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:28.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:28.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:28.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:28.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:28.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:28.980 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:47:29.465 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:47:29.495 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:47:29.496 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:47:29.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:29.498 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:47:29.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:29.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:29.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:47:29.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:29.528 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:47:29.528 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:47:29.528 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:47:29.528 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:47:29.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 04:47:29.563 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:47:29.564 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:47:29.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:29.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:47:29.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:29.942 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:47:29.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:47:29.978 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:47:29.979 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:47:29.979 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:47:30.420 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:47:30.899 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:47:30.979 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:47:30.979 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:47:30.979 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:47:30.979 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:47:31.377 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:47:31.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:47:31.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:47:31.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:47:31.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:47:31.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:47:31.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:47:31.615 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:47:31.615 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:47:31.615 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:47:31.615 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:47:31.615 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:47:31.615 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:47:31.615 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:47:36.619 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:47:36.620 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:47:36.627 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:47:36.630 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:47:36.631 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:47:36.633 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:47:36.642 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:47:36.644 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:47:36.644 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:47:36.644 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:47:36.644 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:47:36.648 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:47:36.648 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:47:36.649 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:47:36.649 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:47:36.649 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:47:36.649 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:47:36.649 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:47:36.649 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:47:36.653 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:47:36.653 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:47:36.654 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:47:36.654 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:47:36.654 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:47:36.654 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:47:36.654 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:47:36.654 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:47:36.658 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:47:36.658 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:47:36.658 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:47:36.658 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:47:36.658 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:47:36.658 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:47:36.659 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:47:36.659 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:47:36.663 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:47:36.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:47:36.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:47:36.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:47:36.664 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:47:36.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:47:36.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:47:36.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:47:36.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:36.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:47:36.664 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:47:36.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:36.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:36.664 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:47:36.664 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:47:36.664 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:47:36.664 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:47:36.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:36.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:36.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:36.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:47:36.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:36.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:36.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:36.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:36.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:36.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:36.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:36.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:36.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:36.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:36.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:36.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:36.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:36.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:36.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:36.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:36.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:36.666 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:47:36.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:36.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:36.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:36.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:36.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:36.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:36.666 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:47:36.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:36.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:36.666 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:47:36.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:36.667 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:47:36.667 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:47:36.667 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:47:36.667 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:47:41.672 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:47:41.672 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:47:41.677 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:47:41.681 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:47:41.684 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:47:41.687 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:47:41.697 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:47:41.699 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:47:41.699 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:47:41.699 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:47:41.699 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:47:41.707 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:47:41.707 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:47:41.708 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:47:41.708 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:47:41.708 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:47:41.708 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:47:41.709 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:47:41.709 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:47:41.711 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:47:41.711 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:47:41.712 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:47:41.712 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:47:41.712 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:47:41.712 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:47:41.712 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:47:41.713 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:47:41.715 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:47:41.715 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:47:41.715 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:47:41.715 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:47:41.716 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:47:41.716 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:47:41.716 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:47:41.716 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:47:41.720 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:47:41.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:47:41.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:47:41.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:47:41.721 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:47:41.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:47:41.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:47:41.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:47:41.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:47:41.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:41.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:41.721 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:47:41.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:41.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:41.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:41.721 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:47:41.721 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:47:41.721 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:47:41.722 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:47:41.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:41.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:41.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:41.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:47:41.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:41.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:41.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:41.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:41.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:41.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:41.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:41.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:41.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:41.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:41.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:41.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:41.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:41.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:41.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:41.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:41.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:41.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:41.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:41.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:41.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:41.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:41.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:41.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:41.726 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:47:42.206 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:47:42.251 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:47:42.253 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:47:42.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:42.255 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:47:42.685 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:47:42.726 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:47:42.726 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:47:42.727 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:47:42.727 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:47:43.163 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:47:43.642 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:47:43.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:47:43.727 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:47:43.728 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:47:43.728 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:47:44.120 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:47:44.600 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:47:44.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:47:44.729 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:47:44.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:47:44.729 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:47:45.077 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:47:45.556 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:47:45.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:47:45.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:47:45.730 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:47:45.730 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:47:46.034 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:47:46.512 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:47:46.731 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:47:46.732 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:47:46.732 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:47:46.732 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:47:46.990 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:47:47.468 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:47:47.749 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:47:47.749 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:47:47.749 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:47:47.749 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:47:47.750 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:47:47.750 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:47:47.750 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:47:47.750 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:47:47.750 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:47:47.750 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:47:47.750 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:47:52.754 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:47:52.754 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:47:52.755 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:47:52.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:47:52.756 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:47:52.757 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:47:52.765 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:47:52.766 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:47:52.766 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:47:52.766 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:47:52.766 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:47:52.768 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:47:52.768 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:47:52.768 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:47:52.768 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:47:52.768 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:47:52.768 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:47:52.768 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:47:52.768 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:47:52.770 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:47:52.770 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:47:52.771 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:47:52.771 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:47:52.771 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:47:52.771 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:47:52.771 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:47:52.771 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:47:52.773 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:47:52.773 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:47:52.773 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:47:52.773 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:47:52.773 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:47:52.773 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:47:52.773 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:47:52.773 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:47:52.776 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:47:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:47:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:47:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:47:52.776 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:47:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:47:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:47:52.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:47:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:47:52.776 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:47:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:52.776 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:47:52.776 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:47:52.776 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:47:52.776 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:47:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:52.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:47:52.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:52.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:52.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:52.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:52.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:52.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:52.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:52.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:52.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:52.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:52.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:52.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:52.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:52.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:52.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:52.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:52.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:47:52.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:52.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:52.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:52.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:52.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:52.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:47:52.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:47:52.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:52.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:47:52.781 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:47:53.261 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:47:53.294 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:47:53.295 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:47:53.297 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:47:53.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:47:53.738 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:47:53.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:47:53.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:47:53.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:47:53.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:47:54.218 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:47:54.696 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:47:54.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:47:54.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:47:54.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:47:54.782 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:47:55.174 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:47:55.652 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:47:55.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:47:55.783 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:47:55.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:47:55.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:47:56.131 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:47:56.610 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:47:56.784 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:47:56.784 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:47:56.784 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:47:56.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:47:57.088 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:47:57.566 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:47:57.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:47:57.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:47:57.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:47:57.786 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:47:58.044 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:47:58.308 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:47:58.308 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:47:58.308 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:47:58.308 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:47:58.309 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:47:58.309 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:47:58.309 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:47:58.309 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:47:58.309 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:47:58.309 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:47:58.309 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:47:58.309 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1181 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:48:03.314 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:48:03.314 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:48:03.315 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:48:03.316 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:48:03.316 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:48:03.317 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:48:03.325 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:48:03.326 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:48:03.326 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:48:03.327 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:48:03.327 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:48:03.329 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:48:03.330 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:48:03.330 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:48:03.330 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:48:03.330 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:48:03.330 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:48:03.331 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:48:03.331 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:48:03.332 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:48:03.332 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:48:03.333 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:48:03.333 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:48:03.333 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:48:03.333 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:48:03.333 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:48:03.333 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:48:03.335 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:48:03.335 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:48:03.335 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:48:03.335 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:48:03.335 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:48:03.335 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:48:03.335 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:48:03.335 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:48:03.338 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:48:03.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:48:03.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:48:03.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:48:03.338 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:48:03.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:48:03.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:48:03.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:48:03.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:03.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:48:03.338 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:48:03.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:03.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:03.338 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:48:03.338 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:48:03.338 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:48:03.338 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:48:03.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:03.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:03.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:03.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:48:03.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:03.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:03.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:03.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:03.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:03.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:03.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:03.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:03.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:03.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:03.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:03.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:03.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:03.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:03.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:03.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:03.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:03.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:03.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:03.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:03.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:03.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:03.340 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:48:03.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:03.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:03.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:03.340 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:48:03.340 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:48:03.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:03.340 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:48:03.340 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:48:03.340 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:48:03.340 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:48:08.346 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:48:08.346 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:48:08.347 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:48:08.348 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:48:08.348 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:48:08.349 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:48:08.359 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:48:08.360 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:48:08.360 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:48:08.360 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:48:08.360 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:48:08.367 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:48:08.367 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:48:08.367 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:48:08.367 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:48:08.368 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:48:08.368 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:48:08.368 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:48:08.368 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:48:08.372 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:48:08.372 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:48:08.372 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:48:08.372 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:48:08.372 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:48:08.373 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:48:08.373 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:48:08.373 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:48:08.377 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:48:08.377 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:48:08.377 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:48:08.377 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:48:08.377 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:48:08.377 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:48:08.377 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:48:08.377 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:48:08.383 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:48:08.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:48:08.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:48:08.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:48:08.383 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:48:08.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:48:08.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:48:08.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:48:08.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:48:08.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:08.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:08.384 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:48:08.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:08.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:08.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:08.384 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:48:08.384 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:48:08.384 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:48:08.384 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:48:08.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:08.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:08.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:08.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:48:08.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:08.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:08.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:08.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:08.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:08.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:08.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:08.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:08.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:08.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:08.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:08.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:08.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:08.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:08.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:08.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:08.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:08.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:08.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:08.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:08.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:08.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:08.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:08.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:08.389 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:48:08.866 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:48:08.899 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:48:08.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:48:08.901 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:48:08.902 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:48:08.904 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:48:08.904 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:48:08.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:48:09.341 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:48:09.387 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:48:09.388 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:48:09.388 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:48:09.389 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:48:09.817 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:48:09.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:48:09.906 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:48:09.906 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:48:09.907 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:48:09.907 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:48:10.293 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:48:10.388 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:48:10.388 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:48:10.390 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:48:10.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:48:10.772 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:48:11.248 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:48:11.389 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:48:11.389 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:48:11.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:48:11.390 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:48:11.724 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:48:12.201 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:48:12.390 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:48:12.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:48:12.391 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:48:12.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:48:12.677 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:48:13.150 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:48:13.391 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:48:13.391 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:48:13.391 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:48:13.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:48:13.623 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:48:14.098 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:48:14.573 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:48:15.051 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:48:15.530 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:48:16.005 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:48:16.480 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:48:16.957 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:48:17.433 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:48:17.911 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:48:18.387 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:48:18.860 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:48:19.338 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:48:19.816 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:48:20.290 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:48:20.768 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:48:21.245 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:48:21.723 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:48:22.200 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:48:22.677 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:48:23.155 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:48:23.633 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:48:23.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:48:23.784 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:48:23.788 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:48:23.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:48:23.788 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:48:23.788 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:48:23.789 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:48:23.789 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:48:23.789 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:48:23.789 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:48:23.789 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:48:23.789 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:48:23.789 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:48:28.794 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:48:28.794 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:48:28.795 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:48:28.796 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:48:28.797 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:48:28.798 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:48:28.807 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:48:28.808 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:48:28.808 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:48:28.808 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:48:28.808 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:48:28.811 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:48:28.812 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:48:28.812 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:48:28.812 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:48:28.812 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:48:28.813 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:48:28.813 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:48:28.813 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:48:28.815 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:48:28.815 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:48:28.815 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:48:28.815 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:48:28.816 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:48:28.816 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:48:28.816 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:48:28.816 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:48:28.818 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:48:28.818 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:48:28.818 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:48:28.818 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:48:28.819 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:48:28.819 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:48:28.819 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:48:28.819 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:48:28.822 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:48:28.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:48:28.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:48:28.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:48:28.822 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:48:28.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:48:28.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:48:28.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:48:28.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:28.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:48:28.823 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:48:28.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:28.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:28.823 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:48:28.823 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:48:28.823 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:48:28.823 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:48:28.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:28.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:28.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:28.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:48:28.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:28.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:28.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:28.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:28.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:28.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:28.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:28.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:28.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:28.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:28.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:28.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:28.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:28.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:28.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:28.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:28.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:28.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:28.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:28.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:28.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:28.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:28.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:28.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:28.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:28.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:28.828 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:48:29.310 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:48:29.342 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:48:29.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:48:29.344 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:48:29.345 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:48:29.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:48:29.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:48:29.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:48:29.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:48:29.372 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:48:29.372 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:48:29.372 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:48:29.372 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:48:29.403 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:48:29.406 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:48:29.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:48:29.411 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:48:29.411 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:48:29.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:48:29.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:48:29.788 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:48:29.825 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:48:29.826 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:48:29.826 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:48:29.826 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:48:30.267 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:48:30.745 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:48:30.827 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:48:30.827 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:48:30.827 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:48:30.828 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:48:31.223 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:48:31.702 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:48:31.828 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:48:31.828 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:48:31.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:48:31.828 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:48:32.179 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:48:32.657 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:48:32.829 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:48:32.830 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:48:32.830 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:48:32.830 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:48:33.136 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:48:33.615 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:48:33.830 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:48:33.830 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:48:33.830 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:48:33.830 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:48:34.093 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:48:34.571 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:48:35.049 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:48:35.528 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:48:36.006 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:48:36.485 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:48:36.963 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:48:37.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:48:37.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:48:37.418 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:48:37.418 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:48:37.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:48:37.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:48:37.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:48:37.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:48:37.431 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:48:37.431 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:48:37.431 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:48:37.431 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:48:37.431 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:48:37.431 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:48:37.431 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:48:37.431 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1837 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:48:37.431 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1837 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:48:37.431 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1837 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:48:37.431 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1837 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:48:37.431 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1837 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:48:37.431 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1837 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:48:42.438 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:48:42.438 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:48:42.442 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:48:42.446 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:48:42.449 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:48:42.451 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:48:42.462 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:48:42.463 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:48:42.463 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:48:42.463 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:48:42.463 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:48:42.467 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:48:42.467 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:48:42.467 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:48:42.467 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:48:42.467 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:48:42.468 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:48:42.468 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:48:42.468 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:48:42.470 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:48:42.470 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:48:42.470 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:48:42.470 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:48:42.470 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:48:42.470 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:48:42.470 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:48:42.470 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:48:42.473 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:48:42.473 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:48:42.473 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:48:42.473 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:48:42.473 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:48:42.473 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:48:42.473 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:48:42.473 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:48:42.476 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:48:42.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:48:42.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:48:42.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:48:42.476 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:48:42.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:48:42.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:48:42.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:48:42.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:42.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:48:42.477 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:48:42.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:42.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:42.477 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:48:42.477 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:48:42.477 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:48:42.477 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:48:42.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:42.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:42.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:42.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:48:42.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:42.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:42.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:42.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:42.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:42.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:42.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:42.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:42.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:42.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:42.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:42.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:42.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:42.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:42.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:42.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:42.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:42.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:42.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:42.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:42.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:42.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:42.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:42.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:42.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:42.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:42.482 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:48:42.964 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:48:42.997 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:48:42.998 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:48:42.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:48:42.999 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:48:43.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:48:43.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:48:43.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:48:43.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:48:43.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:48:43.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:48:43.016 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:48:43.016 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:48:43.056 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:48:43.059 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:48:43.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:48:43.074 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:48:43.074 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:48:43.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:48:43.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:48:43.440 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:48:43.480 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:48:43.480 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:48:43.480 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:48:43.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:48:43.919 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:48:43.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:48:43.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:48:43.941 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:48:43.941 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:48:43.941 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:48:43.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:48:43.942 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:48:43.942 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:48:43.942 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:48:43.942 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:48:43.942 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:48:43.942 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:48:43.942 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:48:43.942 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=313 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:48:43.942 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=313 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:48:43.942 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=313 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:48:43.942 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=313 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:48:43.942 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=313 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:48:43.942 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=313 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:48:43.942 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=313 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:48:43.942 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=313 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:48:48.949 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:48:48.949 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:48:48.950 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:48:48.951 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:48:48.951 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:48:48.952 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:48:48.960 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:48:48.962 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:48:48.962 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:48:48.963 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:48:48.963 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:48:48.967 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:48:48.968 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:48:48.968 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:48:48.968 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:48:48.969 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:48:48.969 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:48:48.969 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:48:48.970 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:48:48.972 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:48:48.973 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:48:48.973 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:48:48.973 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:48:48.973 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:48:48.973 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:48:48.973 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:48:48.974 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:48:48.976 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:48:48.976 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:48:48.976 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:48:48.976 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:48:48.977 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:48:48.977 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:48:48.977 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:48:48.977 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:48:48.980 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:48:48.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:48:48.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:48:48.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:48:48.980 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:48:48.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:48:48.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:48:48.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:48:48.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:48.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:48:48.981 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:48:48.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:48.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:48.981 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:48:48.981 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:48:48.981 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:48:48.981 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:48:48.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:48.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:48.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:48.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:48:48.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:48.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:48.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:48.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:48.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:48.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:48.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:48.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:48.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:48.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:48.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:48.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:48.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:48.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:48.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:48.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:48.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:48.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:48.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:48.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:48.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:48.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:48.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:48.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:48.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:48.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:48.986 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:48:49.470 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:48:49.499 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:48:49.499 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:48:49.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:48:49.499 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:48:49.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:48:49.510 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:48:49.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:48:49.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:48:49.516 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:48:49.516 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:48:49.516 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:48:49.516 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:48:49.562 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:48:49.566 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:48:49.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:48:49.580 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:48:49.581 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 04:48:49.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:48:49.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:48:49.947 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:48:49.984 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:48:49.984 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:48:49.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:48:49.985 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:48:50.426 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:48:50.629 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:48:50.629 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:48:50.629 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:48:50.635 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:48:50.635 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:48:50.636 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:48:50.636 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:48:50.640 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:48:50.640 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:48:50.641 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:48:50.641 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:48:50.641 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:48:50.641 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:48:50.641 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:48:55.640 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:48:55.641 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:48:55.642 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:48:55.643 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:48:55.643 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:48:55.644 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:48:55.653 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:48:55.653 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:48:55.653 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:48:55.653 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:48:55.653 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:48:55.656 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:48:55.656 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:48:55.657 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:48:55.657 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:48:55.657 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:48:55.657 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:48:55.657 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:48:55.657 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:48:55.662 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:48:55.662 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:48:55.662 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:48:55.662 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:48:55.662 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:48:55.662 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:48:55.663 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:48:55.663 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:48:55.666 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:48:55.666 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:48:55.666 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:48:55.666 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:48:55.666 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:48:55.666 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:48:55.666 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:48:55.667 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:48:55.671 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:48:55.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:48:55.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:48:55.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:48:55.671 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:48:55.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:48:55.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:48:55.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:48:55.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:55.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:48:55.672 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:48:55.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:55.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:55.672 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:48:55.672 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:48:55.672 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:48:55.672 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:48:55.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:55.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:55.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:55.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:48:55.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:55.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:55.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:55.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:55.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:55.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:55.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:55.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:55.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:55.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:55.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:55.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:55.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:55.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:55.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:55.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:55.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:55.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:48:55.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:55.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:55.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:55.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:55.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:48:55.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:48:55.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:55.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:48:55.677 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:48:56.158 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:48:56.187 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:48:56.188 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:48:56.188 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:48:56.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:48:56.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:48:56.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:48:56.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:48:56.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:48:56.195 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:48:56.195 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:48:56.195 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:48:56.195 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:48:56.201 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:48:56.203 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:48:56.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:48:56.235 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:48:56.235 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 04:48:56.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:48:56.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:48:56.635 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:48:56.677 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:48:56.677 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:48:56.677 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:48:56.677 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:48:57.114 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:48:57.316 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:48:57.316 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:48:57.316 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:48:57.321 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:48:57.321 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:48:57.321 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:48:57.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:48:57.326 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:48:57.327 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:48:57.327 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:48:57.327 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:48:57.327 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:48:57.327 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:48:57.327 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:48:57.327 [WARNING] transceiver.py:250 (TRX2@172.18.144.20:5700/2) RX TRXD message (ver=1 fn=353 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:48:57.328 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=353 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:48:57.328 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=353 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:48:57.328 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=353 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:48:57.328 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=353 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:48:57.328 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=353 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:48:57.328 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=353 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:48:57.328 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=354 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:48:57.328 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=354 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:48:57.328 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=354 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:48:57.329 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=354 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:48:57.329 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=354 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:48:57.329 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=354 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:48:57.329 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=354 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:48:57.329 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=354 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:49:02.326 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:49:02.326 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:49:02.330 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:49:02.334 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:49:02.337 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:49:02.339 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:49:02.347 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:49:02.348 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:49:02.349 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:49:02.349 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:49:02.349 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:49:02.352 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:49:02.352 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:49:02.352 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:49:02.353 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:49:02.353 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:49:02.353 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:49:02.353 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:49:02.353 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:49:02.358 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:49:02.358 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:49:02.358 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:49:02.358 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:49:02.358 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:49:02.359 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:49:02.359 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:49:02.359 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:49:02.362 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:49:02.362 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:49:02.362 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:49:02.362 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:49:02.362 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:49:02.362 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:49:02.362 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:49:02.362 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:49:02.366 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:49:02.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:49:02.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:49:02.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:49:02.366 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:49:02.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:49:02.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:49:02.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:49:02.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:49:02.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:49:02.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:49:02.367 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:49:02.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:49:02.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:49:02.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:49:02.367 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:49:02.367 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:49:02.367 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:49:02.367 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:49:02.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:49:02.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:49:02.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:49:02.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:49:02.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:49:02.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:49:02.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:49:02.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:49:02.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:49:02.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:49:02.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:49:02.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:49:02.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:49:02.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:49:02.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:49:02.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:49:02.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:49:02.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:49:02.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:49:02.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:49:02.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:49:02.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:49:02.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:49:02.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:49:02.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:49:02.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:49:02.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:49:02.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:49:02.372 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:49:02.855 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:49:02.890 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:49:02.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:49:02.893 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:49:02.895 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:49:02.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:49:02.912 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:49:02.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:49:02.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:49:02.918 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:49:02.918 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:49:02.918 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:49:02.918 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:49:02.947 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:49:02.950 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:49:02.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:49:02.963 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:49:02.963 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 04:49:02.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:49:02.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:49:03.332 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:49:03.371 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:49:03.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:49:03.371 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:49:03.371 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:49:03.811 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:49:04.014 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:49:04.014 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:49:04.014 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:49:04.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:49:04.017 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:49:04.017 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:49:04.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:49:04.018 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:49:04.018 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:49:04.018 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:49:04.018 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:49:04.018 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:49:04.018 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:49:04.018 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:49:09.023 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:49:09.023 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:49:09.028 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:49:09.032 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:49:09.036 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:49:09.037 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:49:09.048 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:49:09.049 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:49:09.049 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:49:09.050 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:49:09.050 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:49:09.055 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:49:09.055 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:49:09.055 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:49:09.055 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:49:09.056 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:49:09.056 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:49:09.056 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:49:09.056 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:49:09.059 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:49:09.060 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:49:09.060 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:49:09.060 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:49:09.060 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:49:09.060 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:49:09.060 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:49:09.060 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:49:09.063 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:49:09.064 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:49:09.064 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:49:09.064 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:49:09.064 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:49:09.064 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:49:09.064 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:49:09.064 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:49:09.068 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:49:09.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:49:09.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:49:09.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:49:09.068 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:49:09.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:49:09.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:49:09.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:49:09.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:49:09.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:49:09.069 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:49:09.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:49:09.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:49:09.069 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:49:09.069 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:49:09.069 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:49:09.069 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:49:09.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:49:09.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:49:09.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:49:09.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:49:09.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:49:09.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:49:09.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:49:09.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:49:09.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:49:09.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:49:09.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:49:09.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:49:09.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:49:09.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:49:09.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:49:09.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:49:09.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:49:09.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:49:09.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:49:09.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:49:09.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:49:09.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:49:09.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:49:09.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:49:09.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:49:09.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:49:09.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:49:09.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:49:09.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:49:09.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:49:09.074 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:49:09.558 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:49:09.591 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:49:09.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:49:09.593 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:49:09.594 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:49:09.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:49:09.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:49:09.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:49:09.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:49:09.613 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:49:09.613 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:49:09.613 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:49:09.613 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:49:09.650 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:49:09.654 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:49:09.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:49:09.667 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:49:09.667 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:49:09.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:49:09.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:49:10.036 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:49:10.072 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:49:10.072 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:49:10.073 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:49:10.073 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:49:10.514 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:49:10.538 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:49:10.538 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:49:10.542 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:49:10.542 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:49:10.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:49:10.542 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:49:10.543 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:49:10.543 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:49:10.543 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:49:10.543 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:49:10.543 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:49:10.543 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:49:10.543 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:49:15.548 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:49:15.548 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:49:15.549 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:49:15.549 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:49:15.550 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:49:15.551 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:49:15.559 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:49:15.561 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:49:15.561 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:49:15.561 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:49:15.561 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:49:15.564 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:49:15.565 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:49:15.565 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:49:15.565 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:49:15.565 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:49:15.566 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:49:15.566 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:49:15.566 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:49:15.568 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:49:15.568 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:49:15.568 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:49:15.568 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:49:15.568 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:49:15.568 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:49:15.568 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:49:15.569 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:49:15.571 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:49:15.571 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:49:15.571 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:49:15.571 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:49:15.571 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:49:15.571 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:49:15.571 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:49:15.571 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:49:15.575 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:49:15.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:49:15.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:49:15.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:49:15.575 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:49:15.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:49:15.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:49:15.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:49:15.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:49:15.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:49:15.575 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:49:15.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:49:15.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:49:15.575 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:49:15.575 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:49:15.575 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:49:15.576 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:49:15.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:49:15.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:49:15.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:49:15.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:49:15.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:49:15.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:49:15.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:49:15.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:49:15.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:49:15.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:49:15.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:49:15.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:49:15.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:49:15.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:49:15.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:49:15.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:49:15.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:49:15.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:49:15.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:49:15.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:49:15.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:49:15.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:49:15.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:49:15.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:49:15.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:49:15.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:49:15.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:49:15.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:49:15.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:49:15.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:49:15.580 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:49:16.060 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:49:16.098 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:49:16.099 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:49:16.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:49:16.101 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:49:16.117 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:49:16.117 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:49:16.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:49:16.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:49:16.124 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:49:16.124 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:49:16.124 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:49:16.124 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:49:16.152 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:49:16.156 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:49:16.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:49:16.169 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:49:16.169 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 04:49:16.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:49:16.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:49:16.534 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:49:16.578 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:49:16.578 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:49:16.579 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:49:16.579 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:49:17.012 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:49:17.213 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:49:17.213 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:49:17.214 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:49:17.217 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:49:17.217 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:49:17.217 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:49:17.217 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:49:17.218 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:49:17.219 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:49:17.219 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:49:17.219 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:49:17.219 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:49:17.219 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:49:17.219 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:49:17.219 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=352 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:49:17.219 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=352 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:49:22.224 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:49:22.224 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:49:22.228 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:49:22.232 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:49:22.235 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:49:22.237 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:49:22.245 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:49:22.246 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:49:22.246 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:49:22.247 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:49:22.247 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:49:22.249 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:49:22.249 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:49:22.249 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:49:22.249 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:49:22.250 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:49:22.250 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:49:22.250 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:49:22.250 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:49:22.252 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:49:22.252 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:49:22.252 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:49:22.252 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:49:22.252 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:49:22.252 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:49:22.252 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:49:22.252 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:49:22.254 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:49:22.255 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:49:22.255 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:49:22.255 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:49:22.255 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:49:22.255 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:49:22.255 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:49:22.255 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:49:22.258 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:49:22.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:49:22.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:49:22.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:49:22.258 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:49:22.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:49:22.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:49:22.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:49:22.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:49:22.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:49:22.258 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:49:22.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:49:22.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:49:22.258 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:49:22.258 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:49:22.258 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:49:22.258 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:49:22.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:49:22.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:49:22.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:49:22.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:49:22.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:49:22.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:49:22.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:49:22.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:49:22.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:49:22.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:49:22.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:49:22.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:49:22.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:49:22.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:49:22.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:49:22.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:49:22.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:49:22.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:49:22.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:49:22.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:49:22.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:49:22.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:49:22.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:49:22.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:49:22.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:49:22.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:49:22.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:49:22.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:49:22.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:49:22.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:49:22.263 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:49:22.744 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:49:22.772 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:49:22.773 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:49:22.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:49:22.773 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:49:22.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:49:22.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:49:22.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:49:22.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:49:22.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:49:22.783 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:49:22.783 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:49:22.783 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:49:22.788 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:49:22.790 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:49:22.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:49:22.823 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:49:22.824 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:49:22.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:49:22.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:49:23.222 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:49:23.262 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:49:23.262 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:49:23.262 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:49:23.262 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:49:23.699 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:49:24.177 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:49:24.263 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:49:24.264 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:49:24.264 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:49:24.264 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:49:24.655 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:49:25.133 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:49:25.264 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:49:25.264 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:49:25.265 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:49:25.265 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:49:25.611 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:49:26.089 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:49:26.265 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:49:26.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:49:26.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:49:26.266 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:49:26.568 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:49:27.045 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:49:27.267 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:49:27.267 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:49:27.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:49:27.267 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:49:27.519 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:49:27.997 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:49:28.476 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:49:28.953 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:49:29.431 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:49:29.909 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:49:30.388 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:49:30.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:49:30.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:49:30.829 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:49:30.829 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:49:30.838 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:49:30.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:49:30.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:49:30.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:49:30.839 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:49:30.839 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:49:30.839 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:49:30.839 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:49:30.856 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:49:30.858 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:49:30.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:49:30.865 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:49:30.868 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:49:30.868 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:49:30.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:49:30.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:49:31.342 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:49:31.821 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:49:32.299 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:49:32.776 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:49:33.255 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:49:33.732 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:49:34.211 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:49:34.689 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:49:35.166 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:49:35.644 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:49:36.122 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:49:36.601 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:49:37.079 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:49:37.557 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:49:38.034 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 04:49:38.512 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 04:49:38.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:49:38.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:49:38.874 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:49:38.875 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:49:38.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:49:38.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:49:38.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:49:38.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:49:38.894 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:49:38.894 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:49:38.894 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:49:38.894 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:49:38.932 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:49:38.934 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:49:38.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:49:38.939 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:49:38.940 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:49:38.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:49:38.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:49:38.989 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 04:49:39.466 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 04:49:39.945 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 04:49:40.422 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 04:49:40.900 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 04:49:41.378 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 04:49:41.857 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 04:49:42.334 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 04:49:42.812 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 04:49:43.289 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 04:49:43.767 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 04:49:44.245 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 04:49:44.723 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 04:49:45.202 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 04:49:45.680 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 04:49:46.158 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 04:49:46.636 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 04:49:46.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:49:46.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:49:46.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:49:46.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:49:46.953 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:49:46.953 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:49:46.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:49:46.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:49:46.955 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:49:46.955 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:49:46.955 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:49:46.955 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:49:46.960 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:49:46.961 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:49:46.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:49:46.965 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:49:46.965 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:49:46.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:49:46.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:49:47.113 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 04:49:47.591 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 04:49:48.070 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 04:49:48.548 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 04:49:49.026 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 04:49:49.504 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 04:49:49.982 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 04:49:50.460 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 04:49:50.937 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-15 04:49:51.415 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-15 04:49:51.893 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-15 04:49:52.371 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-15 04:49:52.849 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-15 04:49:53.327 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-15 04:49:53.805 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-15 04:49:54.283 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-15 04:49:54.761 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-15 04:49:54.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:49:54.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:49:54.970 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:49:54.971 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:49:54.978 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:49:54.978 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:49:54.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:49:54.978 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:49:54.979 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:49:54.979 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:49:54.979 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:49:54.979 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:49:54.979 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:49:54.979 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:49:54.979 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:49:54.979 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6985 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:49:54.979 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6985 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:49:54.979 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6985 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:49:54.979 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6985 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:49:54.979 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6985 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:49:54.979 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6985 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:49:54.979 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6985 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:49:54.979 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6985 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:49:59.984 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:49:59.984 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:49:59.986 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:49:59.987 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:49:59.988 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:49:59.988 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:50:00.004 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:50:00.005 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:50:00.005 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:50:00.005 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:50:00.006 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:50:00.009 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:50:00.009 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:50:00.010 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:50:00.010 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:50:00.010 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:50:00.010 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:50:00.011 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:50:00.011 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:50:00.013 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:50:00.014 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:50:00.014 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:50:00.014 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:50:00.014 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:50:00.014 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:50:00.014 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:50:00.014 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:50:00.017 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:50:00.017 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:50:00.017 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:50:00.017 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:50:00.017 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:50:00.017 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:50:00.017 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:50:00.017 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:50:00.021 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:50:00.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:50:00.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:50:00.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:50:00.021 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:50:00.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:50:00.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:50:00.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:50:00.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:00.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:50:00.021 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:50:00.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:00.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:00.021 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:50:00.021 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:50:00.021 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:50:00.021 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:50:00.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:00.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:00.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:00.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:50:00.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:00.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:00.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:00.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:00.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:00.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:00.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:00.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:00.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:00.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:00.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:00.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:00.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:00.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:00.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:00.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:00.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:00.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:00.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:00.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:00.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:00.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:00.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:00.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:00.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:00.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:00.026 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:50:00.509 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:50:00.544 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:50:00.545 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:50:00.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:50:00.547 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:50:00.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:50:00.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:50:00.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:50:00.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:50:00.576 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:50:00.576 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:50:00.576 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:50:00.576 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:50:00.601 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:50:00.605 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:50:00.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:50:00.617 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:50:00.617 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:50:00.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:50:00.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:50:00.987 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:50:01.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:50:01.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:50:01.025 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:50:01.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:50:01.463 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:50:01.932 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:50:02.025 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:50:02.025 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:50:02.025 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:50:02.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:50:02.400 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:50:02.870 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:50:03.026 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:50:03.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:50:03.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:50:03.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:50:03.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:50:03.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:50:03.096 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:50:03.098 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:50:03.098 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:50:03.098 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:50:03.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:50:03.099 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:50:03.099 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:50:03.099 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:50:03.099 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:50:03.099 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:50:03.099 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:50:03.099 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:50:03.099 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=664 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:50:03.099 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=664 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:50:03.099 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=664 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:50:08.100 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:50:08.100 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:50:08.100 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:50:08.101 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:50:08.102 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:50:08.103 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:50:08.108 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:50:08.108 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:50:08.108 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:50:08.108 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:50:08.108 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:50:08.110 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:50:08.110 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:50:08.110 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:50:08.110 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:50:08.110 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:50:08.110 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:50:08.110 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:50:08.111 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:50:08.113 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:50:08.113 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:50:08.113 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:50:08.113 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:50:08.114 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:50:08.114 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:50:08.114 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:50:08.114 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:50:08.115 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:50:08.115 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:50:08.115 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:50:08.115 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:50:08.115 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:50:08.115 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:50:08.115 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:50:08.115 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:50:08.118 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:50:08.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:50:08.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:50:08.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:50:08.118 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:50:08.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:50:08.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:50:08.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:50:08.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:50:08.118 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:50:08.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:08.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:08.118 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:50:08.118 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:50:08.118 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:50:08.118 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:50:08.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:08.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:08.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:08.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:50:08.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:08.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:08.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:08.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:08.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:08.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:08.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:08.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:08.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:08.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:08.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:08.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:08.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:08.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:08.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:08.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:08.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:08.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:08.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:08.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:08.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:08.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:08.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:08.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:08.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:08.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:08.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:08.123 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:50:08.591 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:50:08.640 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:50:08.642 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:50:08.643 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:50:08.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:50:08.658 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:50:08.658 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:50:08.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:50:08.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:50:08.662 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:50:08.662 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:50:08.663 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:50:08.663 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:50:08.683 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:50:08.687 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:50:08.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:50:08.701 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:50:08.701 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 04:50:08.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:50:08.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:50:09.063 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:50:09.121 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:50:09.121 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:50:09.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:50:09.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:50:09.536 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:50:09.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:50:09.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:50:09.734 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:50:09.740 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:50:09.740 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:50:09.740 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:50:09.740 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:50:09.746 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:50:09.746 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:50:09.746 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:50:09.747 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:50:09.747 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:50:09.747 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:50:09.747 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:50:09.747 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=352 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:50:09.747 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=352 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:50:09.748 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=352 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:50:09.748 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=352 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:50:09.748 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=352 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:50:09.748 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=352 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:50:09.748 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=353 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:50:09.748 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=353 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:50:09.748 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=353 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:50:09.748 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=353 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:50:09.748 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=353 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:50:09.748 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=353 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:50:09.748 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=353 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:50:09.749 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=353 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:50:09.749 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=354 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:50:09.749 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=354 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:50:09.749 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=354 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:50:09.749 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=354 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:50:09.749 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=354 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:50:09.749 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=354 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:50:09.749 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=354 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:50:09.749 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=354 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:50:14.746 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:50:14.747 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:50:14.751 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:50:14.754 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:50:14.756 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:50:14.758 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:50:14.767 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:50:14.768 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:50:14.768 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:50:14.768 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:50:14.768 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:50:14.770 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:50:14.770 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:50:14.770 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:50:14.770 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:50:14.770 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:50:14.771 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:50:14.771 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:50:14.771 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:50:14.772 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:50:14.772 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:50:14.773 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:50:14.773 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:50:14.773 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:50:14.773 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:50:14.773 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:50:14.773 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:50:14.774 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:50:14.774 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:50:14.774 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:50:14.774 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:50:14.774 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:50:14.774 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:50:14.775 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:50:14.775 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:50:14.777 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:50:14.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:50:14.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:50:14.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:50:14.777 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:50:14.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:50:14.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:50:14.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:50:14.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:14.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:50:14.778 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:50:14.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:14.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:14.778 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:50:14.778 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:50:14.778 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:50:14.778 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:50:14.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:14.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:14.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:14.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:50:14.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:14.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:14.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:14.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:14.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:14.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:14.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:14.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:14.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:14.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:14.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:14.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:14.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:14.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:14.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:14.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:14.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:14.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:14.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:14.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:14.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:14.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:14.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:14.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:14.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:14.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:14.782 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:50:15.255 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:50:15.289 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:50:15.290 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:50:15.290 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:50:15.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:50:15.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:50:15.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:50:15.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:50:15.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:50:15.297 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:50:15.297 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:50:15.297 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:50:15.297 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:50:15.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:50:15.353 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:50:15.353 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:50:15.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:50:15.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:50:15.726 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:50:15.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:50:15.781 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:50:15.781 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:50:15.781 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:50:16.198 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:50:16.671 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:50:16.782 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:50:16.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:50:16.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:50:16.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:50:17.141 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:50:17.611 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:50:17.782 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:50:17.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:50:17.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:50:17.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:50:18.082 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:50:18.557 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:50:18.783 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:50:18.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:50:18.784 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:50:18.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:50:19.031 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:50:19.500 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:50:19.785 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:50:19.785 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:50:19.785 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:50:19.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:50:19.971 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:50:20.440 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:50:20.914 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:50:21.385 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:50:21.854 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:50:22.325 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:50:22.795 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:50:23.262 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:50:23.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:50:23.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:50:23.357 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:50:23.357 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:50:23.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:50:23.361 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:50:23.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:50:23.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:50:23.363 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:50:23.363 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:50:23.363 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:50:23.363 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:50:23.363 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:50:23.363 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:50:23.363 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:50:28.367 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:50:28.367 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:50:28.369 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:50:28.370 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:50:28.370 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:50:28.371 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:50:28.380 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:50:28.382 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:50:28.382 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:50:28.383 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:50:28.383 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:50:28.389 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:50:28.389 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:50:28.390 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:50:28.390 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:50:28.390 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:50:28.390 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:50:28.391 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:50:28.391 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:50:28.395 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:50:28.395 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:50:28.395 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:50:28.395 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:50:28.395 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:50:28.395 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:50:28.395 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:50:28.395 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:50:28.399 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:50:28.399 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:50:28.399 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:50:28.399 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:50:28.400 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:50:28.400 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:50:28.400 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:50:28.400 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:50:28.405 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:50:28.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:50:28.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:50:28.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:50:28.405 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:50:28.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:50:28.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:50:28.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:50:28.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:28.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:50:28.405 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:50:28.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:28.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:28.406 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:50:28.406 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:50:28.406 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:50:28.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:28.406 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:50:28.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:28.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:28.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:50:28.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:28.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:28.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:28.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:28.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:28.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:28.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:28.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:28.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:28.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:28.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:28.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:28.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:28.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:28.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:28.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:28.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:28.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:28.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:28.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:28.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:28.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:28.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:28.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:28.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:28.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:28.411 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:50:28.895 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:50:28.928 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:50:28.930 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:50:28.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:50:28.931 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:50:28.948 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:50:28.948 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:50:28.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:50:28.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:50:28.953 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:50:28.953 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:50:28.953 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:50:28.953 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:50:28.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:50:28.997 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:50:28.997 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 04:50:28.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:50:28.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:50:29.369 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:50:29.409 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:50:29.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:50:29.410 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:50:29.410 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:50:29.847 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:50:30.324 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:50:30.411 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:50:30.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:50:30.411 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:50:30.411 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:50:30.803 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:50:31.282 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:50:31.412 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:50:31.412 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:50:31.412 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:50:31.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:50:31.761 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:50:32.237 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:50:32.413 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:50:32.413 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:50:32.413 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:50:32.414 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:50:32.716 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:50:33.195 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:50:33.414 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:50:33.414 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:50:33.414 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:50:33.415 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:50:33.674 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:50:34.153 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:50:34.632 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:50:35.111 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:50:35.590 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:50:36.069 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:50:36.548 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:50:37.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:50:37.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:50:37.008 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:50:37.008 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:50:37.008 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:50:37.027 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:50:37.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:50:37.027 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:50:37.028 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:50:37.028 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:50:37.030 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:50:37.030 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:50:37.030 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:50:37.030 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:50:37.030 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:50:37.030 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:50:37.030 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:50:42.034 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:50:42.034 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:50:42.035 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:50:42.035 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:50:42.036 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:50:42.037 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:50:42.044 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:50:42.044 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:50:42.045 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:50:42.045 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:50:42.045 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:50:42.048 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:50:42.048 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:50:42.048 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:50:42.048 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:50:42.048 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:50:42.048 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:50:42.048 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:50:42.048 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:50:42.052 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:50:42.052 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:50:42.052 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:50:42.052 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:50:42.052 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:50:42.052 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:50:42.052 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:50:42.052 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:50:42.055 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:50:42.055 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:50:42.055 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:50:42.055 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:50:42.056 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:50:42.056 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:50:42.056 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:50:42.056 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:50:42.060 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:50:42.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:50:42.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:50:42.060 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:50:42.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:50:42.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:50:42.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:50:42.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:50:42.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:42.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:50:42.061 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:50:42.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:42.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:42.061 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:50:42.061 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:50:42.061 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:50:42.061 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:50:42.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:42.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:42.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:42.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:50:42.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:42.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:42.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:42.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:42.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:42.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:42.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:42.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:42.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:42.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:42.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:42.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:42.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:42.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:42.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:42.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:42.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:42.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:42.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:42.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:42.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:42.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:42.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:42.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:42.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:42.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:42.066 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:50:42.546 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:50:42.586 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:50:42.588 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:50:42.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:50:42.590 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:50:42.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:50:42.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:50:42.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:50:42.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:50:42.619 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:50:42.619 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:50:42.619 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:50:42.619 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:50:43.023 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:50:43.064 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:50:43.065 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:50:43.065 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:50:43.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:50:43.501 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:50:43.978 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:50:44.065 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:50:44.066 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:50:44.066 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:50:44.066 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:50:44.457 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:50:44.934 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:50:45.066 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:50:45.067 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:50:45.067 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:50:45.067 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:50:45.412 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:50:45.890 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:50:46.067 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:50:46.067 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:50:46.067 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:50:46.068 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:50:46.367 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:50:46.844 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:50:47.069 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:50:47.069 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:50:47.069 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:50:47.069 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:50:47.322 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:50:47.800 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:50:48.278 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:50:48.756 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:50:49.096 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:50:49.096 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:50:49.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:50:49.108 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:50:49.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:50:49.108 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:50:49.113 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:50:49.113 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:50:49.114 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:50:49.114 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:50:49.114 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:50:49.114 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:50:49.114 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:50:54.113 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:50:54.113 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:50:54.115 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:50:54.116 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:50:54.116 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:50:54.117 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:50:54.127 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:50:54.128 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:50:54.128 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:50:54.128 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:50:54.128 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:50:54.132 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:50:54.133 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:50:54.133 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:50:54.133 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:50:54.134 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:50:54.134 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:50:54.135 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:50:54.135 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:50:54.138 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:50:54.138 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:50:54.138 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:50:54.139 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:50:54.139 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:50:54.139 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:50:54.139 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:50:54.139 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:50:54.142 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:50:54.143 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:50:54.143 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:50:54.143 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:50:54.143 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:50:54.143 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:50:54.143 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:50:54.143 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:50:54.149 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:50:54.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:50:54.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:50:54.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:50:54.149 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:50:54.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:50:54.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:50:54.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:50:54.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:54.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:50:54.150 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:50:54.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:54.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:54.150 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:50:54.150 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:50:54.150 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:50:54.150 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:50:54.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:54.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:54.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:54.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:50:54.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:54.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:54.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:54.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:54.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:54.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:54.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:54.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:54.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:54.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:54.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:54.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:54.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:54.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:54.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:54.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:50:54.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:54.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:54.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:54.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:54.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:54.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:54.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:50:54.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:50:54.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:54.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:50:54.155 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:50:54.639 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:50:54.674 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:50:54.676 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:50:54.677 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:50:54.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:50:54.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:50:54.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:50:54.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:50:54.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:50:54.708 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:50:54.708 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:50:54.708 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:50:54.709 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:50:55.116 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:50:55.154 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:50:55.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:50:55.154 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:50:55.155 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:50:55.594 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:50:56.072 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:50:56.156 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:50:56.156 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:50:56.156 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:50:56.156 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:50:56.550 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:50:57.027 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:50:57.157 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:50:57.157 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:50:57.157 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:50:57.157 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:50:57.505 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:50:57.983 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:50:58.158 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:50:58.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:50:58.158 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:50:58.158 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:50:58.461 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:50:58.939 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:50:59.159 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:50:59.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:50:59.159 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:50:59.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:50:59.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:50:59.200 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:50:59.200 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:50:59.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:50:59.203 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:50:59.203 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:50:59.203 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:50:59.203 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:50:59.203 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:50:59.204 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:50:59.204 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1079 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:50:59.204 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1079 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:50:59.204 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1079 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:50:59.204 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1079 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:50:59.204 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1079 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:50:59.204 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1079 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:50:59.204 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1079 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:50:59.419 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:50:59.906 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:51:00.392 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:51:00.878 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:51:01.365 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:51:01.851 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:51:02.337 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:51:02.824 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:51:03.311 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:51:03.798 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:51:04.206 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:51:04.206 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:51:04.207 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:51:04.207 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:51:04.207 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:51:04.208 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:51:04.209 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:51:04.210 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:51:04.211 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:51:04.220 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:51:04.221 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:51:04.221 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:51:04.221 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:51:04.221 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:51:04.222 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:51:04.222 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:51:04.222 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:51:04.222 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:51:04.222 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:51:04.223 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:51:04.223 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:51:04.223 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:51:04.225 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:51:04.225 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:51:04.225 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:51:04.225 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:51:04.225 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:51:04.225 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:51:04.225 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:51:04.225 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:51:04.227 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:51:04.227 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:51:04.227 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:51:04.227 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:51:04.227 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:51:04.227 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:51:04.227 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:51:04.227 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:51:04.230 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:51:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:51:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:51:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:51:04.230 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:51:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:51:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:51:04.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:51:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:51:04.230 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:51:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:04.230 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:51:04.230 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:51:04.230 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:51:04.230 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:51:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:04.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:51:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:04.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:04.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:04.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:04.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:04.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:04.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:04.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:04.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:04.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:04.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:04.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:04.232 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:51:04.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:04.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:04.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:04.232 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:51:04.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:04.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:04.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:04.232 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:51:04.232 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:51:04.232 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:51:04.232 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:51:04.232 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:51:09.238 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:51:09.238 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:51:09.239 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:51:09.239 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:51:09.240 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:51:09.241 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:51:09.249 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:51:09.251 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:51:09.251 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:51:09.251 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:51:09.251 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:51:09.255 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:51:09.255 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:51:09.255 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:51:09.255 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:51:09.256 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:51:09.256 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:51:09.256 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:51:09.256 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:51:09.259 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:51:09.259 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:51:09.259 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:51:09.259 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:51:09.259 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:51:09.259 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:51:09.259 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:51:09.259 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:51:09.263 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:51:09.263 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:51:09.263 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:51:09.263 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:51:09.263 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:51:09.263 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:51:09.263 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:51:09.263 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:51:09.267 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:51:09.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:51:09.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:51:09.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:51:09.268 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:51:09.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:51:09.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:51:09.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:51:09.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:09.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:51:09.268 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:51:09.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:09.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:09.268 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:51:09.268 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:51:09.268 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:51:09.268 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:51:09.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:09.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:09.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:09.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:51:09.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:09.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:09.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:09.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:09.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:09.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:09.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:09.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:09.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:09.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:09.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:09.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:09.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:09.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:09.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:09.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:09.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:09.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:09.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:09.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:09.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:09.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:09.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:09.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:09.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:09.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:09.273 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:51:09.757 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:51:09.791 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:51:09.793 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:51:09.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:51:09.795 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:51:09.811 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:51:09.811 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:51:09.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:51:09.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:51:09.816 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:51:09.816 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:51:09.816 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:51:09.816 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:51:10.234 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:51:10.271 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:51:10.272 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:51:10.272 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:51:10.272 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:51:10.711 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:51:11.189 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:51:11.273 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:51:11.273 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:51:11.273 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:51:11.273 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:51:11.667 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:51:12.144 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:51:12.274 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:51:12.275 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:51:12.275 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:51:12.275 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:51:12.622 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:51:13.100 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:51:13.276 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:51:13.276 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:51:13.276 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:51:13.276 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:51:13.577 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:51:14.055 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:51:14.277 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:51:14.278 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:51:14.278 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:51:14.278 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:51:14.533 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:51:15.011 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:51:15.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:51:15.489 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:51:15.968 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:51:16.313 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:51:16.445 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:51:16.923 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:51:17.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:51:17.400 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:51:17.878 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:51:18.315 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:51:18.355 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:51:18.833 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:51:19.311 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:51:19.316 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:51:19.317 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:51:19.789 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:51:20.268 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:51:20.746 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:51:21.225 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:51:21.703 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:51:22.181 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:51:22.375 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:51:22.660 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:51:23.137 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:51:23.376 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:51:23.613 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:51:24.090 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:51:24.377 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:51:24.568 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:51:25.046 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 04:51:25.378 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:51:25.524 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 04:51:26.002 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 04:51:26.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:51:26.480 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 04:51:26.957 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 04:51:27.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:51:27.434 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 04:51:27.911 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 04:51:28.389 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 04:51:28.866 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 04:51:29.343 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 04:51:29.450 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:51:29.450 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:51:29.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:51:29.455 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:51:29.455 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:51:29.455 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:51:29.456 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:51:29.456 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:51:29.456 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:51:29.456 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:51:29.456 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:51:29.456 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:51:29.456 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:51:29.456 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4310 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:51:29.456 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4310 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:51:34.461 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:51:34.461 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:51:34.462 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:51:34.463 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:51:34.463 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:51:34.464 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:51:34.473 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:51:34.475 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:51:34.475 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:51:34.476 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:51:34.476 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:51:34.486 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:51:34.486 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:51:34.486 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:51:34.486 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:51:34.487 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:51:34.487 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:51:34.487 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:51:34.487 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:51:34.493 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:51:34.493 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:51:34.493 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:51:34.493 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:51:34.494 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:51:34.494 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:51:34.494 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:51:34.494 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:51:34.499 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:51:34.499 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:51:34.499 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:51:34.499 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:51:34.499 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:51:34.499 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:51:34.500 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:51:34.500 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:51:34.506 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:51:34.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:51:34.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:51:34.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:51:34.506 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:51:34.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:51:34.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:51:34.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:51:34.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:34.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:51:34.507 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:51:34.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:34.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:34.507 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:51:34.507 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:51:34.507 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:51:34.507 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:51:34.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:34.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:34.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:34.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:51:34.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:34.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:34.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:34.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:34.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:34.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:34.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:34.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:34.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:34.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:34.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:34.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:34.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:34.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:34.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:34.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:34.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:34.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:34.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:34.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:34.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:34.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:34.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:34.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:34.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:34.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:34.512 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:51:34.995 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:51:35.039 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:51:35.041 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:51:35.042 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:51:35.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:51:35.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:51:35.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:51:35.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:51:35.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:51:35.073 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:51:35.073 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:51:35.074 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:51:35.074 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:51:35.087 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:51:35.091 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:51:35.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD NOHANDOVER
2025-12-15 04:51:35.101 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:51:35.101 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:51:35.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:51:35.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:51:35.125 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:35.139 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:35.153 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:35.166 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:35.180 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:35.194 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:35.208 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:35.222 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:35.236 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:35.250 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:35.263 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:35.277 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:35.305 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:35.319 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:35.333 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:35.346 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:35.360 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:35.374 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:35.388 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:35.402 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:35.416 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:35.430 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:35.443 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:35.457 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:35.473 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:51:35.492 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:35.506 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:35.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:51:35.512 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:51:35.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:51:35.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:51:35.948 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:51:36.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD NOHANDOVER
2025-12-15 04:51:36.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:51:36.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:51:36.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:51:36.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:51:36.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:51:36.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:51:36.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:51:36.400 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:51:36.400 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:51:36.400 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:51:36.400 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:51:36.401 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:51:36.401 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:51:36.401 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:51:41.406 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:51:41.406 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:51:41.406 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:51:41.407 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:51:41.408 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:51:41.409 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:51:41.416 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:51:41.417 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:51:41.417 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:51:41.418 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:51:41.418 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:51:41.422 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:51:41.422 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:51:41.423 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:51:41.423 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:51:41.423 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:51:41.423 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:51:41.424 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:51:41.424 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:51:41.426 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:51:41.426 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:51:41.427 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:51:41.427 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:51:41.427 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:51:41.427 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:51:41.427 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:51:41.427 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:51:41.430 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:51:41.430 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:51:41.430 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:51:41.430 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:51:41.431 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:51:41.431 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:51:41.431 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:51:41.431 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:51:41.435 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:51:41.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:51:41.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:51:41.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:51:41.436 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:51:41.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:51:41.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:51:41.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:51:41.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:51:41.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:41.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:41.436 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:51:41.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:41.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:41.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:41.437 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:51:41.437 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:51:41.437 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:51:41.437 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:51:41.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:41.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:41.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:41.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:51:41.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:41.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:41.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:41.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:41.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:41.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:41.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:41.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:41.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:41.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:41.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:41.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:41.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:41.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:41.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:41.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:41.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:41.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:41.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:41.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:41.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:41.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:41.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:41.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:41.442 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:51:41.923 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:51:41.959 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:51:41.961 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:51:41.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:51:41.963 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:51:41.986 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:51:41.986 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:51:41.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:51:41.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:51:41.993 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:51:41.993 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:51:41.993 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:51:41.993 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:51:42.016 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:51:42.018 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:51:42.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD NOHANDOVER
2025-12-15 04:51:42.023 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:51:42.023 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:51:42.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:51:42.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:51:42.026 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=126 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:42.054 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:42.068 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:42.081 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:42.095 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:42.109 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:42.123 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:42.137 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:42.151 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:42.165 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:42.178 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:42.192 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:42.206 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:42.234 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:42.248 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:42.261 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:42.275 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:42.289 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:42.303 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:42.317 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:42.331 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:42.345 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:42.358 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:42.372 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:42.386 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:42.402 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:51:42.421 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:42.435 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-15 04:51:42.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:51:42.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:51:42.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:51:42.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:51:42.881 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:51:43.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD NOHANDOVER
2025-12-15 04:51:43.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:51:43.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:51:43.329 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:51:43.342 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:51:43.342 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:51:43.342 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:51:43.342 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:51:43.345 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:51:43.345 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:51:43.345 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:51:43.345 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:51:43.345 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:51:43.345 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:51:43.345 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:51:43.345 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=408 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:51:43.345 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=408 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:51:43.345 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=408 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:51:43.345 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=408 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:51:43.345 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=408 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:51:43.345 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=408 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:51:48.347 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:51:48.347 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:51:48.348 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:51:48.348 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:51:48.349 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:51:48.350 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:51:48.359 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:51:48.361 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:51:48.361 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:51:48.362 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:51:48.362 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:51:48.367 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:51:48.367 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:51:48.367 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:51:48.368 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:51:48.368 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:51:48.368 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:51:48.369 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:51:48.369 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:51:48.372 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:51:48.372 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:51:48.372 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:51:48.373 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:51:48.373 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:51:48.373 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:51:48.373 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:51:48.373 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:51:48.377 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:51:48.377 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:51:48.377 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:51:48.377 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:51:48.378 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:51:48.378 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:51:48.378 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:51:48.378 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:51:48.383 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:51:48.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:51:48.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:51:48.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:51:48.383 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:51:48.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:51:48.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:51:48.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:51:48.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:48.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:51:48.384 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:51:48.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:48.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:48.384 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:51:48.384 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:51:48.384 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:51:48.384 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:51:48.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:48.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:48.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:48.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:51:48.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:48.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:48.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:48.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:48.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:48.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:48.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:48.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:48.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:48.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:48.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:48.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:48.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:48.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:48.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:48.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:48.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:48.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:48.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:48.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:48.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:48.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:48.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:48.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:48.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:48.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:48.389 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:51:48.873 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:51:48.904 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:51:48.905 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:51:48.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:51:48.906 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:51:48.919 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:51:48.919 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:51:48.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:51:48.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:51:48.924 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:51:48.924 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:51:48.924 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:51:48.924 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:51:48.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:51:48.975 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:51:48.975 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:51:48.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:51:48.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:51:49.350 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:51:49.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:51:49.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:51:49.357 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:51:49.357 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:51:49.357 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:51:49.357 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:51:49.358 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:51:49.358 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:51:49.358 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:51:49.358 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:51:49.358 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:51:49.358 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:51:49.358 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:51:54.363 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:51:54.363 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:51:54.365 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:51:54.366 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:51:54.367 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:51:54.368 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:51:54.377 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:51:54.378 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:51:54.378 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:51:54.379 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:51:54.379 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:51:54.382 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:51:54.383 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:51:54.383 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:51:54.383 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:51:54.383 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:51:54.384 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:51:54.384 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:51:54.384 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:51:54.386 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:51:54.386 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:51:54.387 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:51:54.387 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:51:54.387 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:51:54.387 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:51:54.387 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:51:54.387 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:51:54.389 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:51:54.390 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:51:54.390 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:51:54.390 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:51:54.390 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:51:54.390 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:51:54.390 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:51:54.390 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:51:54.394 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:51:54.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:51:54.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:51:54.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:51:54.394 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:51:54.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:51:54.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:51:54.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:51:54.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:51:54.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:54.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:54.394 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:51:54.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:54.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:54.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:54.395 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:51:54.395 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:51:54.395 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:51:54.395 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:51:54.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:54.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:54.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:54.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:51:54.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:54.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:54.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:54.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:54.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:54.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:54.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:54.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:54.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:54.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:54.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:54.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:54.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:54.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:54.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:54.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:54.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:51:54.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:54.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:54.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:51:54.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:54.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:54.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:51:54.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:51:54.399 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:51:54.881 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:51:54.916 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:51:54.917 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:51:54.918 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:51:54.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:51:54.936 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:51:54.936 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:51:54.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:51:54.941 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:51:54.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:51:54.944 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:51:54.944 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:51:54.945 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:51:54.945 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:51:54.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:51:54.984 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:51:54.984 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:51:54.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:51:54.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:51:55.358 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:51:55.397 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:51:55.398 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:51:55.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:51:55.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:51:55.837 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:51:56.315 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:51:56.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:51:56.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:51:56.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:51:56.400 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:51:56.794 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:51:57.273 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:51:57.400 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:51:57.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:51:57.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:51:57.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:51:57.751 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:51:58.229 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:51:58.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:51:58.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:51:58.402 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:51:58.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:51:58.708 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:51:59.186 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:51:59.402 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:51:59.403 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:51:59.403 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:51:59.403 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:51:59.664 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:52:00.142 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:52:00.621 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:52:01.099 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:52:01.578 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:52:02.056 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:52:02.533 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:52:03.012 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:52:03.490 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:52:03.968 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:52:04.445 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:52:04.924 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:52:05.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:52:05.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:52:05.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:52:05.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:52:05.379 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:52:05.380 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:52:05.380 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:52:05.380 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:52:05.384 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:52:05.385 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:52:05.385 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:52:05.385 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:52:05.385 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:52:05.385 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:52:05.385 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:52:05.386 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2346 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:52:05.386 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2346 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:52:05.386 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2346 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:52:05.386 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2346 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:52:05.386 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2346 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:52:05.386 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2346 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:52:05.386 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2346 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:52:05.387 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2346 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:52:10.384 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:52:10.384 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:52:10.385 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:52:10.386 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:52:10.387 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:52:10.387 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:52:10.397 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:52:10.399 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:52:10.399 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:52:10.400 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:52:10.400 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:52:10.404 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:52:10.405 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:52:10.405 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:52:10.405 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:52:10.406 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:52:10.406 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:52:10.406 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:52:10.407 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:52:10.410 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:52:10.410 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:52:10.410 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:52:10.411 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:52:10.411 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:52:10.411 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:52:10.412 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:52:10.412 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:52:10.414 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:52:10.415 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:52:10.415 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:52:10.415 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:52:10.415 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:52:10.415 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:52:10.416 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:52:10.416 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:52:10.421 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:52:10.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:52:10.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:52:10.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:52:10.421 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:52:10.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:52:10.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:52:10.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:52:10.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:52:10.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:52:10.422 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:52:10.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:52:10.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:52:10.422 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:52:10.422 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:52:10.422 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:52:10.422 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:52:10.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:52:10.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:52:10.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:52:10.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:52:10.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:52:10.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:52:10.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:52:10.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:52:10.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:52:10.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:52:10.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:52:10.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:52:10.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:52:10.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:52:10.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:52:10.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:52:10.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:52:10.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:52:10.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:52:10.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:52:10.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:52:10.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:52:10.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:52:10.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:52:10.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:52:10.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:52:10.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:52:10.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:52:10.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:52:10.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:52:10.427 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:52:10.907 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:52:10.944 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:52:10.945 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:52:10.947 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:52:10.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:52:10.974 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:52:10.974 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:52:10.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:52:10.979 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:52:10.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:52:10.982 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:52:10.982 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:52:10.982 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:52:10.982 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:52:11.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:52:11.011 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:52:11.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:52:11.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:52:11.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:52:11.385 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:52:11.426 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:52:11.426 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:52:11.426 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:52:11.426 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:52:11.863 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:52:12.341 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:52:12.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:52:12.427 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:52:12.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:52:12.428 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:52:12.820 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:52:13.298 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:52:13.428 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:52:13.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:52:13.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:52:13.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:52:13.776 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:52:14.254 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:52:14.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:52:14.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:52:14.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:52:14.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:52:14.732 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:52:15.211 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:52:15.431 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:52:15.431 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:52:15.431 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:52:15.431 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:52:15.689 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:52:16.167 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:52:16.645 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:52:17.123 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:52:17.601 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:52:18.080 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:52:18.558 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:52:19.037 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:52:19.514 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:52:19.991 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:52:20.469 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:52:20.948 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:52:21.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:52:21.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:52:21.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:52:21.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:52:21.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:52:21.405 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:52:21.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:52:21.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:52:21.411 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:52:21.411 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:52:21.411 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:52:21.411 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:52:21.412 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:52:21.412 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:52:21.412 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:52:26.409 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:52:26.410 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:52:26.411 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:52:26.411 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:52:26.412 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:52:26.412 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:52:26.423 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:52:26.424 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:52:26.424 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:52:26.424 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:52:26.424 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:52:26.427 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:52:26.428 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:52:26.428 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:52:26.428 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:52:26.428 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:52:26.429 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:52:26.429 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:52:26.429 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:52:26.431 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:52:26.432 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:52:26.432 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:52:26.432 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:52:26.432 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:52:26.432 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:52:26.432 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:52:26.432 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:52:26.435 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:52:26.435 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:52:26.435 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:52:26.435 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:52:26.435 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:52:26.435 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:52:26.435 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:52:26.435 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:52:26.439 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:52:26.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:52:26.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:52:26.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:52:26.439 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:52:26.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:52:26.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:52:26.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:52:26.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:52:26.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:52:26.440 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:52:26.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:52:26.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:52:26.440 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:52:26.440 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:52:26.440 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:52:26.440 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:52:26.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:52:26.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:52:26.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:52:26.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:52:26.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:52:26.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:52:26.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:52:26.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:52:26.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:52:26.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:52:26.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:52:26.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:52:26.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:52:26.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:52:26.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:52:26.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:52:26.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:52:26.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:52:26.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:52:26.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:52:26.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:52:26.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:52:26.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:52:26.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:52:26.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:52:26.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:52:26.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:52:26.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:52:26.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:52:26.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:52:26.445 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:52:26.927 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:52:26.961 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:52:26.963 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:52:26.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:52:26.965 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:52:26.989 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:52:26.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:52:26.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:52:26.993 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:52:26.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:52:26.996 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:52:26.996 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:52:26.997 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:52:26.997 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:52:27.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:52:27.030 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:52:27.030 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:52:27.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:52:27.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:52:27.404 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:52:27.443 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:52:27.443 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:52:27.443 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:52:27.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:52:27.882 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:52:27.899 [DEBUG] fake_trx.py:264 (MS@172.18.144.22:6700) Recv SETTA cmd
2025-12-15 04:52:28.360 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:52:28.444 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:52:28.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:52:28.444 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:52:28.445 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:52:28.839 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:52:29.317 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:52:29.445 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:52:29.445 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:52:29.445 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:52:29.445 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:52:29.794 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:52:30.271 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:52:30.446 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:52:30.446 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:52:30.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:52:30.446 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:52:30.750 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:52:31.228 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:52:31.446 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:52:31.447 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:52:31.447 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:52:31.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:52:31.706 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:52:32.184 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:52:32.661 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:52:33.139 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:52:33.617 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:52:34.096 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:52:34.574 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:52:35.052 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:52:35.530 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:52:36.009 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:52:36.487 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:52:36.965 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:52:37.443 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:52:37.920 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:52:38.398 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:52:38.875 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:52:39.353 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:52:39.831 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:52:40.310 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:52:40.788 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:52:41.266 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:52:41.745 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:52:42.222 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 04:52:42.700 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 04:52:43.179 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 04:52:43.656 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 04:52:44.135 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 04:52:44.613 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 04:52:45.092 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 04:52:45.569 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 04:52:46.048 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 04:52:46.526 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 04:52:46.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:52:46.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:52:46.616 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:52:46.616 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:52:46.616 [WARNING] transceiver.py:250 (MS@172.18.144.22:6700) RX TRXD message (fn=4305 tn=6 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:52:46.628 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:52:46.628 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:52:46.628 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:52:46.628 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:52:46.632 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:52:46.632 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:52:46.632 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:52:46.632 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:52:46.632 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:52:46.632 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:52:46.632 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:52:46.632 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4308 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:52:46.632 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4308 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:52:46.632 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4308 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:52:46.632 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4308 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:52:46.632 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4308 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:52:46.633 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4308 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:52:51.632 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:52:51.633 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:52:51.635 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:52:51.636 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:52:51.637 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:52:51.637 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:52:51.647 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:52:51.649 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:52:51.649 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:52:51.649 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:52:51.649 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:52:51.655 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:52:51.655 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:52:51.655 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:52:51.655 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:52:51.656 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:52:51.656 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:52:51.656 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:52:51.656 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:52:51.659 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:52:51.659 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:52:51.659 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:52:51.659 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:52:51.659 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:52:51.659 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:52:51.660 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:52:51.660 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:52:51.663 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:52:51.663 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:52:51.663 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:52:51.663 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:52:51.663 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:52:51.663 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:52:51.663 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:52:51.663 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:52:51.667 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:52:51.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:52:51.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:52:51.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:52:51.668 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:52:51.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:52:51.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:52:51.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:52:51.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:52:51.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:52:51.668 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:52:51.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:52:51.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:52:51.668 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:52:51.668 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:52:51.668 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:52:51.668 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:52:51.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:52:51.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:52:51.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:52:51.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:52:51.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:52:51.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:52:51.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:52:51.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:52:51.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:52:51.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:52:51.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:52:51.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:52:51.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:52:51.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:52:51.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:52:51.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:52:51.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:52:51.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:52:51.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:52:51.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:52:51.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:52:51.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:52:51.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:52:51.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:52:51.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:52:51.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:52:51.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:52:51.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:52:51.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:52:51.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:52:51.673 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:52:52.158 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:52:52.188 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:52:52.189 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:52:52.191 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:52:52.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:52:52.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:52:52.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:52:52.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:52:52.223 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:52:52.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:52:52.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:52:52.227 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:52:52.227 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:52:52.228 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:52:52.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:52:52.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:52:52.262 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:52:52.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:52:52.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:52:52.634 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:52:52.671 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:52:52.672 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:52:52.672 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:52:52.673 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:52:53.112 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:52:53.590 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:52:53.672 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:52:53.673 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:52:53.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:52:53.673 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:52:54.068 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:52:54.547 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:52:54.673 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:52:54.674 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:52:54.674 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:52:54.674 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:52:55.025 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:52:55.504 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:52:55.674 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:52:55.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:52:55.675 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:52:55.675 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:52:55.982 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:52:56.460 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:52:56.676 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:52:56.676 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:52:56.676 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:52:56.676 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:52:56.938 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:52:57.417 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:52:57.895 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:52:58.373 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:52:58.851 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:52:59.330 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:52:59.807 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:53:00.286 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:53:00.764 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:53:01.243 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:53:01.722 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:53:02.200 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:53:02.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:53:02.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:02.640 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:53:02.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:53:02.651 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:53:02.651 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:53:02.651 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:53:02.651 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:53:02.654 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:53:02.654 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:53:02.654 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:53:02.654 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:53:02.654 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:53:02.654 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:53:02.654 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:53:07.655 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:53:07.656 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:53:07.658 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:53:07.659 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:53:07.659 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:53:07.660 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:53:07.676 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:53:07.677 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:53:07.677 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:53:07.677 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:53:07.677 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:53:07.680 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:53:07.681 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:53:07.681 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:53:07.681 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:53:07.681 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:53:07.681 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:53:07.681 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:53:07.681 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:53:07.683 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:53:07.683 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:53:07.683 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:53:07.683 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:53:07.683 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:53:07.683 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:53:07.683 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:53:07.683 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:53:07.685 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:53:07.685 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:53:07.685 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:53:07.685 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:53:07.685 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:53:07.685 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:53:07.685 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:53:07.685 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:53:07.687 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:53:07.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:53:07.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:53:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:53:07.688 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:53:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:53:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:53:07.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:53:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:53:07.688 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:53:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:07.688 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:53:07.688 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:53:07.688 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:53:07.688 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:53:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:07.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:53:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:07.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:07.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:07.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:07.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:07.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:07.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:07.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:07.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:07.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:07.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:07.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:07.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:07.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:07.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:07.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:07.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:07.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:07.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:07.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:07.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:07.693 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:53:08.174 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:53:08.204 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:53:08.205 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:53:08.206 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:53:08.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:53:08.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:53:08.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:53:08.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:53:08.226 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:53:08.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:08.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:53:08.227 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:53:08.227 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:53:08.228 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:53:08.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:53:08.280 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:53:08.281 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:53:08.281 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:53:08.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:08.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:08.649 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:53:08.691 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:53:08.691 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:53:08.691 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:53:08.691 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:53:09.128 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:53:09.145 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:53:09.606 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:53:09.692 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:53:09.693 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:53:09.693 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:53:09.693 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:53:10.085 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:53:10.563 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:53:10.693 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:53:10.694 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:53:10.694 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:53:10.694 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:53:11.041 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:53:11.519 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:53:11.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:53:11.695 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:53:11.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:53:11.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:53:11.997 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:53:12.475 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:53:12.697 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:53:12.697 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:53:12.697 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:53:12.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:53:12.952 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:53:13.430 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:53:13.909 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:53:14.387 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:53:14.864 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:53:14.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:53:14.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:14.996 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:53:14.996 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:53:14.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:53:14.999 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:53:14.999 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:53:14.999 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:53:15.000 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:53:15.000 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:53:15.000 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:53:15.000 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:53:15.000 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:53:15.000 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:53:15.000 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:53:20.003 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:53:20.004 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:53:20.006 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:53:20.006 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:53:20.006 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:53:20.007 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:53:20.017 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:53:20.019 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:53:20.019 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:53:20.020 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:53:20.020 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:53:20.025 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:53:20.026 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:53:20.026 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:53:20.026 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:53:20.027 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:53:20.027 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:53:20.028 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:53:20.028 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:53:20.031 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:53:20.031 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:53:20.031 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:53:20.032 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:53:20.032 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:53:20.032 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:53:20.032 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:53:20.032 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:53:20.035 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:53:20.035 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:53:20.035 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:53:20.035 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:53:20.035 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:53:20.036 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:53:20.036 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:53:20.036 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:53:20.040 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:53:20.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:53:20.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:53:20.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:53:20.040 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:53:20.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:53:20.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:53:20.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:53:20.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:20.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:53:20.041 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:53:20.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:20.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:20.041 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:53:20.041 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:53:20.041 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:53:20.041 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:53:20.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:20.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:20.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:20.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:53:20.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:20.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:20.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:20.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:20.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:20.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:20.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:20.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:20.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:20.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:20.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:20.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:20.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:20.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:20.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:20.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:20.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:20.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:20.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:20.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:20.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:20.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:20.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:20.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:20.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:20.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:20.046 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:53:20.530 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:53:20.573 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:53:20.575 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:53:20.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:53:20.577 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:53:20.614 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:53:20.614 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:53:20.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:53:20.619 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:53:20.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:20.620 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:53:20.620 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:53:20.620 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:53:20.620 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:53:20.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:53:20.682 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:53:20.682 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:53:20.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:20.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:21.008 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:53:21.045 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:53:21.046 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:53:21.046 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:53:21.046 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:53:21.486 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:53:21.964 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:53:22.047 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:53:22.047 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:53:22.047 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:53:22.047 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:53:22.443 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:53:22.920 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:53:23.048 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:53:23.048 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:53:23.049 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:53:23.049 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:53:23.398 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:53:23.875 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:53:24.049 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:53:24.050 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:53:24.050 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:53:24.050 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:53:24.354 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:53:24.832 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:53:25.050 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:53:25.051 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:53:25.051 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:53:25.051 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:53:25.310 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:53:25.788 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:53:26.266 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:53:26.745 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:53:27.222 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:53:27.699 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:53:28.178 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:53:28.655 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:53:29.134 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:53:29.612 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:53:30.090 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:53:30.567 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:53:30.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:53:30.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:30.688 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:53:30.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:53:30.700 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:53:30.701 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:53:30.701 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:53:30.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:53:30.706 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:53:30.706 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:53:30.706 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:53:30.707 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:53:30.707 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:53:30.707 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:53:30.707 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:53:30.707 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2275 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:53:30.707 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2275 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:53:30.707 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2275 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:53:30.708 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2275 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:53:30.708 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2275 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:53:30.708 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2275 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:53:30.708 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2276 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:53:30.708 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2276 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:53:30.708 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2276 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:53:30.708 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2276 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:53:30.708 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2276 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:53:30.708 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2276 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:53:30.708 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2276 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:53:30.708 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2276 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:53:35.705 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:53:35.705 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:53:35.707 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:53:35.708 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:53:35.708 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:53:35.709 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:53:35.716 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:53:35.717 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:53:35.717 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:53:35.718 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:53:35.718 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:53:35.721 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:53:35.722 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:53:35.722 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:53:35.722 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:53:35.722 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:53:35.722 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:53:35.723 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:53:35.723 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:53:35.725 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:53:35.725 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:53:35.725 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:53:35.725 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:53:35.725 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:53:35.725 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:53:35.725 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:53:35.725 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:53:35.728 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:53:35.728 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:53:35.728 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:53:35.728 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:53:35.728 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:53:35.728 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:53:35.728 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:53:35.728 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:53:35.731 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:53:35.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:53:35.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:53:35.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:53:35.731 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:53:35.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:53:35.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:53:35.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:53:35.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:35.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:53:35.732 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:53:35.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:35.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:35.732 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:53:35.732 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:53:35.732 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:53:35.732 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:53:35.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:35.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:35.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:35.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:53:35.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:35.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:35.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:35.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:35.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:35.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:35.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:35.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:35.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:35.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:35.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:35.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:35.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:35.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:35.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:35.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:35.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:35.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:35.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:35.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:35.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:35.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:35.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:35.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:35.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:35.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:35.737 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:53:36.221 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:53:36.250 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:53:36.251 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:53:36.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:53:36.252 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:53:36.269 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:53:36.269 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:53:36.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:53:36.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:36.272 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:53:36.272 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:53:36.272 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:53:36.272 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:53:36.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:53:36.325 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:53:36.325 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:53:36.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:36.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:36.698 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:53:36.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:53:36.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:36.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:53:36.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:53:36.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:53:36.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:53:36.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:53:36.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:36.723 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:53:36.723 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:53:36.723 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:53:36.723 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:53:36.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:53:36.735 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:53:36.735 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:53:36.735 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:53:36.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:53:36.750 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:53:36.750 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 04:53:36.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:36.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:37.176 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:53:37.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:53:37.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:37.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:53:37.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:53:37.439 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:53:37.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:53:37.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:53:37.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:53:37.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:37.457 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:53:37.457 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:53:37.457 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:53:37.457 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:53:37.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:53:37.514 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:53:37.514 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:53:37.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:37.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:37.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:53:37.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:37.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:53:37.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:53:37.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:53:37.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:53:37.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:53:37.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:37.629 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:53:37.629 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:53:37.629 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:53:37.629 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:53:37.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:53:37.651 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:53:37.651 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:53:37.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:37.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:37.653 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:53:37.736 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:53:37.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:53:37.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:53:37.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:53:38.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:53:38.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:38.049 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:53:38.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:53:38.049 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:53:38.058 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:53:38.059 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:53:38.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:53:38.059 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:53:38.060 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:53:38.060 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:53:38.060 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:53:38.060 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:53:38.060 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:53:38.060 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:53:38.060 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:53:38.060 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=497 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:53:38.060 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=498 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:53:38.060 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=498 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:53:38.060 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=498 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:53:38.060 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=498 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:53:38.060 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=498 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:53:38.060 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=498 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:53:38.060 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=498 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:53:38.060 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=498 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:53:43.063 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:53:43.063 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:53:43.065 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:53:43.066 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:53:43.066 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:53:43.067 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:53:43.075 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:53:43.077 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:53:43.077 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:53:43.077 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:53:43.077 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:53:43.081 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:53:43.082 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:53:43.082 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:53:43.082 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:53:43.082 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:53:43.082 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:53:43.082 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:53:43.082 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:53:43.086 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:53:43.086 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:53:43.086 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:53:43.086 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:53:43.087 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:53:43.087 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:53:43.087 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:53:43.087 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:53:43.090 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:53:43.090 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:53:43.090 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:53:43.090 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:53:43.090 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:53:43.090 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:53:43.091 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:53:43.091 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:53:43.098 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:53:43.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:53:43.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:53:43.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:53:43.098 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:53:43.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:53:43.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:53:43.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:53:43.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:43.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:53:43.099 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:53:43.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:43.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:43.099 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:53:43.099 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:53:43.099 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:53:43.099 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:53:43.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:43.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:43.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:43.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:53:43.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:43.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:43.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:43.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:43.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:43.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:43.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:43.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:43.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:43.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:43.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:43.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:43.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:43.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:43.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:43.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:43.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:43.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:43.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:43.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:43.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:43.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:43.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:43.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:43.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:43.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:43.104 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:53:43.588 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:53:43.623 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:53:43.624 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:53:43.625 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:53:43.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:53:43.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:53:43.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:53:43.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:53:43.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:43.671 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:53:43.671 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:53:43.672 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:53:43.672 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:53:43.679 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:53:43.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:53:43.688 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:53:43.688 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:53:43.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:43.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:44.063 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:53:44.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:53:44.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:44.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:53:44.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:53:44.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:53:44.084 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:53:44.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:53:44.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:53:44.087 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:53:44.087 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:53:44.087 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:53:44.087 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:53:44.087 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:53:44.087 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:53:44.087 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:53:49.087 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:53:49.087 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:53:49.090 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:53:49.091 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:53:49.091 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:53:49.092 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:53:49.099 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:53:49.099 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:53:49.100 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:53:49.100 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:53:49.100 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:53:49.104 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:53:49.104 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:53:49.105 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:53:49.105 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:53:49.105 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:53:49.105 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:53:49.105 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:53:49.105 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:53:49.107 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:53:49.107 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:53:49.107 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:53:49.108 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:53:49.108 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:53:49.108 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:53:49.108 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:53:49.108 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:53:49.110 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:53:49.110 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:53:49.110 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:53:49.110 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:53:49.110 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:53:49.110 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:53:49.111 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:53:49.111 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:53:49.114 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:53:49.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:53:49.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:53:49.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:53:49.114 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:53:49.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:53:49.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:53:49.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:53:49.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:49.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:53:49.115 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:53:49.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:49.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:49.115 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:53:49.115 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:53:49.115 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:53:49.115 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:53:49.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:49.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:49.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:49.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:53:49.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:49.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:49.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:49.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:49.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:49.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:49.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:49.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:49.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:49.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:49.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:49.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:49.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:49.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:49.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:49.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:49.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:49.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:49.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:53:49.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:49.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:49.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:49.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:53:49.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:53:49.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:49.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:53:49.120 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:53:49.604 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:53:49.643 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:53:49.644 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:53:49.645 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:53:49.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:53:49.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:53:49.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:53:49.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:53:49.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:49.656 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:53:49.657 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:53:49.657 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:53:49.657 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:53:49.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:53:49.707 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:53:49.707 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:53:49.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:49.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:49.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:53:50.081 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:53:50.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:53:50.119 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:53:50.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:53:50.120 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:53:50.560 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:53:51.038 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:53:51.120 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:53:51.121 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:53:51.121 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:53:51.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:53:51.516 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:53:51.994 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:53:52.122 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:53:52.122 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:53:52.122 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:53:52.122 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:53:52.472 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:53:52.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:53:52.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:52.834 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:53:52.834 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:53:52.853 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:53:52.853 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:53:52.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:53:52.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:52.854 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:53:52.854 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:53:52.854 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:53:52.854 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:53:52.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:53:52.904 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:53:52.904 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 04:53:52.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:52.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:52.951 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:53:53.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:53:53.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:53:53.124 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:53:53.124 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:53:53.124 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:53:53.429 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:53:53.907 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:53:54.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:53:54.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:53:54.125 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:53:54.125 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:53:54.384 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:53:54.863 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:53:55.341 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:53:55.821 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:53:56.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:53:56.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:56.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:53:56.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:53:56.085 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:53:56.105 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:53:56.105 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:53:56.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:53:56.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:56.106 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:53:56.106 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:53:56.106 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:53:56.106 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:53:56.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:53:56.153 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:53:56.154 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:53:56.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:56.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:56.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:53:56.298 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:53:56.776 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:53:57.254 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:53:57.732 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:53:58.210 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:53:58.688 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:53:59.166 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:53:59.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:53:59.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:59.293 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:53:59.293 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:53:59.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:53:59.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:53:59.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:53:59.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:59.310 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:53:59.310 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:53:59.311 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:53:59.311 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:53:59.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:53:59.360 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:53:59.360 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:53:59.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:59.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:53:59.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:53:59.644 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:54:00.122 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:54:00.600 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:54:01.078 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:54:01.557 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:54:02.036 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:54:02.515 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:54:02.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:54:02.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:54:02.566 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:54:02.566 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:54:02.566 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:54:02.576 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:54:02.576 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:54:02.577 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:54:02.577 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:54:02.578 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:54:02.578 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:54:02.579 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:54:02.579 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:54:02.579 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:54:02.579 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:54:02.579 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:54:07.581 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:54:07.582 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:54:07.583 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:54:07.584 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:54:07.584 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:54:07.586 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:54:07.595 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:54:07.596 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:54:07.596 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:54:07.596 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:54:07.596 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:54:07.600 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:54:07.600 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:54:07.600 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:54:07.600 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:54:07.600 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:54:07.600 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:54:07.601 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:54:07.601 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:54:07.603 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:54:07.603 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:54:07.603 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:54:07.603 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:54:07.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:54:07.603 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:54:07.604 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:54:07.604 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:54:07.606 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:54:07.606 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:54:07.606 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:54:07.606 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:54:07.606 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:54:07.606 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:54:07.606 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:54:07.606 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:54:07.609 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:54:07.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:54:07.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:54:07.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:54:07.610 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:54:07.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:54:07.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:54:07.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:54:07.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:54:07.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:54:07.610 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:54:07.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:54:07.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:54:07.610 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:54:07.610 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:54:07.610 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:54:07.610 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:54:07.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:54:07.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:54:07.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:54:07.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:54:07.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:54:07.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:54:07.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:54:07.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:54:07.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:54:07.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:54:07.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:54:07.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:54:07.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:54:07.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:54:07.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:54:07.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:54:07.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:54:07.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:54:07.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:54:07.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:54:07.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:54:07.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:54:07.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:54:07.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:54:07.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:54:07.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:54:07.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:54:07.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:54:07.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:54:07.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:54:07.615 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:54:08.099 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:54:08.123 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:54:08.124 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:54:08.124 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:54:08.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:54:08.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:54:08.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:54:08.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:54:08.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:54:08.125 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:54:08.125 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:54:08.125 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:54:08.125 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:54:08.576 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:54:08.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:54:08.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:54:08.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:54:08.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:54:09.053 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:54:09.531 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:54:09.615 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:54:09.615 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:54:09.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:54:09.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:54:10.009 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:54:10.487 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:54:10.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:54:10.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:54:10.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:54:10.616 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:54:10.965 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:54:11.444 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:54:11.617 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:54:11.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:54:11.618 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:54:11.618 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:54:11.922 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:54:12.401 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:54:12.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:54:12.618 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:54:12.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:54:12.619 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:54:12.878 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:54:13.355 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:54:13.833 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:54:14.311 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:54:14.789 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:54:15.267 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:54:15.746 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:54:16.224 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:54:16.702 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:54:17.180 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:54:17.658 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:54:18.136 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:54:18.614 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:54:19.092 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:54:19.570 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:54:20.048 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:54:20.526 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:54:21.004 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:54:21.481 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:54:21.959 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:54:22.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:54:22.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:54:22.257 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:54:22.257 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:54:22.257 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:54:22.257 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:54:22.259 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:54:22.259 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:54:22.259 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:54:22.259 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:54:22.260 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:54:22.260 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:54:22.260 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:54:27.262 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:54:27.262 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:54:27.265 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:54:27.265 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:54:27.266 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:54:27.267 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:54:27.275 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:54:27.276 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:54:27.276 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:54:27.276 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:54:27.277 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:54:27.280 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:54:27.280 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:54:27.280 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:54:27.280 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:54:27.281 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:54:27.281 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:54:27.281 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:54:27.281 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:54:27.284 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:54:27.284 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:54:27.284 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:54:27.284 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:54:27.284 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:54:27.285 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:54:27.285 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:54:27.285 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:54:27.287 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:54:27.287 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:54:27.287 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:54:27.287 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:54:27.288 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:54:27.288 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:54:27.288 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:54:27.288 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:54:27.291 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:54:27.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:54:27.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:54:27.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:54:27.292 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:54:27.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:54:27.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:54:27.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:54:27.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:54:27.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:54:27.292 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:54:27.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:54:27.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:54:27.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:54:27.292 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:54:27.292 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:54:27.292 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:54:27.292 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:54:27.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:54:27.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:54:27.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:54:27.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:54:27.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:54:27.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:54:27.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:54:27.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:54:27.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:54:27.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:54:27.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:54:27.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:54:27.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:54:27.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:54:27.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:54:27.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:54:27.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:54:27.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:54:27.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:54:27.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:54:27.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:54:27.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:54:27.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:54:27.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:54:27.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:54:27.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:54:27.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:54:27.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:54:27.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:54:27.297 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:54:27.782 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:54:27.813 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:54:27.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:54:27.815 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:54:27.816 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:54:27.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:54:27.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:54:27.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:54:27.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:54:27.838 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:54:27.838 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:54:27.839 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:54:27.839 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:54:27.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:54:27.887 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 04:54:27.887 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 04:54:27.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:54:27.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:54:28.260 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:54:28.295 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:54:28.296 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:54:28.296 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:54:28.296 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:54:28.739 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:54:29.217 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:54:29.296 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:54:29.296 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:54:29.296 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:54:29.298 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:54:29.696 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:54:29.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:54:29.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:54:29.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:54:29.889 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 04:54:29.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:54:29.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:54:29.892 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:54:29.893 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:54:29.893 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:54:29.893 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:54:30.174 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:54:30.297 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:54:30.297 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:54:30.297 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:54:30.299 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:54:30.652 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:54:31.130 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:54:31.299 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:54:31.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:54:31.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:54:31.299 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:54:31.608 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:54:32.085 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:54:32.299 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:54:32.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:54:32.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:54:32.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:54:32.563 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:54:33.039 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:54:33.516 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:54:33.995 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:54:34.473 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:54:34.951 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:54:35.429 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:54:35.906 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:54:36.384 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:54:36.861 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:54:37.339 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:54:37.817 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:54:38.295 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:54:38.772 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:54:39.251 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:54:39.729 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:54:40.206 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:54:40.684 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:54:41.162 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:54:41.641 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:54:42.118 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:54:42.596 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:54:43.074 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 04:54:43.552 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 04:54:44.030 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 04:54:44.508 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 04:54:44.986 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 04:54:45.465 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 04:54:45.943 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 04:54:46.420 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 04:54:46.898 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 04:54:47.376 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 04:54:47.855 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 04:54:48.333 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 04:54:48.810 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 04:54:49.288 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 04:54:49.766 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 04:54:50.251 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 04:54:50.729 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 04:54:51.207 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 04:54:51.685 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 04:54:52.163 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 04:54:52.636 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 04:54:52.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:54:52.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:54:52.907 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:54:52.924 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:54:52.924 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:54:52.924 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:54:52.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:54:52.926 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:54:52.926 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:54:52.926 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:54:52.926 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:54:52.926 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:54:52.926 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:54:52.926 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:54:57.929 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:54:57.929 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:54:57.932 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:54:57.933 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:54:57.933 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:54:57.934 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:54:57.941 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:54:57.943 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:54:57.943 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:54:57.943 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:54:57.943 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:54:57.950 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:54:57.950 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:54:57.951 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:54:57.951 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:54:57.951 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:54:57.952 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:54:57.952 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:54:57.952 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:54:57.955 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:54:57.955 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:54:57.955 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:54:57.956 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:54:57.956 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:54:57.956 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:54:57.956 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:54:57.956 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:54:57.960 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:54:57.960 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:54:57.961 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:54:57.961 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:54:57.961 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:54:57.961 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:54:57.961 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:54:57.961 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:54:57.966 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:54:57.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:54:57.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:54:57.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:54:57.966 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:54:57.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:54:57.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:54:57.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:54:57.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:54:57.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:54:57.966 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:54:57.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:54:57.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:54:57.967 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:54:57.967 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:54:57.967 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:54:57.967 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:54:57.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:54:57.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:54:57.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:54:57.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:54:57.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:54:57.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:54:57.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:54:57.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:54:57.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:54:57.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:54:57.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:54:57.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:54:57.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:54:57.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:54:57.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:54:57.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:54:57.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:54:57.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:54:57.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:54:57.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:54:57.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:54:57.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:54:57.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:54:57.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:54:57.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:54:57.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:54:57.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:54:57.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:54:57.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:54:57.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:54:57.971 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:54:58.456 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:54:58.491 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:54:58.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:54:58.495 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:54:58.498 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:54:58.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:54:58.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:54:58.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:54:58.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:54:58.502 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:54:58.502 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:54:58.502 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:54:58.502 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:54:58.933 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:54:58.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:54:58.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:54:58.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:54:58.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:54:59.411 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:54:59.889 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:54:59.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:54:59.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:54:59.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:54:59.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:55:00.367 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:55:00.845 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:55:00.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:55:00.973 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:55:00.974 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:55:00.974 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:55:01.323 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:55:01.801 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:55:01.974 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:55:01.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:55:01.975 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:55:01.975 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:55:02.279 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:55:02.757 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:55:02.975 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:55:02.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:55:02.975 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:55:02.976 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:55:03.235 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:55:03.712 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:55:04.190 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:55:04.668 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:55:05.146 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:55:05.625 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:55:06.102 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:55:06.580 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:55:07.058 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:55:07.536 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:55:08.014 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:55:08.492 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:55:08.970 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:55:09.448 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:55:09.926 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:55:10.405 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:55:10.883 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:55:11.361 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:55:11.839 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:55:12.317 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:55:12.795 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:55:13.273 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:55:13.751 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 04:55:14.229 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 04:55:14.707 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 04:55:15.186 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 04:55:15.664 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 04:55:16.142 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 04:55:16.620 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 04:55:17.098 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 04:55:17.576 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 04:55:18.053 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 04:55:18.531 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 04:55:19.009 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 04:55:19.487 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 04:55:19.964 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 04:55:19.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:55:19.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:55:19.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:55:19.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:55:19.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:55:19.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:55:19.999 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:55:20.000 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:55:20.000 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:55:20.000 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:55:20.001 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:55:20.001 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:55:20.001 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:55:24.999 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:55:24.999 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:55:25.002 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:55:25.002 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:55:25.003 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:55:25.004 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:55:25.012 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:55:25.013 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:55:25.013 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:55:25.013 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:55:25.013 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:55:25.016 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:55:25.016 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:55:25.016 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:55:25.016 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:55:25.017 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:55:25.017 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:55:25.017 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:55:25.017 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:55:25.019 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:55:25.019 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:55:25.019 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:55:25.019 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:55:25.019 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:55:25.019 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:55:25.019 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:55:25.019 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:55:25.022 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:55:25.022 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:55:25.022 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:55:25.022 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:55:25.022 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:55:25.022 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:55:25.022 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:55:25.022 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:55:25.025 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:55:25.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:55:25.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:55:25.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:55:25.025 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:55:25.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:55:25.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:55:25.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:55:25.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:55:25.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:55:25.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:55:25.026 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:55:25.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:55:25.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:55:25.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:55:25.026 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:55:25.026 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:55:25.026 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:55:25.026 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:55:25.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:55:25.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:55:25.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:55:25.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:55:25.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:55:25.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:55:25.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:55:25.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:55:25.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:55:25.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:55:25.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:55:25.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:55:25.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:55:25.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:55:25.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:55:25.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:55:25.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:55:25.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:55:25.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:55:25.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:55:25.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:55:25.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:55:25.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:55:25.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:55:25.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:55:25.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:55:25.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:55:25.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:55:25.031 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:55:25.515 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:55:25.547 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:55:25.549 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:55:25.550 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:55:25.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:55:25.552 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:55:25.552 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:55:25.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:55:25.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:55:25.553 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:55:25.553 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:55:25.554 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:55:25.554 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:55:25.993 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:55:26.029 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:55:26.029 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:55:26.029 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:55:26.030 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:55:26.470 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:55:26.948 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:55:27.030 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:55:27.030 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:55:27.030 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:55:27.030 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:55:27.426 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:55:27.905 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:55:28.030 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:55:28.031 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:55:28.031 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:55:28.031 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:55:28.383 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:55:28.861 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:55:29.032 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:55:29.032 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:55:29.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:55:29.032 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:55:29.339 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:55:29.817 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:55:30.033 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:55:30.033 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:55:30.033 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:55:30.033 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:55:30.295 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:55:30.772 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:55:31.250 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:55:31.729 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:55:32.206 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:55:32.685 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:55:33.163 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:55:33.641 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:55:34.119 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:55:34.596 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:55:35.074 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:55:35.552 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:55:36.029 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:55:36.507 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:55:36.985 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:55:37.463 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:55:37.940 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:55:38.418 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:55:38.896 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:55:39.374 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:55:39.852 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:55:40.330 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:55:40.808 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 04:55:41.286 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 04:55:41.764 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 04:55:42.242 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 04:55:42.720 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 04:55:43.198 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 04:55:43.676 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 04:55:44.154 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 04:55:44.632 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 04:55:45.111 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 04:55:45.589 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 04:55:46.067 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 04:55:46.545 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 04:55:47.023 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 04:55:47.044 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:55:47.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:55:47.047 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:55:47.047 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:55:47.047 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:55:47.047 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:55:47.048 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:55:47.048 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:55:47.048 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:55:47.048 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:55:47.048 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:55:47.048 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:55:47.048 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:55:47.048 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4699 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:55:47.048 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4699 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:55:47.048 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4699 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:55:47.048 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4699 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:55:47.048 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4699 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:55:52.052 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:55:52.052 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:55:52.054 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:55:52.055 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:55:52.055 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:55:52.056 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:55:52.064 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:55:52.065 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:55:52.065 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:55:52.065 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:55:52.065 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:55:52.067 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:55:52.068 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:55:52.068 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:55:52.068 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:55:52.068 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:55:52.069 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:55:52.069 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:55:52.069 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:55:52.071 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:55:52.071 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:55:52.071 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:55:52.071 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:55:52.071 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:55:52.071 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:55:52.071 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:55:52.071 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:55:52.073 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:55:52.073 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:55:52.073 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:55:52.073 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:55:52.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:55:52.073 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:55:52.074 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:55:52.074 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:55:52.076 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:55:52.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:55:52.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:55:52.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:55:52.077 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:55:52.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:55:52.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:55:52.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:55:52.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:55:52.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:55:52.077 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:55:52.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:55:52.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:55:52.077 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:55:52.077 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:55:52.077 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:55:52.077 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:55:52.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:55:52.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:55:52.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:55:52.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:55:52.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:55:52.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:55:52.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:55:52.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:55:52.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:55:52.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:55:52.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:55:52.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:55:52.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:55:52.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:55:52.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:55:52.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:55:52.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:55:52.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:55:52.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:55:52.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:55:52.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:55:52.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:55:52.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:55:52.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:55:52.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:55:52.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:55:52.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:55:52.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:55:52.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:55:52.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:55:52.082 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:55:52.566 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:55:52.597 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:55:52.598 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:55:52.599 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:55:52.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:55:52.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:55:52.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:55:52.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:55:52.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:55:52.603 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:55:52.603 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:55:52.603 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:55:52.603 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:55:53.044 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:55:53.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:55:53.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:55:53.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:55:53.080 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:55:53.521 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:55:53.999 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:55:54.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:55:54.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:55:54.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:55:54.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:55:54.477 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:55:54.955 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:55:55.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:55:55.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:55:55.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:55:55.083 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:55:55.433 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:55:55.912 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:55:56.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:55:56.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:55:56.084 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:55:56.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:55:56.390 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:55:56.867 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:55:57.085 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:55:57.085 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:55:57.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:55:57.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:55:57.345 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:55:57.823 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:55:58.301 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:55:58.779 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:55:59.257 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:55:59.735 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:56:00.212 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:56:00.690 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:56:01.168 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:56:01.646 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:56:02.123 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:56:02.601 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:56:03.079 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:56:03.557 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:56:04.035 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:56:04.513 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:56:04.991 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:56:05.469 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:56:05.947 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:56:06.424 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:56:06.903 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:56:07.381 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:56:07.858 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 04:56:08.336 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 04:56:08.814 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 04:56:09.292 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 04:56:09.771 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 04:56:10.248 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 04:56:10.726 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 04:56:11.204 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 04:56:11.681 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 04:56:12.159 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 04:56:12.637 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 04:56:13.115 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 04:56:13.593 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 04:56:14.071 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 04:56:14.549 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 04:56:15.027 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 04:56:15.505 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 04:56:15.983 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 04:56:16.461 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 04:56:16.939 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 04:56:17.417 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 04:56:17.895 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 04:56:18.373 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 04:56:18.851 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 04:56:19.329 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 04:56:19.807 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 04:56:20.285 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 04:56:20.763 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-15 04:56:21.241 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-15 04:56:21.720 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-15 04:56:22.198 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-15 04:56:22.676 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-15 04:56:23.154 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-15 04:56:23.631 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-15 04:56:24.109 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-15 04:56:24.587 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-15 04:56:25.065 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-15 04:56:25.543 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-15 04:56:26.020 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-15 04:56:26.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:56:26.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:56:26.104 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:56:26.104 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:56:26.104 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:56:26.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:56:26.108 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:56:26.108 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:56:26.108 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:56:26.108 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:56:26.108 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:56:26.108 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:56:26.108 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:56:26.108 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=7262 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:56:26.108 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=7262 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:56:26.108 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=7262 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:56:26.108 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=7262 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:56:26.108 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=7262 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:56:26.108 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=7262 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:56:31.109 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:56:31.109 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:56:31.111 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:56:31.111 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:56:31.112 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:56:31.113 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:56:31.122 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:56:31.123 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:56:31.123 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:56:31.123 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:56:31.123 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:56:31.127 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:56:31.127 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:56:31.127 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:56:31.127 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:56:31.128 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:56:31.128 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:56:31.128 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:56:31.128 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:56:31.131 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:56:31.131 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:56:31.131 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:56:31.131 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:56:31.131 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:56:31.132 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:56:31.132 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:56:31.132 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:56:31.135 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:56:31.135 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:56:31.135 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:56:31.135 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:56:31.135 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:56:31.135 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:56:31.135 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:56:31.135 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:56:31.139 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:56:31.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:56:31.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:56:31.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:56:31.139 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:56:31.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:56:31.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:56:31.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:56:31.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:56:31.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:56:31.140 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:56:31.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:56:31.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:56:31.140 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:56:31.140 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:56:31.140 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:56:31.140 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:56:31.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:56:31.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:56:31.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:56:31.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:56:31.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:56:31.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:56:31.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:56:31.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:56:31.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:56:31.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:56:31.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:56:31.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:56:31.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:56:31.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:56:31.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:56:31.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:56:31.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:56:31.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:56:31.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:56:31.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:56:31.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:56:31.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:56:31.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:56:31.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:56:31.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:56:31.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:56:31.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:56:31.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:56:31.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:56:31.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:56:31.145 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:56:31.629 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:56:31.660 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:56:31.661 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:56:31.662 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:56:31.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:56:31.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:56:31.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:56:31.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:56:31.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:56:31.664 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:56:31.665 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:56:31.665 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:56:31.665 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:56:32.106 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:56:32.144 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:56:32.144 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:56:32.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:56:32.145 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:56:32.584 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:56:33.059 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:56:33.144 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:56:33.145 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:56:33.145 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:56:33.145 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:56:33.537 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:56:34.014 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:56:34.145 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:56:34.145 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:56:34.146 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:56:34.146 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:56:34.492 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:56:34.970 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:56:35.146 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:56:35.146 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:56:35.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:56:35.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:56:35.448 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:56:35.926 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:56:36.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:56:36.147 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:56:36.148 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:56:36.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:56:36.404 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:56:36.882 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:56:37.360 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:56:37.838 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:56:38.316 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:56:38.793 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:56:39.271 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:56:39.749 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:56:40.227 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:56:40.705 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:56:41.183 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:56:41.660 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:56:42.139 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:56:42.617 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:56:43.095 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:56:43.574 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:56:44.051 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:56:44.529 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:56:45.007 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:56:45.485 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:56:45.963 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:56:46.441 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:56:46.919 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 04:56:47.397 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 04:56:47.874 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 04:56:48.352 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 04:56:48.830 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 04:56:49.308 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 04:56:49.786 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 04:56:50.264 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 04:56:50.742 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 04:56:51.220 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 04:56:51.699 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 04:56:52.176 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 04:56:52.654 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 04:56:53.132 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 04:56:53.610 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 04:56:54.088 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 04:56:54.566 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 04:56:55.044 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 04:56:55.522 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 04:56:56.000 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 04:56:56.477 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 04:56:56.955 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 04:56:57.433 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 04:56:57.911 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 04:56:58.389 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 04:56:58.867 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 04:56:59.162 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:56:59.162 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:56:59.168 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:56:59.169 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:56:59.169 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:56:59.169 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:56:59.171 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:56:59.171 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:56:59.171 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:56:59.171 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:56:59.171 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:56:59.171 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=5983 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:56:59.171 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:56:59.171 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:56:59.171 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=5983 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:56:59.171 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=5983 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:56:59.171 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=5983 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:56:59.171 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=5983 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:56:59.171 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=5983 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:57:04.173 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:57:04.173 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:57:04.176 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:57:04.177 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:57:04.177 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:57:04.178 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:57:04.186 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:57:04.187 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:57:04.187 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:57:04.188 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:57:04.188 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:57:04.191 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:57:04.191 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:57:04.192 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:57:04.192 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:57:04.192 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:57:04.192 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:57:04.192 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:57:04.192 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:57:04.195 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:57:04.195 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:57:04.195 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:57:04.195 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:57:04.195 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:57:04.196 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:57:04.196 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:57:04.196 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:57:04.198 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:57:04.198 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:57:04.198 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:57:04.198 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:57:04.198 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:57:04.198 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:57:04.198 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:57:04.198 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:57:04.202 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:57:04.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:57:04.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:57:04.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:57:04.203 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:57:04.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:57:04.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:57:04.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:57:04.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:04.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:57:04.203 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:57:04.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:04.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:04.203 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:57:04.203 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:57:04.203 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:57:04.203 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:57:04.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:04.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:04.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:04.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:57:04.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:04.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:04.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:04.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:04.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:04.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:04.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:04.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:04.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:04.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:04.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:04.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:04.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:04.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:04.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:04.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:04.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:04.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:04.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:04.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:04.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:04.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:04.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:04.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:04.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:04.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:04.208 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:57:04.692 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:57:04.728 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:57:04.730 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:57:04.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:57:04.732 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:57:04.788 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:57:04.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:57:04.788 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:57:04.788 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:57:04.794 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:57:04.794 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:57:04.794 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:57:04.794 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:57:04.795 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:57:04.795 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:57:04.795 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:57:09.792 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:57:09.793 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:57:09.794 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:57:09.795 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:57:09.795 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:57:09.797 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:57:09.807 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:57:09.809 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:57:09.809 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:57:09.810 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:57:09.810 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:57:09.816 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:57:09.817 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:57:09.817 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:57:09.817 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:57:09.818 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:57:09.818 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:57:09.819 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:57:09.819 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:57:09.822 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:57:09.822 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:57:09.823 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:57:09.823 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:57:09.823 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:57:09.824 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:57:09.824 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:57:09.824 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:57:09.827 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:57:09.827 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:57:09.827 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:57:09.827 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:57:09.827 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:57:09.827 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:57:09.827 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:57:09.828 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:57:09.833 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:57:09.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:57:09.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:57:09.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:57:09.833 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:57:09.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:57:09.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:57:09.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:57:09.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:09.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:57:09.834 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:57:09.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:09.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:09.834 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:57:09.834 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:57:09.834 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:57:09.835 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:57:09.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:09.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:09.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:09.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:57:09.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:09.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:09.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:09.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:09.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:09.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:09.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:09.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:09.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:09.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:09.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:09.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:09.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:09.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:09.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:09.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:09.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:09.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:09.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:09.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:09.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:09.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:09.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:09.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:09.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:09.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:09.839 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:57:10.324 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:57:10.354 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:57:10.356 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:57:10.357 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:57:10.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:57:10.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:57:10.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:57:10.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:57:10.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:57:10.371 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:57:10.371 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:57:10.371 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:57:10.371 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:57:10.371 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:57:10.371 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:57:10.371 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:57:15.373 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:57:15.373 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:57:15.375 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:57:15.375 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:57:15.376 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:57:15.376 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:57:15.385 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:57:15.387 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:57:15.387 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:57:15.387 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:57:15.387 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:57:15.391 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:57:15.391 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:57:15.391 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:57:15.391 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:57:15.392 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:57:15.392 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:57:15.392 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:57:15.392 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:57:15.394 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:57:15.395 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:57:15.395 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:57:15.395 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:57:15.395 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:57:15.395 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:57:15.395 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:57:15.395 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:57:15.397 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:57:15.398 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:57:15.398 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:57:15.398 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:57:15.398 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:57:15.398 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:57:15.398 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:57:15.398 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:57:15.401 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:57:15.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:57:15.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:57:15.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:57:15.401 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:57:15.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:57:15.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:57:15.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:57:15.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:15.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:57:15.402 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:57:15.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:15.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:15.402 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:57:15.402 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:57:15.402 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:57:15.402 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:57:15.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:15.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:15.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:15.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:57:15.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:15.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:15.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:15.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:15.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:15.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:15.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:15.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:15.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:15.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:15.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:15.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:15.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:15.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:15.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:15.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:15.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:15.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:15.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:15.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:15.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:15.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:15.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:15.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:15.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:15.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:15.407 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:57:15.892 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:57:15.922 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:57:15.923 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:57:15.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:57:15.924 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:57:15.976 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:57:15.977 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:57:15.977 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:57:15.977 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:57:15.978 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:57:15.978 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:57:15.978 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:57:15.978 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:57:15.978 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:57:15.978 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:57:15.978 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:57:20.979 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:57:20.980 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:57:20.982 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:57:20.983 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:57:20.983 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:57:20.984 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:57:20.998 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:57:20.999 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:57:20.999 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:57:20.999 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:57:20.999 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:57:21.001 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:57:21.002 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:57:21.002 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:57:21.002 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:57:21.002 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:57:21.002 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:57:21.002 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:57:21.002 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:57:21.005 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:57:21.005 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:57:21.005 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:57:21.005 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:57:21.005 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:57:21.005 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:57:21.005 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:57:21.005 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:57:21.007 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:57:21.008 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:57:21.008 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:57:21.008 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:57:21.008 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:57:21.008 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:57:21.008 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:57:21.008 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:57:21.011 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:57:21.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:57:21.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:57:21.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:57:21.011 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:57:21.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:57:21.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:57:21.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:57:21.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:57:21.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:21.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:21.012 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:57:21.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:21.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:21.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:21.012 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:57:21.012 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:57:21.012 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:57:21.012 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:57:21.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:21.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:21.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:21.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:57:21.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:21.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:21.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:21.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:21.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:21.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:21.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:21.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:21.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:21.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:21.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:21.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:21.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:21.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:21.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:21.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:21.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:21.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:21.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:21.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:21.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:21.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:21.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:21.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:21.017 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:57:21.502 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:57:21.535 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:57:21.536 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:57:21.538 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:57:21.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:57:21.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:57:21.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:57:21.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:57:21.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:57:21.542 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:57:21.542 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:57:21.542 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:57:21.542 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:57:21.980 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:57:22.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:57:22.016 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:57:22.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:57:22.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:57:22.457 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:57:22.936 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:57:23.017 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:57:23.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:57:23.017 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:57:23.018 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:57:23.414 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:57:23.891 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:57:24.018 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:57:24.019 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:57:24.019 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:57:24.019 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:57:24.368 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:57:24.846 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:57:25.020 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:57:25.020 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:57:25.020 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:57:25.020 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:57:25.324 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:57:25.801 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:57:26.021 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:57:26.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:57:26.022 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:57:26.022 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:57:26.279 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:57:26.756 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:57:27.234 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:57:27.712 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:57:28.190 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:57:28.668 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:57:29.146 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:57:29.556 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:57:29.556 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:57:29.562 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:57:29.562 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:57:29.562 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:57:29.563 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:57:29.568 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:57:29.568 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:57:29.568 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:57:29.569 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:57:29.569 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:57:29.569 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:57:29.569 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1827 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:57:29.569 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:57:29.569 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1827 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:57:29.570 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1827 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:57:29.570 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1827 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:57:29.570 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1827 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:57:29.570 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1827 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:57:34.568 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:57:34.568 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:57:34.569 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:57:34.573 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:57:34.575 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:57:34.577 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:57:34.588 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:57:34.589 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:57:34.589 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:57:34.589 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:57:34.589 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:57:34.594 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:57:34.594 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:57:34.594 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:57:34.594 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:57:34.594 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:57:34.595 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:57:34.595 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:57:34.595 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:57:34.600 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:57:34.600 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:57:34.600 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:57:34.600 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:57:34.601 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:57:34.601 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:57:34.601 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:57:34.601 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:57:34.604 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:57:34.604 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:57:34.604 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:57:34.604 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:57:34.604 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:57:34.604 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:57:34.604 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:57:34.604 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:57:34.608 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:57:34.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:57:34.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:57:34.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:57:34.609 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:57:34.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:57:34.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:57:34.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:57:34.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:34.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:57:34.609 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:57:34.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:34.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:34.609 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:57:34.609 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:57:34.609 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:57:34.610 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:57:34.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:34.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:34.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:34.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:57:34.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:34.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:34.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:34.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:34.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:34.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:34.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:34.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:34.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:34.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:34.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:34.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:34.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:34.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:34.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:34.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:34.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:34.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:34.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:34.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:34.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:34.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:34.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:34.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:34.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:34.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:34.614 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:57:35.098 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:57:35.131 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:57:35.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:57:35.133 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:57:35.134 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:57:35.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:57:35.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:57:35.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:57:35.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:57:35.137 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:57:35.137 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:57:35.137 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:57:35.137 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:57:35.576 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:57:35.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:57:35.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:57:35.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:57:35.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:57:36.053 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:57:36.531 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:57:36.615 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:57:36.615 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:57:36.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:57:36.615 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:57:37.009 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:57:37.487 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:57:37.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:57:37.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:57:37.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:57:37.616 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:57:37.966 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:57:38.443 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:57:38.617 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:57:38.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:57:38.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:57:38.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:57:38.921 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:57:39.399 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:57:39.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:57:39.618 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:57:39.618 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:57:39.618 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:57:39.877 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:57:40.355 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:57:40.833 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:57:41.311 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:57:41.788 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:57:42.267 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:57:42.745 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:57:43.151 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:57:43.152 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:57:43.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:57:43.154 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:57:43.154 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:57:43.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:57:43.155 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:57:43.155 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:57:43.155 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:57:43.155 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:57:43.155 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:57:43.156 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:57:43.156 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:57:48.160 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:57:48.160 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:57:48.161 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:57:48.162 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:57:48.162 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:57:48.165 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:57:48.172 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:57:48.172 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:57:48.172 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:57:48.173 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:57:48.173 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:57:48.177 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:57:48.177 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:57:48.178 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:57:48.178 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:57:48.178 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:57:48.179 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:57:48.179 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:57:48.179 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:57:48.182 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:57:48.182 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:57:48.182 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:57:48.183 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:57:48.183 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:57:48.183 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:57:48.183 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:57:48.183 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:57:48.186 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:57:48.186 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:57:48.186 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:57:48.186 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:57:48.187 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:57:48.187 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:57:48.187 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:57:48.187 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:57:48.195 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:57:48.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:57:48.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:57:48.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:57:48.195 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:57:48.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:57:48.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:57:48.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:57:48.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:57:48.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:48.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:48.196 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:57:48.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:48.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:48.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:48.196 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:57:48.196 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:57:48.196 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:57:48.196 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:57:48.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:48.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:48.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:48.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:57:48.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:48.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:48.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:48.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:48.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:48.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:48.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:48.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:48.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:48.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:48.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:48.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:48.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:48.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:48.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:48.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:57:48.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:48.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:48.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:48.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:48.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:57:48.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:57:48.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:48.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:57:48.201 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:57:48.686 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:57:48.718 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:57:48.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:57:48.721 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:57:48.722 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:57:48.725 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:57:48.725 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:57:48.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:57:48.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:57:48.725 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:57:48.726 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:57:48.726 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:57:48.726 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:57:49.164 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:57:49.200 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:57:49.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:57:49.200 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:57:49.201 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:57:49.641 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:57:50.119 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:57:50.202 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:57:50.202 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:57:50.202 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:57:50.202 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:57:50.597 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:57:51.075 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:57:51.202 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:57:51.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:57:51.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:57:51.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:57:51.553 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:57:52.030 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:57:52.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:57:52.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:57:52.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:57:52.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:57:52.508 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:57:52.986 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:57:53.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:57:53.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:57:53.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:57:53.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:57:53.464 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:57:53.941 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:57:54.419 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:57:54.897 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:57:55.375 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:57:55.853 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:57:56.331 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:57:56.736 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:57:56.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:57:56.739 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:57:56.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:57:56.739 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:57:56.739 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:57:56.743 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:57:56.743 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:57:56.743 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:57:56.743 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:57:56.743 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:57:56.743 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:57:56.743 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:58:01.743 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:58:01.744 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:58:01.746 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:58:01.746 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:58:01.746 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:58:01.747 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:58:01.763 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:58:01.765 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:58:01.765 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:58:01.765 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:58:01.765 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:58:01.769 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:58:01.770 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:58:01.770 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:58:01.770 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:58:01.770 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:58:01.770 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:58:01.771 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:58:01.771 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:58:01.775 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:58:01.776 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:58:01.776 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:58:01.776 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:58:01.776 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:58:01.776 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:58:01.777 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:58:01.777 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:58:01.781 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:58:01.781 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:58:01.781 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:58:01.781 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:58:01.781 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:58:01.781 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:58:01.782 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:58:01.782 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:58:01.787 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:58:01.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:58:01.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:58:01.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:58:01.787 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:58:01.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:58:01.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:58:01.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:58:01.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:58:01.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:58:01.787 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:58:01.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:58:01.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:58:01.788 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:58:01.788 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:58:01.788 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:58:01.788 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:58:01.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:58:01.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:58:01.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:58:01.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:58:01.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:58:01.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:58:01.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:58:01.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:58:01.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:58:01.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:58:01.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:58:01.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:58:01.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:58:01.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:58:01.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:58:01.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:58:01.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:58:01.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:58:01.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:58:01.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:58:01.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:58:01.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:58:01.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:58:01.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:58:01.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:58:01.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:58:01.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:58:01.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:58:01.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:58:01.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:58:01.793 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:58:02.275 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:58:02.305 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:58:02.306 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:58:02.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:58:02.307 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:58:02.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:58:02.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:58:02.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:58:02.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:58:02.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:58:02.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:58:02.308 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:58:02.308 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:58:02.752 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:58:02.792 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:58:02.792 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:58:02.792 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:58:02.792 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:58:03.230 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:58:03.708 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:58:03.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:58:03.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:58:03.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:58:03.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:58:04.185 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:58:04.663 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:58:04.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:58:04.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:58:04.794 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:58:04.794 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:58:05.141 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:58:05.618 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:58:05.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:58:05.795 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:58:05.795 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:58:05.795 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:58:06.096 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:58:06.574 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:58:06.795 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:58:06.795 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:58:06.795 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:58:06.796 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:58:07.052 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:58:07.530 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:58:08.009 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:58:08.486 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:58:08.964 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:58:09.441 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:58:09.919 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:58:10.327 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:58:10.327 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:58:10.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:58:10.333 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:58:10.333 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:58:10.333 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:58:10.338 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:58:10.339 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:58:10.339 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:58:10.339 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:58:10.339 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:58:10.340 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:58:10.340 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:58:10.340 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1827 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:58:10.340 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1827 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:58:10.340 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1827 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:58:10.340 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1827 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:58:10.341 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1827 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:58:10.341 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1827 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:58:10.341 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1827 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:58:10.341 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1827 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:58:15.339 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:58:15.340 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:58:15.340 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:58:15.340 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:58:15.340 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:58:15.341 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:58:15.351 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:58:15.353 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:58:15.353 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:58:15.353 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:58:15.353 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:58:15.358 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:58:15.358 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:58:15.358 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:58:15.358 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:58:15.359 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:58:15.359 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:58:15.359 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:58:15.359 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:58:15.363 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:58:15.363 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:58:15.363 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:58:15.363 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:58:15.363 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:58:15.363 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:58:15.363 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:58:15.363 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:58:15.367 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:58:15.367 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:58:15.367 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:58:15.367 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:58:15.367 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:58:15.367 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:58:15.367 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:58:15.367 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:58:15.371 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:58:15.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:58:15.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:58:15.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:58:15.372 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:58:15.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:58:15.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:58:15.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:58:15.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:58:15.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:58:15.372 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:58:15.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:58:15.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:58:15.372 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:58:15.372 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:58:15.372 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:58:15.373 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:58:15.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:58:15.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:58:15.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:58:15.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:58:15.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:58:15.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:58:15.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:58:15.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:58:15.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:58:15.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:58:15.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:58:15.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:58:15.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:58:15.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:58:15.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:58:15.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:58:15.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:58:15.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:58:15.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:58:15.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:58:15.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:58:15.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:58:15.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:58:15.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:58:15.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:58:15.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:58:15.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:58:15.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:58:15.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:58:15.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:58:15.377 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:58:15.860 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:58:15.892 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:58:15.893 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:58:15.895 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:58:15.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:58:15.898 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:58:15.898 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:58:15.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:58:15.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:58:15.899 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:58:15.899 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:58:15.899 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:58:15.899 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:58:16.337 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:58:16.375 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:58:16.376 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:58:16.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:58:16.376 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:58:16.815 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:58:17.293 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:58:17.376 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:58:17.377 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:58:17.377 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:58:17.377 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:58:17.770 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:58:18.247 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:58:18.377 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:58:18.377 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:58:18.378 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:58:18.378 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:58:18.725 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:58:19.204 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:58:19.379 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:58:19.379 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:58:19.379 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:58:19.379 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:58:19.682 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:58:20.161 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:58:20.380 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:58:20.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:58:20.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:58:20.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:58:20.639 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:58:21.117 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:58:21.595 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:58:22.073 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:58:22.551 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:58:23.029 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:58:23.508 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:58:23.913 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:58:23.913 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:58:23.919 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:58:23.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:58:23.920 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:58:23.920 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:58:23.925 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:58:23.925 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:58:23.925 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:58:23.925 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:58:23.926 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:58:23.926 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:58:23.926 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:58:23.926 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1826 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:58:23.926 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1826 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:58:23.926 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1826 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:58:23.926 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1826 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:58:23.926 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1826 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:58:23.927 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1826 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:58:28.922 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:58:28.922 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:58:28.925 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:58:28.928 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:58:28.932 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:58:28.934 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:58:28.948 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:58:28.949 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:58:28.949 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:58:28.949 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:58:28.949 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:58:28.952 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:58:28.952 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:58:28.953 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:58:28.953 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:58:28.953 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:58:28.953 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:58:28.953 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:58:28.953 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:58:28.956 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:58:28.956 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:58:28.956 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:58:28.956 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:58:28.956 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:58:28.956 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:58:28.957 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:58:28.957 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:58:28.959 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:58:28.959 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:58:28.960 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:58:28.960 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:58:28.960 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:58:28.960 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:58:28.960 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:58:28.960 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:58:28.964 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:58:28.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:58:28.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:58:28.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:58:28.964 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:58:28.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:58:28.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:58:28.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:58:28.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:58:28.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:58:28.965 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:58:28.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:58:28.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:58:28.965 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:58:28.965 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:58:28.965 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:58:28.965 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:58:28.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:58:28.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:58:28.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:58:28.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:58:28.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:58:28.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:58:28.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:58:28.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:58:28.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:58:28.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:58:28.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:58:28.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:58:28.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:58:28.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:58:28.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:58:28.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:58:28.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:58:28.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:58:28.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:58:28.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:58:28.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:58:28.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:58:28.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:58:28.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:58:28.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:58:28.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:58:28.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:58:28.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:58:28.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:58:28.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:58:28.970 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:58:29.455 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:58:29.484 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:58:29.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:58:29.486 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:58:29.487 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:58:29.488 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:58:29.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:58:29.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:58:29.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:58:29.489 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:58:29.489 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:58:29.489 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:58:29.489 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:58:29.931 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:58:29.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:58:29.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:58:29.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:58:29.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:58:30.409 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:58:30.887 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:58:30.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:58:30.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:58:30.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:58:30.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:58:31.365 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:58:31.842 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:58:31.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:58:31.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:58:31.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:58:31.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:58:32.321 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:58:32.798 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:58:32.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:58:32.973 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:58:32.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:58:32.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:58:33.275 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:58:33.753 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:58:33.974 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:58:33.974 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:58:33.974 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:58:33.975 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:58:34.231 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:58:34.709 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:58:35.187 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:58:35.665 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:58:36.143 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:58:36.621 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:58:37.099 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:58:37.577 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:58:38.055 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:58:38.533 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:58:39.011 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:58:39.489 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:58:39.967 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:58:40.445 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:58:40.923 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:58:41.400 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:58:41.878 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:58:42.356 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:58:42.834 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:58:43.312 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:58:43.790 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:58:44.269 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:58:44.747 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 04:58:45.225 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 04:58:45.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:58:45.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:58:45.520 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:58:45.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:58:45.520 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:58:45.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:58:45.527 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:58:45.527 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:58:45.527 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:58:45.527 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:58:45.528 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:58:45.528 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:58:45.528 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:58:50.526 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:58:50.526 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:58:50.527 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:58:50.528 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:58:50.528 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:58:50.530 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:58:50.539 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:58:50.540 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:58:50.540 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:58:50.540 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:58:50.540 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:58:50.546 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:58:50.546 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:58:50.546 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:58:50.546 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:58:50.547 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:58:50.547 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:58:50.547 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:58:50.547 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:58:50.549 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:58:50.550 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:58:50.550 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:58:50.550 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:58:50.550 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:58:50.550 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:58:50.550 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:58:50.550 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:58:50.553 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:58:50.553 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:58:50.553 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:58:50.553 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:58:50.553 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:58:50.553 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:58:50.554 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:58:50.554 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:58:50.558 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:58:50.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:58:50.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:58:50.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:58:50.558 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:58:50.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:58:50.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:58:50.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:58:50.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:58:50.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:58:50.558 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:58:50.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:58:50.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:58:50.559 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:58:50.559 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:58:50.559 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:58:50.559 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:58:50.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:58:50.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:58:50.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:58:50.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:58:50.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:58:50.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:58:50.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:58:50.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:58:50.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:58:50.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:58:50.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:58:50.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:58:50.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:58:50.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:58:50.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:58:50.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:58:50.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:58:50.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:58:50.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:58:50.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:58:50.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:58:50.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:58:50.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:58:50.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:58:50.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:58:50.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:58:50.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:58:50.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:58:50.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:58:50.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:58:50.563 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:58:51.048 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:58:51.081 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:58:51.083 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:58:51.084 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:58:51.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:58:51.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:58:51.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:58:51.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:58:51.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:58:51.098 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:58:51.098 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:58:51.098 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:58:51.098 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:58:51.524 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:58:51.562 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:58:51.562 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:58:51.563 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:58:51.563 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:58:52.002 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:58:52.480 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:58:52.563 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:58:52.563 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:58:52.563 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:58:52.563 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:58:52.957 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:58:53.435 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:58:53.563 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:58:53.564 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:58:53.564 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:58:53.564 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:58:53.912 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:58:54.390 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:58:54.564 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:58:54.565 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:58:54.565 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:58:54.565 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:58:54.868 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:58:55.345 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:58:55.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:58:55.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:58:55.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:58:55.566 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:58:55.823 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:58:56.300 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:58:56.778 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:58:57.255 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:58:57.733 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:58:58.211 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:58:58.689 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:58:59.144 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:58:59.144 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:58:59.155 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:58:59.155 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:58:59.155 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:58:59.155 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:58:59.158 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:58:59.158 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:58:59.158 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:58:59.158 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:58:59.158 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:58:59.158 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:58:59.158 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:58:59.159 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1837 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:58:59.159 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1837 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:58:59.159 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1837 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:58:59.159 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1837 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:58:59.159 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1837 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:59:04.160 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:59:04.160 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:59:04.160 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:59:04.161 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:59:04.161 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:59:04.162 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:59:04.172 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:59:04.174 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:59:04.174 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:59:04.175 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:59:04.175 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:59:04.179 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:59:04.179 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:59:04.180 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:59:04.180 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:59:04.180 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:59:04.181 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:59:04.181 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:59:04.181 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:59:04.184 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:59:04.184 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:59:04.185 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:59:04.185 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:59:04.185 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:59:04.185 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:59:04.185 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:59:04.185 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:59:04.188 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:59:04.189 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:59:04.189 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:59:04.189 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:59:04.189 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:59:04.189 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:59:04.189 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:59:04.190 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:59:04.194 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:59:04.194 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:59:04.194 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:59:04.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:59:04.194 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:59:04.194 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:59:04.194 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:59:04.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:59:04.194 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:04.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:59:04.195 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:59:04.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:04.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:04.195 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:59:04.195 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:59:04.195 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:59:04.195 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:59:04.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:04.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:04.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:04.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:59:04.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:04.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:04.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:04.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:04.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:04.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:04.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:04.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:04.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:04.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:04.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:04.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:04.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:04.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:04.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:04.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:04.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:04.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:04.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:04.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:04.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:04.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:04.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:04.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:04.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:04.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:04.200 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:59:04.685 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:59:04.715 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:59:04.716 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:59:04.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:59:04.718 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:59:04.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:59:04.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:59:04.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:59:04.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 04:59:04.722 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 04:59:04.722 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 04:59:04.722 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 04:59:04.722 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 04:59:05.162 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 04:59:05.199 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:59:05.199 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:59:05.199 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:59:05.199 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:59:05.640 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 04:59:06.118 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 04:59:06.199 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:59:06.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:59:06.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:59:06.200 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:59:06.596 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 04:59:07.074 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 04:59:07.200 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:59:07.201 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:59:07.201 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:59:07.201 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:59:07.552 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 04:59:08.030 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 04:59:08.201 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:59:08.202 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:59:08.202 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:59:08.202 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:59:08.507 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 04:59:08.985 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 04:59:09.203 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:59:09.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:59:09.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:59:09.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:59:09.463 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 04:59:09.941 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 04:59:10.419 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 04:59:10.897 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 04:59:11.375 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 04:59:11.853 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 04:59:12.331 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 04:59:12.809 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 04:59:13.287 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 04:59:13.765 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 04:59:14.243 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 04:59:14.721 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 04:59:15.199 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 04:59:15.677 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 04:59:16.155 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 04:59:16.633 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 04:59:17.111 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 04:59:17.589 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 04:59:18.066 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 04:59:18.544 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 04:59:19.023 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 04:59:19.501 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 04:59:19.980 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 04:59:20.458 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 04:59:20.744 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:59:20.744 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:59:20.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:59:20.755 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:59:20.755 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:59:20.755 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:59:20.758 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:59:20.758 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:59:20.758 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:59:20.758 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:59:20.759 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:59:20.759 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:59:20.759 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:59:25.760 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:59:25.760 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:59:25.761 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:59:25.762 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:59:25.762 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:59:25.763 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:59:25.772 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:59:25.773 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:59:25.773 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:59:25.773 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:59:25.773 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:59:25.777 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:59:25.777 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:59:25.777 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:59:25.777 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:59:25.778 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:59:25.778 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:59:25.778 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:59:25.778 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:59:25.781 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:59:25.782 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:59:25.782 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:59:25.782 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:59:25.782 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:59:25.782 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:59:25.782 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:59:25.782 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:59:25.785 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:59:25.785 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:59:25.786 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:59:25.786 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:59:25.786 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:59:25.786 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:59:25.786 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:59:25.786 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:59:25.790 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:59:25.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:59:25.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:59:25.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:59:25.790 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:59:25.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:59:25.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:59:25.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:59:25.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:25.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:59:25.791 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:59:25.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:25.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:25.791 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:59:25.791 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:59:25.791 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:59:25.791 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:59:25.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:25.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:25.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:25.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:59:25.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:25.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:25.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:25.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:25.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:25.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:25.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:25.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:25.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:25.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:25.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:25.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:25.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:25.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:25.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:25.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:25.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:25.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:25.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:25.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:25.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:25.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:25.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:25.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:25.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:25.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:25.796 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:59:26.279 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:59:26.312 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:59:26.313 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:59:26.314 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:59:26.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:59:26.334 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:59:26.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:59:26.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:59:26.373 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:59:26.374 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:59:26.374 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:59:26.374 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:59:26.374 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:59:26.374 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:59:26.374 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:59:26.374 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:59:26.374 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:59:26.375 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:59:26.375 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:59:31.377 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:59:31.378 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:59:31.380 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:59:31.381 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:59:31.381 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:59:31.382 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:59:31.392 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:59:31.393 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:59:31.393 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:59:31.394 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:59:31.394 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:59:31.397 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:59:31.398 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:59:31.398 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:59:31.398 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:59:31.398 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:59:31.398 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:59:31.398 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:59:31.398 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:59:31.401 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:59:31.402 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:59:31.402 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:59:31.402 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:59:31.402 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:59:31.402 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:59:31.402 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:59:31.402 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:59:31.405 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:59:31.405 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:59:31.405 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:59:31.405 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:59:31.405 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:59:31.405 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:59:31.405 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:59:31.405 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:59:31.409 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:59:31.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:59:31.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:59:31.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:59:31.409 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:59:31.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:59:31.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:59:31.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:59:31.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:31.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:59:31.410 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:59:31.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:31.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:31.410 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:59:31.410 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:59:31.410 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:59:31.410 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:59:31.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:31.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:31.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:31.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:59:31.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:31.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:31.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:31.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:31.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:31.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:31.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:31.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:31.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:31.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:31.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:31.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:31.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:31.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:31.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:31.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:31.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:31.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:31.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:31.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:31.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:31.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:31.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:31.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:31.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:31.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:31.415 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:59:31.900 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:59:31.930 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:59:31.931 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:59:31.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:59:31.933 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:59:31.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:59:31.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:59:31.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:59:31.996 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:59:31.996 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:59:31.996 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:59:31.996 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:59:31.997 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:59:31.997 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:59:31.997 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:59:31.997 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:59:31.997 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:59:31.997 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:59:31.997 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:59:37.003 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:59:37.003 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:59:37.003 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:59:37.003 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:59:37.004 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:59:37.005 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:59:37.015 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:59:37.017 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:59:37.017 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:59:37.017 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:59:37.017 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:59:37.021 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:59:37.021 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:59:37.022 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:59:37.022 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:59:37.022 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:59:37.022 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:59:37.023 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:59:37.023 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:59:37.025 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:59:37.025 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:59:37.025 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:59:37.025 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:59:37.025 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:59:37.026 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:59:37.026 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:59:37.026 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:59:37.028 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:59:37.028 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:59:37.029 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:59:37.029 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:59:37.029 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:59:37.029 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:59:37.029 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:59:37.029 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:59:37.033 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:59:37.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:59:37.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:59:37.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:59:37.033 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:59:37.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:59:37.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:59:37.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:59:37.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:37.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:59:37.033 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:59:37.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:37.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:37.033 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:59:37.033 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:59:37.033 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:59:37.034 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:59:37.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:37.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:37.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:37.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:59:37.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:37.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:37.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:37.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:37.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:37.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:37.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:37.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:37.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:37.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:37.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:37.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:37.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:37.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:37.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:37.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:37.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:37.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:37.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:37.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:37.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:37.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:37.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:37.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:37.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:37.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:37.038 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:59:37.522 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:59:37.557 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:59:37.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:59:37.561 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:59:37.563 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:59:37.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:59:37.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:59:37.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:59:37.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:59:37.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:59:37.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:59:37.626 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:59:37.628 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:59:37.628 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:59:37.628 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:59:37.628 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:59:37.628 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:59:37.628 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:59:37.628 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:59:37.628 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:59:37.629 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:59:42.630 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:59:42.631 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:59:42.633 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:59:42.634 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:59:42.634 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:59:42.635 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:59:42.642 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:59:42.644 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:59:42.644 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:59:42.645 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:59:42.645 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:59:42.652 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:59:42.653 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:59:42.653 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:59:42.653 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:59:42.653 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:59:42.653 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:59:42.653 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:59:42.653 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:59:42.660 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:59:42.660 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:59:42.660 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:59:42.660 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:59:42.660 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:59:42.660 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:59:42.660 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:59:42.660 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:59:42.664 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:59:42.664 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:59:42.664 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:59:42.664 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:59:42.664 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:59:42.664 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:59:42.664 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:59:42.664 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:59:42.670 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:59:42.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:59:42.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:59:42.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:59:42.670 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:59:42.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:59:42.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:59:42.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:59:42.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:42.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:59:42.671 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:59:42.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:42.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:42.671 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:59:42.671 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:59:42.671 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:59:42.672 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:59:42.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:42.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:42.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:42.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:59:42.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:42.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:42.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:42.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:42.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:42.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:42.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:42.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:42.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:42.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:42.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:42.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:42.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:42.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:42.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:42.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:42.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:42.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:42.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:42.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:42.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:42.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:42.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:42.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:42.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:42.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:42.676 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:59:43.160 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:59:43.194 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:59:43.196 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:59:43.198 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:59:43.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:59:43.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:59:43.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:59:43.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:59:43.275 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:59:43.275 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:59:43.275 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:59:43.275 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:59:43.282 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:59:43.282 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:59:43.282 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:59:43.283 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:59:43.284 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:59:43.284 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:59:43.284 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:59:48.280 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:59:48.280 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:59:48.282 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:59:48.282 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:59:48.283 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:59:48.284 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:59:48.299 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:59:48.300 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:59:48.301 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:59:48.301 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:59:48.301 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:59:48.308 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:59:48.309 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:59:48.309 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:59:48.309 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:59:48.310 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:59:48.310 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:59:48.311 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:59:48.311 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:59:48.315 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:59:48.315 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:59:48.316 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:59:48.316 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:59:48.316 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:59:48.316 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:59:48.316 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:59:48.317 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:59:48.320 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:59:48.320 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:59:48.321 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:59:48.321 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:59:48.321 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:59:48.321 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:59:48.321 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:59:48.321 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:59:48.327 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:59:48.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:59:48.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:59:48.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:59:48.327 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:59:48.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:59:48.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:59:48.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:59:48.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:48.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:59:48.328 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:59:48.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:48.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:48.328 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:59:48.328 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:59:48.328 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:59:48.328 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:59:48.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:48.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:48.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:48.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:59:48.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:48.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:48.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:48.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:48.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:48.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:48.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:48.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:48.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:48.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:48.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:48.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:48.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:48.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:48.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:48.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:48.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:48.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:48.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:48.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:48.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:48.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:48.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:48.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:48.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:48.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:48.333 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:59:48.817 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:59:48.851 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:59:48.852 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:59:48.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:59:48.854 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:59:48.877 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:59:48.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:59:48.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:59:48.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:59:48.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:59:48.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:59:48.919 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:59:48.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:59:48.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:59:48.919 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:59:48.922 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:59:48.922 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:59:48.922 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:59:48.922 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:59:48.922 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:59:48.922 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:59:48.922 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:59:48.922 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:59:48.922 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:59:48.922 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:59:48.922 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:59:48.922 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:59:48.922 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 04:59:53.924 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:59:53.925 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:59:53.926 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:59:53.927 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:59:53.927 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:59:53.928 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:59:53.936 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:59:53.937 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:59:53.937 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:59:53.937 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:59:53.937 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:59:53.941 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:59:53.941 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:59:53.942 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:59:53.942 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:59:53.942 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:59:53.942 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:59:53.942 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:59:53.942 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:59:53.945 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:59:53.945 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:59:53.945 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:59:53.945 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:59:53.945 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:59:53.945 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:59:53.946 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:59:53.946 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:59:53.948 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:59:53.948 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:59:53.948 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:59:53.948 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:59:53.948 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:59:53.948 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:59:53.949 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:59:53.949 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:59:53.952 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:59:53.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:59:53.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:59:53.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:59:53.952 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:59:53.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:59:53.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:59:53.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:59:53.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:53.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:59:53.952 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:59:53.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:53.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:53.952 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:59:53.952 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:59:53.952 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:59:53.952 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:59:53.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:53.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:53.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:53.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:59:53.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:53.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:53.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:53.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:53.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:53.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:53.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:53.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:53.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:53.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:53.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:53.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:53.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:53.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:53.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:53.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:53.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:53.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:53.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:53.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:53.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:53.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:53.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:53.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:53.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:53.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:53.957 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 04:59:54.442 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 04:59:54.472 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 04:59:54.473 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 04:59:54.474 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 04:59:54.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 04:59:54.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:59:54.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:59:54.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:59:54.540 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 04:59:54.540 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 04:59:54.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 04:59:54.545 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 04:59:54.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 04:59:54.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 04:59:54.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 04:59:54.546 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:59:54.546 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:59:54.546 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:59:54.546 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:59:54.546 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:59:54.546 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:59:54.546 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 04:59:59.550 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 04:59:59.550 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 04:59:59.551 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:59:59.552 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:59:59.552 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:59:59.553 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:59:59.563 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 04:59:59.564 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:59:59.564 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:59:59.565 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 04:59:59.565 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 04:59:59.572 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 04:59:59.572 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 04:59:59.573 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:59:59.573 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:59:59.573 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 04:59:59.573 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 04:59:59.574 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 04:59:59.574 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 04:59:59.577 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 04:59:59.577 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 04:59:59.578 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:59:59.578 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:59:59.578 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 04:59:59.578 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 04:59:59.578 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 04:59:59.578 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 04:59:59.581 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 04:59:59.581 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 04:59:59.581 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:59:59.581 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 04:59:59.582 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 04:59:59.582 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 04:59:59.582 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 04:59:59.582 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 04:59:59.586 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 04:59:59.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 04:59:59.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 04:59:59.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 04:59:59.586 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 04:59:59.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 04:59:59.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 04:59:59.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 04:59:59.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:59.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 04:59:59.587 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 04:59:59.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:59.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:59.587 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 04:59:59.587 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 04:59:59.587 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 04:59:59.587 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 04:59:59.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:59.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:59.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:59.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 04:59:59.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:59.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:59.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:59.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:59.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:59.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:59.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:59.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:59.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:59.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:59.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:59.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:59.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:59.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:59.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:59.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:59.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:59.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:59.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 04:59:59.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:59.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:59.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:59.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 04:59:59.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 04:59:59.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:59.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 04:59:59.592 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:00:00.077 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:00:00.106 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:00:00.107 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:00:00.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:00:00.108 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:00:00.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:00:00.116 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:00:00.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:00:00.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:00:00.117 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:00:00.117 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:00:00.117 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:00:00.117 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:00:00.555 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:00:00.590 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:00:00.590 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:00:00.590 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:00:00.592 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:00:01.032 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:00:01.511 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:00:01.591 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:00:01.591 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:00:01.591 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:00:01.593 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:00:01.989 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:00:02.467 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:00:02.592 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:00:02.592 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:00:02.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:00:02.593 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:00:02.945 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:00:03.423 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:00:03.593 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:00:03.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:00:03.593 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:00:03.594 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:00:03.900 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:00:04.377 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:00:04.595 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:00:04.595 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:00:04.595 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:00:04.595 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:00:04.856 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:00:05.334 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:00:05.812 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:00:06.290 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:00:06.768 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:00:07.246 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:00:07.724 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:00:08.201 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:00:08.677 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:00:09.155 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:00:09.632 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:00:10.110 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:00:10.588 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 05:00:11.066 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 05:00:11.545 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 05:00:12.023 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 05:00:12.501 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 05:00:12.979 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 05:00:13.457 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 05:00:13.935 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 05:00:14.413 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 05:00:14.891 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 05:00:15.369 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 05:00:15.847 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 05:00:16.325 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 05:00:16.803 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 05:00:17.281 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 05:00:17.759 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 05:00:18.237 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 05:00:18.715 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 05:00:19.193 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 05:00:19.671 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 05:00:20.149 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 05:00:20.627 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 05:00:21.105 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 05:00:21.583 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 05:00:22.061 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 05:00:22.539 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 05:00:23.018 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 05:00:23.495 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 05:00:23.973 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 05:00:24.451 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 05:00:24.930 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 05:00:25.408 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 05:00:25.886 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 05:00:26.364 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 05:00:26.842 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 05:00:27.329 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 05:00:27.807 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 05:00:28.285 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-15 05:00:28.763 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-15 05:00:29.242 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-15 05:00:29.720 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-15 05:00:30.198 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-15 05:00:30.676 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-15 05:00:31.155 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-15 05:00:31.633 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-15 05:00:32.110 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-15 05:00:32.588 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-15 05:00:33.066 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-15 05:00:33.541 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-15 05:00:33.610 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:00:33.610 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:00:33.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:00:33.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:00:33.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:00:33.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:00:33.615 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:00:33.615 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:00:33.615 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:00:33.615 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:00:33.615 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:00:33.615 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:00:33.615 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:00:38.618 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:00:38.618 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:00:38.621 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:00:38.622 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:00:38.622 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:00:38.623 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:00:38.631 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:00:38.632 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:00:38.632 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:00:38.632 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:00:38.632 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:00:38.636 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:00:38.636 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:00:38.637 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:00:38.637 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:00:38.637 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:00:38.637 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:00:38.638 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:00:38.638 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:00:38.640 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:00:38.640 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:00:38.640 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:00:38.640 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:00:38.640 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:00:38.640 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:00:38.640 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:00:38.640 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:00:38.643 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:00:38.643 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:00:38.643 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:00:38.643 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:00:38.643 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:00:38.643 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:00:38.643 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:00:38.643 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:00:38.647 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:00:38.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:00:38.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:00:38.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:00:38.647 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:00:38.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:00:38.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:00:38.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:00:38.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:00:38.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:00:38.647 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:00:38.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:00:38.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:00:38.648 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:00:38.648 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:00:38.648 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:00:38.648 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:00:38.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:00:38.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:00:38.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:00:38.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:00:38.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:00:38.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:00:38.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:00:38.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:00:38.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:00:38.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:00:38.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:00:38.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:00:38.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:00:38.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:00:38.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:00:38.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:00:38.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:00:38.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:00:38.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:00:38.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:00:38.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:00:38.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:00:38.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:00:38.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:00:38.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:00:38.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:00:38.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:00:38.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:00:38.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:00:38.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:00:38.652 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:00:39.137 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:00:39.165 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:00:39.167 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:00:39.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:00:39.168 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:00:39.614 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:00:39.651 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:00:39.652 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:00:39.652 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:00:39.652 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:00:40.093 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:00:40.571 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:00:40.652 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:00:40.652 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:00:40.653 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:00:40.653 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:00:41.050 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:00:41.529 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:00:41.654 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:00:41.654 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:00:41.654 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:00:41.654 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:00:42.008 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:00:42.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:00:42.198 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:00:42.198 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:00:42.198 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:00:42.198 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:00:42.199 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:00:42.199 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:00:42.199 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:00:42.199 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:00:42.199 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:00:42.199 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:00:42.199 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:00:47.203 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:00:47.203 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:00:47.206 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:00:47.206 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:00:47.206 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:00:47.207 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:00:47.217 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:00:47.219 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:00:47.219 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:00:47.219 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:00:47.219 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:00:47.223 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:00:47.223 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:00:47.224 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:00:47.224 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:00:47.224 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:00:47.224 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:00:47.225 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:00:47.225 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:00:47.227 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:00:47.227 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:00:47.228 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:00:47.228 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:00:47.228 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:00:47.228 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:00:47.228 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:00:47.228 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:00:47.231 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:00:47.231 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:00:47.232 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:00:47.232 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:00:47.232 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:00:47.232 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:00:47.232 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:00:47.232 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:00:47.235 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:00:47.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:00:47.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:00:47.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:00:47.235 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:00:47.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:00:47.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:00:47.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:00:47.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:00:47.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:00:47.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:00:47.236 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:00:47.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:00:47.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:00:47.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:00:47.236 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:00:47.236 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:00:47.236 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:00:47.236 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:00:47.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:00:47.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:00:47.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:00:47.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:00:47.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:00:47.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:00:47.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:00:47.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:00:47.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:00:47.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:00:47.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:00:47.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:00:47.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:00:47.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:00:47.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:00:47.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:00:47.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:00:47.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:00:47.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:00:47.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:00:47.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:00:47.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:00:47.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:00:47.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:00:47.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:00:47.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:00:47.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:00:47.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:00:47.241 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:00:47.724 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:00:47.755 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:00:47.756 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:00:47.758 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:00:47.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:00:48.203 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:00:48.239 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:00:48.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:00:48.240 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:00:48.240 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:00:48.681 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:00:49.160 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:00:49.241 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:00:49.241 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:00:49.241 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:00:49.241 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:00:49.638 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:00:50.116 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:00:50.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:00:50.242 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:00:50.242 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:00:50.242 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:00:50.595 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:00:51.074 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:00:51.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:00:51.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:00:51.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:00:51.243 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:00:51.553 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:00:52.032 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:00:52.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:00:52.244 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:00:52.244 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:00:52.244 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:00:52.511 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:00:52.989 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:00:53.468 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:00:53.771 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:00:53.771 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:00:53.771 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:00:53.771 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:00:53.772 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:00:53.772 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:00:53.772 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:00:53.772 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:00:53.772 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:00:53.772 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:00:53.772 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:00:58.777 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:00:58.777 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:00:58.778 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:00:58.779 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:00:58.780 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:00:58.781 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:00:58.790 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:00:58.791 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:00:58.792 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:00:58.792 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:00:58.792 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:00:58.795 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:00:58.796 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:00:58.796 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:00:58.796 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:00:58.796 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:00:58.796 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:00:58.796 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:00:58.796 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:00:58.799 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:00:58.799 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:00:58.800 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:00:58.800 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:00:58.800 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:00:58.800 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:00:58.800 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:00:58.800 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:00:58.803 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:00:58.803 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:00:58.803 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:00:58.803 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:00:58.803 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:00:58.804 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:00:58.804 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:00:58.804 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:00:58.808 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:00:58.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:00:58.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:00:58.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:00:58.808 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:00:58.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:00:58.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:00:58.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:00:58.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:00:58.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:00:58.809 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:00:58.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:00:58.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:00:58.809 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:00:58.809 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:00:58.809 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:00:58.809 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:00:58.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:00:58.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:00:58.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:00:58.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:00:58.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:00:58.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:00:58.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:00:58.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:00:58.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:00:58.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:00:58.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:00:58.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:00:58.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:00:58.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:00:58.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:00:58.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:00:58.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:00:58.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:00:58.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:00:58.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:00:58.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:00:58.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:00:58.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:00:58.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:00:58.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:00:58.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:00:58.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:00:58.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:00:58.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:00:58.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:00:58.814 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:00:59.298 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:00:59.331 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:00:59.332 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:00:59.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:00:59.334 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:00:59.776 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:00:59.813 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:00:59.813 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:00:59.813 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:00:59.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:01:00.254 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:01:00.732 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:01:00.814 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:01:00.815 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:01:00.815 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:01:00.815 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:01:01.211 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:01:01.689 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:01:01.815 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:01:01.815 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:01:01.815 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:01:01.816 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:01:02.168 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:01:02.646 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:01:02.817 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:01:02.817 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:01:02.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:01:02.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:01:03.125 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:01:03.603 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:01:03.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:01:03.818 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:01:03.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:01:03.819 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:01:04.082 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:01:04.560 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:01:05.040 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:01:05.346 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:01:05.346 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:01:05.346 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:01:05.346 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:01:05.347 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:01:05.347 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:01:05.347 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:01:05.347 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:01:05.347 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:01:05.347 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:01:05.347 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:01:10.352 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:01:10.352 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:01:10.352 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:01:10.353 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:01:10.353 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:01:10.354 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:01:10.364 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:01:10.365 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:01:10.365 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:01:10.365 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:01:10.366 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:01:10.370 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:01:10.371 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:01:10.371 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:01:10.371 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:01:10.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:01:10.372 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:01:10.373 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:01:10.373 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:01:10.377 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:01:10.378 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:01:10.378 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:01:10.379 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:01:10.379 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:01:10.380 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:01:10.380 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:01:10.380 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:01:10.383 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:01:10.384 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:01:10.384 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:01:10.384 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:01:10.384 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:01:10.384 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:01:10.385 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:01:10.385 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:01:10.390 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:01:10.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:01:10.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:01:10.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:01:10.390 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:01:10.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:01:10.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:01:10.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:01:10.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:10.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:01:10.391 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:01:10.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:10.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:10.391 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:01:10.391 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:01:10.391 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:01:10.391 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:01:10.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:10.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:10.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:10.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:01:10.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:10.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:10.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:10.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:10.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:10.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:10.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:10.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:10.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:10.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:10.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:10.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:10.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:10.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:10.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:10.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:10.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:10.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:10.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:10.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:10.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:10.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:10.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:10.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:10.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:10.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:10.396 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:01:10.880 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:01:10.912 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:01:10.914 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:01:10.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:01:10.915 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:01:11.358 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:01:11.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:01:11.394 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:01:11.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:01:11.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:01:11.838 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:01:12.316 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:01:12.395 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:01:12.396 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:01:12.396 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:01:12.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:01:12.795 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:01:13.273 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:01:13.397 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:01:13.397 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:01:13.397 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:01:13.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:01:13.761 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:01:14.240 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:01:14.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:01:14.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:01:14.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:01:14.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:01:14.718 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:01:15.196 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:01:15.400 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:01:15.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:01:15.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:01:15.401 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:01:15.675 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:01:16.153 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:01:16.632 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:01:16.929 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:01:16.929 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:01:16.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:01:16.929 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:01:16.930 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:01:16.930 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:01:16.930 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:01:16.930 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:01:16.930 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:01:16.930 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:01:16.930 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:01:21.934 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:01:21.934 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:01:21.935 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:01:21.936 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:01:21.936 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:01:21.937 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:01:21.947 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:01:21.948 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:01:21.948 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:01:21.949 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:01:21.949 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:01:21.959 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:01:21.960 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:01:21.960 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:01:21.960 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:01:21.960 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:01:21.960 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:01:21.961 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:01:21.961 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:01:21.971 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:01:21.971 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:01:21.971 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:01:21.971 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:01:21.971 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:01:21.972 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:01:21.972 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:01:21.972 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:01:21.978 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:01:21.978 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:01:21.978 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:01:21.978 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:01:21.979 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:01:21.979 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:01:21.979 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:01:21.979 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:01:21.986 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:01:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:01:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:01:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:01:21.987 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:01:21.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:01:21.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:01:21.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:01:21.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:21.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:01:21.987 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:01:21.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:21.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:21.988 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:01:21.988 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:01:21.988 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:01:21.988 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:01:21.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:21.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:21.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:21.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:01:21.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:21.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:21.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:21.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:21.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:21.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:21.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:21.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:21.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:21.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:21.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:21.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:21.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:21.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:21.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:21.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:21.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:21.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:21.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:21.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:21.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:21.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:21.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:21.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:21.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:21.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:21.993 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:01:22.477 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:01:22.513 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:01:22.515 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:01:22.516 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:01:22.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:01:22.955 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:01:22.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:01:22.993 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:01:22.993 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:01:22.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:01:23.433 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:01:23.911 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:01:23.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:01:23.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:01:23.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:01:23.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:01:24.389 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:01:24.867 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:01:24.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:01:24.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:01:24.995 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:01:24.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:01:25.346 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:01:25.824 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:01:25.995 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:01:25.996 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:01:25.996 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:01:25.996 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:01:26.303 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:01:26.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:01:26.782 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:01:26.997 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:01:26.997 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:01:26.997 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:01:26.997 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:01:27.261 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:01:27.739 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:01:28.218 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:01:28.696 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:01:29.175 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:01:29.653 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:01:30.131 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:01:30.540 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:01:30.540 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:01:30.540 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:01:30.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:01:30.543 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:01:30.543 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:01:30.543 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:01:30.543 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:01:30.543 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:01:30.543 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:01:30.543 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:01:35.546 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:01:35.546 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:01:35.547 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:01:35.548 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:01:35.549 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:01:35.550 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:01:35.559 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:01:35.560 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:01:35.560 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:01:35.560 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:01:35.560 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:01:35.564 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:01:35.565 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:01:35.565 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:01:35.565 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:01:35.565 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:01:35.565 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:01:35.566 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:01:35.566 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:01:35.568 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:01:35.568 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:01:35.568 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:01:35.568 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:01:35.568 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:01:35.568 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:01:35.568 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:01:35.568 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:01:35.571 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:01:35.571 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:01:35.571 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:01:35.571 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:01:35.571 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:01:35.571 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:01:35.572 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:01:35.572 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:01:35.575 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:01:35.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:01:35.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:01:35.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:01:35.575 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:01:35.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:01:35.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:01:35.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:01:35.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:35.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:01:35.576 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:01:35.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:35.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:35.576 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:01:35.576 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:01:35.576 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:01:35.576 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:01:35.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:35.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:35.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:35.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:01:35.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:35.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:35.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:35.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:35.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:35.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:35.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:35.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:35.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:35.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:35.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:35.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:35.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:35.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:35.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:35.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:35.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:35.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:35.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:35.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:35.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:35.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:35.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:35.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:35.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:35.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:35.581 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:01:36.064 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:01:36.096 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:01:36.098 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:01:36.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:01:36.099 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:01:36.542 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:01:36.579 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:01:36.580 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:01:36.580 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:01:36.580 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:01:37.020 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:01:37.499 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:01:37.581 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:01:37.581 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:01:37.581 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:01:37.581 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:01:37.979 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:01:38.456 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:01:38.582 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:01:38.582 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:01:38.582 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:01:38.582 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:01:38.935 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:01:39.413 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:01:39.583 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:01:39.583 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:01:39.583 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:01:39.583 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:01:39.892 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:01:40.115 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:01:40.115 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:01:40.115 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:01:40.115 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:01:40.116 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:01:40.116 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:01:40.116 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:01:40.116 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:01:40.116 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:01:40.116 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:01:40.116 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:01:45.121 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:01:45.121 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:01:45.123 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:01:45.124 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:01:45.124 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:01:45.125 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:01:45.134 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:01:45.134 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:01:45.134 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:01:45.135 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:01:45.135 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:01:45.137 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:01:45.137 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:01:45.137 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:01:45.138 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:01:45.138 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:01:45.138 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:01:45.138 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:01:45.138 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:01:45.140 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:01:45.140 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:01:45.140 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:01:45.140 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:01:45.140 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:01:45.140 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:01:45.141 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:01:45.141 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:01:45.142 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:01:45.143 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:01:45.143 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:01:45.143 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:01:45.143 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:01:45.143 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:01:45.143 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:01:45.143 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:01:45.146 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:01:45.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:01:45.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:01:45.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:01:45.146 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:01:45.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:01:45.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:01:45.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:01:45.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:45.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:01:45.146 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:01:45.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:45.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:45.146 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:01:45.146 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:01:45.146 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:01:45.146 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:01:45.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:45.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:45.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:45.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:01:45.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:45.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:45.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:45.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:45.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:45.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:45.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:45.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:45.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:45.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:45.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:45.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:45.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:45.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:45.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:45.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:45.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:45.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:45.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:45.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:45.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:45.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:45.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:45.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:45.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:45.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:45.151 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:01:45.635 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:01:45.662 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:01:45.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:01:45.664 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:01:45.665 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:01:45.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:01:45.675 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:01:45.675 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:01:45.675 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:01:45.678 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:01:45.678 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:01:45.678 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:01:45.678 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:01:45.678 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:01:45.678 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:01:45.678 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:01:45.678 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=112 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:01:45.678 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=112 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:01:45.678 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=112 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:01:45.678 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=112 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:01:45.678 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=112 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:01:45.678 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=112 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:01:45.678 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=113 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:01:45.678 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=113 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:01:45.678 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=113 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:01:45.678 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=113 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:01:45.678 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=113 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:01:45.678 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=113 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:01:45.678 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=113 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:01:45.678 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=113 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:01:50.679 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:01:50.680 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:01:50.682 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:01:50.683 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:01:50.683 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:01:50.684 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:01:50.692 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:01:50.695 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:01:50.695 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:01:50.695 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:01:50.696 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:01:50.699 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:01:50.700 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:01:50.700 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:01:50.700 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:01:50.700 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:01:50.701 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:01:50.701 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:01:50.701 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:01:50.703 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:01:50.704 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:01:50.704 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:01:50.704 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:01:50.704 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:01:50.704 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:01:50.704 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:01:50.704 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:01:50.707 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:01:50.707 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:01:50.707 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:01:50.707 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:01:50.707 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:01:50.707 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:01:50.707 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:01:50.707 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:01:50.711 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:01:50.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:01:50.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:01:50.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:01:50.711 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:01:50.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:01:50.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:01:50.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:01:50.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:50.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:01:50.711 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:01:50.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:50.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:50.711 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:01:50.711 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:01:50.711 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:01:50.712 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:01:50.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:50.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:50.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:50.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:01:50.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:50.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:50.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:50.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:50.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:50.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:50.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:50.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:50.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:50.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:50.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:50.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:50.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:50.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:50.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:50.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:50.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:50.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:50.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:50.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:50.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:50.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:50.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:50.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:50.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:50.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:50.716 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:01:51.200 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:01:51.232 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:01:51.235 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:01:51.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:01:51.237 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:01:51.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:01:51.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:01:51.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:01:51.288 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:01:51.288 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:01:51.290 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:01:51.290 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:01:51.290 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:01:51.290 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:01:51.290 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:01:51.290 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:01:51.290 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:01:51.290 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:01:51.290 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:01:51.290 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:01:51.290 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:01:51.290 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:01:51.290 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:01:56.292 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:01:56.292 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:01:56.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:01:56.294 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:01:56.295 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:01:56.295 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:01:56.304 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:01:56.305 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:01:56.305 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:01:56.305 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:01:56.305 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:01:56.308 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:01:56.308 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:01:56.308 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:01:56.309 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:01:56.309 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:01:56.309 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:01:56.309 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:01:56.310 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:01:56.311 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:01:56.311 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:01:56.312 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:01:56.312 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:01:56.312 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:01:56.312 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:01:56.312 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:01:56.312 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:01:56.314 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:01:56.314 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:01:56.315 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:01:56.315 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:01:56.315 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:01:56.315 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:01:56.315 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:01:56.315 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:01:56.319 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:01:56.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:01:56.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:01:56.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:01:56.319 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:01:56.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:01:56.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:01:56.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:01:56.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:56.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:01:56.319 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:01:56.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:56.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:56.319 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:01:56.319 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:01:56.319 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:01:56.320 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:01:56.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:56.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:56.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:56.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:01:56.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:56.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:56.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:56.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:56.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:56.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:56.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:56.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:56.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:56.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:56.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:56.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:56.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:56.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:56.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:56.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:56.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:01:56.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:56.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:56.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:56.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:01:56.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:56.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:56.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:56.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:01:56.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:01:56.324 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:01:56.809 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:01:56.842 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:01:56.843 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:01:56.845 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:01:56.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:01:56.899 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:01:56.899 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:01:56.899 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:01:56.899 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:01:56.904 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:01:56.905 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:01:56.905 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:01:56.905 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:01:56.905 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:01:56.905 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:01:56.905 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:01:56.905 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:01:56.906 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:01:56.906 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:01:56.906 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:01:56.906 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:01:56.906 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:02:01.903 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:02:01.903 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:02:01.904 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:02:01.905 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:02:01.905 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:02:01.906 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:02:01.915 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:02:01.916 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:02:01.916 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:02:01.917 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:02:01.917 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:02:01.920 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:02:01.920 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:02:01.920 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:02:01.921 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:02:01.921 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:02:01.921 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:02:01.921 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:02:01.922 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:02:01.924 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:02:01.924 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:02:01.925 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:02:01.925 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:02:01.925 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:02:01.925 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:02:01.925 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:02:01.925 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:02:01.929 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:02:01.929 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:02:01.929 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:02:01.929 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:02:01.929 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:02:01.929 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:02:01.930 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:02:01.930 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:02:01.935 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:02:01.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:02:01.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:02:01.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:02:01.935 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:02:01.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:02:01.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:02:01.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:02:01.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:01.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:02:01.936 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:02:01.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:01.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:01.936 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:02:01.936 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:02:01.936 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:02:01.936 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:02:01.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:01.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:01.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:01.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:02:01.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:01.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:01.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:01.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:01.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:01.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:01.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:01.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:01.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:01.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:01.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:01.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:01.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:01.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:01.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:01.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:01.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:01.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:01.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:01.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:01.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:01.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:01.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:01.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:01.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:01.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:01.941 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:02:02.424 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:02:02.459 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:02:02.461 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:02:02.463 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:02:02.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:02:02.469 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:02:02.469 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:02:02.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:02:02.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:02:02.471 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:02:02.471 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:02:02.471 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:02:02.471 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:02:02.902 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:02:02.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:02:02.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:02:02.941 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:02:02.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:02:03.379 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:02:03.857 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:02:03.941 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:02:03.941 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:02:03.941 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:02:03.942 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:02:04.336 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:02:04.813 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:02:04.942 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:02:04.942 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:02:04.942 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:02:04.942 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:02:05.291 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:02:05.535 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:02:05.535 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2025-12-15 05:02:05.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:02:05.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:02:05.579 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:02:05.580 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:02:05.580 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:02:05.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:02:05.587 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:02:05.587 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:02:05.587 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:02:05.587 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:02:05.593 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:02:05.594 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:02:05.594 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:02:05.594 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:02:05.595 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:02:05.595 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:02:05.595 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:02:10.593 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:02:10.593 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:02:10.594 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:02:10.595 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:02:10.596 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:02:10.597 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:02:10.605 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:02:10.606 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:02:10.606 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:02:10.607 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:02:10.607 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:02:10.610 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:02:10.610 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:02:10.610 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:02:10.610 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:02:10.611 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:02:10.611 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:02:10.611 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:02:10.611 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:02:10.613 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:02:10.614 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:02:10.614 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:02:10.614 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:02:10.614 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:02:10.614 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:02:10.614 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:02:10.614 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:02:10.616 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:02:10.616 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:02:10.617 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:02:10.617 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:02:10.617 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:02:10.617 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:02:10.617 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:02:10.617 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:02:10.620 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:02:10.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:02:10.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:02:10.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:02:10.620 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:02:10.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:02:10.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:02:10.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:02:10.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:10.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:02:10.621 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:02:10.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:10.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:10.621 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:02:10.621 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:02:10.621 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:02:10.621 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:02:10.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:10.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:10.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:10.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:02:10.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:10.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:10.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:10.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:10.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:10.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:10.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:10.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:10.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:10.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:10.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:10.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:10.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:10.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:10.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:10.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:10.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:10.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:10.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:10.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:10.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:10.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:10.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:10.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:10.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:10.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:10.626 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:02:11.108 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:02:11.145 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:02:11.148 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:02:11.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:02:11.150 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:02:11.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:02:11.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:02:11.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:02:11.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:02:11.160 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:02:11.160 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:02:11.160 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:02:11.160 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:02:11.585 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:02:11.623 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:02:11.624 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:02:11.624 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:02:11.624 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:02:12.063 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:02:12.541 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:02:12.624 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:02:12.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:02:12.625 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:02:12.625 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:02:13.019 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:02:13.497 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:02:13.626 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:02:13.627 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:02:13.627 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:02:13.627 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:02:13.975 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:02:14.218 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:02:14.218 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2025-12-15 05:02:14.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:02:14.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:02:14.453 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:02:14.627 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:02:14.628 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:02:14.628 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:02:14.628 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:02:14.931 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:02:14.943 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:02:14.943 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:02:14.943 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:02:14.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:02:14.950 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:02:14.950 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:02:14.950 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:02:14.950 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:02:14.951 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:02:14.951 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:02:14.951 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:02:14.951 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:02:14.951 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:02:14.951 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:02:14.951 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:02:19.954 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:02:19.955 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:02:19.957 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:02:19.958 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:02:19.958 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:02:19.959 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:02:19.967 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:02:19.968 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:02:19.968 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:02:19.969 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:02:19.969 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:02:19.973 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:02:19.973 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:02:19.974 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:02:19.974 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:02:19.974 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:02:19.974 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:02:19.975 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:02:19.975 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:02:19.978 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:02:19.978 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:02:19.978 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:02:19.978 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:02:19.979 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:02:19.979 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:02:19.979 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:02:19.979 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:02:19.983 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:02:19.983 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:02:19.983 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:02:19.983 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:02:19.984 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:02:19.984 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:02:19.984 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:02:19.984 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:02:19.989 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:02:19.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:02:19.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:02:19.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:02:19.989 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:02:19.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:02:19.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:02:19.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:02:19.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:02:19.990 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:02:19.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:19.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:19.990 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:02:19.990 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:02:19.990 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:02:19.990 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:02:19.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:19.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:19.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:19.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:02:19.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:19.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:19.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:19.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:19.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:19.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:19.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:19.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:19.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:19.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:19.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:19.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:19.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:19.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:19.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:19.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:19.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:19.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:19.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:19.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:19.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:19.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:19.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:19.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:19.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:19.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:19.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:19.995 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:02:20.479 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:02:20.514 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:02:20.515 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:02:20.516 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:02:20.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:02:20.522 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:02:20.522 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:02:20.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:02:20.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:02:20.524 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:02:20.524 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:02:20.524 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:02:20.524 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:02:20.957 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:02:20.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:02:20.995 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:02:20.995 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:02:20.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:02:21.434 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:02:21.913 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:02:21.995 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:02:21.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:02:21.996 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:02:21.996 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:02:22.390 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:02:22.868 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:02:22.996 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:02:22.997 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:02:22.997 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:02:22.997 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:02:23.346 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:02:23.589 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:02:23.589 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2025-12-15 05:02:23.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:02:23.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:02:23.824 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:02:23.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:02:23.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:02:23.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:02:23.998 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:02:24.303 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:02:24.780 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:02:24.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:02:24.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:02:24.999 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:02:24.999 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:02:25.259 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:02:25.737 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:02:26.215 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:02:26.694 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:02:27.172 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:02:27.650 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:02:28.128 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:02:28.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:02:28.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:02:28.592 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:02:28.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:02:28.607 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:02:28.607 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:02:28.608 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:02:28.608 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:02:28.608 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:02:28.610 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:02:28.610 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:02:28.610 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:02:28.610 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:02:28.610 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:02:28.610 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:02:28.610 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:02:33.612 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:02:33.613 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:02:33.614 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:02:33.615 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:02:33.615 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:02:33.616 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:02:33.629 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:02:33.629 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:02:33.629 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:02:33.630 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:02:33.630 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:02:33.634 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:02:33.634 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:02:33.634 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:02:33.634 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:02:33.634 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:02:33.634 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:02:33.634 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:02:33.634 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:02:33.637 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:02:33.637 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:02:33.637 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:02:33.637 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:02:33.637 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:02:33.637 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:02:33.637 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:02:33.637 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:02:33.639 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:02:33.639 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:02:33.639 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:02:33.639 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:02:33.639 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:02:33.639 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:02:33.640 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:02:33.640 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:02:33.643 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:02:33.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:02:33.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:02:33.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:02:33.643 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:02:33.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:02:33.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:02:33.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:02:33.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:02:33.643 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:02:33.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:33.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:33.643 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:02:33.643 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:02:33.643 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:02:33.643 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:02:33.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:33.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:33.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:33.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:02:33.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:33.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:33.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:33.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:33.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:33.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:33.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:33.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:33.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:33.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:33.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:33.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:33.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:33.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:33.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:33.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:33.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:33.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:33.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:33.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:33.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:33.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:33.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:33.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:33.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:33.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:33.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:33.648 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:02:34.130 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:02:34.164 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:02:34.165 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:02:34.166 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:02:34.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:02:34.170 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:02:34.170 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:02:34.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:02:34.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:02:34.171 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:02:34.171 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:02:34.171 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:02:34.171 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:02:34.607 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:02:34.646 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:02:34.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:02:34.647 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:02:34.647 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:02:35.085 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:02:35.564 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:02:35.647 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:02:35.648 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:02:35.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:02:35.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:02:36.042 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:02:36.520 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:02:36.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:02:36.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:02:36.649 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:02:36.649 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:02:36.998 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:02:37.181 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:02:37.181 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2025-12-15 05:02:37.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:02:37.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:02:37.476 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:02:37.650 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:02:37.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:02:37.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:02:37.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:02:37.954 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:02:38.432 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:02:38.650 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:02:38.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:02:38.651 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:02:38.651 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:02:38.910 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:02:39.388 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:02:39.866 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:02:40.344 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:02:40.823 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:02:41.301 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:02:41.779 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:02:42.184 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:02:42.184 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:02:42.184 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:02:42.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:02:42.202 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:02:42.202 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:02:42.202 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:02:42.202 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:02:42.203 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:02:42.203 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:02:42.203 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:02:42.203 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:02:42.203 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:02:42.203 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:02:42.203 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:02:42.204 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1827 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:02:42.204 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1827 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:02:42.204 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1828 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:02:42.204 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1828 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:02:42.204 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1828 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:02:42.204 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1828 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:02:42.204 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1828 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:02:42.204 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1828 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:02:42.204 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1828 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:02:42.204 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1828 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:02:47.207 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:02:47.207 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:02:47.210 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:02:47.211 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:02:47.211 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:02:47.212 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:02:47.220 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:02:47.221 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:02:47.222 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:02:47.222 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:02:47.222 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:02:47.226 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:02:47.226 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:02:47.226 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:02:47.227 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:02:47.227 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:02:47.227 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:02:47.227 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:02:47.227 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:02:47.231 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:02:47.231 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:02:47.232 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:02:47.232 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:02:47.232 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:02:47.232 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:02:47.232 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:02:47.232 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:02:47.236 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:02:47.236 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:02:47.236 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:02:47.236 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:02:47.237 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:02:47.237 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:02:47.237 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:02:47.237 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:02:47.243 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:02:47.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:02:47.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:02:47.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:02:47.243 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:02:47.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:02:47.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:02:47.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:02:47.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:47.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:02:47.244 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:02:47.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:47.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:47.245 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:02:47.245 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:02:47.245 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:02:47.245 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:02:47.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:47.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:47.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:47.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:02:47.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:47.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:47.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:47.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:47.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:47.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:47.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:47.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:47.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:47.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:47.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:47.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:47.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:47.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:47.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:47.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:47.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:02:47.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:47.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:47.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:47.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:47.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:47.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:02:47.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:02:47.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:47.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:02:47.250 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:02:47.734 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:02:47.763 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:02:47.764 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:02:47.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:02:47.765 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:02:47.767 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:02:47.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:02:47.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:02:47.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:02:47.768 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:02:47.768 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:02:47.768 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:02:47.768 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:02:48.212 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:02:48.248 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:02:48.249 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:02:48.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:02:48.250 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:02:48.689 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:02:49.167 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:02:49.250 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:02:49.250 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:02:49.250 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:02:49.250 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:02:49.645 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:02:50.122 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:02:50.251 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:02:50.251 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:02:50.251 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:02:50.251 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:02:50.600 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:02:50.783 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:02:50.783 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2025-12-15 05:02:50.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:02:50.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:02:51.079 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:02:51.252 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:02:51.253 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:02:51.253 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:02:51.253 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:02:51.557 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:02:52.036 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:02:52.253 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:02:52.254 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:02:52.254 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:02:52.254 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:02:52.514 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:02:52.992 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:02:53.470 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:02:53.948 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:02:54.427 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:02:54.905 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:02:55.384 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:02:55.786 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:02:55.787 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:02:55.787 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:02:55.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:02:55.805 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:02:55.806 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:02:55.806 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:02:55.806 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:02:55.807 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:02:55.807 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:02:55.807 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:02:55.807 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:02:55.807 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:02:55.807 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:02:55.807 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:03:00.810 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:03:00.810 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:03:00.813 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:03:00.813 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:03:00.814 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:03:00.815 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:03:00.827 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:03:00.829 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:03:00.829 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:03:00.830 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:03:00.830 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:03:00.835 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:03:00.835 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:03:00.836 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:03:00.836 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:03:00.836 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:03:00.837 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:03:00.837 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:03:00.837 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:03:00.840 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:03:00.841 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:03:00.841 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:03:00.841 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:03:00.841 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:03:00.842 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:03:00.842 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:03:00.842 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:03:00.845 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:03:00.845 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:03:00.846 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:03:00.846 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:03:00.846 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:03:00.846 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:03:00.846 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:03:00.846 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:03:00.851 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:03:00.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:03:00.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:03:00.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:03:00.851 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:03:00.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:03:00.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:03:00.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:03:00.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:00.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:03:00.852 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:03:00.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:00.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:00.852 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:03:00.852 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:03:00.852 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:03:00.852 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:03:00.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:00.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:00.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:00.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:03:00.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:00.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:00.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:00.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:00.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:00.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:00.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:00.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:00.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:00.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:00.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:00.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:00.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:00.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:00.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:00.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:00.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:00.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:00.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:00.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:00.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:00.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:00.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:00.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:00.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:00.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:00.857 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:03:01.341 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:03:01.376 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:03:01.378 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:03:01.379 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:03:01.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:03:01.383 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:03:01.383 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:03:01.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:03:01.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:03:01.384 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:03:01.384 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:03:01.384 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:03:01.384 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:03:01.431 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:03:01.432 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2025-12-15 05:03:01.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:03:01.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:03:01.819 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:03:01.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:03:01.856 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:03:01.857 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:03:01.858 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:03:02.296 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:03:02.775 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:03:02.857 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:03:02.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:03:02.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:03:02.860 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:03:03.253 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:03:03.732 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:03:03.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:03:03.859 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:03:03.859 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:03:03.860 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:03:04.210 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:03:04.689 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:03:04.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:03:04.860 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:03:04.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:03:04.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:03:05.167 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:03:05.645 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:03:05.861 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:03:05.861 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:03:05.861 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:03:05.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:03:06.124 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:03:06.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:03:06.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:03:06.434 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:03:06.445 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:03:06.445 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:03:06.445 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:03:06.446 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:03:06.449 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:03:06.449 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:03:06.449 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:03:06.449 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:03:06.449 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:03:06.449 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:03:06.449 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:03:11.450 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:03:11.450 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:03:11.452 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:03:11.452 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:03:11.453 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:03:11.453 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:03:11.463 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:03:11.464 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:03:11.464 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:03:11.464 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:03:11.464 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:03:11.468 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:03:11.468 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:03:11.468 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:03:11.468 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:03:11.468 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:03:11.469 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:03:11.469 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:03:11.469 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:03:11.471 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:03:11.471 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:03:11.472 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:03:11.472 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:03:11.472 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:03:11.472 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:03:11.472 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:03:11.472 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:03:11.474 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:03:11.474 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:03:11.474 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:03:11.474 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:03:11.475 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:03:11.475 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:03:11.475 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:03:11.475 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:03:11.478 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:03:11.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:03:11.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:03:11.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:03:11.478 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:03:11.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:03:11.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:03:11.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:03:11.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:03:11.479 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:03:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:11.479 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:03:11.479 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:03:11.479 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:03:11.479 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:03:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:11.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:03:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:11.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:11.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:11.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:11.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:11.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:11.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:11.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:11.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:11.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:11.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:11.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:11.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:11.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:11.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:11.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:11.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:11.484 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:03:11.967 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:03:11.997 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:03:11.999 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:03:12.000 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:03:12.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:03:12.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:03:12.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:03:12.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:03:12.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:03:12.010 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:03:12.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:03:12.011 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:03:12.011 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:03:12.445 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:03:12.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:03:12.482 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:03:12.482 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:03:12.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:03:12.922 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:03:13.400 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:03:13.483 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:03:13.483 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:03:13.483 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:03:13.483 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:03:13.878 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:03:14.356 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:03:14.485 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:03:14.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:03:14.485 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:03:14.485 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:03:14.834 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:03:15.077 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:03:15.077 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2025-12-15 05:03:15.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:03:15.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:03:15.313 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:03:15.485 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:03:15.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:03:15.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:03:15.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:03:15.791 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:03:16.270 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:03:16.486 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:03:16.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:03:16.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:03:16.487 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:03:16.749 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:03:17.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:03:17.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:03:17.079 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:03:17.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:03:17.090 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:03:17.090 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:03:17.090 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:03:17.090 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:03:17.092 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:03:17.092 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:03:17.092 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:03:17.092 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:03:17.092 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:03:17.092 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:03:17.092 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:03:22.096 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:03:22.096 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:03:22.097 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:03:22.098 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:03:22.098 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:03:22.099 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:03:22.108 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:03:22.109 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:03:22.109 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:03:22.109 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:03:22.109 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:03:22.113 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:03:22.114 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:03:22.114 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:03:22.114 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:03:22.115 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:03:22.115 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:03:22.115 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:03:22.115 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:03:22.117 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:03:22.118 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:03:22.118 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:03:22.118 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:03:22.118 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:03:22.118 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:03:22.118 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:03:22.118 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:03:22.121 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:03:22.121 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:03:22.121 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:03:22.121 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:03:22.121 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:03:22.121 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:03:22.121 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:03:22.121 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:03:22.125 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:03:22.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:03:22.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:03:22.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:03:22.126 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:03:22.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:03:22.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:03:22.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:03:22.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:22.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:03:22.126 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:03:22.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:22.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:22.126 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:03:22.126 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:03:22.126 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:03:22.127 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:03:22.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:22.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:22.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:22.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:03:22.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:22.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:22.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:22.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:22.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:22.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:22.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:22.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:22.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:22.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:22.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:22.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:22.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:22.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:22.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:22.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:22.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:22.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:22.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:22.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:22.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:22.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:22.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:22.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:22.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:22.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:22.131 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:03:22.615 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:03:22.651 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:03:22.653 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:03:22.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:03:22.654 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:03:22.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:03:22.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:03:22.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:03:22.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:03:22.662 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:03:22.662 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:03:22.662 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:03:22.662 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:03:23.092 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:03:23.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:03:23.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:03:23.131 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:03:23.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:03:23.569 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:03:24.047 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:03:24.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:03:24.131 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:03:24.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:03:24.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:03:24.525 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:03:25.003 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:03:25.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:03:25.133 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:03:25.133 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:03:25.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:03:25.481 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:03:25.779 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:03:25.779 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:03:25.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:03:25.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:03:25.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:03:25.786 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:03:25.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:03:25.787 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:03:25.787 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:03:25.787 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:03:25.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:03:25.787 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:03:25.787 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:03:25.787 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:03:30.791 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:03:30.791 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:03:30.792 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:03:30.792 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:03:30.792 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:03:30.793 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:03:30.803 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:03:30.805 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:03:30.805 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:03:30.805 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:03:30.806 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:03:30.818 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:03:30.818 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:03:30.819 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:03:30.819 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:03:30.820 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:03:30.820 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:03:30.821 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:03:30.821 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:03:30.826 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:03:30.826 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:03:30.826 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:03:30.827 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:03:30.827 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:03:30.828 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:03:30.828 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:03:30.828 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:03:30.831 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:03:30.832 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:03:30.832 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:03:30.832 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:03:30.832 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:03:30.833 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:03:30.833 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:03:30.833 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:03:30.838 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:03:30.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:03:30.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:03:30.838 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:03:30.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:03:30.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:03:30.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:03:30.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:03:30.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:30.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:03:30.839 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:03:30.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:30.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:30.839 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:03:30.839 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:03:30.839 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:03:30.839 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:03:30.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:30.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:30.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:30.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:03:30.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:30.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:30.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:30.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:30.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:30.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:30.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:30.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:30.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:30.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:30.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:30.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:30.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:30.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:30.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:30.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:30.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:30.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:30.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:30.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:30.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:30.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:30.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:30.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:30.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:30.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:30.844 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:03:31.329 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:03:31.364 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:03:31.365 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:03:31.367 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:03:31.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:03:31.372 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:03:31.372 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:03:31.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:03:31.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:03:31.372 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:03:31.373 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:03:31.373 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:03:31.373 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:03:31.807 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:03:31.843 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:03:31.843 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:03:31.844 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:03:31.844 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:03:32.284 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:03:32.762 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:03:32.845 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:03:32.845 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:03:32.845 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:03:32.845 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:03:33.240 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:03:33.718 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:03:33.846 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:03:33.846 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:03:33.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:03:33.846 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:03:34.197 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:03:34.513 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:03:34.513 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:03:34.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:03:34.520 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:03:34.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:03:34.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:03:34.521 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:03:34.525 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:03:34.525 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:03:34.526 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:03:34.526 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:03:34.526 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:03:34.526 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:03:34.526 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:03:34.526 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=787 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:03:34.527 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=787 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:03:34.527 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=787 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:03:34.527 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=787 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:03:34.527 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=787 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:03:34.527 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=787 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:03:39.524 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:03:39.524 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:03:39.525 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:03:39.526 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:03:39.527 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:03:39.528 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:03:39.536 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:03:39.538 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:03:39.538 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:03:39.538 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:03:39.538 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:03:39.542 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:03:39.542 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:03:39.543 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:03:39.543 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:03:39.543 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:03:39.543 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:03:39.543 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:03:39.543 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:03:39.547 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:03:39.547 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:03:39.547 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:03:39.548 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:03:39.548 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:03:39.548 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:03:39.548 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:03:39.548 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:03:39.551 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:03:39.552 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:03:39.552 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:03:39.552 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:03:39.552 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:03:39.552 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:03:39.552 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:03:39.552 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:03:39.557 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:03:39.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:03:39.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:03:39.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:03:39.557 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:03:39.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:03:39.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:03:39.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:03:39.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:39.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:03:39.558 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:03:39.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:39.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:39.558 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:03:39.558 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:03:39.558 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:03:39.558 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:03:39.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:39.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:39.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:39.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:03:39.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:39.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:39.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:39.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:39.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:39.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:39.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:39.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:39.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:39.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:39.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:39.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:39.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:39.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:39.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:39.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:39.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:39.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:39.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:39.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:39.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:39.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:39.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:39.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:39.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:39.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:39.563 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:03:40.047 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:03:40.078 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:03:40.079 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:03:40.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:03:40.081 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:03:40.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:03:40.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:03:40.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:03:40.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:03:40.085 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:03:40.085 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:03:40.086 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:03:40.086 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:03:40.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:03:40.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:03:40.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:03:40.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:03:40.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:03:40.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:03:40.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:03:40.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:03:40.372 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:03:40.372 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:03:40.372 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:03:40.372 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:03:40.372 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:03:45.375 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:03:45.375 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:03:45.376 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:03:45.376 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:03:45.376 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:03:45.377 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:03:45.388 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:03:45.389 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:03:45.390 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:03:45.390 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:03:45.390 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:03:45.395 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:03:45.396 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:03:45.396 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:03:45.396 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:03:45.396 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:03:45.397 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:03:45.397 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:03:45.397 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:03:45.400 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:03:45.400 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:03:45.401 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:03:45.401 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:03:45.401 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:03:45.401 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:03:45.401 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:03:45.401 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:03:45.404 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:03:45.405 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:03:45.405 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:03:45.405 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:03:45.405 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:03:45.405 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:03:45.405 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:03:45.405 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:03:45.409 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:03:45.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:03:45.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:03:45.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:03:45.409 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:03:45.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:03:45.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:03:45.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:03:45.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:45.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:03:45.410 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:03:45.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:45.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:45.410 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:03:45.410 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:03:45.410 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:03:45.410 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:03:45.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:45.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:45.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:45.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:03:45.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:45.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:45.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:45.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:45.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:45.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:45.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:45.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:45.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:45.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:45.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:45.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:45.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:45.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:45.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:45.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:45.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:45.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:45.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:45.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:45.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:45.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:45.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:45.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:45.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:45.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:45.415 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:03:45.899 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:03:45.931 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:03:45.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:03:45.933 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:03:45.935 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:03:45.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:03:45.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:03:45.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:03:45.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:03:45.940 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:03:45.941 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:03:45.941 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:03:45.941 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:03:45.979 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:03:45.979 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:03:45.985 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:03:45.985 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:03:45.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:03:45.985 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:03:45.986 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:03:45.986 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:03:45.986 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:03:45.986 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:03:45.987 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:03:45.987 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:03:45.987 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:03:45.987 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:03:45.987 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:03:45.987 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:03:50.990 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:03:50.991 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:03:50.994 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:03:50.995 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:03:50.995 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:03:50.995 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:03:51.005 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:03:51.007 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:03:51.007 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:03:51.007 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:03:51.007 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:03:51.011 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:03:51.011 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:03:51.012 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:03:51.012 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:03:51.012 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:03:51.012 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:03:51.012 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:03:51.012 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:03:51.016 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:03:51.016 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:03:51.016 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:03:51.016 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:03:51.017 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:03:51.017 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:03:51.017 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:03:51.017 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:03:51.021 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:03:51.021 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:03:51.021 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:03:51.021 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:03:51.021 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:03:51.021 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:03:51.021 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:03:51.021 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:03:51.027 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:03:51.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:03:51.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:03:51.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:03:51.027 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:03:51.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:03:51.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:03:51.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:03:51.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:51.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:03:51.028 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:03:51.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:51.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:51.028 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:03:51.028 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:03:51.028 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:03:51.028 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:03:51.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:51.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:51.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:51.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:03:51.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:51.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:51.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:51.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:51.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:51.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:51.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:51.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:51.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:51.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:51.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:51.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:51.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:51.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:51.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:51.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:51.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:03:51.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:51.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:51.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:51.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:51.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:51.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:03:51.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:03:51.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:51.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:03:51.033 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:03:51.517 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:03:51.551 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:03:51.553 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:03:51.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:03:51.555 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:03:51.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:03:51.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:03:51.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:03:51.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:03:51.561 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:03:51.561 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:03:51.561 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:03:51.561 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:03:51.995 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:03:52.031 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:03:52.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:03:52.032 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:03:52.033 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:03:52.474 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:03:52.952 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:03:53.033 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:03:53.033 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:03:53.033 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:03:53.034 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:03:53.429 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:03:53.907 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:03:54.034 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:03:54.035 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:03:54.035 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:03:54.035 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:03:54.385 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:03:54.863 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:03:55.035 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:03:55.035 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:03:55.035 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:03:55.036 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:03:55.341 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:03:55.819 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:03:56.036 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:03:56.037 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:03:56.037 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:03:56.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:03:56.297 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:03:56.775 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:03:57.253 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:03:57.732 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:03:58.209 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:03:58.688 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:03:59.167 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:03:59.646 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:04:00.124 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:04:00.474 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:04:00.474 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:04:00.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:04:00.480 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:04:00.480 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:04:00.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:04:00.481 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:04:00.481 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:04:00.481 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:04:00.481 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:04:00.481 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:04:00.481 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:04:00.481 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:04:00.481 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2017 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:04:00.481 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2017 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:04:00.481 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2017 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:04:00.481 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2017 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:04:00.481 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2017 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:04:00.481 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2017 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:04:05.484 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:04:05.485 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:04:05.486 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:04:05.487 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:04:05.487 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:04:05.488 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:04:05.498 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:04:05.500 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:04:05.500 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:04:05.501 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:04:05.501 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:04:05.505 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:04:05.505 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:04:05.505 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:04:05.505 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:04:05.505 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:04:05.505 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:04:05.506 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:04:05.506 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:04:05.509 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:04:05.509 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:04:05.510 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:04:05.510 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:04:05.510 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:04:05.510 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:04:05.510 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:04:05.510 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:04:05.514 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:04:05.514 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:04:05.514 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:04:05.514 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:04:05.514 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:04:05.514 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:04:05.514 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:04:05.514 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:04:05.519 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:04:05.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:04:05.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:04:05.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:04:05.519 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:04:05.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:04:05.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:04:05.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:04:05.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:05.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:04:05.520 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:04:05.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:05.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:05.520 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:04:05.520 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:04:05.520 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:04:05.521 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:04:05.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:05.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:05.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:05.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:04:05.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:05.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:05.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:05.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:05.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:05.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:05.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:05.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:05.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:05.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:05.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:05.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:05.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:05.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:05.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:05.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:05.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:05.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:05.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:05.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:05.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:05.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:05.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:05.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:05.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:05.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:05.525 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:04:06.009 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:04:06.043 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:04:06.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:04:06.045 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:04:06.046 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:04:06.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:04:06.053 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:04:06.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:04:06.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:04:06.054 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:04:06.054 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:04:06.054 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:04:06.054 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:04:06.486 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:04:06.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:04:06.525 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:04:06.525 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:04:06.525 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:04:06.964 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:04:07.443 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:04:07.525 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:04:07.525 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:04:07.526 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:04:07.526 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:04:07.920 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:04:08.398 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:04:08.526 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:04:08.526 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:04:08.526 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:04:08.526 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:04:08.875 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:04:09.353 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:04:09.527 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:04:09.527 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:04:09.528 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:04:09.528 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:04:09.832 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:04:10.310 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:04:10.528 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:04:10.528 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:04:10.529 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:04:10.529 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:04:10.789 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:04:11.267 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:04:11.746 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:04:12.224 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:04:12.702 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:04:13.180 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:04:13.659 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:04:14.137 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:04:14.614 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:04:14.951 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:04:14.951 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:04:14.958 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:04:14.958 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:04:14.958 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:04:14.959 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:04:14.960 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:04:14.960 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:04:14.960 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:04:14.960 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:04:14.960 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:04:14.960 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:04:14.960 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:04:19.961 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:04:19.962 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:04:19.964 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:04:19.965 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:04:19.966 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:04:19.967 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:04:19.976 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:04:19.977 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:04:19.977 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:04:19.977 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:04:19.977 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:04:19.984 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:04:19.985 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:04:19.985 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:04:19.985 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:04:19.986 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:04:19.986 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:04:19.986 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:04:19.987 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:04:19.989 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:04:19.989 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:04:19.990 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:04:19.990 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:04:19.990 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:04:19.991 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:04:19.991 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:04:19.991 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:04:19.993 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:04:19.993 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:04:19.993 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:04:19.993 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:04:19.993 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:04:19.994 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:04:19.994 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:04:19.994 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:04:19.998 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:04:19.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:04:19.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:04:19.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:04:19.998 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:04:19.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:04:19.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:04:19.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:04:19.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:19.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:04:19.999 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:04:19.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:19.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:19.999 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:04:19.999 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:04:19.999 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:04:19.999 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:04:19.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:19.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:19.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:19.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:04:19.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:19.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:19.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:19.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:19.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:19.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:19.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:19.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:20.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:20.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:20.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:20.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:20.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:20.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:20.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:20.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:20.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:20.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:20.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:20.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:20.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:20.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:20.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:20.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:20.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:20.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:20.004 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:04:20.487 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:04:20.519 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:04:20.521 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:04:20.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:04:20.522 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:04:20.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:04:20.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:04:20.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:04:20.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:04:20.530 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:04:20.530 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:04:20.530 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:04:20.530 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:04:20.964 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:04:21.002 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:04:21.002 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:04:21.003 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:04:21.003 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:04:21.442 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:04:21.920 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:04:22.002 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:04:22.003 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:04:22.003 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:04:22.004 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:04:22.398 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:04:22.876 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:04:23.004 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:04:23.004 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:04:23.004 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:04:23.005 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:04:23.354 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:04:23.597 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:04:23.597 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2025-12-15 05:04:23.598 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:04:23.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:04:23.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:04:23.832 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:04:24.006 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:04:24.006 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:04:24.006 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:04:24.006 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:04:24.310 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:04:24.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:04:24.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:04:24.636 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:04:24.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:04:24.645 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:04:24.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:04:24.645 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:04:24.645 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:04:24.646 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:04:24.646 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:04:24.646 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:04:24.646 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:04:24.646 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:04:24.646 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:04:24.646 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:04:24.646 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=992 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:04:24.647 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=992 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:04:29.651 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:04:29.651 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:04:29.652 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:04:29.652 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:04:29.652 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:04:29.653 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:04:29.663 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:04:29.665 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:04:29.665 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:04:29.665 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:04:29.665 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:04:29.669 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:04:29.670 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:04:29.670 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:04:29.670 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:04:29.671 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:04:29.671 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:04:29.671 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:04:29.671 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:04:29.674 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:04:29.674 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:04:29.674 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:04:29.674 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:04:29.674 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:04:29.674 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:04:29.675 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:04:29.675 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:04:29.678 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:04:29.678 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:04:29.678 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:04:29.678 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:04:29.678 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:04:29.679 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:04:29.679 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:04:29.679 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:04:29.682 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:04:29.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:04:29.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:04:29.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:04:29.682 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:04:29.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:04:29.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:04:29.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:04:29.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:29.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:04:29.683 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:04:29.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:29.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:29.683 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:04:29.683 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:04:29.683 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:04:29.683 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:04:29.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:29.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:29.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:29.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:04:29.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:29.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:29.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:29.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:29.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:29.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:29.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:29.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:29.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:29.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:29.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:29.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:29.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:29.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:29.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:29.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:29.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:29.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:29.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:29.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:29.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:29.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:29.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:29.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:29.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:29.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:29.688 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:04:30.171 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:04:30.203 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:04:30.205 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:04:30.206 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:04:30.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:04:30.575 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:04:30.575 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:04:30.575 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:04:30.575 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:04:30.581 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:04:30.581 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:04:30.581 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:04:30.581 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:04:30.582 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:04:30.582 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:04:30.582 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:04:30.582 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=192 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:04:30.583 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=192 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:04:35.579 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:04:35.580 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:04:35.582 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:04:35.583 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:04:35.583 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:04:35.584 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:04:35.591 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:04:35.592 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:04:35.593 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:04:35.593 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:04:35.593 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:04:35.595 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:04:35.596 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:04:35.596 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:04:35.596 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:04:35.596 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:04:35.596 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:04:35.597 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:04:35.597 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:04:35.598 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:04:35.598 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:04:35.598 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:04:35.598 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:04:35.598 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:04:35.598 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:04:35.598 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:04:35.598 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:04:35.600 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:04:35.600 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:04:35.600 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:04:35.600 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:04:35.601 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:04:35.601 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:04:35.601 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:04:35.601 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:04:35.603 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:04:35.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:04:35.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:04:35.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:04:35.603 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:04:35.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:04:35.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:04:35.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:04:35.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:35.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:04:35.603 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:04:35.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:35.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:35.603 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:04:35.603 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:04:35.604 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:04:35.604 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:04:35.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:35.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:35.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:35.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:04:35.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:35.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:35.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:35.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:35.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:35.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:35.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:35.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:35.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:35.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:35.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:35.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:35.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:35.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:35.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:35.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:35.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:35.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:35.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:35.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:35.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:35.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:35.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:35.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:35.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:35.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:35.608 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:04:36.092 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:04:36.117 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:04:36.119 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:04:36.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:04:36.120 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:04:36.568 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:04:36.606 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:04:36.606 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:04:36.607 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:04:36.607 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:04:37.047 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:04:37.525 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:04:37.608 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:04:37.608 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:04:37.608 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:04:37.608 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:04:38.004 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:04:38.481 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:04:38.609 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:04:38.609 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:04:38.609 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:04:38.609 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:04:38.960 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:04:39.438 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:04:39.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:04:39.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:04:39.610 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:04:39.610 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:04:39.916 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:04:40.395 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:04:40.612 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:04:40.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:04:40.612 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:04:40.612 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:04:40.874 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:04:41.352 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:04:41.831 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:04:42.309 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:04:42.788 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:04:43.267 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:04:43.745 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:04:44.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:04:44.150 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:04:44.150 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:04:44.150 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:04:44.150 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:04:44.151 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:04:44.151 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:04:44.151 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:04:44.151 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:04:44.151 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:04:44.151 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:04:44.151 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:04:44.151 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1823 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:04:44.151 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1823 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:04:44.151 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1823 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:04:44.151 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1823 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:04:49.154 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:04:49.154 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:04:49.156 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:04:49.156 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:04:49.156 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:04:49.157 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:04:49.166 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:04:49.167 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:04:49.168 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:04:49.168 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:04:49.168 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:04:49.172 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:04:49.173 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:04:49.173 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:04:49.173 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:04:49.173 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:04:49.173 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:04:49.173 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:04:49.173 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:04:49.177 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:04:49.177 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:04:49.177 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:04:49.177 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:04:49.177 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:04:49.177 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:04:49.177 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:04:49.177 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:04:49.181 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:04:49.181 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:04:49.181 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:04:49.181 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:04:49.181 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:04:49.181 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:04:49.181 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:04:49.181 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:04:49.186 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:04:49.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:04:49.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:04:49.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:04:49.187 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:04:49.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:04:49.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:04:49.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:04:49.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:49.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:04:49.187 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:04:49.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:49.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:49.187 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:04:49.187 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:04:49.187 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:04:49.188 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:04:49.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:49.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:49.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:49.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:04:49.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:49.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:49.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:49.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:49.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:49.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:49.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:49.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:49.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:49.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:49.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:49.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:49.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:49.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:49.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:49.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:49.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:49.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:49.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:04:49.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:49.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:49.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:49.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:04:49.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:04:49.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:49.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:04:49.192 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:04:49.677 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:04:49.707 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:04:49.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:04:49.710 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:04:49.713 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:04:50.155 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:04:50.192 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:04:50.192 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:04:50.192 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:04:50.192 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:04:50.633 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:04:51.112 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:04:51.193 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:04:51.193 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:04:51.193 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:04:51.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:04:51.590 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:04:52.069 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:04:52.194 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:04:52.195 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:04:52.195 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:04:52.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:04:52.548 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:04:53.026 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:04:53.196 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:04:53.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:04:53.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:04:53.197 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:04:53.504 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:04:53.983 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:04:54.198 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:04:54.198 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:04:54.198 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:04:54.198 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:04:54.462 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:04:54.940 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:04:55.419 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:04:55.898 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:04:56.378 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:04:56.856 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:04:57.335 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:04:57.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:04:57.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:04:57.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:04:57.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:04:57.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:04:57.738 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:04:57.738 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:04:57.738 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:04:57.738 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:04:57.738 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:04:57.738 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:04:57.738 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:04:57.739 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1823 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:04:57.739 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1823 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:04:57.739 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1823 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:04:57.739 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1823 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:04:57.739 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1823 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:04:57.739 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1823 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:04:57.739 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1823 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:02.741 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:05:02.742 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:05:02.744 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:05:02.745 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:05:02.745 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:05:02.747 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:05:02.757 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:05:02.758 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:05:02.758 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:05:02.758 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:05:02.758 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:05:02.760 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:05:02.761 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:05:02.761 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:05:02.761 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:05:02.761 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:05:02.761 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:05:02.762 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:05:02.762 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:05:02.763 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:05:02.763 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:05:02.763 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:05:02.763 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:05:02.763 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:05:02.763 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:05:02.764 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:05:02.764 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:05:02.766 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:05:02.766 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:05:02.766 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:05:02.766 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:05:02.766 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:05:02.766 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:05:02.766 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:05:02.766 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:05:02.770 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:05:02.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:05:02.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:05:02.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:05:02.770 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:05:02.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:05:02.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:05:02.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:05:02.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:02.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:05:02.770 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:05:02.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:02.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:02.770 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:05:02.770 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:05:02.770 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:05:02.771 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:05:02.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:02.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:02.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:02.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:05:02.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:02.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:02.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:02.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:02.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:02.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:02.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:02.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:02.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:02.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:02.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:02.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:02.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:02.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:02.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:02.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:02.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:02.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:02.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:02.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:02.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:02.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:02.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:02.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:02.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:02.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:02.775 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:05:03.258 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:05:03.298 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:05:03.300 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:05:03.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:05:03.302 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:05:03.736 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:05:03.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:05:03.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:05:03.774 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:05:03.775 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:05:04.214 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:05:04.693 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:05:04.776 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:05:04.776 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:05:04.776 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:05:04.776 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:05:05.172 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:05:05.650 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:05:05.777 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:05:05.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:05:05.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:05:05.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:05:06.129 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:05:06.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:05:06.341 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:05:06.341 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:05:06.341 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:05:06.341 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:05:06.342 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:05:06.342 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:05:06.342 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:05:06.342 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:05:06.342 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:05:06.342 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:05:06.342 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:05:06.342 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=762 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:06.342 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=762 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:06.342 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=762 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:06.342 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=762 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:06.342 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=762 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:06.342 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=762 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:06.342 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=762 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:06.342 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=762 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:11.348 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:05:11.348 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:05:11.349 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:05:11.350 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:05:11.350 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:05:11.350 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:05:11.360 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:05:11.361 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:05:11.361 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:05:11.362 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:05:11.362 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:05:11.366 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:05:11.366 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:05:11.366 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:05:11.366 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:05:11.367 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:05:11.367 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:05:11.367 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:05:11.367 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:05:11.372 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:05:11.373 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:05:11.373 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:05:11.373 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:05:11.373 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:05:11.373 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:05:11.373 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:05:11.373 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:05:11.377 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:05:11.377 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:05:11.377 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:05:11.377 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:05:11.377 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:05:11.377 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:05:11.377 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:05:11.377 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:05:11.381 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:05:11.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:05:11.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:05:11.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:05:11.381 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:05:11.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:05:11.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:05:11.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:05:11.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:05:11.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:11.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:11.381 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:05:11.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:11.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:11.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:11.381 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:05:11.381 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:05:11.381 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:05:11.381 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:05:11.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:11.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:11.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:11.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:05:11.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:11.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:11.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:11.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:11.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:11.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:11.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:11.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:11.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:11.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:11.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:11.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:11.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:11.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:11.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:11.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:11.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:11.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:11.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:11.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:11.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:11.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:11.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:11.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:11.386 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:05:11.869 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:05:11.899 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:05:11.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:05:11.901 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:05:11.902 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:05:11.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:05:11.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:05:11.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:05:11.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:05:11.932 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:05:11.932 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:05:11.932 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:05:11.932 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:05:11.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:05:11.973 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:05:11.974 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:05:11.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:05:11.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:05:12.346 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:05:12.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:05:12.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:05:12.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:05:12.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:05:12.363 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:05:12.363 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:05:12.363 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:05:12.363 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:05:12.369 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:05:12.370 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:05:12.370 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:05:12.370 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:05:12.370 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:05:12.370 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:05:12.370 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:05:12.371 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=209 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:12.371 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=209 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:12.371 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=209 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:12.371 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=209 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:12.371 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=209 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:12.371 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=209 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:12.371 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=210 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:12.371 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=210 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:12.371 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=210 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:12.372 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=210 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:12.372 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=210 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:12.372 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=210 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:12.372 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=210 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:12.372 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=210 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:12.372 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=211 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:12.372 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=211 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:12.372 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=211 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:12.372 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=211 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:12.372 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=211 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:12.372 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=211 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:12.373 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=211 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:12.373 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=211 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:17.368 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:05:17.369 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:05:17.370 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:05:17.371 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:05:17.371 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:05:17.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:05:17.380 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:05:17.382 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:05:17.382 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:05:17.383 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:05:17.383 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:05:17.387 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:05:17.388 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:05:17.388 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:05:17.388 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:05:17.389 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:05:17.389 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:05:17.390 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:05:17.390 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:05:17.393 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:05:17.394 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:05:17.394 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:05:17.394 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:05:17.394 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:05:17.394 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:05:17.395 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:05:17.395 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:05:17.398 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:05:17.399 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:05:17.399 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:05:17.399 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:05:17.399 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:05:17.399 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:05:17.399 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:05:17.399 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:05:17.404 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:05:17.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:05:17.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:05:17.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:05:17.405 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:05:17.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:05:17.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:05:17.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:05:17.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:17.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:05:17.405 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:05:17.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:17.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:17.406 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:05:17.406 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:05:17.406 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:05:17.406 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:05:17.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:17.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:17.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:17.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:05:17.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:17.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:17.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:17.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:17.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:17.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:17.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:17.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:17.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:17.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:17.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:17.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:17.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:17.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:17.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:17.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:17.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:17.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:17.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:17.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:17.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:17.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:17.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:17.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:17.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:17.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:17.411 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:05:17.895 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:05:17.931 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:05:17.933 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:05:17.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:05:17.935 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:05:17.952 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:05:17.953 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:05:17.953 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:05:17.953 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:05:17.958 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:05:17.958 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:05:17.958 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:05:17.958 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:05:17.959 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:05:17.959 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:05:17.959 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:05:22.957 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:05:22.958 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:05:22.960 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:05:22.961 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:05:22.961 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:05:22.962 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:05:22.982 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:05:22.983 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:05:22.984 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:05:22.984 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:05:22.984 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:05:22.989 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:05:22.989 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:05:22.990 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:05:22.990 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:05:22.990 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:05:22.991 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:05:22.991 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:05:22.991 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:05:22.994 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:05:22.994 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:05:22.994 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:05:22.994 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:05:22.994 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:05:22.994 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:05:22.995 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:05:22.995 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:05:22.998 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:05:22.998 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:05:22.998 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:05:22.998 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:05:22.998 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:05:22.998 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:05:22.998 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:05:22.998 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:05:23.003 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:05:23.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:05:23.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:05:23.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:05:23.003 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:05:23.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:05:23.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:05:23.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:05:23.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:23.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:05:23.004 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:05:23.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:23.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:23.004 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:05:23.004 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:05:23.004 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:05:23.004 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:05:23.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:23.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:23.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:23.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:05:23.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:23.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:23.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:23.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:23.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:23.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:23.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:23.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:23.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:23.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:23.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:23.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:23.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:23.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:23.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:23.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:23.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:23.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:23.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:23.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:23.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:23.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:23.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:23.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:23.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:23.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:23.009 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:05:23.490 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:05:23.527 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:05:23.528 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:05:23.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:05:23.530 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:05:23.969 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:05:24.008 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:05:24.008 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:05:24.008 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:05:24.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:05:24.447 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:05:24.926 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:05:25.009 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:05:25.010 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:05:25.010 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:05:25.010 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:05:25.405 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:05:25.549 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:05:25.549 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:05:25.549 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:05:25.549 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:05:25.550 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:05:25.550 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:05:25.550 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:05:25.550 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:05:25.550 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:05:25.550 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:05:25.550 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:05:30.554 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:05:30.554 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:05:30.555 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:05:30.556 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:05:30.556 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:05:30.558 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:05:30.568 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:05:30.568 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:05:30.568 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:05:30.569 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:05:30.569 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:05:30.571 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:05:30.572 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:05:30.572 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:05:30.572 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:05:30.572 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:05:30.573 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:05:30.573 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:05:30.573 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:05:30.575 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:05:30.575 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:05:30.575 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:05:30.575 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:05:30.576 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:05:30.576 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:05:30.576 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:05:30.576 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:05:30.578 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:05:30.579 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:05:30.579 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:05:30.579 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:05:30.579 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:05:30.579 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:05:30.579 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:05:30.579 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:05:30.583 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:05:30.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:05:30.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:05:30.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:05:30.583 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:05:30.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:05:30.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:05:30.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:05:30.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:30.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:05:30.584 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:05:30.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:30.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:30.584 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:05:30.584 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:05:30.584 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:05:30.584 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:05:30.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:30.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:30.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:30.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:05:30.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:30.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:30.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:30.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:30.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:30.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:30.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:30.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:30.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:30.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:30.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:30.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:30.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:30.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:30.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:30.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:30.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:30.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:30.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:30.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:30.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:30.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:30.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:30.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:30.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:30.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:30.589 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:05:31.073 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:05:31.110 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:05:31.112 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:05:31.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:05:31.115 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:05:31.117 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:05:31.117 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:05:31.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:05:31.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:05:31.119 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:05:31.119 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:05:31.119 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:05:31.119 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:05:31.551 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:05:31.588 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:05:31.588 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:05:31.588 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:05:31.588 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:05:32.029 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:05:32.508 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:05:32.589 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:05:32.589 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:05:32.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:05:32.589 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:05:32.986 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:05:33.463 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:05:33.590 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:05:33.590 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:05:33.590 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:05:33.590 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:05:33.942 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:05:33.961 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:05:33.961 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:05:33.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:05:33.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:05:33.966 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:05:33.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:05:33.967 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:05:33.967 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:05:33.967 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:05:33.967 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:05:33.968 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:05:33.968 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:05:33.968 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:05:38.971 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:05:38.972 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:05:38.974 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:05:38.974 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:05:38.974 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:05:38.975 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:05:38.984 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:05:38.985 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:05:38.985 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:05:38.985 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:05:38.985 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:05:38.990 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:05:38.990 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:05:38.991 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:05:38.991 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:05:38.991 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:05:38.991 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:05:38.991 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:05:38.991 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:05:38.995 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:05:38.995 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:05:38.995 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:05:38.995 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:05:38.995 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:05:38.995 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:05:38.995 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:05:38.995 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:05:38.998 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:05:38.998 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:05:38.999 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:05:38.999 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:05:38.999 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:05:38.999 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:05:38.999 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:05:38.999 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:05:39.003 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:05:39.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:05:39.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:05:39.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:05:39.003 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:05:39.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:05:39.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:05:39.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:05:39.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:39.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:05:39.003 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:05:39.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:39.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:39.004 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:05:39.004 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:05:39.004 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:05:39.004 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:05:39.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:39.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:39.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:39.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:05:39.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:39.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:39.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:39.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:39.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:39.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:39.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:39.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:39.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:39.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:39.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:39.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:39.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:39.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:39.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:39.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:39.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:39.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:39.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:39.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:39.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:39.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:39.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:39.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:39.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:39.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:39.008 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:05:39.493 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:05:39.523 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:05:39.525 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:05:39.526 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:05:39.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:05:39.529 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:05:39.529 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:05:39.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:05:39.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:05:39.529 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:05:39.529 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:05:39.530 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:05:39.530 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:05:39.970 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:05:40.008 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:05:40.008 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:05:40.008 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:05:40.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:05:40.448 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:05:40.926 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:05:41.009 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:05:41.009 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:05:41.009 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:05:41.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:05:41.403 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:05:41.658 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:05:41.658 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:05:41.664 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:05:41.664 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:05:41.664 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:05:41.664 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:05:41.665 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:05:41.665 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:05:41.665 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:05:41.665 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:05:41.665 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:05:41.665 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:05:41.665 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:05:46.668 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:05:46.668 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:05:46.670 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:05:46.671 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:05:46.671 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:05:46.672 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:05:46.681 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:05:46.682 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:05:46.682 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:05:46.683 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:05:46.683 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:05:46.688 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:05:46.688 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:05:46.688 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:05:46.688 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:05:46.688 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:05:46.689 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:05:46.689 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:05:46.689 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:05:46.697 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:05:46.697 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:05:46.698 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:05:46.698 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:05:46.698 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:05:46.698 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:05:46.698 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:05:46.698 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:05:46.706 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:05:46.706 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:05:46.706 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:05:46.706 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:05:46.707 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:05:46.707 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:05:46.707 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:05:46.707 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:05:46.717 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:05:46.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:05:46.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:05:46.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:05:46.718 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:05:46.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:05:46.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:05:46.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:05:46.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:46.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:05:46.719 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:05:46.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:46.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:46.720 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:05:46.720 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:05:46.720 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:05:46.720 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:05:46.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:46.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:46.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:46.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:05:46.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:46.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:46.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:46.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:46.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:46.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:46.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:46.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:46.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:46.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:46.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:46.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:46.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:46.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:46.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:46.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:46.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:46.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:46.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:46.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:46.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:46.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:46.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:46.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:46.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:46.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:46.725 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:05:47.208 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:05:47.249 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:05:47.250 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:05:47.252 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:05:47.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:05:47.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:05:47.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:05:47.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:05:47.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:05:47.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:05:47.262 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:05:47.262 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:05:47.262 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:05:47.685 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:05:47.725 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:05:47.725 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:05:47.727 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:05:47.727 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:05:48.163 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:05:48.641 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:05:48.726 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:05:48.726 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:05:48.727 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:05:48.728 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:05:49.119 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:05:49.597 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:05:49.727 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:05:49.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:05:49.728 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:05:49.729 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:05:50.075 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:05:50.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:05:50.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:05:50.104 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:05:50.104 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:05:50.104 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:05:50.104 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:05:50.105 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:05:50.105 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:05:50.105 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:05:50.105 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:05:50.105 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:05:50.105 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:05:50.105 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:05:55.107 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:05:55.107 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:05:55.109 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:05:55.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:05:55.110 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:05:55.110 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:05:55.123 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:05:55.124 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:05:55.124 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:05:55.125 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:05:55.125 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:05:55.129 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:05:55.130 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:05:55.130 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:05:55.130 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:05:55.131 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:05:55.131 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:05:55.131 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:05:55.131 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:05:55.134 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:05:55.134 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:05:55.135 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:05:55.135 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:05:55.135 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:05:55.135 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:05:55.135 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:05:55.135 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:05:55.139 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:05:55.139 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:05:55.139 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:05:55.139 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:05:55.139 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:05:55.139 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:05:55.139 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:05:55.140 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:05:55.145 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:05:55.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:05:55.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:05:55.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:05:55.145 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:05:55.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:05:55.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:05:55.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:05:55.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:55.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:05:55.146 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:05:55.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:55.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:55.146 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:05:55.146 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:05:55.146 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:05:55.146 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:05:55.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:55.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:55.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:55.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:05:55.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:55.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:55.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:55.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:55.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:55.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:55.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:55.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:55.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:55.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:55.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:55.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:55.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:55.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:55.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:55.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:05:55.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:55.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:55.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:55.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:55.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:55.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:05:55.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:55.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:05:55.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:55.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:05:55.151 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:05:55.634 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:05:55.672 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:05:55.674 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:05:55.675 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:05:55.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:05:55.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:05:55.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:05:55.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:05:55.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:05:55.681 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:05:55.681 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:05:55.681 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:05:55.681 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:05:56.112 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:05:56.149 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:05:56.150 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:05:56.150 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:05:56.151 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:05:56.590 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:05:57.068 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:05:57.150 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:05:57.151 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:05:57.151 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:05:57.152 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:05:57.546 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:05:57.800 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:05:57.800 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:05:57.803 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:05:57.803 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:05:57.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:05:57.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:05:57.804 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:05:57.804 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:05:57.804 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:05:57.804 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:05:57.805 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:05:57.805 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:05:57.805 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=568 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:57.805 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:05:57.805 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=568 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:57.805 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=568 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:57.805 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=568 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:57.805 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=568 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:57.805 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=568 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:57.805 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=568 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:05:57.805 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=568 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:02.808 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:06:02.809 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:06:02.810 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:06:02.811 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:06:02.811 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:06:02.811 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:06:02.822 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:06:02.823 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:06:02.823 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:06:02.824 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:06:02.824 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:06:02.833 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:06:02.833 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:06:02.833 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:06:02.834 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:06:02.834 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:06:02.834 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:06:02.835 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:06:02.835 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:06:02.837 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:06:02.837 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:06:02.838 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:06:02.838 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:06:02.838 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:06:02.838 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:06:02.838 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:06:02.838 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:06:02.841 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:06:02.841 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:06:02.841 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:06:02.841 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:06:02.841 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:06:02.841 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:06:02.842 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:06:02.842 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:06:02.846 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:06:02.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:06:02.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:06:02.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:06:02.846 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:06:02.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:06:02.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:06:02.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:06:02.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:02.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:06:02.847 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:06:02.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:02.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:02.847 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:06:02.847 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:06:02.847 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:06:02.847 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:06:02.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:02.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:02.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:02.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:06:02.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:02.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:02.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:02.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:02.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:02.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:02.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:02.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:02.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:02.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:02.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:02.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:02.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:02.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:02.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:02.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:02.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:02.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:02.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:02.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:02.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:02.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:02.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:02.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:02.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:02.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:02.852 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:06:03.336 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:06:03.367 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:06:03.368 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:06:03.369 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:06:03.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:06:03.374 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:06:03.375 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:06:03.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:06:03.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:06:03.376 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:06:03.376 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:06:03.376 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:06:03.376 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:06:03.813 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:06:03.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:06:03.850 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:06:03.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:06:03.851 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:06:04.291 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:06:04.769 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:06:04.851 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:06:04.851 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:06:04.851 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:06:04.851 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:06:05.247 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:06:05.725 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:06:05.851 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:06:05.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:06:05.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:06:05.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:06:06.203 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:06:06.680 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:06:06.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:06:06.853 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:06:06.853 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:06:06.853 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:06:07.159 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:06:07.177 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:06:07.178 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:06:07.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:06:07.186 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:06:07.186 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:06:07.186 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:06:07.192 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:06:07.192 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:06:07.192 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:06:07.192 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:06:07.193 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:06:07.193 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:06:07.193 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:06:12.191 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:06:12.191 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:06:12.192 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:06:12.193 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:06:12.193 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:06:12.194 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:06:12.202 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:06:12.203 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:06:12.203 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:06:12.203 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:06:12.203 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:06:12.206 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:06:12.207 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:06:12.207 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:06:12.207 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:06:12.207 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:06:12.207 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:06:12.207 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:06:12.207 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:06:12.209 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:06:12.209 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:06:12.209 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:06:12.210 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:06:12.210 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:06:12.210 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:06:12.210 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:06:12.210 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:06:12.212 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:06:12.212 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:06:12.212 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:06:12.212 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:06:12.212 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:06:12.212 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:06:12.212 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:06:12.212 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:06:12.215 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:06:12.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:06:12.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:06:12.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:06:12.215 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:06:12.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:06:12.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:06:12.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:06:12.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:12.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:06:12.215 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:06:12.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:12.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:12.215 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:06:12.215 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:06:12.215 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:06:12.215 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:06:12.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:12.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:12.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:12.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:06:12.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:12.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:12.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:12.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:12.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:12.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:12.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:12.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:12.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:12.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:12.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:12.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:12.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:12.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:12.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:12.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:12.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:12.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:12.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:12.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:12.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:12.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:12.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:12.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:12.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:12.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:12.220 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:06:12.703 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:06:12.733 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:06:12.735 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:06:12.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:06:12.736 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:06:12.744 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:06:12.744 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:06:12.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:06:12.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:06:12.746 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:06:12.746 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:06:12.746 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:06:12.746 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:06:13.180 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:06:13.218 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:06:13.218 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:06:13.218 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:06:13.219 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:06:13.657 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:06:14.136 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:06:14.219 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:06:14.219 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:06:14.219 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:06:14.219 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:06:14.613 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:06:15.091 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:06:15.221 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:06:15.221 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:06:15.221 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:06:15.221 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:06:15.569 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:06:15.824 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:06:15.824 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:06:15.831 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:06:15.832 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:06:15.832 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:06:15.832 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:06:15.838 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:06:15.838 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:06:15.838 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:06:15.839 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:06:15.840 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:06:15.840 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:06:15.840 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:06:20.836 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:06:20.837 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:06:20.839 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:06:20.840 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:06:20.840 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:06:20.841 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:06:20.850 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:06:20.852 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:06:20.852 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:06:20.852 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:06:20.852 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:06:20.857 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:06:20.857 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:06:20.858 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:06:20.858 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:06:20.858 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:06:20.859 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:06:20.859 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:06:20.859 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:06:20.861 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:06:20.862 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:06:20.862 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:06:20.862 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:06:20.862 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:06:20.862 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:06:20.862 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:06:20.862 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:06:20.865 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:06:20.865 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:06:20.865 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:06:20.866 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:06:20.866 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:06:20.866 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:06:20.866 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:06:20.866 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:06:20.870 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:06:20.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:06:20.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:06:20.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:06:20.870 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:06:20.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:06:20.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:06:20.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:06:20.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:20.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:06:20.871 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:06:20.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:20.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:20.871 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:06:20.871 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:06:20.871 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:06:20.871 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:06:20.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:20.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:20.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:20.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:06:20.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:20.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:20.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:20.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:20.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:20.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:20.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:20.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:20.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:20.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:20.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:20.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:20.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:20.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:20.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:20.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:20.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:20.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:20.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:20.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:20.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:20.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:20.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:20.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:20.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:20.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:20.876 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:06:21.360 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:06:21.389 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:06:21.390 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:06:21.392 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:06:21.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:06:21.838 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:06:21.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:06:21.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:06:21.875 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:06:21.875 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:06:22.317 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:06:22.795 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:06:22.875 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:06:22.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:06:22.875 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:06:22.875 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:06:23.274 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:06:23.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:06:23.404 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:06:23.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:06:23.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:06:23.405 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:06:23.405 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:06:23.405 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:06:23.406 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:06:23.406 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:06:23.406 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:06:23.406 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:06:28.409 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:06:28.409 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:06:28.412 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:06:28.413 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:06:28.413 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:06:28.414 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:06:28.424 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:06:28.425 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:06:28.425 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:06:28.425 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:06:28.426 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:06:28.430 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:06:28.430 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:06:28.430 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:06:28.430 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:06:28.431 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:06:28.431 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:06:28.431 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:06:28.431 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:06:28.434 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:06:28.434 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:06:28.434 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:06:28.435 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:06:28.435 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:06:28.435 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:06:28.435 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:06:28.435 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:06:28.440 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:06:28.440 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:06:28.440 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:06:28.440 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:06:28.440 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:06:28.440 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:06:28.440 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:06:28.440 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:06:28.445 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:06:28.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:06:28.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:06:28.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:06:28.445 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:06:28.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:06:28.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:06:28.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:06:28.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:28.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:06:28.446 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:06:28.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:28.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:28.446 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:06:28.446 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:06:28.446 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:06:28.446 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:06:28.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:28.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:28.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:28.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:06:28.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:28.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:28.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:28.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:28.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:28.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:28.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:28.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:28.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:28.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:28.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:28.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:28.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:28.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:28.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:28.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:28.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:28.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:28.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:28.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:28.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:28.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:28.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:28.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:28.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:28.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:28.451 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:06:28.933 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:06:28.969 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:06:28.970 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:06:28.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:06:28.972 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:06:28.993 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:06:28.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:06:28.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:06:29.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:29.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:06:29.410 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:06:29.448 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:06:29.449 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:06:29.449 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:06:29.450 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:06:29.889 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:06:30.368 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:06:30.450 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:06:30.451 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:06:30.451 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:06:30.451 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:06:30.847 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:06:31.325 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:06:31.452 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:06:31.452 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:06:31.452 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:06:31.453 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:06:31.804 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:06:32.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:06:32.042 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:06:32.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:06:32.043 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:06:32.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:06:32.045 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:06:32.045 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:06:32.045 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:06:32.045 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:06:32.045 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:06:32.045 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:06:32.045 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:06:37.048 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:06:37.048 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:06:37.050 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:06:37.050 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:06:37.051 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:06:37.051 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:06:37.063 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:06:37.064 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:06:37.064 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:06:37.064 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:06:37.064 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:06:37.066 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:06:37.066 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:06:37.066 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:06:37.066 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:06:37.066 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:06:37.066 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:06:37.066 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:06:37.066 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:06:37.068 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:06:37.068 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:06:37.068 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:06:37.068 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:06:37.068 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:06:37.068 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:06:37.068 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:06:37.068 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:06:37.070 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:06:37.070 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:06:37.070 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:06:37.070 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:06:37.070 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:06:37.070 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:06:37.070 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:06:37.070 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:06:37.073 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:06:37.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:06:37.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:06:37.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:06:37.073 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:06:37.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:06:37.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:06:37.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:06:37.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:06:37.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:37.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:37.073 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:06:37.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:37.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:37.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:37.073 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:06:37.073 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:06:37.073 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:06:37.073 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:06:37.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:37.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:37.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:37.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:06:37.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:37.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:37.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:37.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:37.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:37.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:37.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:37.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:37.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:37.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:37.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:37.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:37.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:37.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:37.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:37.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:37.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:37.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:37.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:37.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:37.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:37.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:37.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:37.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:37.078 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:06:37.562 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:06:37.590 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:06:37.591 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:06:37.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:06:37.592 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:06:37.603 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:06:37.603 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:06:37.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:06:37.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:37.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:06:37.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:06:37.622 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:06:37.622 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:06:37.622 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:06:37.622 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:06:37.626 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:06:37.627 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:06:37.627 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:06:37.627 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:06:37.627 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:06:37.627 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:06:37.627 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:06:37.627 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=117 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:37.627 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:37.627 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:37.627 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:37.627 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:37.627 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:37.627 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:37.627 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:42.628 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:06:42.628 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:06:42.628 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:06:42.629 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:06:42.629 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:06:42.630 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:06:42.640 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:06:42.643 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:06:42.643 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:06:42.643 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:06:42.643 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:06:42.657 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:06:42.658 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:06:42.658 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:06:42.658 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:06:42.658 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:06:42.658 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:06:42.658 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:06:42.659 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:06:42.667 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:06:42.667 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:06:42.667 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:06:42.667 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:06:42.667 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:06:42.667 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:06:42.667 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:06:42.667 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:06:42.671 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:06:42.671 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:06:42.671 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:06:42.671 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:06:42.671 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:06:42.672 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:06:42.672 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:06:42.672 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:06:42.677 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:06:42.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:06:42.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:06:42.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:06:42.678 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:06:42.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:06:42.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:06:42.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:06:42.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:42.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:06:42.678 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:06:42.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:42.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:42.678 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:06:42.678 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:06:42.678 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:06:42.679 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:06:42.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:42.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:42.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:42.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:06:42.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:42.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:42.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:42.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:42.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:42.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:42.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:42.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:42.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:42.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:42.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:42.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:42.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:42.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:42.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:42.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:42.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:42.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:42.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:42.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:42.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:42.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:42.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:42.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:42.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:42.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:42.683 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:06:43.168 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:06:43.196 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:06:43.197 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:06:43.198 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:06:43.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:06:43.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:06:43.215 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:06:43.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:06:43.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:43.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:06:43.645 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:06:43.682 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:06:43.683 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:06:43.683 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:06:43.683 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:06:44.124 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:06:44.602 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:06:44.683 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:06:44.683 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:06:44.684 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:06:44.684 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:06:45.081 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:06:45.559 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:06:45.684 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:06:45.684 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:06:45.684 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:06:45.685 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:06:46.038 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:06:46.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:06:46.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:46.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:06:46.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:06:46.244 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:06:46.244 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:06:46.246 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:06:46.246 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:06:46.246 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:06:46.246 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:06:46.246 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:06:46.246 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:06:46.246 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:06:46.246 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=761 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:46.246 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=761 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:51.247 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:06:51.247 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:06:51.249 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:06:51.249 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:06:51.249 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:06:51.250 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:06:51.258 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:06:51.260 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:06:51.260 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:06:51.260 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:06:51.260 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:06:51.265 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:06:51.265 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:06:51.266 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:06:51.266 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:06:51.266 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:06:51.267 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:06:51.267 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:06:51.267 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:06:51.269 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:06:51.270 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:06:51.270 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:06:51.270 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:06:51.270 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:06:51.270 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:06:51.270 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:06:51.270 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:06:51.273 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:06:51.273 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:06:51.273 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:06:51.273 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:06:51.273 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:06:51.274 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:06:51.274 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:06:51.274 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:06:51.277 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:06:51.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:06:51.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:06:51.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:06:51.278 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:06:51.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:06:51.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:06:51.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:06:51.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:51.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:06:51.278 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:06:51.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:51.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:51.278 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:06:51.278 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:06:51.278 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:06:51.278 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:06:51.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:51.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:51.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:51.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:06:51.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:51.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:51.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:51.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:51.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:51.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:51.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:51.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:51.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:51.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:51.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:51.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:51.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:51.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:51.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:51.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:51.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:51.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:51.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:51.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:51.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:51.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:51.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:51.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:51.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:51.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:51.283 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:06:51.767 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:06:51.800 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:06:51.801 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:06:51.803 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:06:51.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:06:51.824 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:06:51.824 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:06:51.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:06:51.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:51.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:06:51.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:06:51.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:51.886 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:06:51.886 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:06:51.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:06:51.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:06:51.893 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:06:51.893 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:06:51.893 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:06:51.893 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:06:51.894 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:06:51.894 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:06:51.894 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:06:51.894 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=129 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:51.894 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=129 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:51.894 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:51.894 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=129 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:51.895 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=129 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:51.895 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:51.895 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=130 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:51.895 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=130 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:51.895 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=130 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:51.895 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=130 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:51.895 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=130 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:51.895 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=130 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:51.895 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=130 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:51.895 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=130 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:51.895 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=131 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:51.896 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=131 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:51.896 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=131 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:51.896 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=131 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:51.896 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=131 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:51.896 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=131 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:51.896 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=131 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:51.896 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=131 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:56.891 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:06:56.892 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:06:56.893 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:06:56.894 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:06:56.894 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:06:56.895 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:06:56.904 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:06:56.904 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:06:56.904 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:06:56.905 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:06:56.905 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:06:56.908 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:06:56.908 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:06:56.908 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:06:56.908 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:06:56.908 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:06:56.908 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:06:56.908 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:06:56.908 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:06:56.911 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:06:56.911 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:06:56.911 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:06:56.911 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:06:56.911 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:06:56.911 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:06:56.911 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:06:56.911 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:06:56.914 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:06:56.914 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:06:56.914 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:06:56.914 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:06:56.914 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:06:56.914 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:06:56.914 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:06:56.914 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:06:56.917 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:06:56.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:06:56.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:06:56.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:06:56.917 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:06:56.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:06:56.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:06:56.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:06:56.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:56.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:06:56.918 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:06:56.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:56.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:56.918 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:06:56.918 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:06:56.918 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:06:56.918 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:06:56.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:56.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:56.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:56.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:06:56.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:56.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:56.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:56.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:56.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:56.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:56.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:56.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:56.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:56.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:56.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:56.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:56.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:56.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:56.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:56.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:56.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:06:56.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:56.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:56.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:56.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:56.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:56.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:06:56.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:06:56.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:56.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:06:56.923 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:06:57.407 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:06:57.436 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:06:57.437 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:06:57.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:06:57.439 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:06:57.450 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:06:57.450 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:06:57.451 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:06:57.451 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:06:57.456 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:06:57.457 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:06:57.457 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:06:57.457 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:06:57.457 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:06:57.457 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:06:57.457 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:06:57.457 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=113 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:57.457 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=113 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:57.457 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=113 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:57.457 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=113 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:57.457 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=113 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:57.457 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=113 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:57.458 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=114 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:57.458 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=114 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:57.458 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=114 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:57.458 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=114 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:57.458 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=114 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:57.458 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=114 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:57.458 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=114 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:06:57.458 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=114 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:02.456 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:07:02.456 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:07:02.457 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:07:02.458 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:07:02.459 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:07:02.459 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:07:02.467 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:07:02.467 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:07:02.467 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:02.468 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:07:02.468 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:07:02.472 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:07:02.472 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:07:02.472 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:07:02.473 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:02.473 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:07:02.473 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:07:02.474 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:07:02.474 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:07:02.477 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:07:02.477 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:07:02.477 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:07:02.477 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:02.477 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:07:02.477 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:07:02.478 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:07:02.478 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:07:02.481 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:07:02.481 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:07:02.482 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:07:02.482 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:02.482 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:07:02.482 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:07:02.482 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:07:02.482 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:07:02.488 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:07:02.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:07:02.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:07:02.489 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:07:02.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:07:02.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:07:02.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:07:02.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:07:02.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:07:02.489 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:07:02.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:02.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:02.489 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:07:02.489 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:07:02.489 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:07:02.489 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:07:02.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:02.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:02.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:02.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:07:02.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:02.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:02.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:02.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:02.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:02.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:02.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:02.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:02.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:02.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:02.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:02.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:02.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:02.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:02.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:02.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:02.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:02.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:02.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:02.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:02.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:02.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:02.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:02.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:02.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:02.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:02.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:02.494 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:07:02.979 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:07:03.014 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:07:03.015 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:07:03.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:07:03.017 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:07:03.031 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:07:03.031 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:07:03.031 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:07:03.031 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:07:03.037 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:07:03.037 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:07:03.037 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:07:03.037 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:07:03.037 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:07:03.037 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:07:03.038 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:07:03.038 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:03.038 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:03.038 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:03.038 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:03.038 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:03.039 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:08.036 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:07:08.036 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:07:08.036 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:07:08.037 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:07:08.037 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:07:08.038 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:07:08.048 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:07:08.050 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:07:08.050 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:08.051 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:07:08.051 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:07:08.056 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:07:08.056 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:07:08.057 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:07:08.057 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:08.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:07:08.058 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:07:08.058 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:07:08.058 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:07:08.061 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:07:08.061 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:07:08.062 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:07:08.062 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:08.062 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:07:08.062 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:07:08.062 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:07:08.063 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:07:08.065 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:07:08.066 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:07:08.066 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:07:08.066 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:08.066 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:07:08.066 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:07:08.066 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:07:08.066 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:07:08.070 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:07:08.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:07:08.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:07:08.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:07:08.071 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:07:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:07:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:07:08.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:07:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:07:08.071 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:07:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:08.071 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:07:08.071 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:07:08.071 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:07:08.071 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:07:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:08.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:07:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:08.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:08.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:08.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:08.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:08.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:08.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:08.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:08.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:08.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:08.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:08.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:08.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:08.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:08.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:08.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:08.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:08.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:08.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:08.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:08.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:08.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:08.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:08.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:08.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:08.076 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:07:08.558 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:07:08.587 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:07:08.588 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:07:08.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:07:08.591 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:07:08.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:07:08.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:07:08.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:07:08.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:07:08.604 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:07:08.604 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:07:08.604 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:07:08.604 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:07:08.604 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:07:08.604 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:07:08.604 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:07:13.608 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:07:13.608 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:07:13.609 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:07:13.610 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:07:13.610 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:07:13.611 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:07:13.620 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:07:13.620 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:07:13.621 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:13.621 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:07:13.621 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:07:13.624 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:07:13.624 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:07:13.624 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:07:13.625 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:13.625 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:07:13.625 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:07:13.625 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:07:13.626 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:07:13.628 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:07:13.628 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:07:13.628 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:07:13.628 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:13.628 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:07:13.628 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:07:13.628 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:07:13.628 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:07:13.631 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:07:13.631 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:07:13.631 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:07:13.631 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:13.631 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:07:13.631 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:07:13.631 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:07:13.631 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:07:13.635 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:07:13.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:07:13.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:07:13.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:07:13.635 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:07:13.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:07:13.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:07:13.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:07:13.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:13.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:07:13.635 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:07:13.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:13.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:13.635 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:07:13.635 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:07:13.635 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:07:13.636 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:07:13.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:13.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:13.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:13.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:07:13.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:13.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:13.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:13.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:13.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:13.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:13.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:13.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:13.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:13.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:13.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:13.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:13.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:13.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:13.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:13.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:13.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:13.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:13.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:13.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:13.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:13.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:13.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:13.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:13.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:13.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:13.640 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:07:14.125 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:07:14.153 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:07:14.155 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:07:14.156 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:07:14.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:07:14.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:07:14.186 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:07:14.187 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:07:14.187 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:07:14.189 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:07:14.189 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:07:14.189 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:07:14.189 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:07:14.189 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:07:14.189 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:07:14.189 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:07:14.189 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:14.189 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:14.189 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:14.189 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:19.199 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:07:19.200 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:07:19.202 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:07:19.203 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:07:19.203 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:07:19.204 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:07:19.211 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:07:19.212 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:07:19.212 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:19.212 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:07:19.212 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:07:19.216 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:07:19.216 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:07:19.217 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:07:19.217 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:19.217 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:07:19.217 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:07:19.217 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:07:19.217 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:07:19.220 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:07:19.220 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:07:19.220 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:07:19.220 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:19.221 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:07:19.221 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:07:19.221 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:07:19.221 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:07:19.223 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:07:19.224 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:07:19.224 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:07:19.224 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:19.224 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:07:19.224 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:07:19.224 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:07:19.224 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:07:19.228 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:07:19.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:07:19.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:07:19.228 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:07:19.229 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:07:19.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:07:19.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:07:19.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:07:19.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:19.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:07:19.229 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:07:19.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:19.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:19.229 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:07:19.229 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:07:19.229 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:07:19.229 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:07:19.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:19.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:19.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:19.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:07:19.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:19.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:19.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:19.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:19.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:19.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:19.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:19.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:19.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:19.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:19.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:19.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:19.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:19.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:19.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:19.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:19.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:19.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:19.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:19.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:19.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:19.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:19.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:19.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:19.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:19.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:19.234 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:07:19.713 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:07:19.750 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:07:19.752 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:07:19.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:07:19.753 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:07:20.190 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:07:20.233 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:07:20.233 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:07:20.233 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:07:20.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:07:20.668 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:07:21.147 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:07:21.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:07:21.235 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:07:21.235 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:07:21.235 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:07:21.624 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:07:22.101 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:07:22.236 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:07:22.236 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:07:22.236 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:07:22.236 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:07:22.579 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:07:22.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:07:22.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:07:22.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:07:22.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:07:22.765 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:07:22.765 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:07:22.765 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:07:22.765 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:07:23.057 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:07:23.237 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:07:23.237 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:07:23.237 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:07:23.237 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:07:23.535 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:07:24.013 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:07:24.238 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:07:24.238 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:07:24.238 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:07:24.239 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:07:24.491 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:07:24.970 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:07:25.096 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:07:25.096 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:07:25.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:07:25.103 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:07:25.104 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:07:25.104 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:07:25.104 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:07:25.109 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:07:25.109 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:07:25.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:07:25.109 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:07:25.109 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:07:25.109 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:07:25.110 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:07:25.110 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1256 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:25.110 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1256 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:25.110 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1256 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:25.110 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1256 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:25.110 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1256 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:25.110 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1256 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:30.128 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:07:30.128 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:07:30.130 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:07:30.131 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:07:30.131 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:07:30.132 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:07:30.140 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:07:30.141 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:07:30.141 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:30.142 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:07:30.142 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:07:30.145 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:07:30.146 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:07:30.146 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:07:30.146 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:30.146 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:07:30.147 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:07:30.147 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:07:30.147 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:07:30.150 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:07:30.150 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:07:30.150 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:07:30.150 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:30.151 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:07:30.151 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:07:30.151 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:07:30.151 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:07:30.154 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:07:30.154 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:07:30.154 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:07:30.155 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:30.155 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:07:30.155 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:07:30.155 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:07:30.155 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:07:30.160 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:07:30.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:07:30.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:07:30.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:07:30.160 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:07:30.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:07:30.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:07:30.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:07:30.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:30.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:07:30.161 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:07:30.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:30.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:30.161 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:07:30.161 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:07:30.161 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:07:30.161 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:07:30.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:30.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:30.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:30.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:07:30.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:30.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:30.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:30.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:30.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:30.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:30.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:30.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:30.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:30.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:30.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:30.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:30.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:30.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:30.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:30.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:30.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:30.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:30.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:30.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:30.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:30.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:30.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:30.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:30.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:30.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:30.166 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:07:30.651 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:07:30.685 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:07:30.687 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:07:30.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:07:30.688 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:07:30.709 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:07:30.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:07:30.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:07:30.743 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:07:30.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:07:30.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:07:30.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:07:30.746 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:07:30.746 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:07:30.746 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:07:30.746 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:07:30.746 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:07:30.746 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:07:30.746 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:07:35.748 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:07:35.748 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:07:35.750 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:07:35.750 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:07:35.751 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:07:35.751 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:07:35.760 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:07:35.761 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:07:35.761 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:35.761 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:07:35.761 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:07:35.765 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:07:35.765 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:07:35.765 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:07:35.765 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:35.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:07:35.766 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:07:35.766 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:07:35.766 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:07:35.769 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:07:35.770 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:07:35.770 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:07:35.770 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:35.770 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:07:35.770 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:07:35.770 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:07:35.770 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:07:35.774 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:07:35.774 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:07:35.774 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:07:35.774 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:35.774 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:07:35.774 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:07:35.774 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:07:35.774 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:07:35.785 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:07:35.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:07:35.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:07:35.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:07:35.785 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:07:35.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:07:35.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:07:35.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:07:35.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:35.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:07:35.786 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:07:35.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:35.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:35.786 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:07:35.786 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:07:35.787 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:07:35.787 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:07:35.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:35.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:35.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:35.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:07:35.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:35.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:35.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:35.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:35.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:35.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:35.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:35.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:35.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:35.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:35.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:35.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:35.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:35.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:35.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:35.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:35.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:35.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:35.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:35.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:35.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:35.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:35.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:35.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:35.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:35.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:35.791 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:07:36.275 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:07:36.316 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:07:36.318 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:07:36.320 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:07:36.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:07:36.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:07:36.335 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:07:36.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:07:36.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:36.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:07:36.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:07:36.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:07:36.382 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:07:36.382 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:07:36.384 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:07:36.384 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:07:36.384 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:07:36.384 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:07:36.384 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:07:36.384 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:07:36.384 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:07:41.387 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:07:41.387 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:07:41.388 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:07:41.388 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:07:41.388 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:07:41.389 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:07:41.408 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:07:41.411 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:07:41.411 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:41.412 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:07:41.412 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:07:41.421 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:07:41.421 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:07:41.422 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:07:41.422 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:41.423 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:07:41.423 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:07:41.424 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:07:41.424 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:07:41.428 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:07:41.428 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:07:41.429 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:07:41.429 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:41.429 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:07:41.430 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:07:41.430 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:07:41.430 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:07:41.434 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:07:41.434 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:07:41.434 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:07:41.434 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:41.435 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:07:41.435 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:07:41.435 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:07:41.435 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:07:41.440 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:07:41.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:07:41.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:07:41.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:07:41.440 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:07:41.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:07:41.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:07:41.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:07:41.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:07:41.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:41.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:41.441 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:07:41.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:41.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:41.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:41.441 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:07:41.442 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:07:41.442 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:07:41.442 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:07:41.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:41.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:41.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:41.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:07:41.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:41.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:41.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:41.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:41.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:41.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:41.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:41.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:41.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:41.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:41.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:41.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:41.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:41.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:41.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:41.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:41.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:41.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:41.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:41.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:41.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:41.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:41.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:41.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:41.446 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:07:41.930 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:07:41.960 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:07:41.961 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:07:41.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:07:41.963 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:07:41.980 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:07:41.980 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:07:41.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:07:41.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:41.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:07:41.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:07:42.004 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:07:42.005 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:07:42.005 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:07:42.005 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:07:42.012 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:07:42.012 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:07:42.013 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:07:42.013 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:07:42.013 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:07:42.013 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:07:42.013 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:07:42.013 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:42.013 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:42.014 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:42.014 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:42.014 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:42.014 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:42.014 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=121 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:42.014 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:42.014 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:42.014 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:42.014 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:42.014 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:42.015 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:42.015 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:47.009 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:07:47.009 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:07:47.011 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:07:47.011 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:07:47.012 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:07:47.013 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:07:47.024 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:07:47.026 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:07:47.026 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:47.026 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:07:47.026 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:07:47.030 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:07:47.031 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:07:47.031 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:07:47.031 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:47.031 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:07:47.031 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:07:47.032 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:07:47.032 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:07:47.035 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:07:47.035 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:07:47.035 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:07:47.036 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:47.036 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:07:47.036 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:07:47.036 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:07:47.036 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:07:47.039 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:07:47.039 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:07:47.039 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:07:47.039 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:47.039 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:07:47.039 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:07:47.039 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:07:47.039 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:07:47.043 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:07:47.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:07:47.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:07:47.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:07:47.043 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:07:47.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:07:47.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:07:47.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:07:47.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:47.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:07:47.044 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:07:47.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:47.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:47.044 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:07:47.044 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:07:47.044 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:07:47.044 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:07:47.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:47.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:47.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:47.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:07:47.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:47.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:47.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:47.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:47.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:47.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:47.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:47.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:47.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:47.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:47.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:47.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:47.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:47.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:47.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:47.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:47.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:47.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:47.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:47.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:47.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:47.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:47.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:47.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:47.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:47.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:47.049 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:07:47.532 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:07:47.565 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:07:47.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:07:47.567 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:07:47.568 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:07:47.590 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:07:47.590 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:07:47.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:07:47.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:47.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:07:47.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:07:47.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:07:47.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:07:47.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:07:47.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:07:47.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:07:47.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:07:47.641 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:07:47.641 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:07:47.641 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:07:47.642 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:07:47.647 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:07:47.647 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:07:47.647 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:07:47.647 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:07:47.647 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:07:47.648 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:07:47.648 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:07:47.648 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=128 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:47.648 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=128 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:47.648 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=128 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:47.648 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=128 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:47.649 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=128 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:47.649 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:52.645 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:07:52.646 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:07:52.647 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:07:52.648 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:07:52.649 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:07:52.651 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:07:52.658 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:07:52.659 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:07:52.659 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:52.659 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:07:52.659 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:07:52.661 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:07:52.661 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:07:52.662 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:07:52.662 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:52.662 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:07:52.662 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:07:52.662 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:07:52.662 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:07:52.665 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:07:52.665 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:07:52.665 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:07:52.665 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:52.665 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:07:52.665 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:07:52.665 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:07:52.665 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:07:52.668 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:07:52.668 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:07:52.668 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:07:52.668 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:52.668 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:07:52.668 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:07:52.668 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:07:52.668 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:07:52.673 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:07:52.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:07:52.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:07:52.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:07:52.673 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:07:52.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:07:52.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:07:52.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:07:52.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:07:52.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:52.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:52.673 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:07:52.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:52.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:52.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:52.674 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:07:52.674 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:07:52.674 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:07:52.674 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:07:52.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:52.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:52.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:52.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:07:52.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:52.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:52.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:52.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:52.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:52.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:52.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:52.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:52.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:52.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:52.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:52.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:52.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:52.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:52.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:52.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:52.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:52.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:52.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:52.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:52.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:52.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:52.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:52.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:52.678 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:07:53.157 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:07:53.198 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:07:53.200 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:07:53.202 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:07:53.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:07:53.203 [DEBUG] fake_trx.py:377 (BTS@172.18.144.20:5700) Recv FAKE_TRXC_DELAY cmd
2025-12-15 05:07:53.204 [INFO] fake_trx.py:380 (BTS@172.18.144.20:5700) Artificial TRXC delay set to 200
2025-12-15 05:07:53.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD FAKE_TRXC_DELAY
2025-12-15 05:07:53.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:53.631 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:07:53.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:07:53.834 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:07:53.834 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:07:53.834 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:07:53.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:07:54.035 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:07:54.109 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:07:54.589 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:07:54.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:07:54.842 [DEBUG] fake_trx.py:377 (BTS@172.18.144.20:5700) Recv FAKE_TRXC_DELAY cmd
2025-12-15 05:07:54.842 [INFO] fake_trx.py:380 (BTS@172.18.144.20:5700) Artificial TRXC delay set to 0
2025-12-15 05:07:54.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD FAKE_TRXC_DELAY
2025-12-15 05:07:54.843 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:07:54.843 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:07:54.843 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:07:54.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:07:54.853 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:07:54.854 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:07:54.854 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:07:54.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:07:54.855 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:07:54.855 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:07:54.855 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:07:54.855 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:07:54.855 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:07:54.855 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:07:54.855 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:07:54.855 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=467 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:07:59.859 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:07:59.859 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:07:59.861 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:07:59.862 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:07:59.862 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:07:59.863 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:07:59.872 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:07:59.873 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:07:59.873 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:59.873 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:07:59.873 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:07:59.876 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:07:59.876 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:07:59.876 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:07:59.876 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:59.876 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:07:59.876 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:07:59.877 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:07:59.877 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:07:59.879 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:07:59.879 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:07:59.879 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:07:59.879 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:59.879 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:07:59.879 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:07:59.879 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:07:59.879 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:07:59.881 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:07:59.881 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:07:59.881 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:07:59.881 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:07:59.882 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:07:59.882 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:07:59.882 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:07:59.882 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:07:59.885 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:07:59.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:07:59.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:07:59.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:07:59.885 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:07:59.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:07:59.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:07:59.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:07:59.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:59.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:07:59.885 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:07:59.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:59.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:59.885 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:07:59.885 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:07:59.885 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:07:59.885 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:07:59.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:59.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:59.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:59.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:07:59.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:59.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:59.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:59.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:59.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:59.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:59.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:59.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:59.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:59.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:59.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:59.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:59.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:59.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:59.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:59.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:59.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:07:59.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:59.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:59.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:59.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:59.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:59.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:07:59.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:07:59.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:59.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:07:59.890 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:08:00.373 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:08:00.403 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:08:00.405 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:08:00.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:00.407 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:08:00.407 [DEBUG] fake_trx.py:377 (BTS@172.18.144.20:5700) Recv FAKE_TRXC_DELAY cmd
2025-12-15 05:08:00.407 [INFO] fake_trx.py:380 (BTS@172.18.144.20:5700) Artificial TRXC delay set to 200
2025-12-15 05:08:00.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD FAKE_TRXC_DELAY
2025-12-15 05:08:00.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:08:00.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:00.848 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:08:01.039 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:08:01.039 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:08:01.039 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:08:01.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:01.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:01.325 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:08:01.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:01.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:01.804 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:08:01.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:02.043 [DEBUG] fake_trx.py:377 (BTS@172.18.144.20:5700) Recv FAKE_TRXC_DELAY cmd
2025-12-15 05:08:02.043 [INFO] fake_trx.py:380 (BTS@172.18.144.20:5700) Artificial TRXC delay set to 0
2025-12-15 05:08:02.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD FAKE_TRXC_DELAY
2025-12-15 05:08:02.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:08:02.043 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:08:02.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:08:02.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:02.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:02.044 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:08:02.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:02.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:02.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:02.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:02.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:02.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:02.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:02.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:02.054 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:08:02.055 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:08:02.055 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:08:02.055 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:08:02.060 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:08:02.060 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:08:02.060 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:08:02.060 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:08:02.061 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:08:02.061 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:08:02.061 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:08:02.061 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=465 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:08:02.061 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=465 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:08:02.061 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=465 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:08:02.062 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=465 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:08:02.062 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=465 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:08:02.062 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=465 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:08:07.057 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:08:07.058 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:08:07.059 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:08:07.060 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:08:07.060 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:08:07.061 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:08:07.071 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:08:07.073 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:08:07.073 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:08:07.073 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:08:07.074 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:08:07.081 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:08:07.081 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:08:07.082 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:08:07.082 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:08:07.083 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:08:07.084 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:08:07.084 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:08:07.084 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:08:07.088 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:08:07.089 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:08:07.089 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:08:07.090 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:08:07.090 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:08:07.090 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:08:07.091 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:08:07.091 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:08:07.094 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:08:07.095 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:08:07.095 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:08:07.095 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:08:07.095 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:08:07.096 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:08:07.096 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:08:07.096 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:08:07.104 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:08:07.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:08:07.104 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:08:07.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:08:07.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:08:07.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:08:07.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:08:07.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:08:07.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:08:07.106 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:08:07.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:08:07.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:08:07.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:08:07.106 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:08:07.106 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:08:07.106 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:08:07.106 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:08:07.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:08:07.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:08:07.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:08:07.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:08:07.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:08:07.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:08:07.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:08:07.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:08:07.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:08:07.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:08:07.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:08:07.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:08:07.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:08:07.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:08:07.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:08:07.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:08:07.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:08:07.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:08:07.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:08:07.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:08:07.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:08:07.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:08:07.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:08:07.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:08:07.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:08:07.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:08:07.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:08:07.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:08:07.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:08:07.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:08:07.111 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:08:07.595 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:08:07.628 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:08:07.630 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:08:07.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:07.632 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:08:07.651 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:07.652 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:07.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:08:07.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:07.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:07.698 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:08:07.698 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:08:07.698 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:08:07.698 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:08:07.704 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:08:07.704 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:08:07.704 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:08:07.704 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:08:07.705 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:08:07.705 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:08:07.705 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:08:12.702 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:08:12.703 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:08:12.706 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:08:12.706 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:08:12.706 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:08:12.707 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:08:12.717 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:08:12.719 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:08:12.719 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:08:12.719 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:08:12.719 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:08:12.724 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:08:12.725 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:08:12.725 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:08:12.725 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:08:12.725 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:08:12.726 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:08:12.726 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:08:12.726 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:08:12.729 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:08:12.729 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:08:12.729 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:08:12.729 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:08:12.729 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:08:12.729 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:08:12.730 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:08:12.730 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:08:12.733 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:08:12.733 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:08:12.733 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:08:12.733 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:08:12.733 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:08:12.733 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:08:12.733 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:08:12.733 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:08:12.737 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:08:12.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:08:12.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:08:12.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:08:12.737 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:08:12.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:08:12.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:08:12.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:08:12.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:08:12.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:08:12.738 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:08:12.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:08:12.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:08:12.738 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:08:12.738 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:08:12.738 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:08:12.738 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:08:12.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:08:12.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:08:12.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:08:12.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:08:12.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:08:12.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:08:12.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:08:12.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:08:12.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:08:12.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:08:12.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:08:12.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:08:12.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:08:12.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:08:12.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:08:12.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:08:12.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:08:12.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:08:12.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:08:12.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:08:12.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:08:12.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:08:12.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:08:12.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:08:12.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:08:12.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:08:12.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:08:12.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:08:12.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:08:12.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:08:12.743 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:08:13.225 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:08:13.259 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:08:13.260 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:08:13.262 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:08:13.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:13.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:13.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:13.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:08:13.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:13.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:13.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:08:13.331 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:08:13.331 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:08:13.331 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:08:13.336 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:08:13.336 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:08:13.337 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:08:13.337 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:08:13.337 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:08:13.337 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:08:13.338 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:08:13.338 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:08:13.338 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:08:13.338 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:08:13.338 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:08:13.338 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:08:13.338 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:08:13.338 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:08:13.338 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=128 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:08:13.339 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=128 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:08:13.339 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=128 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:08:13.339 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=128 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:08:13.339 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=128 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:08:13.339 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=128 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:08:13.339 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=128 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:08:13.339 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:08:18.335 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:08:18.335 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:08:18.337 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:08:18.338 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:08:18.338 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:08:18.340 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:08:18.350 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:08:18.352 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:08:18.352 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:08:18.352 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:08:18.352 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:08:18.358 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:08:18.359 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:08:18.359 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:08:18.359 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:08:18.359 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:08:18.359 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:08:18.359 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:08:18.359 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:08:18.363 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:08:18.364 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:08:18.364 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:08:18.364 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:08:18.364 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:08:18.364 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:08:18.364 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:08:18.364 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:08:18.368 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:08:18.368 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:08:18.368 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:08:18.368 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:08:18.368 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:08:18.368 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:08:18.368 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:08:18.368 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:08:18.374 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:08:18.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:08:18.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:08:18.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:08:18.374 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:08:18.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:08:18.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:08:18.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:08:18.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:08:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:08:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:08:18.375 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:08:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:08:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:08:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:08:18.375 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:08:18.375 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:08:18.375 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:08:18.375 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:08:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:08:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:08:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:08:18.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:08:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:08:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:08:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:08:18.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:08:18.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:08:18.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:08:18.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:08:18.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:08:18.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:08:18.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:08:18.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:08:18.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:08:18.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:08:18.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:08:18.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:08:18.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:08:18.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:08:18.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:08:18.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:08:18.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:08:18.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:08:18.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:08:18.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:08:18.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:08:18.380 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:08:18.865 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:08:18.903 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:08:18.906 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:08:18.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:18.908 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:08:18.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:18.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:18.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:08:18.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:18.932 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:18.932 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:18.932 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:08:18.932 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:08:18.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:18.966 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:18.966 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:18.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:18.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:19.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:19.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:19.029 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:19.029 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:19.046 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:19.047 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:19.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:08:19.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:19.048 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:19.048 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:19.048 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:08:19.048 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:08:19.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:19.110 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:19.110 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:19.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:19.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:19.341 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:08:19.378 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:08:19.379 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:08:19.379 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:08:19.379 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:08:19.819 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:08:20.297 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:08:20.379 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:08:20.379 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:08:20.380 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:08:20.380 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:08:20.776 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:08:21.254 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:08:21.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:08:21.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:08:21.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:08:21.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:08:21.733 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:08:22.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:22.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:22.118 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:22.118 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:22.145 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:22.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:22.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:08:22.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:22.147 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:22.147 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:22.147 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:08:22.147 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:08:22.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:22.151 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:22.151 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:22.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:22.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:22.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:22.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:22.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:22.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:22.211 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:08:22.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:22.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:22.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:08:22.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:22.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:22.227 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:22.227 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:08:22.227 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:08:22.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:22.265 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:22.265 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:22.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:22.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:22.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:08:22.382 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:08:22.382 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:08:22.382 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:08:22.688 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:08:23.167 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:08:23.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:08:23.383 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:08:23.383 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:08:23.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:08:23.644 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:08:24.123 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:08:24.601 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:08:25.079 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:08:25.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:25.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:25.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:25.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:25.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:25.294 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:25.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:08:25.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:25.295 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:25.295 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:25.295 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:08:25.295 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:08:25.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:25.319 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:25.319 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:25.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:25.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:25.557 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:08:26.035 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:08:26.514 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:08:26.991 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:08:27.470 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:08:27.948 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:08:28.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:28.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:28.330 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:28.330 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:28.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:28.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:28.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:08:28.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:28.351 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:28.351 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:28.351 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:08:28.351 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:08:28.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:28.369 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:28.369 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:28.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:28.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:28.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:28.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:28.425 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:28.425 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:28.425 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:08:28.440 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:28.440 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:28.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:08:28.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:28.441 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:28.441 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:28.441 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:08:28.441 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:08:28.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:28.480 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:28.480 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:28.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:28.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:28.903 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:08:29.381 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 05:08:29.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:29.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:29.590 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:29.591 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:29.608 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:29.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:29.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:08:29.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:29.609 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:29.609 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:29.610 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:08:29.610 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:08:29.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:29.615 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:08:29.615 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:08:29.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:29.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:29.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:29.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:29.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:29.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:29.687 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:08:29.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:29.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:29.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:08:29.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:29.705 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:29.705 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:29.705 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:08:29.705 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:08:29.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:29.758 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:08:29.758 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:08:29.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:29.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:29.856 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 05:08:30.335 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 05:08:30.814 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 05:08:31.293 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 05:08:31.772 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 05:08:32.252 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 05:08:32.731 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 05:08:32.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:32.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:32.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:32.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:32.767 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:08:32.785 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:32.785 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:32.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:08:32.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:32.786 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:32.786 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:32.786 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:08:32.786 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:08:32.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:32.832 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:08:32.832 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:08:32.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:32.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:32.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:32.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:32.904 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:32.904 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:32.904 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:08:32.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:32.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:32.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:08:32.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:32.922 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:32.922 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:32.922 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:08:32.922 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:08:32.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:32.974 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:08:32.974 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:08:32.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:32.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:33.206 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 05:08:33.685 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 05:08:34.164 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 05:08:34.641 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 05:08:35.120 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 05:08:35.598 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 05:08:35.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:35.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:35.984 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:35.984 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:35.984 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:08:36.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:36.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:36.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:08:36.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:36.004 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:36.004 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:36.004 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:08:36.004 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:08:36.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:36.021 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:08:36.021 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:08:36.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:36.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:36.077 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 05:08:36.556 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 05:08:37.035 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 05:08:37.514 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 05:08:37.993 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 05:08:38.471 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 05:08:38.949 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 05:08:39.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:39.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:39.029 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:39.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:39.030 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:08:39.049 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:39.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:39.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:08:39.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:39.050 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:39.050 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:39.050 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:08:39.050 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:08:39.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:39.094 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:08:39.094 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:08:39.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:39.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:39.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:39.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:39.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:39.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:39.159 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:08:39.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:39.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:39.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:08:39.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:39.202 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:39.203 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:39.203 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:08:39.203 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:08:39.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:39.239 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:08:39.240 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:08:39.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:39.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:39.426 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 05:08:39.902 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 05:08:40.381 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 05:08:40.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:40.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:40.563 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:40.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:40.564 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:08:40.582 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:40.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:40.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:08:40.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:40.583 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:40.583 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:40.583 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:08:40.583 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:08:40.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:40.625 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:40.625 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:40.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:40.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:40.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:40.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:40.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:40.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:40.859 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 05:08:40.866 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:40.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:40.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:08:40.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:40.867 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:40.867 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:40.868 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:08:40.868 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:08:40.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:40.914 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:40.914 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:40.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:40.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:41.336 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 05:08:41.814 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 05:08:42.292 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 05:08:42.771 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 05:08:43.248 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 05:08:43.727 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 05:08:43.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:43.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:43.924 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:43.924 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:43.941 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:43.941 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:43.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:08:43.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:43.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:43.943 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:43.943 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:08:43.943 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:08:43.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:43.965 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:43.965 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:43.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:43.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:44.204 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 05:08:44.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:44.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:44.213 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:44.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:44.231 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:44.231 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:44.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:08:44.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:44.232 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:44.232 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:44.232 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:08:44.232 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:08:44.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:44.255 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:44.255 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:44.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:44.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:44.683 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 05:08:45.161 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 05:08:45.639 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 05:08:46.117 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 05:08:46.596 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 05:08:47.074 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-15 05:08:47.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:47.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:47.264 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:47.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:47.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:47.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:47.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:08:47.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:47.284 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:47.284 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:47.284 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:08:47.284 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:08:47.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:47.315 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:47.315 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:47.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:47.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:47.552 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-15 05:08:48.030 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-15 05:08:48.509 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-15 05:08:48.986 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-15 05:08:49.464 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-15 05:08:49.943 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-15 05:08:50.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:50.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:50.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:50.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:50.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:50.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:50.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:08:50.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:50.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:50.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:50.345 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:08:50.345 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:08:50.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:50.366 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:50.367 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:50.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:50.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:50.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:50.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:50.410 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:50.410 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:50.421 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-15 05:08:50.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:50.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:50.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:08:50.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:50.428 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:50.428 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:50.428 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:08:50.428 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:08:50.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:50.475 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:50.475 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:50.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:50.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:50.898 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-15 05:08:51.377 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-15 05:08:51.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:51.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:51.420 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:51.420 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:51.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:51.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:51.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:08:51.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:51.439 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:51.439 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:51.439 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:08:51.439 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:08:51.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:51.478 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:08:51.478 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:08:51.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:51.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:51.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:51.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:51.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:51.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:51.536 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:08:51.553 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:51.553 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:51.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:08:51.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:51.554 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:51.554 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:51.554 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:08:51.554 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:08:51.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:51.560 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:08:51.560 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:08:51.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:51.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:51.854 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-15 05:08:52.332 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-15 05:08:52.811 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-15 05:08:53.289 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-15 05:08:53.767 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-15 05:08:54.246 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-15 05:08:54.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:54.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:54.567 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:54.567 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:54.567 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:08:54.582 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:54.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:54.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:08:54.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:54.584 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:54.584 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:54.584 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:08:54.584 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:08:54.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:54.629 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:08:54.629 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:08:54.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:54.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:54.723 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-15 05:08:55.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:55.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:55.117 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:55.118 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:55.118 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:08:55.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:55.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:55.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:08:55.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:55.137 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:55.137 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:55.137 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:08:55.137 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:08:55.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:55.142 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:08:55.142 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:08:55.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:55.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:55.201 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-15 05:08:55.679 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-15 05:08:56.157 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-15 05:08:56.634 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-15 05:08:57.112 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-15 05:08:57.591 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-15 05:08:58.069 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-15 05:08:58.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:58.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:58.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:58.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:58.149 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:08:58.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:08:58.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:08:58.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:08:58.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:58.169 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:08:58.169 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:08:58.169 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:08:58.169 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:08:58.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:08:58.215 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:08:58.216 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:08:58.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:58.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:08:58.546 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-15 05:08:59.025 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-15 05:08:59.504 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-15 05:08:59.982 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-15 05:09:00.460 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2025-12-15 05:09:00.938 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2025-12-15 05:09:01.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:01.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:01.224 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:01.225 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:01.225 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:09:01.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:01.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:01.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:09:01.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:01.245 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:09:01.245 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:09:01.245 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:09:01.245 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:09:01.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:01.275 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:09:01.275 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:09:01.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:01.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:01.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:01.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:01.334 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:01.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:01.334 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:09:01.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:01.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:01.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:09:01.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:01.353 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:09:01.353 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:09:01.353 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:09:01.353 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:09:01.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:01.356 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:09:01.356 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:09:01.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:01.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:01.415 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2025-12-15 05:09:01.894 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2025-12-15 05:09:02.372 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2025-12-15 05:09:02.851 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2025-12-15 05:09:03.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:03.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:03.311 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:03.311 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:03.312 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:09:03.321 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:09:03.321 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:09:03.321 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:09:03.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:09:03.327 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:09:03.328 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:09:03.328 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:09:03.328 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:09:03.328 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:09:03.328 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:09:03.328 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:09:03.328 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=9590 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:09:03.329 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=9590 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:09:03.329 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=9590 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:09:03.329 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=9590 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:09:03.329 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=9590 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:09:03.329 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=9590 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:09:03.329 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=9591 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:09:03.329 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=9591 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:09:03.329 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=9591 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:09:03.329 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=9591 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:09:03.329 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=9591 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:09:03.329 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=9591 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:09:03.330 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=9591 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:09:03.330 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=9591 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:09:08.328 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:09:08.328 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:09:08.328 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:09:08.328 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:09:08.329 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:09:08.329 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:09:08.346 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:09:08.347 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:09:08.347 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:09:08.348 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:09:08.348 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:09:08.353 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:09:08.354 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:09:08.354 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:09:08.354 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:09:08.355 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:09:08.355 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:09:08.355 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:09:08.355 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:09:08.358 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:09:08.358 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:09:08.359 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:09:08.359 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:09:08.359 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:09:08.359 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:09:08.359 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:09:08.359 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:09:08.362 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:09:08.363 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:09:08.363 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:09:08.363 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:09:08.363 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:09:08.363 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:09:08.363 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:09:08.363 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:09:08.368 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:09:08.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:09:08.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:09:08.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:09:08.368 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:09:08.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:09:08.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:09:08.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:09:08.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:09:08.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:08.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:08.369 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:09:08.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:08.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:08.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:08.369 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:09:08.369 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:09:08.369 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:09:08.369 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:09:08.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:08.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:08.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:08.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:09:08.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:08.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:08.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:08.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:08.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:08.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:08.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:08.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:08.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:08.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:08.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:08.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:08.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:08.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:08.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:08.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:08.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:08.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:08.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:08.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:08.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:08.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:08.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:08.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:08.374 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:09:08.857 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:09:08.887 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:09:08.888 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:09:08.888 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:09:08.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:08.905 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:08.905 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:08.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:09:08.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:08.908 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:09:08.908 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:09:08.908 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:09:08.908 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:09:08.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:08.959 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:09:08.960 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:09:08.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:08.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:09.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:09.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:09.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:09.020 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:09.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:09.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:09.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:09:09.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:09.037 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:09:09.038 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:09:09.038 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:09:09.038 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:09:09.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:09.103 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:09:09.103 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:09:09.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:09.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:09.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:09.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:09.181 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:09.181 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:09.182 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:09:09.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:09.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:09.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:09:09.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:09.200 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:09:09.201 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:09:09.201 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:09:09.201 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:09:09.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:09.240 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:09:09.240 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:09:09.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:09.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:09.333 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:09:09.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:09:09.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:09:09.373 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:09:09.373 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:09:09.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:09.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:09.493 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:09.494 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:09.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:09.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:09.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:09:09.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:09.509 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:09:09.509 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:09:09.509 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:09:09.509 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:09:09.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:09.516 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:09:09.516 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:09:09.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:09.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:09.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:09.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:09.657 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:09.657 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:09.657 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:09:09.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:09:09.667 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:09:09.667 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:09:09.667 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:09:09.670 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:09:09.670 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:09:09.670 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:09:09.670 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:09:09.670 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:09:09.670 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:09:09.670 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:09:14.671 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:09:14.671 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:09:14.672 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:09:14.673 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:09:14.673 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:09:14.674 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:09:14.684 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:09:14.685 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:09:14.685 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:09:14.685 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:09:14.685 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:09:14.690 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:09:14.690 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:09:14.690 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:09:14.690 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:09:14.691 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:09:14.691 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:09:14.691 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:09:14.691 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:09:14.694 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:09:14.694 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:09:14.694 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:09:14.694 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:09:14.694 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:09:14.694 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:09:14.695 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:09:14.695 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:09:14.697 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:09:14.698 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:09:14.698 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:09:14.698 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:09:14.698 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:09:14.698 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:09:14.698 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:09:14.698 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:09:14.702 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:09:14.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:09:14.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:09:14.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:09:14.702 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:09:14.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:09:14.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:09:14.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:09:14.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:09:14.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:14.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:14.703 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:09:14.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:14.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:14.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:14.703 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:09:14.703 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:09:14.703 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:09:14.703 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:09:14.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:14.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:14.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:14.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:09:14.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:14.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:14.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:14.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:14.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:14.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:14.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:14.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:14.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:14.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:14.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:14.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:14.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:14.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:14.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:14.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:14.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:14.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:14.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:14.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:14.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:14.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:14.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:14.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:14.708 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:09:15.192 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:09:15.223 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:09:15.224 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:09:15.225 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:09:15.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:15.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:15.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:15.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:09:15.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:15.247 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:09:15.248 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:09:15.248 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:09:15.248 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:09:15.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:15.294 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:09:15.294 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:09:15.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:15.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:15.670 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:09:15.706 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:09:15.707 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:09:15.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:09:15.707 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:09:16.148 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:09:16.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:16.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:16.171 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:16.171 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:16.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:16.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:16.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:09:16.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:16.188 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:09:16.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:09:16.189 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:09:16.189 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:09:16.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:16.192 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:09:16.192 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:09:16.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:16.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:16.627 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:09:16.707 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:09:16.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:09:16.708 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:09:16.708 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:09:16.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:16.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:16.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:16.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:16.900 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:09:16.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:16.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:16.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:09:16.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:16.923 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:09:16.923 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:09:16.923 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:09:16.923 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:09:16.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:16.982 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:09:16.982 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:09:16.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:16.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:17.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:17.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:17.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:17.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:17.086 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:17.086 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:17.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:09:17.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:17.088 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:09:17.088 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:09:17.088 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:09:17.088 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:09:17.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:17.096 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:09:17.096 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:09:17.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:17.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:17.102 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:09:17.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:17.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:17.496 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:17.496 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:17.496 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:09:17.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:09:17.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:09:17.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:09:17.506 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:09:17.510 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:09:17.510 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:09:17.510 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:09:17.510 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:09:17.510 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:09:17.510 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:09:17.510 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:09:22.511 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:09:22.511 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:09:22.514 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:09:22.515 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:09:22.515 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:09:22.516 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:09:22.523 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:09:22.524 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:09:22.524 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:09:22.524 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:09:22.525 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:09:22.527 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:09:22.527 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:09:22.528 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:09:22.528 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:09:22.528 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:09:22.528 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:09:22.528 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:09:22.528 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:09:22.530 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:09:22.530 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:09:22.530 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:09:22.530 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:09:22.530 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:09:22.530 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:09:22.531 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:09:22.531 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:09:22.535 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:09:22.535 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:09:22.535 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:09:22.535 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:09:22.535 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:09:22.535 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:09:22.535 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:09:22.535 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:09:22.539 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:09:22.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:09:22.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:09:22.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:09:22.539 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:09:22.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:09:22.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:09:22.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:09:22.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:22.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:09:22.539 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:09:22.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:22.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:22.539 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:09:22.539 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:09:22.539 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:09:22.540 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:09:22.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:22.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:22.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:22.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:09:22.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:22.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:22.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:22.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:22.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:22.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:22.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:22.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:22.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:22.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:22.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:22.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:22.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:22.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:22.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:22.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:22.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:22.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:22.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:22.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:22.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:22.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:22.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:22.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:22.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:22.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:22.544 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:09:23.025 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:09:23.062 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:09:23.064 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:09:23.066 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:09:23.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:23.081 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:23.081 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:23.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:09:23.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:23.083 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:09:23.083 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:09:23.084 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:09:23.084 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:09:23.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:23.127 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:09:23.127 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:09:23.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:23.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:23.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:23.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:23.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:23.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:23.313 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:23.313 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:23.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:09:23.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:23.315 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:09:23.315 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:09:23.315 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:09:23.315 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:09:23.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:23.362 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:09:23.362 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:09:23.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:23.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:23.502 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:09:23.543 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:09:23.543 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:09:23.543 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:09:23.543 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:09:23.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:23.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:23.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:23.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:23.650 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:09:23.669 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:23.669 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:23.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:09:23.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:23.670 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:09:23.671 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:09:23.671 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:09:23.671 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:09:23.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:23.690 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:09:23.690 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:09:23.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:23.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:23.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:23.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:23.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:23.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:23.978 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:23.978 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:23.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:09:23.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:23.979 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:09:23.979 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:09:23.979 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:09:23.979 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:09:23.979 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:09:24.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:24.028 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:09:24.028 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:09:24.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:24.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:24.457 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:09:24.544 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:09:24.544 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:09:24.544 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:09:24.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:09:24.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:24.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:24.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:24.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:24.851 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:09:24.860 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:09:24.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:09:24.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:09:24.860 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:09:24.862 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:09:24.863 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:09:24.863 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:09:24.863 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:09:24.863 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:09:24.863 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:09:24.863 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:09:24.863 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=497 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:09:24.863 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=497 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:09:24.863 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=497 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:09:24.863 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=497 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:09:29.864 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:09:29.864 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:09:29.867 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:09:29.868 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:09:29.868 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:09:29.869 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:09:29.876 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:09:29.877 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:09:29.877 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:09:29.878 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:09:29.878 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:09:29.882 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:09:29.883 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:09:29.883 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:09:29.883 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:09:29.883 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:09:29.883 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:09:29.884 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:09:29.884 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:09:29.888 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:09:29.889 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:09:29.889 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:09:29.889 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:09:29.889 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:09:29.889 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:09:29.889 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:09:29.889 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:09:29.894 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:09:29.894 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:09:29.894 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:09:29.894 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:09:29.894 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:09:29.894 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:09:29.894 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:09:29.894 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:09:29.900 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:09:29.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:09:29.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:09:29.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:09:29.901 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:09:29.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:09:29.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:09:29.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:09:29.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:29.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:09:29.901 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:09:29.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:29.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:29.902 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:09:29.902 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:09:29.902 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:09:29.902 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:09:29.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:29.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:29.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:29.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:09:29.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:29.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:29.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:29.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:29.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:29.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:29.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:29.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:29.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:29.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:29.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:29.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:29.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:29.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:29.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:29.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:29.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:29.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:29.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:29.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:29.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:29.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:29.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:29.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:29.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:29.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:29.907 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:09:30.392 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:09:30.422 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:09:30.423 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:09:30.425 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:09:30.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:30.435 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:30.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:30.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:09:30.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:30.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:09:30.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:09:30.438 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:09:30.438 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:09:30.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:30.497 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:09:30.497 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:09:30.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:30.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:30.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:30.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:30.667 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:30.667 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:30.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:30.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:30.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:09:30.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:30.685 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:09:30.685 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:09:30.685 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:09:30.685 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:09:30.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:30.728 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:09:30.729 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:09:30.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:30.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:30.867 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:09:30.906 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:09:30.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:09:30.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:09:30.906 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:09:31.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:31.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:31.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:31.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:31.013 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:09:31.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:31.032 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:31.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:09:31.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:31.033 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:09:31.033 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:09:31.034 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:09:31.034 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:09:31.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:31.048 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:09:31.048 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:09:31.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:31.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:31.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:31.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:31.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:31.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:31.340 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:31.340 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:31.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:09:31.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:31.341 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:09:31.341 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:09:31.341 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:09:31.341 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:09:31.345 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:09:31.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:31.399 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:09:31.399 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:09:31.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:31.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:31.820 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:09:31.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:09:31.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:09:31.908 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:09:31.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:09:32.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:32.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:32.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:32.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:32.214 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:09:32.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:09:32.224 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:09:32.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:09:32.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:09:32.226 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:09:32.226 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:09:32.226 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:09:32.226 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:09:32.227 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:09:32.227 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:09:32.227 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:09:32.227 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=497 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:09:32.227 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=497 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:09:32.227 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=498 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:09:32.227 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=498 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:09:32.228 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=498 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:09:32.228 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=498 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:09:32.228 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=498 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:09:32.228 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=498 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:09:32.228 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=498 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:09:32.228 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=498 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:09:37.249 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:09:37.249 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:09:37.252 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:09:37.252 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:09:37.253 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:09:37.253 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:09:37.269 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:09:37.271 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:09:37.271 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:09:37.271 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:09:37.272 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:09:37.283 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:09:37.283 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:09:37.284 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:09:37.284 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:09:37.285 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:09:37.286 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:09:37.286 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:09:37.287 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:09:37.292 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:09:37.293 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:09:37.293 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:09:37.293 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:09:37.294 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:09:37.294 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:09:37.295 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:09:37.295 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:09:37.299 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:09:37.300 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:09:37.300 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:09:37.300 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:09:37.301 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:09:37.301 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:09:37.301 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:09:37.301 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:09:37.308 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:09:37.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:09:37.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:09:37.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:09:37.308 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:09:37.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:09:37.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:09:37.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:09:37.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:09:37.309 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:09:37.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:37.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:37.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:37.309 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:09:37.309 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:09:37.309 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:09:37.310 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:09:37.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:37.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:37.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:37.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:09:37.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:37.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:37.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:37.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:37.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:37.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:37.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:37.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:37.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:37.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:37.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:37.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:37.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:37.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:37.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:37.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:37.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:37.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:37.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:37.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:09:37.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:37.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:37.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:09:37.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:37.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:09:37.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:09:37.314 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:09:37.799 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:09:37.836 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:09:37.838 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:09:37.839 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:09:37.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:37.862 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:37.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:37.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:09:37.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:37.866 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:09:37.866 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:09:37.866 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:09:37.866 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:09:37.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:37.895 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:09:37.895 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:09:37.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:37.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:38.276 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:09:38.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:09:38.314 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:09:38.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:09:38.315 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:09:38.754 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:09:39.231 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:09:39.315 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:09:39.315 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:09:39.315 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:09:39.316 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:09:39.709 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:09:39.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:39.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:39.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:39.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:39.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:39.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:39.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:09:39.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:39.778 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:09:39.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:09:39.778 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:09:39.778 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:09:39.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:39.807 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:09:39.807 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:09:39.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:39.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:40.185 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:09:40.315 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:09:40.316 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:09:40.316 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:09:40.316 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:09:40.663 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:09:41.137 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:09:41.317 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:09:41.317 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:09:41.317 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:09:41.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:09:41.608 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:09:41.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:41.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:41.936 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:41.936 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:41.936 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:09:41.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:41.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:41.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:09:41.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:41.951 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:09:41.951 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:09:41.951 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:09:41.951 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:09:41.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:41.986 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:09:41.986 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:09:41.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:41.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:42.086 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:09:42.317 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:09:42.318 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:09:42.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:09:42.318 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:09:42.564 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:09:43.042 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:09:43.519 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:09:43.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:43.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:43.562 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:43.562 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:43.573 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:09:43.573 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:09:43.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:09:43.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:43.574 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:09:43.574 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:09:43.574 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:09:43.575 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:09:43.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:09:43.615 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:09:43.615 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:09:43.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:43.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:09:43.998 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:09:44.476 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:09:44.955 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:09:45.434 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:09:45.912 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:09:46.390 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:09:46.869 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:09:47.347 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:09:47.826 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:09:48.305 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 05:09:48.784 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 05:09:49.261 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 05:09:49.740 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 05:09:50.218 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 05:09:50.696 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 05:09:51.174 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 05:09:51.652 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 05:09:52.130 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 05:09:52.609 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 05:09:53.087 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 05:09:53.565 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 05:09:54.043 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 05:09:54.521 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 05:09:55.000 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 05:09:55.477 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 05:09:55.952 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 05:09:56.430 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 05:09:56.909 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 05:09:57.387 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 05:09:57.865 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 05:09:58.344 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 05:09:58.823 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 05:09:59.302 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 05:09:59.781 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 05:10:00.260 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 05:10:00.739 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 05:10:01.217 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 05:10:01.696 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 05:10:02.171 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 05:10:02.650 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 05:10:03.128 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 05:10:03.577 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:10:03.577 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:10:03.577 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:10:03.581 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:10:03.581 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:10:03.581 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:10:03.581 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:10:03.582 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:10:03.582 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:10:03.582 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:10:03.582 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:10:03.582 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:10:03.582 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:10:03.582 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:10:08.585 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:10:08.586 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:10:08.587 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:10:08.588 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:10:08.588 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:10:08.589 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:10:08.597 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:10:08.598 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:10:08.598 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:10:08.598 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:10:08.598 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:10:08.601 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:10:08.601 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:10:08.601 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:10:08.601 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:10:08.602 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:10:08.602 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:10:08.602 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:10:08.602 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:10:08.604 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:10:08.604 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:10:08.604 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:10:08.604 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:10:08.604 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:10:08.604 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:10:08.604 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:10:08.604 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:10:08.607 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:10:08.607 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:10:08.607 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:10:08.607 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:10:08.607 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:10:08.607 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:10:08.607 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:10:08.607 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:10:08.610 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:10:08.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:10:08.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:10:08.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:10:08.610 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:10:08.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:10:08.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:10:08.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:10:08.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:10:08.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:10:08.611 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:10:08.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:10:08.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:10:08.611 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:10:08.611 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:10:08.611 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:10:08.611 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:10:08.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:10:08.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:10:08.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:10:08.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:10:08.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:10:08.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:10:08.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:10:08.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:10:08.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:10:08.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:10:08.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:10:08.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:10:08.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:10:08.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:10:08.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:10:08.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:10:08.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:10:08.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:10:08.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:10:08.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:10:08.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:10:08.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:10:08.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:10:08.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:10:08.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:10:08.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:10:08.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:10:08.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:10:08.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:10:08.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:10:08.616 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:10:09.098 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:10:09.130 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:10:09.132 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:10:09.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:10:09.133 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:10:09.152 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:10:09.152 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:10:09.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:10:09.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:09.155 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:10:09.155 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:10:09.155 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:10:09.155 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:10:09.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:10:09.202 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:10:09.202 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:10:09.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:09.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:09.575 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:10:09.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:10:09.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:10:09.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:10:09.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:10:10.053 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:10:10.532 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:10:10.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:10:10.615 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:10:10.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:10:10.615 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:10:11.010 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:10:11.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:10:11.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:11.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:10:11.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:10:11.081 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:10:11.081 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:10:11.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:10:11.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:11.082 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:10:11.082 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:10:11.082 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:10:11.082 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:10:11.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:10:11.106 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:10:11.106 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:10:11.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:11.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:11.487 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:10:11.615 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:10:11.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:10:11.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:10:11.616 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:10:11.965 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:10:12.443 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:10:12.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:10:12.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:10:12.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:10:12.617 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:10:12.922 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:10:13.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:10:13.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:13.257 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:10:13.257 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:10:13.257 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:10:13.273 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:10:13.273 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:10:13.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:10:13.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:13.275 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:10:13.275 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:10:13.275 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:10:13.275 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:10:13.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:10:13.298 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:10:13.299 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:10:13.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:13.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:13.400 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:10:13.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:10:13.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:10:13.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:10:13.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:10:13.877 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:10:14.355 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:10:14.833 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:10:14.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:10:14.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:14.877 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:10:14.877 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:10:14.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:10:14.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:10:14.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:10:14.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:14.895 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:10:14.895 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:10:14.895 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:10:14.895 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:10:14.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:10:14.934 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:10:14.934 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:10:14.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:14.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:15.311 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:10:15.789 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:10:16.267 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:10:16.746 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:10:17.225 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:10:17.703 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:10:18.182 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:10:18.661 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:10:19.140 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:10:19.618 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 05:10:20.097 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 05:10:20.576 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 05:10:21.054 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 05:10:21.532 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 05:10:22.011 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 05:10:22.489 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 05:10:22.968 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 05:10:23.446 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 05:10:23.924 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 05:10:24.402 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 05:10:24.880 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 05:10:25.358 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 05:10:25.837 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 05:10:26.315 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 05:10:26.793 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 05:10:27.271 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 05:10:27.750 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 05:10:28.229 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 05:10:28.707 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 05:10:29.186 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 05:10:29.665 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 05:10:30.144 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 05:10:30.622 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 05:10:31.101 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 05:10:31.580 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 05:10:32.058 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 05:10:32.538 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 05:10:33.016 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 05:10:33.495 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 05:10:33.973 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 05:10:34.452 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 05:10:34.897 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:10:34.897 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:10:34.897 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:10:34.901 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:10:34.901 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:10:34.901 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:10:34.901 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:10:34.902 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:10:34.902 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:10:34.902 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:10:34.902 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:10:34.902 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:10:34.903 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:10:34.903 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:10:34.903 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=5607 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:10:34.903 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=5607 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:10:34.903 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=5607 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:10:34.903 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=5607 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:10:34.903 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=5607 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:10:34.903 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=5607 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:10:34.903 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=5607 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:10:39.908 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:10:39.908 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:10:39.908 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:10:39.909 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:10:39.909 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:10:39.910 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:10:39.918 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:10:39.919 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:10:39.919 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:10:39.920 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:10:39.920 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:10:39.923 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:10:39.923 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:10:39.924 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:10:39.924 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:10:39.924 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:10:39.924 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:10:39.925 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:10:39.925 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:10:39.926 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:10:39.926 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:10:39.927 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:10:39.927 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:10:39.927 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:10:39.927 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:10:39.927 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:10:39.927 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:10:39.929 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:10:39.929 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:10:39.929 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:10:39.929 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:10:39.929 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:10:39.929 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:10:39.929 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:10:39.929 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:10:39.932 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:10:39.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:10:39.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:10:39.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:10:39.932 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:10:39.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:10:39.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:10:39.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:10:39.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:10:39.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:10:39.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:10:39.933 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:10:39.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:10:39.933 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:10:39.933 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:10:39.933 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:10:39.933 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:10:39.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:10:39.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:10:39.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:10:39.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:10:39.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:10:39.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:10:39.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:10:39.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:10:39.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:10:39.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:10:39.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:10:39.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:10:39.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:10:39.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:10:39.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:10:39.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:10:39.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:10:39.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:10:39.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:10:39.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:10:39.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:10:39.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:10:39.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:10:39.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:10:39.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:10:39.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:10:39.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:10:39.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:10:39.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:10:39.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:10:39.938 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:10:40.422 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:10:40.451 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:10:40.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:10:40.454 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:10:40.456 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:10:40.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:10:40.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:10:40.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:10:40.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:40.473 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:10:40.473 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:10:40.473 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:10:40.473 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:10:40.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:10:40.525 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:10:40.525 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:10:40.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:40.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:40.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:10:40.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:40.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:10:40.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:10:40.713 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:10:40.713 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:10:40.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:10:40.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:40.714 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:10:40.714 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:10:40.714 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:10:40.714 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:10:40.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:10:40.759 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:10:40.759 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:10:40.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:40.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:40.899 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:10:40.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:10:40.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:10:40.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:10:40.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:10:41.377 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:10:41.856 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:10:41.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:10:41.937 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:10:41.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:10:41.938 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:10:42.333 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:10:42.810 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:10:42.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:10:42.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:42.859 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:10:42.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:10:42.874 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:10:42.874 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:10:42.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:10:42.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:42.876 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:10:42.876 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:10:42.876 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:10:42.876 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:10:42.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:10:42.909 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:10:42.910 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:10:42.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:42.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:42.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:10:42.939 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:10:42.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:10:42.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:10:43.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:10:43.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:43.076 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:10:43.076 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:10:43.086 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:10:43.086 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:10:43.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:10:43.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:43.087 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:10:43.087 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:10:43.087 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:10:43.087 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:10:43.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:10:43.089 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:10:43.089 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:10:43.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:43.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:43.287 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:10:43.765 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:10:43.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:10:43.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:10:43.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:10:43.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:10:44.244 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:10:44.721 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:10:44.941 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:10:44.941 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:10:44.941 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:10:44.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:10:45.199 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:10:45.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:10:45.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:45.295 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:10:45.295 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:10:45.311 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:10:45.311 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:10:45.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:10:45.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:45.313 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:10:45.313 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:10:45.313 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:10:45.313 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:10:45.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:10:45.341 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:10:45.341 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:10:45.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:45.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:45.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:10:45.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:45.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:10:45.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:10:45.615 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:10:45.633 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:10:45.633 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:10:45.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:10:45.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:45.635 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:10:45.635 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:10:45.635 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:10:45.635 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:10:45.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:10:45.676 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:10:45.678 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:10:45.678 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:10:45.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:45.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:46.155 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:10:46.633 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:10:47.111 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:10:47.590 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:10:47.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:10:47.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:47.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:10:47.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:10:47.973 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:10:47.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:10:47.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:10:47.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:10:47.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:47.992 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:10:47.992 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:10:47.992 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:10:47.992 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:10:48.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:10:48.013 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:10:48.013 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:10:48.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:48.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:48.068 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:10:48.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:10:48.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:48.299 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:10:48.299 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:10:48.299 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:10:48.319 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:10:48.319 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:10:48.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:10:48.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:48.321 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:10:48.321 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:10:48.321 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:10:48.321 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:10:48.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:10:48.357 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:10:48.357 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:10:48.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:48.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:48.545 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:10:49.024 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:10:49.503 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:10:49.981 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:10:50.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:10:50.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:50.410 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:10:50.410 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:10:50.410 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:10:50.426 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:10:50.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:10:50.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:10:50.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:50.428 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:10:50.428 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:10:50.428 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:10:50.428 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:10:50.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:10:50.459 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:10:50.462 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:10:50.463 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:10:50.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:50.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:50.937 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 05:10:51.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:10:51.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:51.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:10:51.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:10:51.114 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:10:51.114 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:10:51.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:10:51.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:51.116 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:10:51.116 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:10:51.116 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:10:51.116 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:10:51.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:10:51.119 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:10:51.119 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:10:51.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:51.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:51.414 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 05:10:51.892 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 05:10:52.370 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 05:10:52.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:10:52.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:52.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:10:52.812 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:10:52.830 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:10:52.830 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:10:52.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:10:52.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:52.832 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:10:52.832 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:10:52.832 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:10:52.832 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:10:52.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:10:52.839 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:10:52.839 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:10:52.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:52.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:52.848 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 05:10:53.325 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 05:10:53.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:10:53.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:53.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:10:53.482 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:10:53.490 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:10:53.490 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:10:53.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:10:53.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:53.491 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:10:53.491 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:10:53.492 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:10:53.492 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:10:53.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:10:53.514 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:10:53.514 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:10:53.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:53.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:53.802 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 05:10:54.281 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 05:10:54.759 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 05:10:55.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:10:55.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:55.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:10:55.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:10:55.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:10:55.215 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:10:55.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:10:55.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:55.217 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:10:55.217 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:10:55.217 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:10:55.217 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:10:55.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:10:55.228 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:10:55.229 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:10:55.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:55.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:55.237 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 05:10:55.715 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 05:10:56.193 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 05:10:56.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:10:56.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:56.516 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:10:56.516 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:10:56.516 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:10:56.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:10:56.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:10:56.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:10:56.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:56.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:10:56.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:10:56.533 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:10:56.533 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:10:56.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:10:56.576 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:10:56.576 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:10:56.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:56.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:10:56.671 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 05:10:57.150 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 05:10:57.628 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 05:10:58.107 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 05:10:58.585 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 05:10:59.063 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 05:10:59.542 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 05:11:00.020 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 05:11:00.499 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 05:11:00.978 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 05:11:01.457 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 05:11:01.936 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 05:11:02.414 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 05:11:02.894 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 05:11:03.372 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 05:11:03.851 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 05:11:04.329 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 05:11:04.808 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 05:11:05.286 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 05:11:05.765 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 05:11:06.243 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 05:11:06.722 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 05:11:07.201 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 05:11:07.679 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 05:11:08.157 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 05:11:08.635 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-15 05:11:09.114 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-15 05:11:09.593 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-15 05:11:10.072 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-15 05:11:10.550 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-15 05:11:11.028 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-15 05:11:11.507 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-15 05:11:11.986 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-15 05:11:12.465 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-15 05:11:12.943 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-15 05:11:13.422 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-15 05:11:13.900 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-15 05:11:14.379 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-15 05:11:14.857 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-15 05:11:15.336 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-15 05:11:15.814 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-15 05:11:16.293 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-15 05:11:16.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:16.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:16.535 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:11:16.538 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:11:16.538 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:11:16.538 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:11:16.538 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:11:16.539 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:11:16.540 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:11:16.540 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:11:16.540 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:11:16.540 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:11:16.540 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:11:16.540 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:11:21.543 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:11:21.543 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:11:21.545 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:11:21.546 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:11:21.546 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:11:21.547 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:11:21.562 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:11:21.563 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:11:21.563 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:11:21.564 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:11:21.564 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:11:21.568 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:11:21.568 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:11:21.568 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:11:21.569 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:11:21.569 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:11:21.569 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:11:21.570 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:11:21.570 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:11:21.572 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:11:21.572 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:11:21.573 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:11:21.573 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:11:21.573 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:11:21.573 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:11:21.573 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:11:21.573 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:11:21.576 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:11:21.576 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:11:21.576 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:11:21.576 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:11:21.576 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:11:21.576 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:11:21.577 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:11:21.577 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:11:21.581 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:11:21.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:11:21.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:11:21.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:11:21.582 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:11:21.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:11:21.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:11:21.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:11:21.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:11:21.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:11:21.582 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:11:21.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:11:21.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:11:21.582 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:11:21.582 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:11:21.582 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:11:21.583 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:11:21.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:11:21.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:11:21.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:11:21.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:11:21.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:11:21.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:11:21.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:11:21.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:11:21.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:11:21.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:11:21.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:11:21.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:11:21.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:11:21.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:11:21.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:11:21.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:11:21.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:11:21.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:11:21.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:11:21.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:11:21.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:11:21.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:11:21.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:11:21.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:11:21.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:11:21.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:11:21.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:11:21.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:11:21.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:11:21.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:11:21.587 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:11:22.071 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:11:22.107 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:11:22.109 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:11:22.111 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:11:22.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:22.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:22.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:22.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:11:22.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:22.129 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:22.129 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:22.129 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:11:22.129 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:11:22.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:22.172 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:22.172 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:22.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:22.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:22.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:22.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:22.234 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:22.234 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:22.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:22.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:22.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:11:22.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:22.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:22.252 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:22.252 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:11:22.252 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:11:22.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:22.317 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:22.317 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:22.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:22.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:22.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:22.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:22.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:22.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:22.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:22.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:22.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:11:22.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:22.414 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:22.414 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:22.414 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:11:22.414 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:11:22.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:22.458 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:11:22.458 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:11:22.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:22.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:22.544 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:11:22.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:22.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:22.552 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:22.553 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:22.553 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:11:22.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:22.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:22.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:11:22.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:22.572 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:22.572 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:22.572 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:11:22.572 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:11:22.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:11:22.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:11:22.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:22.588 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:11:22.588 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:11:22.588 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:11:22.588 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:11:22.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:22.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:22.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:22.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:22.672 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:22.672 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:22.672 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:11:22.688 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:22.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:22.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:11:22.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:22.690 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:22.690 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:22.690 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:11:22.690 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:11:22.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:22.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:22.735 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:22.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:22.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:22.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:22.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:22.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:22.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:22.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:22.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:22.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:11:22.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:22.956 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:22.956 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:22.956 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:11:22.956 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:11:22.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:22.960 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:22.960 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:22.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:22.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:23.020 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:11:23.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:23.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:23.181 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:23.181 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:23.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:23.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:23.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:11:23.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:23.203 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:23.203 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:23.203 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:11:23.203 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:11:23.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:23.265 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:11:23.265 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:11:23.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:23.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:23.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:23.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:23.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:23.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:23.345 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:11:23.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:23.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:23.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:11:23.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:23.362 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:23.362 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:23.362 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:11:23.362 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:11:23.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:23.401 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:11:23.401 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:11:23.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:23.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:23.495 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:11:23.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:23.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:23.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:23.580 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:23.580 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:11:23.590 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:11:23.590 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:11:23.591 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:11:23.591 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:11:23.596 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:11:23.597 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:11:23.597 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:11:23.597 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:11:23.597 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:11:23.598 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:11:23.598 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:11:23.598 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=433 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:11:23.598 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=433 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:11:23.598 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=433 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:11:23.598 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=433 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:11:23.598 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=433 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:11:23.599 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=433 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:11:23.599 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=433 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:11:23.599 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=433 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:11:28.597 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:11:28.597 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:11:28.598 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:11:28.599 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:11:28.599 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:11:28.600 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:11:28.608 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:11:28.609 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:11:28.609 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:11:28.609 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:11:28.610 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:11:28.613 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:11:28.613 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:11:28.613 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:11:28.613 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:11:28.614 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:11:28.614 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:11:28.614 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:11:28.614 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:11:28.616 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:11:28.616 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:11:28.616 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:11:28.616 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:11:28.617 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:11:28.617 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:11:28.617 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:11:28.617 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:11:28.619 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:11:28.619 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:11:28.619 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:11:28.619 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:11:28.619 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:11:28.619 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:11:28.619 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:11:28.619 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:11:28.623 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:11:28.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:11:28.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:11:28.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:11:28.623 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:11:28.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:11:28.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:11:28.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:11:28.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:11:28.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:11:28.623 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:11:28.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:11:28.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:11:28.623 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:11:28.623 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:11:28.623 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:11:28.623 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:11:28.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:11:28.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:11:28.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:11:28.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:11:28.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:11:28.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:11:28.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:11:28.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:11:28.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:11:28.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:11:28.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:11:28.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:11:28.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:11:28.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:11:28.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:11:28.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:11:28.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:11:28.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:11:28.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:11:28.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:11:28.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:11:28.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:11:28.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:11:28.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:11:28.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:11:28.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:11:28.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:11:28.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:11:28.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:11:28.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:11:28.628 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:11:29.112 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:11:29.141 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:11:29.143 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:11:29.144 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:11:29.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:29.157 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:29.157 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:29.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:11:29.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:29.162 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:29.162 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:29.163 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:11:29.163 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:11:29.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:29.215 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:29.215 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:29.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:29.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:29.590 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:11:29.627 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:11:29.627 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:11:29.628 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:11:29.628 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:11:30.068 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:11:30.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:30.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:30.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:30.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:30.109 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:30.109 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:30.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:11:30.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:30.111 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:30.111 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:30.111 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:11:30.111 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:11:30.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:30.168 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:30.168 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:30.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:30.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:30.545 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:11:30.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:30.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:30.577 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:30.577 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:30.593 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:30.593 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:30.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:11:30.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:30.594 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:30.594 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:30.594 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:11:30.594 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:11:30.628 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:11:30.628 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:11:30.628 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:11:30.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:11:30.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:30.647 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:11:30.647 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:11:30.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:30.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:31.023 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:11:31.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:31.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:31.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:31.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:31.305 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:11:31.315 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:31.315 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:31.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:11:31.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:31.316 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:31.316 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:31.316 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:11:31.316 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:11:31.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:31.359 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:11:31.359 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:11:31.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:31.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:31.501 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:11:31.629 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:11:31.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:11:31.630 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:11:31.630 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:11:31.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:31.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:31.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:31.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:31.793 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:11:31.813 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:31.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:31.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:11:31.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:31.815 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:31.815 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:31.815 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:11:31.815 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:11:31.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:31.830 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:31.830 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:31.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:31.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:31.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:31.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:31.943 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:31.944 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:31.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:31.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:31.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:11:31.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:31.964 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:31.964 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:31.964 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:11:31.965 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:11:31.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:31.970 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:31.970 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:31.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:31.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:31.978 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:11:32.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:32.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:32.420 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:32.420 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:32.430 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:32.430 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:32.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:11:32.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:32.431 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:32.431 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:32.431 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:11:32.431 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:11:32.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:32.452 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:11:32.452 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:11:32.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:32.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:32.455 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:11:32.630 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:11:32.630 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:11:32.631 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:11:32.631 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:11:32.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:32.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:32.853 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:32.853 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:32.853 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:11:32.872 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:32.872 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:32.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:11:32.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:32.873 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:32.873 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:32.873 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:11:32.874 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:11:32.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:32.933 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:11:32.935 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:11:32.935 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:11:32.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:32.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:33.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:33.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:33.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:33.329 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:33.329 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:11:33.338 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:11:33.339 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:11:33.339 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:11:33.339 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:11:33.341 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:11:33.341 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:11:33.341 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:11:33.341 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:11:33.341 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:11:33.341 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:11:33.341 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:11:38.346 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:11:38.346 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:11:38.346 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:11:38.347 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:11:38.348 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:11:38.349 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:11:38.356 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:11:38.357 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:11:38.357 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:11:38.357 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:11:38.357 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:11:38.360 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:11:38.360 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:11:38.360 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:11:38.360 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:11:38.361 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:11:38.361 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:11:38.361 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:11:38.362 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:11:38.364 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:11:38.364 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:11:38.364 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:11:38.364 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:11:38.364 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:11:38.365 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:11:38.365 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:11:38.365 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:11:38.368 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:11:38.368 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:11:38.368 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:11:38.368 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:11:38.368 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:11:38.368 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:11:38.368 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:11:38.368 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:11:38.373 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:11:38.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:11:38.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:11:38.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:11:38.373 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:11:38.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:11:38.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:11:38.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:11:38.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:11:38.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:11:38.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:11:38.374 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:11:38.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:11:38.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:11:38.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:11:38.374 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:11:38.374 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:11:38.374 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:11:38.374 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:11:38.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:11:38.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:11:38.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:11:38.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:11:38.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:11:38.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:11:38.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:11:38.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:11:38.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:11:38.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:11:38.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:11:38.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:11:38.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:11:38.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:11:38.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:11:38.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:11:38.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:11:38.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:11:38.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:11:38.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:11:38.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:11:38.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:11:38.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:11:38.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:11:38.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:11:38.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:11:38.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:11:38.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:11:38.379 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:11:38.862 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:11:38.898 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:11:38.899 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:11:38.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:38.899 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:11:38.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:38.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:38.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:11:38.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:38.910 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:38.910 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:38.910 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:11:38.910 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:11:38.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:38.966 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:38.967 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:38.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:38.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:39.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:39.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:39.026 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:39.027 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:39.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:39.045 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:39.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:11:39.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:39.047 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:39.047 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:39.047 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:11:39.047 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:11:39.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:39.109 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:39.109 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:39.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:39.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:39.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:39.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:39.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:39.164 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:39.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:39.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:39.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:11:39.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:39.183 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:39.184 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:39.184 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:11:39.184 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:11:39.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:39.188 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:11:39.188 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:11:39.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:39.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:39.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:39.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:39.285 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:39.285 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:39.285 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:11:39.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:39.304 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:39.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:11:39.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:39.306 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:39.306 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:39.306 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:11:39.306 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:11:39.339 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:11:39.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:39.350 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:11:39.350 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:11:39.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:39.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:39.378 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:11:39.378 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:11:39.379 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:11:39.379 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:11:39.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:39.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:39.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:39.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:39.414 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:11:39.432 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:39.432 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:39.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:11:39.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:39.434 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:39.434 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:39.434 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:11:39.434 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:11:39.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:39.484 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:39.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:39.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:39.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:39.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:39.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:39.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:39.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:39.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:39.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:39.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:11:39.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:39.594 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:39.594 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:39.594 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:11:39.594 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:11:39.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:39.632 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:39.633 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:39.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:39.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:39.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:39.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:39.809 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:39.809 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:39.819 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:11:39.827 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:39.827 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:39.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:11:39.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:39.828 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:39.828 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:39.828 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:11:39.828 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:11:39.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:39.873 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:11:39.874 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:11:39.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:39.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:40.297 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:11:40.379 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:11:40.379 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:11:40.379 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:11:40.380 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:11:40.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:40.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:40.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:40.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:40.457 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:11:40.475 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:40.475 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:40.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:11:40.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:40.477 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:40.477 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:40.477 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:11:40.477 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:11:40.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:40.480 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:11:40.480 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:11:40.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:40.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:40.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:40.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:40.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:40.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:40.691 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:11:40.701 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:11:40.701 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:11:40.701 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:11:40.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:11:40.706 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:11:40.706 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:11:40.706 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:11:40.706 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:11:40.707 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:11:40.707 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:11:40.707 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:11:40.707 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=498 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:11:40.707 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=498 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:11:45.706 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:11:45.706 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:11:45.707 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:11:45.708 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:11:45.708 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:11:45.709 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:11:45.716 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:11:45.717 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:11:45.717 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:11:45.717 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:11:45.717 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:11:45.720 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:11:45.720 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:11:45.720 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:11:45.720 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:11:45.720 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:11:45.720 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:11:45.721 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:11:45.721 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:11:45.724 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:11:45.724 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:11:45.724 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:11:45.724 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:11:45.724 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:11:45.724 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:11:45.724 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:11:45.724 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:11:45.727 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:11:45.727 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:11:45.727 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:11:45.727 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:11:45.728 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:11:45.728 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:11:45.728 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:11:45.728 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:11:45.732 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:11:45.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:11:45.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:11:45.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:11:45.732 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:11:45.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:11:45.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:11:45.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:11:45.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:11:45.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:11:45.733 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:11:45.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:11:45.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:11:45.733 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:11:45.733 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:11:45.733 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:11:45.733 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:11:45.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:11:45.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:11:45.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:11:45.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:11:45.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:11:45.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:11:45.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:11:45.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:11:45.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:11:45.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:11:45.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:11:45.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:11:45.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:11:45.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:11:45.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:11:45.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:11:45.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:11:45.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:11:45.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:11:45.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:11:45.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:11:45.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:11:45.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:11:45.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:11:45.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:11:45.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:11:45.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:11:45.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:11:45.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:11:45.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:11:45.738 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:11:46.223 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:11:46.254 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:11:46.256 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:11:46.257 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:11:46.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:46.273 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:46.273 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:46.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:11:46.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:46.276 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:46.276 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:46.276 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:11:46.276 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:11:46.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:46.321 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:46.322 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:46.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:46.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:46.700 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:11:46.736 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:11:46.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:11:46.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:11:46.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:11:47.179 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:11:47.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:47.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:47.202 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:47.202 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:47.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:47.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:47.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:11:47.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:47.217 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:47.217 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:47.217 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:11:47.217 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:11:47.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:47.223 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:47.223 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:47.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:47.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:47.656 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:11:47.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:11:47.738 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:11:47.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:11:47.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:11:48.134 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:11:48.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:48.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:48.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:48.177 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:48.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:48.195 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:48.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:11:48.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:48.196 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:48.196 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:48.196 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:11:48.196 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:11:48.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:48.234 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:11:48.235 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:11:48.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:48.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:48.610 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:11:48.739 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:11:48.739 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:11:48.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:11:48.740 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:11:49.089 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:11:49.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:49.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:49.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:49.391 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:49.392 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:11:49.410 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:49.410 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:49.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:11:49.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:49.412 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:49.412 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:49.412 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:11:49.412 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:11:49.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:49.415 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:11:49.415 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:11:49.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:49.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:49.568 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:11:49.740 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:11:49.740 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:11:49.740 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:11:49.740 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:11:50.047 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:11:50.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:50.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:50.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:50.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:50.369 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:11:50.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:50.389 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:50.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:11:50.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:50.390 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:50.390 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:50.391 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:11:50.391 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:11:50.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:50.427 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:50.427 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:50.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:50.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:50.525 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:11:50.741 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:11:50.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:11:50.742 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:11:50.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:11:51.003 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:11:51.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:51.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:51.046 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:51.046 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:51.046 [WARNING] transceiver.py:250 (MS@172.18.144.22:6700) RX TRXD message (fn=1133 tn=2 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:11:51.059 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:51.059 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:51.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:11:51.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:51.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:51.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:51.060 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:11:51.060 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:11:51.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:51.103 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:51.103 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:51.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:51.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:51.478 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:11:51.956 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:11:51.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:51.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:51.998 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:51.998 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:52.016 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:52.016 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:52.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:11:52.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:52.017 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:52.018 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:52.018 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:11:52.018 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:11:52.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:52.056 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:11:52.056 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:11:52.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:52.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:52.434 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:11:52.912 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:11:53.391 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:11:53.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:53.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:53.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:53.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:53.852 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:11:53.860 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:53.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:53.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:11:53.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:53.861 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:11:53.861 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:11:53.861 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:11:53.861 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:11:53.869 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:11:53.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:53.919 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:11:53.919 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:11:53.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:53.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:54.348 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:11:54.826 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:11:55.305 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:11:55.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:11:55.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:11:55.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:11:55.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:11:55.764 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:11:55.775 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:11:55.776 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:11:55.776 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:11:55.776 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:11:55.781 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:11:55.781 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:11:55.781 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:11:55.781 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:11:55.782 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:11:55.782 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:11:55.782 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:12:00.780 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:12:00.780 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:12:00.781 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:12:00.782 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:12:00.782 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:12:00.785 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:12:00.794 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:12:00.795 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:12:00.795 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:12:00.795 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:12:00.796 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:12:00.799 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:12:00.799 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:12:00.800 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:12:00.800 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:12:00.800 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:12:00.801 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:12:00.801 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:12:00.801 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:12:00.803 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:12:00.804 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:12:00.804 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:12:00.804 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:12:00.804 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:12:00.804 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:12:00.804 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:12:00.805 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:12:00.808 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:12:00.808 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:12:00.808 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:12:00.808 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:12:00.808 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:12:00.808 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:12:00.808 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:12:00.808 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:12:00.813 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:12:00.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:12:00.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:12:00.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:12:00.813 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:12:00.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:12:00.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:12:00.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:12:00.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:00.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:12:00.814 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:12:00.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:00.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:00.814 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:12:00.814 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:12:00.814 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:12:00.814 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:12:00.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:00.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:00.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:00.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:12:00.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:00.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:00.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:00.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:00.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:00.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:00.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:00.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:00.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:00.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:00.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:00.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:00.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:00.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:00.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:00.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:00.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:00.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:00.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:00.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:00.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:00.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:00.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:00.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:00.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:00.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:00.819 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:12:01.303 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:12:01.344 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:12:01.347 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:12:01.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:01.350 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:12:01.371 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:01.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:01.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:12:01.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:01.374 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:01.374 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:01.374 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:12:01.374 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:12:01.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:01.405 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:01.405 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:01.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:01.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:01.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:01.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:01.527 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:01.527 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:01.546 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:01.546 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:01.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:12:01.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:01.548 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:01.548 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:01.548 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:12:01.548 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:12:01.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:01.594 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:12:01.594 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:12:01.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:01.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:01.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:01.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:01.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:01.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:01.768 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:12:01.780 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:12:01.786 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:01.786 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:01.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:12:01.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:01.788 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:01.788 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:01.788 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:12:01.788 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:12:01.818 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:12:01.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:12:01.818 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:12:01.819 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:12:01.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:01.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:01.835 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:01.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:01.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:02.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:02.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:02.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:02.012 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:02.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:02.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:02.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:12:02.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:02.033 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:02.033 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:02.033 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:12:02.033 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:12:02.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:02.070 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:12:02.070 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:12:02.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:02.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:02.257 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:12:02.736 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:12:02.819 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:12:02.819 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:12:02.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:12:02.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:12:02.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:02.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:02.897 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:02.897 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:02.897 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:12:02.906 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:12:02.907 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:12:02.907 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:12:02.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:12:02.909 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:12:02.909 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:12:02.909 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:12:02.909 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:12:02.909 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:12:02.909 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:12:02.909 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:12:02.910 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=447 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:12:07.908 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:12:07.909 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:12:07.909 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:12:07.910 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:12:07.911 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:12:07.912 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:12:07.918 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:12:07.918 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:12:07.918 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:12:07.918 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:12:07.918 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:12:07.920 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:12:07.920 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:12:07.920 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:12:07.920 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:12:07.920 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:12:07.920 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:12:07.920 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:12:07.920 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:12:07.921 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:12:07.921 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:12:07.921 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:12:07.921 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:12:07.921 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:12:07.921 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:12:07.922 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:12:07.922 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:12:07.923 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:12:07.923 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:12:07.923 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:12:07.923 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:12:07.923 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:12:07.923 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:12:07.923 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:12:07.923 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:12:07.926 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:12:07.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:12:07.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:12:07.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:12:07.926 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:12:07.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:12:07.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:12:07.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:12:07.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:12:07.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:07.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:07.926 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:12:07.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:07.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:07.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:07.926 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:12:07.926 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:12:07.926 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:12:07.926 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:12:07.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:07.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:07.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:07.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:12:07.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:07.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:07.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:07.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:07.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:07.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:07.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:07.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:07.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:07.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:07.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:07.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:07.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:07.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:07.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:07.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:07.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:07.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:07.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:07.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:07.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:07.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:07.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:07.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:07.931 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:12:08.416 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:12:08.444 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:12:08.445 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:12:08.446 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:12:08.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:08.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:08.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:08.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:12:08.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:08.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:08.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:08.459 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:12:08.459 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:12:08.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:08.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:08.519 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:08.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:08.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:08.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:08.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:08.640 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:08.640 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:08.652 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:08.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:08.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:12:08.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:08.654 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:08.654 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:08.654 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:12:08.654 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:12:08.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:08.710 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:12:08.710 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:12:08.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:08.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:08.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:08.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:08.879 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:08.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:08.880 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:12:08.891 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:12:08.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:08.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:08.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:12:08.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:08.895 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:08.895 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:08.895 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:12:08.895 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:12:08.929 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:12:08.930 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:12:08.930 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:12:08.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:12:08.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:08.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:08.944 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:08.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:08.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:09.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:09.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:09.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:09.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:09.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:09.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:09.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:12:09.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:09.130 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:09.131 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:09.131 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:12:09.131 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:12:09.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:09.178 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:12:09.178 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:12:09.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:09.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:09.369 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:12:09.847 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:12:09.930 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:12:09.931 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:12:09.931 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:12:09.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:12:10.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:10.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:10.006 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:10.006 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:10.006 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:12:10.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:12:10.017 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:12:10.017 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:12:10.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:12:10.023 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:12:10.023 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:12:10.023 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:12:10.023 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:12:10.023 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:12:10.023 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:12:10.024 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:12:10.024 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=447 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:12:10.024 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=447 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:12:10.024 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=447 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:12:10.024 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=447 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:12:10.024 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=447 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:12:10.025 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=447 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:12:10.025 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=448 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:12:10.025 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=448 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:12:10.025 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=448 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:12:10.025 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=448 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:12:10.025 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=448 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:12:10.025 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=448 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:12:10.025 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=448 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:12:10.025 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=448 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:12:15.022 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:12:15.022 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:12:15.023 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:12:15.023 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:12:15.024 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:12:15.025 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:12:15.034 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:12:15.035 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:12:15.035 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:12:15.036 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:12:15.036 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:12:15.040 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:12:15.040 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:12:15.040 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:12:15.040 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:12:15.040 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:12:15.041 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:12:15.041 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:12:15.041 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:12:15.044 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:12:15.044 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:12:15.044 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:12:15.044 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:12:15.045 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:12:15.045 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:12:15.045 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:12:15.045 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:12:15.048 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:12:15.048 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:12:15.048 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:12:15.048 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:12:15.048 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:12:15.048 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:12:15.048 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:12:15.048 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:12:15.054 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:12:15.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:12:15.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:12:15.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:12:15.054 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:12:15.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:12:15.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:12:15.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:12:15.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:15.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:12:15.055 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:12:15.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:15.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:15.055 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:12:15.055 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:12:15.055 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:12:15.055 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:12:15.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:15.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:15.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:15.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:12:15.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:15.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:15.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:15.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:15.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:15.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:15.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:15.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:15.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:15.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:15.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:15.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:15.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:15.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:15.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:15.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:15.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:15.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:15.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:15.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:15.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:15.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:15.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:15.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:15.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:15.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:15.060 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:12:15.543 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:12:15.579 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:12:15.581 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:12:15.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:15.583 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:12:15.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:15.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:15.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:12:15.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:15.608 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:15.608 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:15.608 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:12:15.608 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:12:15.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:15.646 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:15.654 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:15.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:15.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:15.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:15.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:15.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:15.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:15.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:15.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:15.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:12:15.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:15.768 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:15.768 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:15.768 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:12:15.768 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:12:15.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:15.778 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:12:15.778 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:12:15.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:15.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:15.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:15.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:15.928 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:15.928 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:15.928 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:12:15.942 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:15.942 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:15.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:12:15.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:15.944 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:15.944 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:15.944 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:12:15.944 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:12:15.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:15.971 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:15.971 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:15.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:15.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:16.018 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:12:16.058 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:12:16.059 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:12:16.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:12:16.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:12:16.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:16.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:16.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:16.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:16.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:16.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:16.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:12:16.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:16.262 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:16.262 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:16.262 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:12:16.262 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:12:16.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:16.307 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:12:16.307 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:12:16.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:16.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:16.496 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:12:16.974 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:12:17.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:12:17.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:12:17.061 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:12:17.061 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:12:17.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:17.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:17.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:17.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:17.133 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:12:17.142 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:12:17.142 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:12:17.142 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:12:17.142 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:12:17.148 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:12:17.148 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:12:17.148 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:12:17.148 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:12:17.149 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:12:17.149 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:12:17.149 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:12:22.149 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:12:22.149 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:12:22.153 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:12:22.156 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:12:22.160 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:12:22.162 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:12:22.178 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:12:22.179 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:12:22.179 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:12:22.180 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:12:22.180 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:12:22.184 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:12:22.185 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:12:22.185 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:12:22.185 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:12:22.186 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:12:22.186 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:12:22.187 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:12:22.187 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:12:22.190 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:12:22.190 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:12:22.190 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:12:22.190 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:12:22.191 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:12:22.191 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:12:22.191 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:12:22.191 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:12:22.194 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:12:22.194 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:12:22.195 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:12:22.195 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:12:22.195 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:12:22.195 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:12:22.195 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:12:22.195 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:12:22.201 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:12:22.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:12:22.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:12:22.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:12:22.201 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:12:22.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:12:22.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:12:22.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:12:22.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:22.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:12:22.202 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:12:22.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:22.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:22.202 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:12:22.202 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:12:22.202 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:12:22.202 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:12:22.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:22.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:22.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:22.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:12:22.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:22.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:22.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:22.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:22.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:22.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:22.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:22.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:22.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:22.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:22.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:22.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:22.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:22.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:22.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:22.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:22.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:22.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:22.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:22.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:22.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:22.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:22.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:22.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:22.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:22.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:22.207 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:12:22.690 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:12:22.725 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:12:22.726 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:12:22.727 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:12:22.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:22.740 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:22.740 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:22.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:12:22.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:22.745 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:22.745 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:22.745 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:12:22.745 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:12:22.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:22.788 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:22.789 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:22.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:22.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:22.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:22.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:22.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:22.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:22.913 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:22.913 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:22.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:12:22.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:22.914 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:22.914 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:22.914 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:12:22.914 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:12:22.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:22.925 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:12:22.925 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:12:22.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:22.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:23.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:23.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:23.075 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:23.076 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:23.076 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:12:23.090 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:23.090 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:23.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:12:23.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:23.092 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:23.092 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:23.092 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:12:23.092 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:12:23.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:23.115 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:23.116 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:23.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:23.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:23.165 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:12:23.206 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:12:23.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:12:23.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:12:23.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:12:23.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:23.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:23.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:23.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:23.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:23.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:23.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:12:23.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:23.413 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:23.413 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:23.413 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:12:23.413 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:12:23.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:23.441 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:12:23.441 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:12:23.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:23.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:23.642 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:12:24.121 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:12:24.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:12:24.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:12:24.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:12:24.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:12:24.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:24.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:24.280 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:24.280 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:24.280 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:12:24.289 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:12:24.289 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:12:24.289 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:12:24.289 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:12:24.290 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:12:24.290 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:12:24.290 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:12:24.290 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:12:24.290 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:12:24.290 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:12:24.290 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:12:24.290 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=446 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:12:24.290 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=446 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:12:24.290 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=446 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:12:24.290 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=446 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:12:24.290 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=446 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:12:24.290 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=446 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:12:29.295 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:12:29.295 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:12:29.297 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:12:29.298 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:12:29.299 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:12:29.299 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:12:29.308 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:12:29.309 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:12:29.309 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:12:29.309 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:12:29.309 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:12:29.311 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:12:29.311 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:12:29.312 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:12:29.312 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:12:29.312 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:12:29.312 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:12:29.312 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:12:29.312 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:12:29.314 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:12:29.314 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:12:29.314 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:12:29.314 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:12:29.314 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:12:29.314 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:12:29.314 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:12:29.314 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:12:29.316 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:12:29.316 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:12:29.316 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:12:29.316 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:12:29.316 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:12:29.316 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:12:29.316 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:12:29.316 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:12:29.318 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:12:29.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:12:29.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:12:29.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:12:29.319 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:12:29.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:12:29.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:12:29.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:12:29.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:12:29.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:29.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:29.319 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:12:29.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:29.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:29.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:29.319 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:12:29.319 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:12:29.319 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:12:29.319 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:12:29.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:29.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:29.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:29.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:12:29.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:29.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:29.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:29.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:29.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:29.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:29.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:29.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:29.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:29.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:29.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:29.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:29.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:29.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:29.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:29.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:29.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:29.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:29.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:29.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:29.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:29.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:29.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:29.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:29.324 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:12:29.806 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:12:29.835 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:12:29.837 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:12:29.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:29.838 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:12:29.853 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:29.853 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:29.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:12:29.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:29.856 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:29.857 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:29.857 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:12:29.857 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:12:29.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:29.908 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:29.908 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:29.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:29.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:30.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:30.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:30.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:30.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:30.263 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:30.263 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:30.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:12:30.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:30.266 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:30.266 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:30.266 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:12:30.266 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:12:30.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:30.277 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:12:30.277 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:12:30.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:30.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:30.283 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:12:30.322 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:12:30.322 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:12:30.322 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:12:30.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:12:30.761 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:12:30.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:30.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:30.779 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:30.780 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:30.780 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:12:30.797 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:30.797 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:30.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:12:30.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:30.800 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:30.800 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:30.800 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:12:30.800 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:12:30.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:30.806 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:30.806 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:30.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:30.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:31.239 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:12:31.323 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:12:31.323 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:12:31.323 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:12:31.323 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:12:31.717 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:12:31.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:31.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:31.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:31.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:31.897 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:31.897 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:31.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:12:31.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:31.899 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:31.899 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:31.900 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:12:31.900 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:12:31.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:31.963 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:12:31.963 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:12:31.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:31.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:32.194 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:12:32.323 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:12:32.324 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:12:32.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:12:32.324 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:12:32.672 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:12:33.151 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:12:33.324 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:12:33.325 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:12:33.325 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:12:33.325 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:12:33.629 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:12:33.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:33.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:33.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:33.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:33.953 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:12:33.959 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:12:33.959 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:12:33.959 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:12:33.959 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:12:33.960 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:12:33.960 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:12:33.960 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:12:33.960 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:12:33.960 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:12:33.960 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:12:33.960 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:12:38.967 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:12:38.967 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:12:38.967 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:12:38.968 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:12:38.968 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:12:38.969 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:12:38.980 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:12:38.982 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:12:38.982 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:12:38.983 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:12:38.983 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:12:38.992 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:12:38.992 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:12:38.993 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:12:38.993 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:12:38.994 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:12:38.994 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:12:38.995 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:12:38.995 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:12:38.999 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:12:38.999 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:12:38.999 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:12:39.000 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:12:39.000 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:12:39.000 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:12:39.001 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:12:39.001 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:12:39.004 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:12:39.004 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:12:39.004 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:12:39.005 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:12:39.005 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:12:39.005 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:12:39.005 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:12:39.005 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:12:39.011 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:12:39.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:12:39.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:12:39.011 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:12:39.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:12:39.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:12:39.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:12:39.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:12:39.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:12:39.012 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:12:39.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:39.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:39.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:39.012 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:12:39.012 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:12:39.012 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:12:39.012 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:12:39.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:39.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:39.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:39.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:12:39.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:39.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:39.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:39.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:39.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:39.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:39.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:39.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:39.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:39.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:39.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:39.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:39.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:39.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:39.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:39.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:39.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:39.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:39.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:39.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:39.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:39.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:39.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:39.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:39.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:39.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:39.017 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:12:39.499 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:12:39.533 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:12:39.534 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:12:39.535 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:12:39.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:39.549 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:39.549 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:39.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:12:39.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:39.557 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:39.558 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:39.558 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:12:39.558 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:12:39.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:39.601 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:39.601 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:39.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:39.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:39.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:39.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:39.918 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:39.918 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:39.933 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:39.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:39.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:12:39.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:39.936 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:39.936 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:39.936 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:12:39.936 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:12:39.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:39.977 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:12:39.978 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:12:39.978 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:12:39.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:39.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:40.015 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:12:40.016 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:12:40.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:12:40.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:12:40.455 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:12:40.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:40.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:40.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:40.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:40.473 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:12:40.492 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:40.492 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:40.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:12:40.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:40.494 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:40.494 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:40.494 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:12:40.494 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:12:40.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:40.499 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:40.499 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:40.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:40.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:40.933 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:12:41.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:12:41.017 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:12:41.017 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:12:41.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:12:41.410 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:12:41.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:41.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:41.571 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:41.571 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:41.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:41.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:41.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:12:41.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:41.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:41.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:41.589 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:12:41.589 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:12:41.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:41.593 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:12:41.593 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:12:41.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:41.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:41.887 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:12:42.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:12:42.018 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:12:42.018 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:12:42.018 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:12:42.366 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:12:42.844 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:12:43.019 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:12:43.019 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:12:43.020 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:12:43.020 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:12:43.323 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:12:43.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:43.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:43.645 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:43.645 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:43.645 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:12:43.652 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:12:43.652 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:12:43.652 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:12:43.652 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:12:43.653 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:12:43.653 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:12:43.653 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:12:43.653 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:12:43.653 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:12:43.653 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:12:43.653 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:12:43.653 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=991 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:12:43.653 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=991 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:12:43.653 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=991 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:12:48.658 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:12:48.658 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:12:48.662 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:12:48.665 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:12:48.667 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:12:48.670 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:12:48.689 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:12:48.691 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:12:48.691 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:12:48.691 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:12:48.691 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:12:48.695 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:12:48.695 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:12:48.696 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:12:48.696 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:12:48.696 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:12:48.696 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:12:48.696 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:12:48.696 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:12:48.699 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:12:48.699 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:12:48.700 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:12:48.700 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:12:48.700 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:12:48.700 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:12:48.700 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:12:48.700 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:12:48.703 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:12:48.703 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:12:48.703 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:12:48.703 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:12:48.703 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:12:48.703 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:12:48.703 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:12:48.703 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:12:48.707 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:12:48.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:12:48.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:12:48.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:12:48.707 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:12:48.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:12:48.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:12:48.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:12:48.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:48.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:12:48.708 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:12:48.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:48.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:48.708 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:12:48.708 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:12:48.708 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:12:48.708 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:12:48.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:48.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:48.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:48.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:12:48.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:48.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:48.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:48.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:48.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:48.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:48.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:48.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:48.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:48.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:48.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:48.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:48.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:48.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:48.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:48.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:48.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:48.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:48.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:48.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:48.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:48.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:48.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:48.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:48.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:48.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:48.713 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:12:49.195 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:12:49.227 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:12:49.229 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:12:49.230 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:12:49.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:49.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:49.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:49.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:12:49.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:49.253 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:49.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:49.253 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:12:49.254 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:12:49.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:49.297 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:49.297 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:49.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:49.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:49.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:49.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:49.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:49.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:49.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:49.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:49.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:12:49.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:49.658 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:49.658 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:49.658 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:12:49.658 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:12:49.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:49.664 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:12:49.664 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:12:49.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:49.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:49.671 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:12:49.711 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:12:49.711 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:12:49.711 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:12:49.711 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:12:50.147 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:12:50.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:50.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:50.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:50.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:50.155 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:12:50.173 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:50.174 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:50.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:12:50.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:50.176 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:50.176 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:50.176 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:12:50.176 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:12:50.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:50.196 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:50.196 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:50.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:50.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:50.624 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:12:50.712 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:12:50.713 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:12:50.713 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:12:50.713 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:12:51.102 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:12:51.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:51.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:51.262 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:51.262 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:51.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:51.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:51.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:12:51.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:51.279 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:51.279 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:51.279 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:12:51.279 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:12:51.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:51.284 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:12:51.284 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:12:51.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:51.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:51.580 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:12:51.713 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:12:51.713 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:12:51.713 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:12:51.714 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:12:52.058 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:12:52.537 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:12:52.714 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:12:52.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:12:52.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:12:52.723 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:12:53.023 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:12:53.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:53.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:53.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:53.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:53.345 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:12:53.355 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:12:53.355 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:12:53.355 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:12:53.356 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:12:53.357 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:12:53.357 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:12:53.357 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:12:53.357 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:12:53.357 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:12:53.357 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:12:53.357 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:12:58.361 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:12:58.361 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:12:58.361 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:12:58.362 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:12:58.363 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:12:58.363 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:12:58.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:12:58.372 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:12:58.372 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:12:58.373 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:12:58.373 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:12:58.374 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:12:58.374 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:12:58.374 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:12:58.374 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:12:58.375 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:12:58.375 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:12:58.375 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:12:58.375 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:12:58.377 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:12:58.377 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:12:58.377 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:12:58.377 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:12:58.377 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:12:58.377 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:12:58.378 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:12:58.378 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:12:58.380 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:12:58.380 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:12:58.380 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:12:58.380 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:12:58.380 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:12:58.380 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:12:58.380 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:12:58.380 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:12:58.385 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:12:58.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:12:58.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:12:58.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:12:58.385 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:12:58.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:12:58.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:12:58.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:12:58.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:58.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:12:58.385 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:12:58.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:58.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:58.385 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:12:58.385 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:12:58.385 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:12:58.386 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:12:58.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:58.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:58.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:58.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:12:58.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:58.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:58.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:58.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:58.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:58.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:58.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:58.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:58.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:58.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:58.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:58.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:58.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:58.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:58.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:58.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:58.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:12:58.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:58.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:58.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:58.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:58.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:58.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:12:58.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:12:58.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:58.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:12:58.390 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:12:58.872 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:12:58.904 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:12:58.906 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:12:58.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:58.908 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:12:58.927 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:58.927 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:58.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:12:58.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:58.931 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:58.931 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:58.931 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:12:58.931 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:12:58.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:58.974 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:58.974 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:58.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:58.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:59.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:59.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:59.291 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:59.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:59.307 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:59.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:59.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:12:59.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:59.309 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:59.310 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:59.310 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:12:59.310 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:12:59.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:59.348 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:12:59.351 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:12:59.351 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:12:59.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:59.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:59.389 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:12:59.389 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:12:59.389 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:12:59.389 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:12:59.826 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:12:59.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:59.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:59.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:59.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:59.844 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:12:59.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:12:59.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:12:59.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:12:59.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:59.865 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:59.865 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:59.865 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:12:59.865 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:12:59.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:12:59.870 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:12:59.870 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:12:59.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:12:59.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:00.303 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:13:00.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:13:00.391 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:13:00.391 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:13:00.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:13:00.781 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:13:00.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:00.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:00.942 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:00.942 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:00.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:00.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:00.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:13:00.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:00.952 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:13:00.952 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:13:00.952 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:13:00.952 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:13:00.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:00.966 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:13:00.966 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:13:00.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:00.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:01.259 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:13:01.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:13:01.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:13:01.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:13:01.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:13:01.737 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:13:02.216 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:13:02.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:13:02.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:13:02.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:13:02.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:13:02.695 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:13:03.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:03.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:03.018 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:03.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:03.018 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:13:03.028 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:13:03.029 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:13:03.029 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:13:03.029 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:13:03.030 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:13:03.030 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:13:03.030 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:13:03.030 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:13:03.030 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:13:03.030 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:13:03.030 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:13:08.035 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:13:08.035 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:13:08.036 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:13:08.036 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:13:08.037 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:13:08.038 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:13:08.049 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:13:08.050 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:13:08.050 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:13:08.050 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:13:08.050 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:13:08.052 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:13:08.052 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:13:08.052 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:13:08.052 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:13:08.052 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:13:08.052 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:13:08.052 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:13:08.052 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:13:08.054 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:13:08.054 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:13:08.054 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:13:08.054 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:13:08.054 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:13:08.054 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:13:08.054 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:13:08.054 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:13:08.056 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:13:08.056 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:13:08.056 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:13:08.056 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:13:08.056 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:13:08.056 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:13:08.056 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:13:08.056 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:13:08.059 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:13:08.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:13:08.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:13:08.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:13:08.059 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:13:08.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:13:08.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:13:08.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:13:08.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:13:08.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:08.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:08.059 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:13:08.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:08.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:08.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:08.060 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:13:08.060 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:13:08.060 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:13:08.060 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:13:08.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:08.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:08.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:08.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:13:08.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:08.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:08.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:08.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:08.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:08.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:08.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:08.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:08.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:08.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:08.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:08.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:08.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:08.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:08.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:08.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:08.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:08.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:08.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:08.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:08.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:08.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:08.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:08.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:08.064 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:13:08.546 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:13:08.576 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:13:08.577 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:13:08.578 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:13:08.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:08.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:08.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:08.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:13:08.626 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:13:08.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:13:08.627 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:13:08.627 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:13:08.629 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:13:08.629 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:13:08.629 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:13:08.629 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:13:08.629 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:13:08.629 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:13:08.629 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:13:08.629 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:13:08.629 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:13:08.629 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:13:08.629 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:13:08.629 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:13:08.629 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:13:08.629 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:13:13.637 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:13:13.637 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:13:13.640 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:13:13.644 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:13:13.645 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:13:13.647 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:13:13.656 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:13:13.657 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:13:13.657 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:13:13.658 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:13:13.658 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:13:13.662 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:13:13.662 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:13:13.663 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:13:13.663 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:13:13.663 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:13:13.664 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:13:13.664 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:13:13.664 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:13:13.667 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:13:13.667 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:13:13.668 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:13:13.668 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:13:13.668 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:13:13.668 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:13:13.668 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:13:13.668 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:13:13.672 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:13:13.672 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:13:13.672 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:13:13.672 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:13:13.672 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:13:13.672 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:13:13.672 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:13:13.672 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:13:13.678 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:13:13.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:13:13.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:13:13.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:13:13.678 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:13:13.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:13:13.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:13:13.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:13:13.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:13.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:13:13.679 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:13:13.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:13.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:13.679 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:13:13.679 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:13:13.679 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:13:13.679 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:13:13.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:13.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:13.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:13.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:13:13.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:13.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:13.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:13.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:13.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:13.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:13.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:13.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:13.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:13.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:13.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:13.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:13.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:13.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:13.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:13.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:13.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:13.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:13.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:13.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:13.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:13.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:13.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:13.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:13.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:13.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:13.684 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:13:14.166 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:13:14.206 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:13:14.209 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:13:14.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:14.211 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:13:14.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:14.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:14.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:13:14.301 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:14.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:14.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:13:14.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:14.306 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:13:14.306 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:13:14.306 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:13:14.306 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:13:14.307 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:13:14.307 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:13:14.308 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:13:14.308 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:13:14.308 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:13:14.308 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:13:14.308 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:13:19.312 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:13:19.312 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:13:19.316 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:13:19.320 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:13:19.323 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:13:19.325 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:13:19.333 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:13:19.335 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:13:19.335 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:13:19.335 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:13:19.335 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:13:19.338 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:13:19.338 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:13:19.339 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:13:19.339 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:13:19.339 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:13:19.339 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:13:19.340 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:13:19.340 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:13:19.341 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:13:19.342 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:13:19.342 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:13:19.342 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:13:19.342 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:13:19.342 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:13:19.342 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:13:19.342 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:13:19.344 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:13:19.344 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:13:19.345 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:13:19.345 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:13:19.345 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:13:19.345 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:13:19.345 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:13:19.345 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:13:19.348 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:13:19.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:13:19.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:13:19.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:13:19.349 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:13:19.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:13:19.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:13:19.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:13:19.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:19.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:13:19.349 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:13:19.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:19.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:19.349 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:13:19.349 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:13:19.349 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:13:19.349 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:13:19.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:19.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:19.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:19.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:13:19.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:19.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:19.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:19.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:19.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:19.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:19.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:19.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:19.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:19.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:19.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:19.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:19.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:19.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:19.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:19.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:19.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:19.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:19.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:19.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:19.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:19.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:19.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:19.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:19.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:19.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:19.354 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:13:19.837 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:13:19.868 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:13:19.871 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:13:19.872 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:13:19.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:19.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:19.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:19.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:13:19.915 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:13:19.915 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:13:19.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:13:19.915 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:13:19.916 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:13:19.916 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:13:19.916 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:13:19.916 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:13:19.917 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:13:19.917 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:13:19.917 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:13:19.917 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:13:19.917 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:13:19.917 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:13:19.917 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:13:19.917 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:13:19.917 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:13:19.917 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:13:24.921 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:13:24.921 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:13:24.923 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:13:24.924 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:13:24.924 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:13:24.925 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:13:24.935 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:13:24.936 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:13:24.936 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:13:24.936 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:13:24.936 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:13:24.939 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:13:24.939 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:13:24.939 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:13:24.939 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:13:24.939 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:13:24.940 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:13:24.940 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:13:24.940 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:13:24.942 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:13:24.942 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:13:24.942 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:13:24.942 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:13:24.943 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:13:24.943 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:13:24.943 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:13:24.943 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:13:24.945 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:13:24.945 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:13:24.945 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:13:24.945 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:13:24.945 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:13:24.945 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:13:24.945 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:13:24.945 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:13:24.949 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:13:24.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:13:24.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:13:24.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:13:24.949 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:13:24.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:13:24.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:13:24.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:13:24.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:24.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:13:24.949 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:13:24.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:24.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:24.949 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:13:24.949 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:13:24.949 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:13:24.949 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:13:24.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:24.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:24.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:24.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:13:24.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:24.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:24.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:24.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:24.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:24.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:24.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:24.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:24.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:24.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:24.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:24.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:24.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:24.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:24.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:24.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:24.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:24.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:24.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:24.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:24.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:24.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:24.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:24.951 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:13:24.951 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:13:24.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:24.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:24.951 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:13:24.951 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:13:24.951 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:13:24.951 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:13:24.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:29.958 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:13:29.958 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:13:29.960 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:13:29.961 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:13:29.961 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:13:29.962 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:13:29.971 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:13:29.972 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:13:29.972 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:13:29.972 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:13:29.972 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:13:29.977 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:13:29.977 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:13:29.977 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:13:29.977 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:13:29.977 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:13:29.977 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:13:29.977 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:13:29.977 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:13:29.981 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:13:29.981 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:13:29.982 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:13:29.982 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:13:29.982 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:13:29.982 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:13:29.982 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:13:29.982 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:13:29.985 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:13:29.985 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:13:29.986 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:13:29.986 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:13:29.986 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:13:29.986 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:13:29.986 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:13:29.986 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:13:29.991 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:13:29.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:13:29.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:13:29.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:13:29.991 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:13:29.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:13:29.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:13:29.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:13:29.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:29.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:13:29.991 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:13:29.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:29.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:29.992 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:13:29.992 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:13:29.992 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:13:29.992 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:13:29.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:29.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:29.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:29.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:13:29.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:29.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:29.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:29.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:29.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:29.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:29.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:29.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:29.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:29.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:29.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:29.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:29.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:29.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:29.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:29.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:29.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:29.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:29.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:29.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:29.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:29.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:29.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:29.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:29.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:29.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:29.996 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:13:30.480 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:13:30.511 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:13:30.513 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:13:30.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:30.515 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:13:30.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:30.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:30.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:13:30.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:30.534 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:13:30.534 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:13:30.535 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:13:30.535 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:13:30.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:30.584 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:13:30.584 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:13:30.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:30.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:30.957 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:13:30.995 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:13:30.996 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:13:30.996 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:13:30.996 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:13:31.436 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:13:31.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:31.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:31.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:31.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:31.557 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:31.557 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:31.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:13:31.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:31.558 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:13:31.558 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:13:31.558 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:13:31.558 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:13:31.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:31.574 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:13:31.574 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:13:31.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:31.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:31.913 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:13:31.996 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:13:31.997 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:13:31.997 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:13:31.997 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:13:32.391 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:13:32.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:32.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:32.522 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:32.522 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:32.539 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:32.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:32.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:13:32.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:32.540 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:13:32.540 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:13:32.540 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:13:32.540 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:13:32.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:32.583 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:13:32.583 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:13:32.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:32.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:32.868 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:13:32.998 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:13:32.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:13:32.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:13:32.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:13:33.346 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:13:33.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:33.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:33.507 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:33.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:33.516 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:33.516 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:33.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:13:33.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:33.517 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:13:33.517 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:13:33.517 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:13:33.517 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:13:33.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:33.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:13:33.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:13:33.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:33.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:33.823 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:13:33.999 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:13:34.000 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:13:34.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:13:34.000 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:13:34.301 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:13:34.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:34.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:34.479 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:34.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:34.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:34.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:34.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:13:34.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:34.498 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:13:34.498 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:13:34.498 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:13:34.498 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:13:34.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:34.546 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:13:34.546 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:13:34.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:34.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:34.779 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:13:35.001 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:13:35.001 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:13:35.001 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:13:35.001 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:13:35.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:35.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:35.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:35.102 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:35.118 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:35.118 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:35.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:13:35.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:35.119 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:13:35.119 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:13:35.119 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:13:35.119 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:13:35.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:35.156 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:13:35.156 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-12-15 05:13:35.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:35.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:35.257 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:13:35.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:35.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:35.707 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:35.707 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:35.708 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:13:35.726 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:35.726 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:35.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:13:35.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:35.729 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:13:35.729 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:13:35.729 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:13:35.729 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:13:35.736 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:13:35.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:35.791 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:13:35.791 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2025-12-15 05:13:35.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:35.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:36.214 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:13:36.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:36.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:36.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:36.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:36.349 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:13:36.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:36.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:36.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:13:36.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:36.371 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:13:36.371 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:13:36.371 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:13:36.371 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:13:36.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:36.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:36.407 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:13:36.407 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:13:36.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:36.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:36.692 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:13:37.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:37.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:37.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:37.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:37.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:37.027 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:37.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:13:37.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:37.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:13:37.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:13:37.028 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:13:37.028 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:13:37.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:37.075 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:13:37.076 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:13:37.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:37.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:37.170 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:13:37.649 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:13:37.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:37.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:37.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:37.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:37.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:37.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:37.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:13:37.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:37.685 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:13:37.685 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:13:37.685 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:13:37.685 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:13:37.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:37.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:37.695 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:13:37.695 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:13:37.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:37.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:38.126 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:13:38.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:38.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:38.253 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:38.253 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:38.272 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:38.272 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:38.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:13:38.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:38.274 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:13:38.274 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:13:38.274 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:13:38.274 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:13:38.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:38.318 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:13:38.318 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:13:38.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:38.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:38.601 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:13:38.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:38.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:38.910 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:38.910 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:38.910 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:13:38.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:38.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:38.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:13:38.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:38.931 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:13:38.931 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:13:38.931 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:13:38.931 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:13:38.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:38.978 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:13:38.978 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:13:38.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:38.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:39.079 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:13:39.557 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:13:39.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:39.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:39.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:39.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:39.613 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:13:39.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:39.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:39.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:13:39.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:39.636 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:13:39.636 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:13:39.636 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:13:39.636 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:13:39.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:39.655 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:13:39.655 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:13:39.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:39.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:40.034 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:13:40.513 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:13:40.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:40.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:40.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:40.517 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:40.517 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:13:40.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:40.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:40.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:13:40.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:40.526 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:13:40.526 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:13:40.527 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:13:40.527 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:13:40.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:40.568 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:13:40.568 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:13:40.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:40.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:40.991 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 05:13:41.470 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 05:13:41.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:41.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:41.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:41.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:41.502 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:13:41.521 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:41.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:41.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:13:41.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:41.524 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:13:41.524 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:13:41.524 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:13:41.524 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:13:41.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:41.571 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:13:41.571 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:13:41.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:41.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:41.948 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 05:13:42.427 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 05:13:42.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:42.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:42.477 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:42.477 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:42.478 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:13:42.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:42.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:42.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:13:42.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:42.487 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:13:42.487 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:13:42.487 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:13:42.487 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:13:42.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:42.524 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:13:42.524 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:13:42.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:42.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:42.905 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 05:13:43.384 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 05:13:43.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:43.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:43.454 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:43.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:43.455 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:13:43.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:43.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:43.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:13:43.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:43.475 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:13:43.475 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:13:43.475 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:13:43.475 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:13:43.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:43.530 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:13:43.531 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:13:43.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:43.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:43.862 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 05:13:44.340 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 05:13:44.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:44.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:44.426 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:44.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:44.426 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:13:44.435 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:44.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:44.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:13:44.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:44.436 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:13:44.436 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:13:44.436 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:13:44.436 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:13:44.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:44.487 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:13:44.487 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:13:44.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:44.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:44.818 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 05:13:45.297 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 05:13:45.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:45.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:45.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:45.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:45.404 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:13:45.420 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:45.420 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:45.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:13:45.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:45.421 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:13:45.421 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:13:45.421 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:13:45.421 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:13:45.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:45.434 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:13:45.434 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:13:45.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:45.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:45.774 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 05:13:46.253 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 05:13:46.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:46.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:46.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:46.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:46.377 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:13:46.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:46.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:46.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:13:46.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:46.387 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:13:46.387 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:13:46.387 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:13:46.387 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:13:46.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:46.447 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:13:46.447 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:13:46.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:46.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:46.731 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 05:13:47.209 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 05:13:47.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:47.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:47.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:47.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:47.350 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:13:47.360 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:13:47.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:13:47.360 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:13:47.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:13:47.369 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:13:47.369 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:13:47.369 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:13:47.369 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:13:47.371 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:13:47.371 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:13:47.371 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:13:52.365 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:13:52.365 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:13:52.367 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:13:52.370 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:13:52.371 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:13:52.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:13:52.377 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:13:52.378 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:13:52.378 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:13:52.379 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:13:52.379 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:13:52.382 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:13:52.382 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:13:52.383 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:13:52.383 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:13:52.383 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:13:52.383 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:13:52.383 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:13:52.383 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:13:52.387 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:13:52.387 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:13:52.387 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:13:52.387 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:13:52.387 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:13:52.387 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:13:52.387 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:13:52.387 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:13:52.390 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:13:52.391 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:13:52.391 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:13:52.391 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:13:52.391 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:13:52.391 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:13:52.391 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:13:52.391 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:13:52.396 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:13:52.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:13:52.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:13:52.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:13:52.396 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:13:52.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:13:52.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:13:52.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:13:52.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:13:52.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:52.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:52.396 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:13:52.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:52.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:52.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:52.397 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:13:52.397 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:13:52.397 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:13:52.397 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:13:52.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:52.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:52.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:52.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:13:52.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:52.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:52.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:52.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:52.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:52.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:52.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:52.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:52.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:52.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:52.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:52.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:52.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:52.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:52.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:52.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:52.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:52.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:52.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:52.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:52.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:52.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:52.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:52.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:52.402 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:13:52.884 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:13:52.919 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:13:52.920 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:13:52.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:52.923 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:13:52.948 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:52.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:52.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:13:52.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:52.955 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:13:52.955 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:13:52.955 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:13:52.955 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:13:52.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:52.987 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:13:52.988 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:13:52.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:52.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:53.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:53.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:53.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:53.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:53.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:53.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:53.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:13:53.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:53.254 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:13:53.254 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:13:53.254 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:13:53.254 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:13:53.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:53.257 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:13:53.257 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:13:53.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:53.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:53.362 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:13:53.400 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:13:53.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:13:53.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:13:53.401 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:13:53.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:53.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:53.493 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:53.493 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:53.503 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:53.503 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:53.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:13:53.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:53.505 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:13:53.505 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:13:53.505 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:13:53.505 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:13:53.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:53.554 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:13:53.554 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:13:53.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:53.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:53.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:53.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:53.756 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:53.756 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:53.765 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:53.765 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:53.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:13:53.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:53.766 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:13:53.766 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:13:53.766 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:13:53.766 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:13:53.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:53.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:13:53.783 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:13:53.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:53.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:53.838 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:13:54.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:13:54.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:13:54.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:13:54.017 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:13:54.025 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:13:54.025 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:13:54.025 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:13:54.026 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:13:54.027 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:13:54.027 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:13:54.027 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:13:54.027 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:13:54.027 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:13:54.027 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:13:54.028 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:13:54.028 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=348 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:13:54.028 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=348 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:13:54.028 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=348 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:13:54.028 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=348 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:13:59.030 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:13:59.031 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:13:59.032 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:13:59.032 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:13:59.033 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:13:59.034 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:13:59.043 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:13:59.045 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:13:59.045 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:13:59.045 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:13:59.045 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:13:59.049 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:13:59.049 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:13:59.049 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:13:59.049 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:13:59.050 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:13:59.050 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:13:59.050 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:13:59.050 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:13:59.052 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:13:59.053 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:13:59.053 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:13:59.053 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:13:59.053 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:13:59.053 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:13:59.053 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:13:59.053 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:13:59.056 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:13:59.056 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:13:59.056 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:13:59.056 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:13:59.056 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:13:59.056 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:13:59.056 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:13:59.056 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:13:59.060 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:13:59.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:13:59.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:13:59.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:13:59.060 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:13:59.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:13:59.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:13:59.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:13:59.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:13:59.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:59.061 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:13:59.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:59.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:59.061 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:13:59.061 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:13:59.061 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:13:59.061 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:13:59.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:59.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:59.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:59.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:13:59.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:59.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:59.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:59.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:59.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:59.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:59.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:59.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:59.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:59.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:59.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:59.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:59.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:59.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:59.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:59.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:59.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:59.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:59.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:59.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:59.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:59.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:13:59.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:59.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:13:59.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:13:59.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:13:59.066 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:13:59.549 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:14:00.027 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:14:00.505 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:14:00.983 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:14:01.463 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:14:01.941 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:14:02.420 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:14:02.899 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:14:03.378 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:14:03.856 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:14:04.335 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:14:04.814 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:14:05.293 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:14:05.771 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:14:06.250 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:14:06.729 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:14:07.208 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:14:07.686 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:14:08.164 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:14:08.643 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:14:09.122 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:14:09.601 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:14:10.079 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 05:14:10.558 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 05:14:11.036 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 05:14:11.515 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 05:14:11.994 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 05:14:12.472 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 05:14:12.951 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 05:14:13.430 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 05:14:13.908 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 05:14:14.387 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 05:14:14.866 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 05:14:15.345 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 05:14:15.823 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 05:14:16.302 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 05:14:16.780 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 05:14:17.259 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 05:14:17.738 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 05:14:18.217 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 05:14:18.696 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 05:14:19.175 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 05:14:19.654 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 05:14:20.133 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 05:14:20.612 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 05:14:21.090 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 05:14:21.569 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 05:14:22.048 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 05:14:22.526 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 05:14:23.005 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 05:14:23.091 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:14:23.091 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:14:23.091 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:14:23.091 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:14:23.091 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:14:23.091 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:14:23.091 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:14:23.091 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=5120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:14:23.091 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=5120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:14:23.091 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=5120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:14:23.091 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=5120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:14:23.091 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=5120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:14:23.091 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=5120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:14:23.091 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=5120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:14:28.095 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:14:28.096 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:14:28.098 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:14:28.099 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:14:28.099 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:14:28.100 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:14:28.108 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:14:28.110 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:14:28.110 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:14:28.111 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:14:28.111 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:14:28.125 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:14:28.125 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:14:28.126 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:14:28.126 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:14:28.126 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:14:28.126 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:14:28.127 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:14:28.127 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:14:28.137 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:14:28.137 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:14:28.137 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:14:28.137 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:14:28.137 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:14:28.137 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:14:28.138 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:14:28.138 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:14:28.143 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:14:28.143 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:14:28.143 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:14:28.143 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:14:28.143 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:14:28.143 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:14:28.143 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:14:28.143 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:14:28.149 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:14:28.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:14:28.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:14:28.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:14:28.149 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:14:28.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:14:28.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:14:28.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:14:28.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:14:28.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:14:28.150 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:14:28.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:14:28.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:14:28.150 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:14:28.150 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:14:28.150 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:14:28.150 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:14:28.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:14:28.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:14:28.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:14:28.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:14:28.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:14:28.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:14:28.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:14:28.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:14:28.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:14:28.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:14:28.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:14:28.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:14:28.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:14:28.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:14:28.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:14:28.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:14:28.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:14:28.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:14:28.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:14:28.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:14:28.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:14:28.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:14:28.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:14:28.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:14:28.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:14:28.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:14:28.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:14:28.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:14:28.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:14:28.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:14:28.154 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:14:28.638 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:14:29.116 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:14:29.594 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:14:30.070 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:14:30.548 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:14:31.027 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:14:31.506 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:14:31.985 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:14:32.464 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:14:32.942 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:14:33.421 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:14:33.900 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:14:34.378 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:14:34.857 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:14:35.336 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:14:35.813 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:14:36.292 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:14:36.770 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:14:37.250 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:14:37.729 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:14:38.207 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:14:38.685 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:14:39.164 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 05:14:39.643 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 05:14:40.122 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 05:14:40.600 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 05:14:41.078 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 05:14:41.557 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 05:14:42.035 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 05:14:42.515 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 05:14:42.994 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 05:14:43.472 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 05:14:43.951 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 05:14:44.430 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 05:14:44.909 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 05:14:45.387 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 05:14:45.866 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 05:14:46.345 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 05:14:46.824 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 05:14:47.302 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 05:14:47.781 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 05:14:48.259 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 05:14:48.738 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 05:14:49.217 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 05:14:49.695 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 05:14:50.174 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 05:14:50.653 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 05:14:51.132 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 05:14:51.611 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 05:14:52.089 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 05:14:52.568 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 05:14:53.047 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 05:14:53.525 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 05:14:54.004 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 05:14:54.482 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 05:14:54.960 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 05:14:55.439 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 05:14:55.917 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 05:14:56.396 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 05:14:56.874 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-15 05:14:57.353 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-15 05:14:57.832 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-15 05:14:58.310 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-15 05:14:58.789 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-15 05:14:59.267 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-15 05:14:59.746 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-15 05:15:00.224 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-15 05:15:00.704 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-15 05:15:01.182 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-15 05:15:01.660 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-15 05:15:02.139 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-15 05:15:02.618 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-15 05:15:03.097 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-15 05:15:03.575 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-15 05:15:04.054 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-15 05:15:04.532 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-15 05:15:05.010 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-15 05:15:05.178 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:15:05.489 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-15 05:15:05.968 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-15 05:15:06.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:15:06.446 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-15 05:15:06.925 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-15 05:15:07.181 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:15:07.404 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-15 05:15:07.883 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-15 05:15:08.183 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:15:08.362 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-15 05:15:08.840 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-15 05:15:09.184 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:15:09.318 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-15 05:15:09.797 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-15 05:15:10.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:15:10.182 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:15:10.183 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:15:10.183 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:15:10.183 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:15:10.183 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:15:10.183 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:15:10.183 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:15:15.186 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:15:15.187 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:15:15.189 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:15:15.190 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:15:15.190 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:15:15.191 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:15:15.202 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:15:15.204 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:15:15.204 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:15:15.204 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:15:15.204 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:15:15.209 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:15:15.209 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:15:15.209 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:15:15.209 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:15:15.209 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:15:15.209 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:15:15.209 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:15:15.209 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:15:15.213 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:15:15.213 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:15:15.213 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:15:15.213 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:15:15.213 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:15:15.213 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:15:15.214 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:15:15.214 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:15:15.216 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:15:15.216 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:15:15.217 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:15:15.217 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:15:15.217 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:15:15.217 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:15:15.217 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:15:15.217 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:15:15.221 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:15:15.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:15:15.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:15:15.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:15:15.221 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:15:15.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:15:15.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:15:15.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:15:15.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:15:15.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:15:15.222 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:15:15.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:15:15.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:15:15.222 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:15:15.222 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:15:15.222 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:15:15.222 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:15:15.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:15:15.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:15:15.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:15:15.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:15:15.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:15:15.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:15:15.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:15:15.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:15:15.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:15:15.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:15:15.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:15:15.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:15:15.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:15:15.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:15:15.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:15:15.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:15:15.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:15:15.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:15:15.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:15:15.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:15:15.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:15:15.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:15:15.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:15:15.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:15:15.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:15:15.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:15:15.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:15:15.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:15:15.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:15:15.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:15:15.227 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:15:15.710 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:15:15.741 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:15:15.742 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:15.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:15:15.745 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:15:15.767 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:15:15.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:15:15.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:15:15.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:15:15.773 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:15:15.773 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:15:15.773 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:15:15.773 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:15:15.803 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:15.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:15:15.820 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:15:15.820 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:15:15.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:15:15.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:15:16.188 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:15:16.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:15:16.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:15:16.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:15:16.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:15:16.666 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:15:17.145 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:15:17.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:15:17.227 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:15:17.227 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:15:17.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:15:17.623 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:15:18.101 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:15:18.227 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:15:18.227 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:15:18.227 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:15:18.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:15:18.579 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:15:19.056 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:15:19.228 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:15:19.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:15:19.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:15:19.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:15:19.534 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:15:20.013 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:15:20.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:15:20.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:15:20.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:15:20.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:15:20.115 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:15:20.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:15:20.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:15:20.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:15:20.117 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:15:20.117 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:15:20.117 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:15:20.117 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:15:20.154 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:20.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:15:20.177 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:15:20.177 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:15:20.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:15:20.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:15:20.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:15:20.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:15:20.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:15:20.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:15:20.491 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:15:20.969 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:15:21.449 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:15:21.928 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:15:22.407 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:15:22.886 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:15:23.365 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:15:23.844 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:15:24.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:15:24.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:15:24.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:15:24.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:15:24.246 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:15:24.262 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:15:24.262 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:15:24.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:15:24.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:15:24.264 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:15:24.264 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:15:24.264 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:15:24.264 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:15:24.315 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:24.316 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:15:24.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:15:24.332 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:15:24.333 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:15:24.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:15:24.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:15:24.795 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:15:25.274 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:15:25.751 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:15:26.229 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 05:15:26.708 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 05:15:27.186 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 05:15:27.664 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 05:15:28.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:15:28.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:15:28.105 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:15:28.105 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:15:28.124 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:15:28.124 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:15:28.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:15:28.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:15:28.126 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:15:28.126 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:15:28.126 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:15:28.126 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:15:28.131 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:28.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:15:28.136 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:15:28.136 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:15:28.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:15:28.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:15:28.141 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 05:15:28.618 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 05:15:29.097 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 05:15:29.576 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 05:15:30.054 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 05:15:30.533 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 05:15:31.010 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 05:15:31.488 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 05:15:31.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:15:31.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:15:31.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:15:31.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:15:31.884 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:15:31.893 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:15:31.893 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:15:31.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:15:31.893 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:15:31.894 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:15:31.894 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:15:31.894 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:15:31.894 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:15:31.894 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:15:31.894 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:15:31.894 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:15:36.898 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:15:36.898 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:15:36.900 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:15:36.901 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:15:36.901 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:15:36.902 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:15:36.911 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:15:36.913 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:15:36.913 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:15:36.913 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:15:36.913 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:15:36.917 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:15:36.917 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:15:36.917 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:15:36.917 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:15:36.918 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:15:36.918 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:15:36.918 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:15:36.918 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:15:36.921 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:15:36.921 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:15:36.921 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:15:36.921 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:15:36.921 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:15:36.921 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:15:36.921 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:15:36.921 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:15:36.926 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:15:36.926 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:15:36.926 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:15:36.926 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:15:36.926 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:15:36.926 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:15:36.927 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:15:36.927 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:15:36.931 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:15:36.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:15:36.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:15:36.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:15:36.931 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:15:36.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:15:36.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:15:36.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:15:36.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:15:36.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:15:36.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:15:36.932 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:15:36.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:15:36.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:15:36.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:15:36.932 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:15:36.932 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:15:36.932 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:15:36.932 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:15:36.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:15:36.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:15:36.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:15:36.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:15:36.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:15:36.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:15:36.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:15:36.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:15:36.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:15:36.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:15:36.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:15:36.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:15:36.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:15:36.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:15:36.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:15:36.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:15:36.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:15:36.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:15:36.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:15:36.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:15:36.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:15:36.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:15:36.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:15:36.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:15:36.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:15:36.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:15:36.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:15:36.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:15:36.937 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:15:37.419 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:15:37.458 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:15:37.459 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:37.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:15:37.460 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:15:37.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:15:37.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:15:37.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:15:37.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:15:37.482 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:15:37.482 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:15:37.483 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:15:37.483 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:15:37.513 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:37.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:15:37.531 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:15:37.531 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:15:37.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:15:37.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:15:37.897 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:15:37.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:15:37.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:15:37.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:15:37.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:15:38.376 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:15:38.392 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:38.853 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:15:38.879 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:38.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:15:38.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:15:38.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:15:38.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:15:39.332 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:15:39.366 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:39.809 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:15:39.853 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:39.938 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:15:39.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:15:39.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:15:39.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:15:40.288 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:15:40.341 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:40.766 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:15:40.828 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:40.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:15:40.939 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:15:40.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:15:40.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:15:41.244 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:15:41.315 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:41.722 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:15:41.803 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:41.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:15:41.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:15:41.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:15:41.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:15:42.200 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:15:42.290 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:42.679 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:15:42.778 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:43.157 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:15:43.266 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:43.636 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:15:43.753 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:44.114 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:15:44.240 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:44.592 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:15:44.728 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:45.069 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:15:45.214 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:45.548 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:15:45.703 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:45.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:15:45.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:15:45.709 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:15:45.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:15:45.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:15:45.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:15:45.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:15:45.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:15:45.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:15:45.717 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:15:45.717 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:15:45.717 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:15:45.730 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:45.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:15:45.739 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:15:45.739 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:15:45.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:15:45.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:15:46.025 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:15:46.429 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:46.504 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:15:46.917 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:46.983 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:15:47.405 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:47.462 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:15:47.894 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:47.941 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 05:15:48.382 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:48.418 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 05:15:48.869 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:48.897 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 05:15:49.356 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:49.376 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 05:15:49.845 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:49.855 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 05:15:50.333 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:50.334 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 05:15:50.812 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 05:15:50.829 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:51.291 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 05:15:51.317 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:51.770 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 05:15:51.804 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:52.249 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 05:15:52.293 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:52.728 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 05:15:52.781 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:53.206 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 05:15:53.269 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:53.681 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 05:15:53.749 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:53.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:15:53.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:15:53.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:15:53.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:15:53.758 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:15:53.772 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:15:53.772 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:15:53.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:15:53.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:15:53.774 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:15:53.774 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:15:53.774 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:15:53.774 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:15:53.818 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:53.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:15:53.831 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:15:53.831 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:15:53.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:15:53.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:15:54.114 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:54.158 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 05:15:54.594 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:54.636 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 05:15:55.072 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:55.115 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 05:15:55.550 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:55.593 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 05:15:56.029 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:56.071 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 05:15:56.507 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:56.549 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 05:15:56.985 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:57.028 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 05:15:57.463 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:57.505 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 05:15:57.941 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:57.983 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 05:15:58.418 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:58.460 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 05:15:58.896 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:58.939 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 05:15:59.374 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:59.416 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 05:15:59.852 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:15:59.894 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 05:16:00.330 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:16:00.372 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 05:16:00.808 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:16:00.849 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 05:16:01.285 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:16:01.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:16:01.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:01.291 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:16:01.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:16:01.307 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:16:01.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:16:01.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:16:01.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:01.309 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:16:01.309 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:16:01.309 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:16:01.309 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:16:01.317 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:16:01.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:16:01.325 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:16:01.325 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:16:01.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:01.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:01.327 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 05:16:01.719 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:16:01.806 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 05:16:02.195 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:16:02.285 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 05:16:02.675 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:16:02.764 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 05:16:03.153 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:16:03.242 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 05:16:03.633 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:16:03.721 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 05:16:04.110 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:16:04.199 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 05:16:04.589 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:16:04.677 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 05:16:05.068 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:16:05.156 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 05:16:05.546 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:16:05.635 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-15 05:16:06.026 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:16:06.113 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-15 05:16:06.504 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:16:06.591 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-15 05:16:06.982 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:16:07.070 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-15 05:16:07.460 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:16:07.549 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-15 05:16:07.939 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:16:08.028 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-15 05:16:08.418 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:16:08.506 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-15 05:16:08.897 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:16:08.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:16:08.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:08.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:16:08.907 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:16:08.907 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:16:08.920 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:16:08.920 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:16:08.920 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:16:08.920 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:16:08.925 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:16:08.926 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:16:08.926 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:16:08.926 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:16:08.926 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:16:08.926 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:16:08.926 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:16:08.926 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6824 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:16:08.927 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6824 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:16:08.927 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6824 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:16:08.927 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6824 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:16:08.927 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6824 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:16:08.927 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6824 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:16:08.927 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6825 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:16:08.927 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6825 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:16:08.927 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6825 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:16:08.927 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6825 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:16:08.927 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6825 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:16:08.927 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6825 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:16:08.927 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6825 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:16:08.927 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6825 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:16:13.923 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:16:13.923 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:16:13.925 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:16:13.926 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:16:13.927 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:16:13.928 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:16:13.940 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:16:13.942 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:16:13.942 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:16:13.943 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:16:13.943 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:16:13.947 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:16:13.947 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:16:13.947 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:16:13.947 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:16:13.948 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:16:13.948 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:16:13.948 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:16:13.948 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:16:13.951 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:16:13.951 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:16:13.951 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:16:13.951 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:16:13.951 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:16:13.951 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:16:13.951 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:16:13.951 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:16:13.954 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:16:13.955 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:16:13.955 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:16:13.955 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:16:13.955 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:16:13.955 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:16:13.955 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:16:13.955 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:16:13.959 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:16:13.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:16:13.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:16:13.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:16:13.959 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:16:13.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:16:13.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:16:13.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:16:13.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:13.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:16:13.960 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:16:13.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:13.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:13.960 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:16:13.960 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:16:13.960 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:16:13.960 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:16:13.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:13.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:13.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:13.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:16:13.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:13.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:13.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:13.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:13.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:13.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:13.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:13.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:13.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:13.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:13.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:13.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:13.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:13.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:13.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:13.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:13.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:13.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:13.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:13.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:13.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:13.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:13.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:13.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:13.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:13.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:13.965 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:16:14.441 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:16:14.488 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:16:14.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:16:14.491 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:16:14.494 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:16:14.520 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:16:14.520 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:16:14.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:16:14.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:14.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:16:14.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:16:14.534 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:16:14.534 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:16:14.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:16:14.590 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:16:14.590 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:16:14.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:14.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:14.918 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:16:14.963 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:16:14.964 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:16:14.964 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:16:14.964 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:16:15.397 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:16:15.875 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:16:15.964 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:16:15.964 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:16:15.965 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:16:15.965 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:16:16.353 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:16:16.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:16:16.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:16.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:16:16.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:16:16.709 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:16:16.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:16:16.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:16:16.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:16.711 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:16:16.711 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:16:16.711 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:16:16.711 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:16:16.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:16:16.728 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:16:16.728 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:16:16.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:16.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:16.831 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:16:16.965 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:16:16.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:16:16.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:16:16.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:16:17.309 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:16:17.787 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:16:17.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:16:17.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:16:17.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:16:17.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:16:18.266 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:16:18.744 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:16:18.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:16:18.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:18.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:16:18.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:16:18.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:16:18.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:16:18.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:16:18.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:18.850 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:16:18.850 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:16:18.850 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:16:18.850 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:16:18.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:16:18.898 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:16:18.899 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:16:18.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:18.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:18.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:16:18.968 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:16:18.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:16:18.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:16:19.223 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:16:19.701 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:16:20.179 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:16:20.658 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:16:20.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:16:20.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:21.002 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:16:21.002 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:16:21.011 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:16:21.012 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:16:21.012 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:16:21.012 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:16:21.017 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:16:21.018 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:16:21.018 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:16:21.018 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:16:21.018 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:16:21.018 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:16:21.018 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:16:21.019 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1507 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:16:21.019 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1507 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:16:21.019 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1507 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:16:21.019 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1507 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:16:21.019 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1507 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:16:21.019 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1507 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:16:21.019 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1508 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:16:21.019 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1508 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:16:21.019 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1508 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:16:21.020 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1508 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:16:21.020 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1508 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:16:21.020 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1508 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:16:21.020 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1508 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:16:21.020 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1508 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:16:26.015 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:16:26.015 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:16:26.018 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:16:26.018 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:16:26.018 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:16:26.019 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:16:26.029 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:16:26.031 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:16:26.031 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:16:26.031 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:16:26.031 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:16:26.037 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:16:26.037 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:16:26.038 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:16:26.038 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:16:26.038 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:16:26.039 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:16:26.039 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:16:26.039 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:16:26.042 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:16:26.042 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:16:26.043 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:16:26.043 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:16:26.043 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:16:26.043 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:16:26.043 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:16:26.044 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:16:26.046 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:16:26.046 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:16:26.047 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:16:26.047 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:16:26.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:16:26.047 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:16:26.047 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:16:26.047 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:16:26.051 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:16:26.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:16:26.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:16:26.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:16:26.052 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:16:26.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:16:26.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:16:26.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:16:26.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:26.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:16:26.052 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:16:26.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:26.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:26.052 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:16:26.052 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:16:26.052 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:16:26.052 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:16:26.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:26.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:26.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:26.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:16:26.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:26.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:26.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:26.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:26.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:26.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:26.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:26.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:26.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:26.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:26.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:26.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:26.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:26.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:26.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:26.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:26.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:26.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:26.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:26.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:26.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:26.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:26.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:26.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:26.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:26.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:26.057 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:16:26.541 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:16:26.578 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:16:26.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:16:26.581 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:16:26.585 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:16:26.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:16:26.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:16:26.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:16:26.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:26.614 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:16:26.615 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:16:26.615 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:16:26.615 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:16:26.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:16:26.644 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:16:26.644 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:16:26.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:26.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:27.019 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:16:27.057 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:16:27.057 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:16:27.057 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:16:27.058 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:16:27.498 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:16:27.977 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:16:28.058 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:16:28.058 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:16:28.058 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:16:28.058 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:16:28.456 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:16:28.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:16:28.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:28.754 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:16:28.754 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:16:28.754 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:16:28.772 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:16:28.772 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:16:28.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:16:28.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:28.773 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:16:28.774 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:16:28.774 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:16:28.774 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:16:28.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:16:28.785 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:16:28.785 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:16:28.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:28.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:28.934 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:16:29.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:16:29.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:16:29.059 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:16:29.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:16:29.412 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:16:29.891 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:16:30.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:16:30.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:16:30.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:16:30.061 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:16:30.370 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:16:30.850 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:16:30.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:16:30.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:30.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:16:30.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:16:30.895 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:16:30.905 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:16:30.905 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:16:30.905 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:16:30.905 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:16:30.910 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:16:30.910 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:16:30.911 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:16:30.911 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:16:30.911 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:16:30.911 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:16:30.911 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:16:35.906 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:16:35.906 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:16:35.906 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:16:35.907 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:16:35.907 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:16:35.908 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:16:35.913 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:16:35.914 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:16:35.914 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:16:35.914 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:16:35.914 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:16:35.915 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:16:35.915 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:16:35.915 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:16:35.915 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:16:35.916 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:16:35.916 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:16:35.916 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:16:35.916 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:16:35.917 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:16:35.917 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:16:35.917 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:16:35.917 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:16:35.917 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:16:35.918 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:16:35.918 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:16:35.918 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:16:35.920 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:16:35.920 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:16:35.920 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:16:35.920 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:16:35.920 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:16:35.920 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:16:35.920 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:16:35.920 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:16:35.925 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:16:35.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:16:35.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:16:35.925 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:16:35.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:16:35.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:16:35.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:16:35.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:16:35.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:16:35.926 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:16:35.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:35.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:35.926 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:16:35.926 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:16:35.926 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:16:35.926 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:16:35.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:35.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:35.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:35.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:16:35.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:35.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:35.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:35.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:35.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:35.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:35.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:35.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:35.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:35.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:35.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:35.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:35.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:35.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:35.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:35.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:35.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:35.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:35.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:35.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:35.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:35.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:35.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:35.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:35.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:35.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:35.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:35.931 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:16:36.414 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:16:36.454 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:16:36.456 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:16:36.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:16:36.457 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:16:36.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:16:36.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:16:36.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:16:36.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:36.478 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:16:36.478 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:16:36.479 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:16:36.479 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:16:36.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:16:36.518 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:16:36.518 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:16:36.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:36.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:36.892 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:16:36.929 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:16:36.930 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:16:36.933 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:16:36.933 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:16:37.370 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:16:37.848 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:16:37.931 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:16:37.931 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:16:37.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:16:37.935 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:16:38.328 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:16:38.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:38.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:16:38.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:16:38.610 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:16:38.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:16:38.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:16:38.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:16:38.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:38.626 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:16:38.626 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:16:38.626 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:16:38.626 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:16:38.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:16:38.665 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:16:38.665 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:16:38.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:38.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:38.804 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:16:38.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:16:38.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:16:38.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:16:38.935 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:16:39.283 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:16:39.760 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:16:39.933 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:16:39.933 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:16:39.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:16:39.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:16:40.239 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:16:40.717 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:16:40.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:40.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:16:40.767 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:16:40.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:16:40.782 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:16:40.782 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:16:40.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:16:40.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:40.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:16:40.783 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:16:40.783 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:16:40.783 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:16:40.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:16:40.818 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:16:40.818 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:16:40.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:40.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:40.934 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:16:40.934 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:16:40.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:16:40.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:16:41.195 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:16:41.674 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:16:42.153 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:16:42.630 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:16:42.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:42.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:16:42.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:16:42.918 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:16:42.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:16:42.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:16:42.928 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:16:42.928 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:16:42.929 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:16:42.929 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:16:42.929 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:16:42.929 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:16:42.929 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:16:42.929 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:16:42.929 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:16:47.931 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:16:47.932 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:16:47.934 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:16:47.934 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:16:47.934 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:16:47.935 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:16:47.945 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:16:47.946 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:16:47.947 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:16:47.947 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:16:47.947 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:16:47.953 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:16:47.954 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:16:47.954 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:16:47.954 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:16:47.955 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:16:47.955 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:16:47.956 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:16:47.956 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:16:47.959 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:16:47.959 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:16:47.959 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:16:47.959 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:16:47.960 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:16:47.960 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:16:47.960 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:16:47.960 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:16:47.963 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:16:47.963 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:16:47.963 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:16:47.963 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:16:47.963 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:16:47.964 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:16:47.964 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:16:47.964 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:16:47.968 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:16:47.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:16:47.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:16:47.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:16:47.968 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:16:47.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:16:47.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:16:47.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:16:47.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:47.968 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:16:47.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:47.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:16:47.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:47.968 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:16:47.968 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:16:47.968 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:16:47.969 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:16:47.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:47.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:47.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:47.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:16:47.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:47.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:47.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:47.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:47.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:47.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:47.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:47.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:47.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:47.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:47.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:47.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:47.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:47.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:47.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:47.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:47.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:47.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:47.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:47.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:47.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:47.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:47.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:47.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:47.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:47.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:47.973 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:16:48.454 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:16:48.498 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:16:48.501 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:16:48.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:16:48.503 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:16:48.521 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:16:48.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:16:48.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:16:48.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:48.525 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:16:48.525 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:16:48.525 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:16:48.525 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:16:48.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:16:48.555 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:16:48.555 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:16:48.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:48.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:48.931 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:16:48.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:16:48.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:16:48.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:16:48.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:16:49.410 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:16:49.888 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:16:49.973 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:16:49.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:16:49.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:16:49.974 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:16:50.367 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:16:50.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:50.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:16:50.670 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:16:50.670 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:16:50.670 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:16:50.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:16:50.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:16:50.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:16:50.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:50.689 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:16:50.689 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:16:50.689 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:16:50.689 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:16:50.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:16:50.694 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:16:50.694 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:16:50.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:50.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:50.845 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:16:50.974 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:16:50.974 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:16:50.974 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:16:50.974 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:16:51.324 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:16:51.803 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:16:51.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:16:51.975 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:16:51.975 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:16:51.976 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:16:52.282 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:16:52.761 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:16:52.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:52.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:16:52.810 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:16:52.810 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:16:52.810 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:16:52.819 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:16:52.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:16:52.820 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:16:52.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:16:52.825 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:16:52.826 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:16:52.826 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:16:52.826 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:16:52.827 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:16:52.827 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:16:52.827 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:16:52.827 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1036 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:16:52.827 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1036 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:16:52.827 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1036 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:16:52.827 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1036 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:16:52.828 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1036 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:16:52.828 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1036 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:16:52.828 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1036 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:16:52.828 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1036 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:16:57.824 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:16:57.825 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:16:57.827 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:16:57.828 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:16:57.828 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:16:57.829 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:16:57.839 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:16:57.840 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:16:57.840 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:16:57.840 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:16:57.840 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:16:57.843 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:16:57.844 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:16:57.844 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:16:57.844 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:16:57.844 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:16:57.845 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:16:57.845 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:16:57.845 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:16:57.850 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:16:57.851 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:16:57.851 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:16:57.851 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:16:57.851 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:16:57.851 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:16:57.851 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:16:57.852 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:16:57.854 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:16:57.854 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:16:57.855 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:16:57.855 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:16:57.855 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:16:57.855 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:16:57.855 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:16:57.855 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:16:57.859 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:16:57.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:16:57.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:16:57.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:16:57.860 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:16:57.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:16:57.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:16:57.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:16:57.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:57.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:16:57.860 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:16:57.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:57.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:57.860 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:16:57.860 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:16:57.861 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:16:57.861 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:16:57.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:57.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:57.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:57.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:16:57.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:57.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:57.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:57.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:57.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:57.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:57.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:57.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:57.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:57.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:57.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:57.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:57.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:57.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:57.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:57.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:57.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:57.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:16:57.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:57.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:57.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:57.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:16:57.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:57.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:16:57.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:57.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:16:57.865 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:16:58.348 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:16:58.384 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:16:58.386 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:16:58.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:16:58.388 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:16:58.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:16:58.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:16:58.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:16:58.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:58.411 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:16:58.411 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:16:58.411 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:16:58.411 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:16:58.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:16:58.453 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:16:58.453 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:16:58.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:58.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:16:58.824 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:16:58.864 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:16:58.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:16:58.865 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:16:58.865 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:16:59.302 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:16:59.781 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:16:59.865 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:16:59.865 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:16:59.866 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:16:59.866 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:17:00.259 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:17:00.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:00.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:17:00.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:17:00.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:17:00.635 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:17:00.636 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:17:00.636 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:17:00.636 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:17:00.639 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:17:00.639 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:17:00.639 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:17:00.639 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:17:00.639 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:17:00.639 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:17:00.639 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:17:00.639 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=593 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:00.639 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=593 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:00.639 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=593 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:00.639 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=593 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:00.639 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=593 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:00.639 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=593 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:00.639 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=594 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:00.639 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=594 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:00.639 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=594 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:00.639 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=594 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:00.639 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=594 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:00.639 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=594 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:00.640 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=594 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:00.640 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=594 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:05.641 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:17:05.641 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:17:05.642 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:17:05.643 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:17:05.643 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:17:05.644 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:17:05.653 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:17:05.654 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:17:05.654 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:17:05.655 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:17:05.655 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:17:05.658 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:17:05.659 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:17:05.659 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:17:05.659 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:17:05.659 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:17:05.659 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:17:05.660 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:17:05.660 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:17:05.662 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:17:05.662 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:17:05.662 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:17:05.662 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:17:05.662 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:17:05.663 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:17:05.663 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:17:05.663 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:17:05.665 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:17:05.665 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:17:05.665 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:17:05.665 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:17:05.665 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:17:05.665 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:17:05.666 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:17:05.666 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:17:05.669 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:17:05.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:17:05.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:17:05.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:17:05.669 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:17:05.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:17:05.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:17:05.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:17:05.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:05.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:17:05.670 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:17:05.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:05.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:05.670 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:17:05.670 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:17:05.670 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:17:05.670 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:17:05.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:05.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:05.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:05.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:17:05.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:05.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:05.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:05.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:05.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:05.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:05.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:05.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:05.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:05.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:05.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:05.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:05.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:05.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:05.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:05.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:05.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:05.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:05.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:05.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:05.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:05.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:05.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:05.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:05.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:05.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:05.675 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:17:06.159 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:17:06.185 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:17:06.185 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:17:06.186 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:17:06.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:17:06.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:17:06.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:17:06.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:17:06.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:06.202 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:17:06.202 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:17:06.202 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:17:06.202 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:17:06.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:17:06.260 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:17:06.260 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:17:06.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:06.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:06.636 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:17:06.673 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:17:06.674 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:17:06.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:17:06.674 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:17:07.115 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:17:07.594 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:17:07.674 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:17:07.675 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:17:07.675 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:17:07.675 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:17:08.073 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:17:08.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:08.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:17:08.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:17:08.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:17:08.460 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:17:08.466 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:17:08.466 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:17:08.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:17:08.467 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:17:08.470 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:17:08.470 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:17:08.470 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:17:08.470 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:17:08.470 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:17:08.470 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:17:08.470 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:17:08.470 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=597 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:08.470 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=597 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:08.470 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=597 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:08.470 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=597 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:08.470 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=597 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:13.472 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:17:13.472 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:17:13.474 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:17:13.475 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:17:13.475 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:17:13.476 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:17:13.485 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:17:13.486 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:17:13.486 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:17:13.487 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:17:13.487 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:17:13.490 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:17:13.490 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:17:13.490 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:17:13.490 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:17:13.491 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:17:13.491 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:17:13.491 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:17:13.491 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:17:13.493 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:17:13.493 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:17:13.494 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:17:13.494 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:17:13.494 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:17:13.494 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:17:13.494 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:17:13.494 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:17:13.497 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:17:13.497 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:17:13.497 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:17:13.497 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:17:13.497 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:17:13.497 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:17:13.497 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:17:13.497 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:17:13.501 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:17:13.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:17:13.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:17:13.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:17:13.501 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:17:13.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:17:13.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:17:13.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:17:13.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:13.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:17:13.501 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:17:13.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:13.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:13.501 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:17:13.501 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:17:13.502 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:17:13.502 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:17:13.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:13.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:13.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:13.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:17:13.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:13.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:13.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:13.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:13.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:13.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:13.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:13.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:13.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:13.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:13.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:13.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:13.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:13.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:13.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:13.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:13.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:13.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:13.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:13.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:13.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:13.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:13.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:13.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:13.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:13.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:13.506 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:17:13.988 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:17:14.023 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:17:14.025 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:17:14.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:17:14.027 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:17:14.042 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:17:14.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:17:14.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:17:14.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:14.083 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:17:14.083 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:17:14.083 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:17:14.083 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:17:14.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:17:14.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:17:14.134 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:17:14.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:14.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:14.465 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:17:14.505 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:17:14.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:17:14.505 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:17:14.505 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:17:14.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:14.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:17:14.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:17:14.517 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:17:14.533 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:17:14.533 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:17:14.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:17:14.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:14.543 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:17:14.543 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:17:14.543 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:17:14.543 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:17:14.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:17:14.557 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:17:14.557 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:17:14.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:14.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:14.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:14.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:17:14.938 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:17:14.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:17:14.943 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:17:14.948 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:17:14.949 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:17:14.949 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:17:14.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:17:14.950 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:17:14.950 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:17:14.950 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:17:14.950 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:17:14.950 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:17:14.950 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:17:14.951 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:17:19.953 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:17:19.953 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:17:19.954 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:17:19.955 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:17:19.956 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:17:19.957 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:17:19.969 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:17:19.970 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:17:19.970 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:17:19.970 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:17:19.970 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:17:19.972 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:17:19.972 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:17:19.973 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:17:19.973 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:17:19.973 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:17:19.973 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:17:19.973 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:17:19.973 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:17:19.975 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:17:19.975 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:17:19.975 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:17:19.975 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:17:19.975 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:17:19.975 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:17:19.975 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:17:19.975 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:17:19.979 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:17:19.979 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:17:19.979 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:17:19.979 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:17:19.979 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:17:19.979 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:17:19.979 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:17:19.979 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:17:19.984 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:17:19.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:17:19.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:17:19.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:17:19.985 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:17:19.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:17:19.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:17:19.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:17:19.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:17:19.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:19.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:19.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:19.985 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:17:19.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:19.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:19.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:19.985 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:17:19.985 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:17:19.985 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:17:19.985 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:17:19.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:19.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:19.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:19.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:17:19.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:19.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:19.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:19.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:19.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:19.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:19.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:19.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:19.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:19.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:19.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:19.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:19.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:19.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:19.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:19.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:19.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:19.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:19.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:19.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:19.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:19.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:19.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:19.990 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:17:20.474 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:17:20.510 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:17:20.512 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:17:20.513 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:17:20.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:17:20.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:17:20.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:17:20.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:17:20.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:20.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:17:20.578 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:17:20.578 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:17:20.578 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:17:20.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:17:20.620 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:17:20.621 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:17:20.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:20.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:20.952 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:17:20.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:17:20.990 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:17:20.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:17:20.991 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:17:20.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:21.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:17:21.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:17:21.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:17:21.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:17:21.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:17:21.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:17:21.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:21.030 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:17:21.030 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:17:21.030 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:17:21.030 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:17:21.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:17:21.044 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:17:21.044 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:17:21.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:21.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:21.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:21.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:17:21.426 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:17:21.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:17:21.430 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:17:21.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:17:21.438 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:17:21.439 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:17:21.439 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:17:21.444 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:17:21.444 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:17:21.444 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:17:21.444 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:17:21.445 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:17:21.445 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:17:21.445 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:17:21.445 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=310 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:21.445 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=310 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:21.445 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=310 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:21.446 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=310 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:21.446 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=310 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:21.446 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=310 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:21.446 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=311 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:21.446 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=311 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:21.446 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=311 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:21.446 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=311 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:21.446 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=311 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:21.446 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=311 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:21.446 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=311 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:21.446 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=311 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:26.444 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:17:26.444 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:17:26.444 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:17:26.445 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:17:26.445 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:17:26.446 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:17:26.455 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:17:26.456 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:17:26.456 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:17:26.457 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:17:26.457 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:17:26.460 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:17:26.460 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:17:26.461 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:17:26.461 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:17:26.461 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:17:26.462 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:17:26.462 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:17:26.462 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:17:26.465 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:17:26.465 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:17:26.465 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:17:26.465 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:17:26.466 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:17:26.466 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:17:26.466 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:17:26.466 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:17:26.469 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:17:26.469 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:17:26.469 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:17:26.469 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:17:26.469 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:17:26.469 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:17:26.469 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:17:26.469 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:17:26.474 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:17:26.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:17:26.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:17:26.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:17:26.474 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:17:26.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:17:26.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:17:26.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:17:26.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:17:26.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:26.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:26.475 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:17:26.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:26.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:26.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:26.475 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:17:26.475 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:17:26.475 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:17:26.475 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:17:26.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:26.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:26.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:26.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:17:26.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:26.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:26.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:26.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:26.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:26.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:26.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:26.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:26.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:26.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:26.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:26.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:26.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:26.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:26.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:26.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:26.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:26.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:26.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:26.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:26.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:26.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:26.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:26.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:26.480 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:17:26.964 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:17:26.996 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:17:26.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:17:27.000 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:17:27.003 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:17:27.026 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:17:27.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:17:27.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:17:27.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:27.066 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:17:27.067 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:17:27.067 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:17:27.067 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:17:27.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:17:27.109 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:17:27.109 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:17:27.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:27.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:27.442 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:17:27.478 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:17:27.479 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:17:27.479 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:17:27.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:17:27.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:27.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:17:27.496 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:17:27.496 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:17:27.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:17:27.510 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:17:27.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:17:27.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:27.520 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:17:27.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:17:27.520 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:17:27.520 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:17:27.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:17:27.534 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:17:27.534 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:17:27.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:27.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:27.919 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:17:27.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:27.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:17:27.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:17:27.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:17:27.976 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:17:27.976 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:17:27.977 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:17:27.977 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:17:27.979 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:17:27.979 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:17:27.980 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:17:27.980 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:17:27.980 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:17:27.980 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:17:27.980 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:17:32.981 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:17:32.982 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:17:32.983 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:17:32.984 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:17:32.984 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:17:32.985 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:17:32.994 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:17:32.995 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:17:32.995 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:17:32.995 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:17:32.995 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:17:32.998 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:17:32.999 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:17:32.999 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:17:32.999 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:17:32.999 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:17:32.999 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:17:32.999 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:17:33.000 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:17:33.003 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:17:33.003 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:17:33.003 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:17:33.003 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:17:33.004 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:17:33.004 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:17:33.004 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:17:33.004 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:17:33.006 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:17:33.006 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:17:33.006 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:17:33.006 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:17:33.006 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:17:33.006 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:17:33.007 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:17:33.007 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:17:33.010 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:17:33.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:17:33.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:17:33.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:17:33.010 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:17:33.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:17:33.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:17:33.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:17:33.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:33.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:17:33.011 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:17:33.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:33.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:33.011 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:17:33.011 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:17:33.011 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:17:33.011 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:17:33.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:33.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:33.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:33.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:17:33.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:33.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:33.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:33.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:33.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:33.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:33.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:33.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:33.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:33.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:33.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:33.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:33.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:33.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:33.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:33.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:33.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:33.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:33.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:33.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:33.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:33.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:33.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:33.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:33.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:33.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:33.016 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:17:33.501 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:17:33.532 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:17:33.533 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:17:33.534 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:17:33.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:17:33.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:17:33.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:17:33.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:17:33.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:33.567 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:17:33.567 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:17:33.567 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:17:33.567 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:17:33.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:17:33.600 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:17:33.600 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:17:33.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:33.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:33.978 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:17:34.015 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:17:34.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:17:34.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:17:34.016 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:17:34.457 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:17:34.936 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:17:35.016 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:17:35.017 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:17:35.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:17:35.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:17:35.415 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:17:35.894 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:17:36.018 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:17:36.018 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:17:36.018 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:17:36.019 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:17:36.373 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:17:36.852 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:17:37.019 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:17:37.020 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:17:37.020 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:17:37.020 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:17:37.331 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:17:37.606 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:17:37.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:17:37.607 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:17:37.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:17:37.610 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:17:37.610 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:17:37.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:17:37.613 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:17:37.613 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:17:37.613 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:17:37.613 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:17:37.613 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:17:37.613 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:17:37.613 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:17:37.613 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=980 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:37.613 [WARNING] transceiver.py:250 (TRX2@172.18.144.20:5700/2) RX TRXD message (ver=1 fn=981 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:37.613 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=980 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:37.613 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=980 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:37.613 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=980 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:37.613 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=980 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:37.613 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=980 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:37.613 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=981 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:37.613 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=981 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:37.613 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=981 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:37.613 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=981 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:37.613 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=981 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:37.613 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=981 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:37.613 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=981 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:37.613 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=981 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:42.635 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:17:42.635 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:17:42.638 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:17:42.639 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:17:42.639 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:17:42.640 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:17:42.648 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:17:42.650 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:17:42.650 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:17:42.650 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:17:42.650 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:17:42.655 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:17:42.655 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:17:42.655 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:17:42.655 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:17:42.656 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:17:42.656 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:17:42.656 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:17:42.656 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:17:42.660 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:17:42.660 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:17:42.660 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:17:42.660 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:17:42.661 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:17:42.661 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:17:42.661 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:17:42.661 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:17:42.664 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:17:42.664 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:17:42.664 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:17:42.665 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:17:42.665 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:17:42.665 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:17:42.665 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:17:42.665 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:17:42.669 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:17:42.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:17:42.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:17:42.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:17:42.670 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:17:42.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:17:42.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:17:42.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:17:42.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:42.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:17:42.670 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:17:42.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:42.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:42.670 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:17:42.670 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:17:42.670 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:17:42.671 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:17:42.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:42.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:42.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:42.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:17:42.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:42.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:42.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:42.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:42.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:42.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:42.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:42.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:42.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:42.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:42.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:42.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:42.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:42.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:42.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:42.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:42.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:42.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:42.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:42.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:42.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:42.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:42.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:42.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:42.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:42.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:42.675 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:17:43.160 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:17:43.194 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:17:43.195 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:17:43.197 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:17:43.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:17:43.219 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:17:43.219 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:17:43.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:17:43.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:43.262 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:17:43.263 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:17:43.264 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:17:43.264 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:17:43.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:17:43.306 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:17:43.307 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:17:43.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:43.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:43.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:43.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:17:43.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:17:43.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:17:43.538 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:17:43.538 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:17:43.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:17:43.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:43.548 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:17:43.548 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:17:43.548 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:17:43.548 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:17:43.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:17:43.584 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:17:43.585 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:17:43.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:43.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:43.636 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:17:43.674 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:17:43.675 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:17:43.675 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:17:43.675 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:17:43.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:43.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:17:43.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:17:43.805 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:17:43.813 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:17:43.814 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:17:43.814 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:17:43.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:17:43.816 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:17:43.816 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:17:43.816 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:17:43.816 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:17:43.816 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:17:43.816 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:17:43.816 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:17:43.816 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=246 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:43.816 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=246 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:43.816 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=246 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:43.816 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=246 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:43.816 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=246 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:43.816 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=246 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:43.816 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=246 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:43.816 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=246 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:48.818 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:17:48.819 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:17:48.820 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:17:48.821 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:17:48.822 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:17:48.823 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:17:48.831 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:17:48.832 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:17:48.832 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:17:48.833 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:17:48.833 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:17:48.838 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:17:48.838 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:17:48.838 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:17:48.839 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:17:48.839 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:17:48.839 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:17:48.840 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:17:48.840 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:17:48.843 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:17:48.843 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:17:48.843 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:17:48.843 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:17:48.843 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:17:48.844 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:17:48.844 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:17:48.844 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:17:48.847 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:17:48.847 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:17:48.848 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:17:48.848 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:17:48.848 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:17:48.848 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:17:48.848 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:17:48.848 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:17:48.854 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:17:48.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:17:48.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:17:48.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:17:48.854 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:17:48.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:17:48.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:17:48.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:17:48.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:17:48.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:48.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:48.855 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:17:48.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:48.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:48.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:48.855 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:17:48.855 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:17:48.855 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:17:48.855 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:17:48.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:48.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:48.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:48.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:17:48.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:48.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:48.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:48.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:48.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:48.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:48.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:48.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:48.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:48.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:48.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:48.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:48.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:48.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:48.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:48.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:48.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:48.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:48.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:48.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:48.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:48.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:48.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:48.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:48.860 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:17:49.344 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:17:49.380 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:17:49.382 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:17:49.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:17:49.384 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:17:49.399 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:17:49.399 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:17:49.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:17:49.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:49.440 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:17:49.440 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:17:49.440 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:17:49.440 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:17:49.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:17:49.489 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:17:49.490 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:17:49.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:49.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:49.822 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:17:49.859 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:17:49.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:17:49.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:17:49.860 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:17:50.300 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:17:50.779 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:17:50.860 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:17:50.861 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:17:50.861 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:17:50.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:17:51.257 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:17:51.736 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:17:51.861 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:17:51.862 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:17:51.862 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:17:51.862 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:17:52.215 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:17:52.693 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:17:52.862 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:17:52.863 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:17:52.863 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:17:52.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:17:53.172 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:17:53.494 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:17:53.494 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:17:53.494 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:17:53.498 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:17:53.499 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:17:53.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:17:53.499 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:17:53.506 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:17:53.506 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:17:53.506 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:17:53.506 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:17:53.507 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:17:53.507 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:17:53.507 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:17:53.507 [WARNING] transceiver.py:250 (TRX2@172.18.144.20:5700/2) RX TRXD message (ver=1 fn=992 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:53.507 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=990 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:53.507 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=990 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:53.507 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=990 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:53.507 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=990 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:53.508 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=990 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:53.508 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=990 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:53.508 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=991 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:53.508 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=991 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:53.508 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=991 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:53.508 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=991 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:53.508 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=991 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:53.508 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=991 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:53.508 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=991 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:53.508 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=991 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:53.509 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=992 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:53.509 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=992 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:53.509 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=992 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:53.509 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=992 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:53.509 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=992 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:53.509 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=992 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:53.509 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=992 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:53.509 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=992 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:58.505 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:17:58.505 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:17:58.506 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:17:58.507 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:17:58.507 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:17:58.508 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:17:58.516 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:17:58.517 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:17:58.517 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:17:58.518 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:17:58.518 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:17:58.520 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:17:58.520 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:17:58.521 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:17:58.521 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:17:58.521 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:17:58.521 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:17:58.521 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:17:58.522 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:17:58.523 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:17:58.523 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:17:58.524 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:17:58.524 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:17:58.524 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:17:58.524 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:17:58.524 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:17:58.524 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:17:58.526 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:17:58.526 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:17:58.526 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:17:58.526 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:17:58.526 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:17:58.526 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:17:58.526 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:17:58.527 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:17:58.530 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:17:58.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:17:58.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:17:58.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:17:58.530 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:17:58.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:17:58.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:17:58.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:17:58.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:17:58.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:58.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:58.530 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:17:58.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:58.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:58.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:58.530 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:17:58.530 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:17:58.530 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:17:58.531 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:17:58.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:58.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:58.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:58.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:17:58.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:58.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:58.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:58.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:58.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:58.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:58.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:58.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:58.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:58.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:58.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:58.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:58.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:58.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:58.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:58.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:58.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:58.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:58.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:58.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:17:58.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:17:58.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:17:58.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:58.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:17:58.535 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:17:59.021 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:17:59.045 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:17:59.046 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:17:59.047 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:17:59.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:17:59.062 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:17:59.062 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:17:59.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:17:59.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:59.101 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:17:59.102 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:17:59.102 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:17:59.102 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:17:59.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:17:59.120 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:17:59.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:17:59.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:59.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:59.499 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:17:59.533 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:17:59.533 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:17:59.534 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:17:59.534 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:17:59.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:17:59.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:17:59.834 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:17:59.834 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:17:59.843 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:17:59.843 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:17:59.843 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:17:59.843 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:17:59.844 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:17:59.844 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:17:59.844 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:17:59.844 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:17:59.844 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:17:59.844 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:17:59.844 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=280 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:59.844 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:17:59.844 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=280 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:59.844 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=280 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:59.844 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=280 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:17:59.844 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=280 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:18:04.849 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:18:04.849 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:18:04.853 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:18:04.857 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:18:04.860 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:18:04.863 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:18:04.873 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:18:04.874 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:18:04.874 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:18:04.875 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:18:04.875 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:18:04.879 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:18:04.880 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:18:04.880 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:18:04.880 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:18:04.880 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:18:04.880 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:18:04.881 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:18:04.881 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:18:04.884 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:18:04.884 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:18:04.884 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:18:04.884 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:18:04.884 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:18:04.884 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:18:04.884 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:18:04.884 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:18:04.887 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:18:04.887 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:18:04.887 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:18:04.887 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:18:04.887 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:18:04.888 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:18:04.888 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:18:04.888 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:18:04.891 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:18:04.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:18:04.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:18:04.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:18:04.892 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:18:04.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:18:04.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:18:04.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:18:04.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:04.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:18:04.892 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:18:04.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:04.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:04.892 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:18:04.892 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:18:04.892 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:18:04.892 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:18:04.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:04.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:04.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:04.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:18:04.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:04.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:04.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:04.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:04.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:04.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:04.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:04.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:04.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:04.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:04.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:04.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:04.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:04.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:04.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:04.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:04.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:04.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:04.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:04.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:04.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:04.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:04.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:04.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:04.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:04.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:04.897 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:18:05.381 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:18:05.412 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:18:05.414 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:18:05.416 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:18:05.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:18:05.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:18:05.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:18:05.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:18:05.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:18:05.488 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:18:05.488 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:18:05.489 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:18:05.489 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:18:05.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:18:05.526 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:18:05.526 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:18:05.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:18:05.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:18:05.858 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:18:05.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:18:05.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:18:05.897 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:18:05.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:18:06.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:18:06.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:18:06.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:18:06.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:18:06.264 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:18:06.264 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:18:06.264 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:18:06.264 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:18:06.270 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:18:06.270 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:18:06.270 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:18:06.270 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:18:06.271 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:18:06.271 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:18:06.271 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:18:11.271 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:18:11.271 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:18:11.272 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:18:11.272 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:18:11.273 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:18:11.274 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:18:11.282 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:18:11.283 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:18:11.283 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:18:11.283 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:18:11.283 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:18:11.286 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:18:11.286 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:18:11.286 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:18:11.286 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:18:11.286 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:18:11.287 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:18:11.287 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:18:11.287 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:18:11.291 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:18:11.291 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:18:11.291 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:18:11.291 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:18:11.291 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:18:11.291 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:18:11.292 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:18:11.292 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:18:11.294 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:18:11.294 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:18:11.294 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:18:11.294 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:18:11.294 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:18:11.295 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:18:11.295 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:18:11.295 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:18:11.298 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:18:11.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:18:11.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:18:11.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:18:11.298 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:18:11.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:18:11.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:18:11.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:18:11.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:11.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:18:11.299 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:18:11.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:11.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:11.299 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:18:11.299 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:18:11.299 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:18:11.299 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:18:11.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:11.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:11.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:11.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:18:11.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:11.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:11.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:11.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:11.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:11.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:11.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:11.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:11.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:11.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:11.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:11.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:11.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:11.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:11.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:11.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:11.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:11.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:11.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:11.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:11.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:11.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:11.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:11.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:11.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:11.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:11.304 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:18:11.787 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:18:11.819 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:18:11.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:18:11.822 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:18:11.825 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:18:11.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:18:11.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:18:11.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:18:11.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:18:11.896 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:18:11.896 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:18:11.896 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:18:11.896 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:18:11.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:18:11.933 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:18:11.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:18:11.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:18:11.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:18:12.265 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:18:12.302 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:18:12.303 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:18:12.303 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:18:12.303 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:18:12.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:18:12.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:18:12.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:18:12.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:18:12.671 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:18:12.671 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:18:12.671 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:18:12.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:18:12.678 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:18:12.679 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:18:12.679 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:18:12.679 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:18:12.679 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:18:12.679 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:18:12.679 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:18:12.679 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:18:12.680 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:18:12.680 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:18:12.680 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:18:12.680 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:18:12.680 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:18:12.680 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=295 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:18:12.680 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=295 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:18:12.680 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=295 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:18:12.680 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=295 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:18:12.680 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=295 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:18:12.681 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=295 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:18:12.681 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=295 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:18:12.681 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=295 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:18:17.678 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:18:17.678 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:18:17.679 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:18:17.680 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:18:17.680 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:18:17.681 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:18:17.690 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:18:17.691 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:18:17.691 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:18:17.691 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:18:17.691 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:18:17.694 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:18:17.695 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:18:17.695 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:18:17.695 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:18:17.695 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:18:17.695 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:18:17.696 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:18:17.696 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:18:17.698 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:18:17.698 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:18:17.698 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:18:17.698 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:18:17.698 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:18:17.698 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:18:17.698 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:18:17.698 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:18:17.701 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:18:17.701 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:18:17.701 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:18:17.701 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:18:17.701 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:18:17.701 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:18:17.701 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:18:17.701 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:18:17.704 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:18:17.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:18:17.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:18:17.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:18:17.705 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:18:17.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:18:17.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:18:17.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:18:17.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:17.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:18:17.705 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:18:17.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:17.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:17.705 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:18:17.705 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:18:17.705 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:18:17.705 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:18:17.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:17.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:17.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:17.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:18:17.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:17.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:17.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:17.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:17.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:17.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:17.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:17.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:17.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:17.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:17.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:17.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:17.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:17.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:17.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:17.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:17.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:17.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:17.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:17.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:17.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:17.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:17.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:17.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:17.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:17.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:17.710 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:18:18.194 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:18:18.224 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:18:18.225 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:18:18.226 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:18:18.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:18:18.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:18:18.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:18:18.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:18:18.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:18:18.284 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:18:18.285 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:18:18.286 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:18:18.286 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:18:18.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:18:18.340 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:18:18.340 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:18:18.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:18:18.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:18:18.672 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:18:18.709 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:18:18.709 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:18:18.709 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:18:18.709 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:18:19.151 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:18:19.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:18:19.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:18:19.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:18:19.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:18:19.210 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:18:19.221 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:18:19.221 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:18:19.221 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:18:19.221 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:18:19.223 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:18:19.224 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:18:19.224 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:18:19.224 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:18:19.224 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:18:19.224 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:18:19.224 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:18:19.224 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=323 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:18:19.224 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=323 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:18:19.224 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=323 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:18:19.224 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=323 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:18:24.228 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:18:24.228 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:18:24.228 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:18:24.229 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:18:24.229 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:18:24.230 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:18:24.239 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:18:24.240 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:18:24.240 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:18:24.241 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:18:24.241 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:18:24.249 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:18:24.250 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:18:24.250 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:18:24.250 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:18:24.250 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:18:24.251 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:18:24.251 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:18:24.251 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:18:24.253 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:18:24.253 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:18:24.254 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:18:24.254 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:18:24.254 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:18:24.254 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:18:24.254 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:18:24.254 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:18:24.257 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:18:24.257 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:18:24.257 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:18:24.257 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:18:24.257 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:18:24.257 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:18:24.257 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:18:24.257 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:18:24.261 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:18:24.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:18:24.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:18:24.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:18:24.262 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:18:24.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:18:24.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:18:24.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:18:24.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:24.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:18:24.262 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:18:24.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:24.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:24.262 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:18:24.262 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:18:24.262 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:18:24.262 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:18:24.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:24.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:24.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:24.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:18:24.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:24.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:24.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:24.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:24.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:24.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:24.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:24.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:24.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:24.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:24.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:24.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:24.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:24.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:24.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:24.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:24.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:24.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:24.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:24.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:24.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:24.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:24.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:24.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:24.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:24.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:24.267 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:18:24.752 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:18:24.779 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:18:24.780 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:18:24.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:18:24.781 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:18:24.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:18:24.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:18:24.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:18:24.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:18:24.837 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:18:24.838 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:18:24.838 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:18:24.838 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:18:24.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:18:24.854 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:18:24.855 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:18:24.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:18:24.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:18:25.233 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:18:25.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:18:25.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:18:25.267 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:18:25.267 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:18:25.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:18:25.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:18:25.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:18:25.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:18:25.580 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:18:25.580 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:18:25.581 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:18:25.581 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:18:25.586 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:18:25.586 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:18:25.586 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:18:25.586 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:18:25.586 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:18:25.586 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:18:25.586 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:18:25.587 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=282 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:18:25.587 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=282 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:18:30.585 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:18:30.585 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:18:30.586 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:18:30.587 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:18:30.587 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:18:30.588 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:18:30.596 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:18:30.597 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:18:30.597 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:18:30.598 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:18:30.598 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:18:30.600 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:18:30.600 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:18:30.601 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:18:30.601 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:18:30.601 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:18:30.601 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:18:30.601 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:18:30.601 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:18:30.603 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:18:30.603 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:18:30.603 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:18:30.603 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:18:30.604 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:18:30.604 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:18:30.604 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:18:30.604 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:18:30.606 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:18:30.606 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:18:30.606 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:18:30.606 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:18:30.606 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:18:30.606 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:18:30.606 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:18:30.606 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:18:30.609 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:18:30.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:18:30.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:18:30.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:18:30.610 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:18:30.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:18:30.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:18:30.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:18:30.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:30.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:18:30.610 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:18:30.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:30.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:30.610 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:18:30.610 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:18:30.610 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:18:30.610 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:18:30.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:30.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:30.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:30.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:18:30.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:30.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:30.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:30.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:30.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:30.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:30.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:30.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:30.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:30.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:30.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:30.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:30.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:30.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:30.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:30.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:30.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:30.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:30.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:30.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:30.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:30.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:30.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:30.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:30.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:30.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:30.615 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:18:31.099 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:18:31.130 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:18:31.131 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:18:31.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:18:31.133 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:18:31.151 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:18:31.151 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:18:31.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:18:31.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:18:31.183 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:18:31.183 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:18:31.183 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:18:31.183 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:18:31.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:18:31.198 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:18:31.198 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:18:31.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:18:31.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:18:31.572 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:18:31.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:18:31.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:18:31.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:18:31.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:18:32.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:18:32.050 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:18:32.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:18:32.058 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:18:32.058 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:18:32.058 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:18:32.069 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:18:32.069 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:18:32.069 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:18:32.069 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:18:32.070 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:18:32.070 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:18:32.070 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:18:32.070 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:18:32.070 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:18:32.070 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:18:32.070 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:18:37.074 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:18:37.074 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:18:37.075 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:18:37.075 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:18:37.076 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:18:37.077 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:18:37.086 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:18:37.086 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:18:37.086 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:18:37.086 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:18:37.086 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:18:37.089 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:18:37.089 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:18:37.089 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:18:37.090 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:18:37.090 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:18:37.090 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:18:37.090 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:18:37.091 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:18:37.093 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:18:37.093 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:18:37.093 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:18:37.093 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:18:37.094 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:18:37.094 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:18:37.094 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:18:37.094 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:18:37.097 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:18:37.097 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:18:37.097 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:18:37.097 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:18:37.097 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:18:37.097 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:18:37.097 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:18:37.097 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:18:37.102 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:18:37.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:18:37.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:18:37.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:18:37.102 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:18:37.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:18:37.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:18:37.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:18:37.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:37.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:18:37.103 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:18:37.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:37.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:37.103 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:18:37.103 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:18:37.103 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:18:37.103 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:18:37.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:37.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:37.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:37.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:18:37.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:37.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:37.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:37.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:37.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:37.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:37.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:37.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:37.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:37.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:37.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:37.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:37.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:37.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:37.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:37.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:37.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:37.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:37.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:37.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:37.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:37.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:37.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:37.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:37.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:37.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:37.108 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:18:37.589 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:18:37.629 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:18:37.633 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:18:37.635 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:18:37.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:18:37.654 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:18:37.654 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:18:37.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:18:37.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:18:37.657 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:18:37.657 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:18:37.658 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:18:37.658 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:18:38.067 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:18:38.107 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:18:38.107 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:18:38.107 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:18:38.108 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:18:38.545 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:18:38.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:18:38.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:18:38.820 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:18:38.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:18:38.838 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:18:38.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:18:38.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:18:38.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:18:38.839 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:18:38.839 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:18:38.839 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:18:38.839 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:18:39.023 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:18:39.107 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:18:39.108 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:18:39.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:18:39.108 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:18:39.501 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:18:39.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD NOHANDOVER
2025-12-15 05:18:39.979 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:18:40.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD NOHANDOVER
2025-12-15 05:18:40.019 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:18:40.019 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:18:40.029 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:18:40.030 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:18:40.030 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:18:40.030 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:18:40.033 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:18:40.033 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:18:40.033 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:18:40.033 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:18:40.033 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:18:40.033 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:18:40.033 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:18:45.036 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:18:45.036 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:18:45.038 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:18:45.039 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:18:45.039 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:18:45.040 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:18:45.049 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:18:45.050 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:18:45.050 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:18:45.050 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:18:45.050 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:18:45.053 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:18:45.053 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:18:45.054 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:18:45.054 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:18:45.054 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:18:45.054 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:18:45.055 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:18:45.055 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:18:45.058 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:18:45.058 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:18:45.059 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:18:45.059 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:18:45.059 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:18:45.059 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:18:45.059 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:18:45.059 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:18:45.061 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:18:45.062 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:18:45.062 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:18:45.062 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:18:45.062 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:18:45.062 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:18:45.062 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:18:45.062 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:18:45.065 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:18:45.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:18:45.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:18:45.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:18:45.066 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:18:45.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:18:45.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:18:45.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:18:45.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:45.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:18:45.066 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:18:45.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:45.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:45.066 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:18:45.066 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:18:45.066 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:18:45.066 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:18:45.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:45.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:45.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:45.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:18:45.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:45.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:45.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:45.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:45.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:45.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:45.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:45.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:45.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:45.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:45.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:45.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:45.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:45.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:45.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:45.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:45.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:45.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:45.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:45.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:45.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:45.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:45.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:45.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:45.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:45.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:45.071 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:18:45.555 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:18:45.585 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:18:45.587 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:18:45.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:18:45.588 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:18:45.610 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:18:45.610 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:18:45.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:18:46.033 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:18:46.069 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:18:46.069 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:18:46.070 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:18:46.070 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:18:46.512 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:18:46.991 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:18:47.070 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:18:47.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:18:47.071 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:18:47.071 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:18:47.468 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:18:47.947 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:18:48.072 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:18:48.072 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:18:48.072 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:18:48.072 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:18:48.426 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:18:48.905 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:18:49.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:18:49.074 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:18:49.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:18:49.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:18:49.383 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:18:49.862 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:18:50.075 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:18:50.076 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:18:50.076 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:18:50.076 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:18:50.341 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:18:50.819 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:18:51.298 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:18:51.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:18:51.621 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:18:51.622 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:18:51.622 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:18:51.622 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:18:51.776 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:18:51.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD NOHANDOVER
2025-12-15 05:18:51.802 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:18:51.803 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:18:51.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:18:51.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:18:52.255 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:18:52.733 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:18:53.212 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:18:53.688 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:18:54.165 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:18:54.644 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:18:54.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:18:54.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:18:54.771 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:18:54.772 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:18:54.772 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:18:54.772 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:18:54.773 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:18:54.773 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:18:54.773 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:18:54.773 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:18:54.773 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:18:54.773 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:18:54.773 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:18:59.778 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:18:59.778 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:18:59.781 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:18:59.781 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:18:59.782 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:18:59.783 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:18:59.791 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:18:59.792 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:18:59.793 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:18:59.793 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:18:59.793 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:18:59.797 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:18:59.797 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:18:59.797 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:18:59.797 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:18:59.798 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:18:59.798 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:18:59.798 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:18:59.798 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:18:59.802 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:18:59.802 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:18:59.802 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:18:59.802 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:18:59.802 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:18:59.802 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:18:59.802 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:18:59.802 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:18:59.806 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:18:59.806 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:18:59.806 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:18:59.806 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:18:59.807 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:18:59.807 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:18:59.807 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:18:59.807 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:18:59.812 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:18:59.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:18:59.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:18:59.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:18:59.812 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:18:59.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:18:59.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:18:59.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:18:59.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:59.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:18:59.813 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:18:59.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:59.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:59.813 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:18:59.813 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:18:59.813 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:18:59.813 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:18:59.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:59.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:59.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:59.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:18:59.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:59.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:59.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:59.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:59.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:59.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:59.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:59.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:59.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:59.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:59.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:59.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:59.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:59.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:59.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:59.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:59.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:18:59.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:59.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:59.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:59.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:59.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:59.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:18:59.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:18:59.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:59.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:18:59.818 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:19:00.299 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:19:00.339 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:19:00.340 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:19:00.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:19:00.341 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:19:00.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:19:00.359 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:19:00.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:19:00.777 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:19:00.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:19:00.818 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:19:00.818 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:19:00.818 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:19:01.248 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:19:01.726 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:19:01.819 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:19:01.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:19:01.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:19:01.820 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:19:02.205 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:19:02.678 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:19:02.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:19:02.821 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:19:02.821 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:19:02.822 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:19:03.153 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:19:03.628 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:19:03.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:19:03.823 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:19:03.823 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:19:03.823 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:19:04.104 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:19:04.580 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:19:04.825 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:19:04.825 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:19:04.825 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:19:04.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:19:05.054 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:19:05.527 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:19:06.004 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:19:06.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:19:06.365 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:19:06.365 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:19:06.365 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:19:06.365 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:19:06.481 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:19:06.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD NOHANDOVER
2025-12-15 05:19:06.507 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:19:06.507 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:19:06.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:19:06.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:19:06.954 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:19:07.429 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:19:07.902 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:19:08.376 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:19:08.847 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:19:09.316 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:19:09.468 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:19:09.468 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:19:09.469 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:19:09.469 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:19:09.469 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:19:09.469 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:19:09.470 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:19:09.471 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:19:09.471 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:19:09.471 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:19:09.471 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:19:09.471 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:19:09.471 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:19:09.471 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2076 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:19:09.471 [WARNING] transceiver.py:250 (TRX1@172.18.144.20:5700/1) RX TRXD message (ver=1 fn=2076 tn=0 bl=148 pwr=8), but transceiver is not running => dropping...
2025-12-15 05:19:09.471 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2076 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:19:09.471 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2076 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:19:09.471 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2076 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:19:09.471 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2076 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:19:09.471 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2076 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:19:09.471 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2076 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:19:09.471 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2076 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:19:14.475 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:19:14.475 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:19:14.476 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:19:14.477 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:19:14.477 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:19:14.478 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:19:14.486 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:19:14.487 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:19:14.487 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:19:14.488 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:19:14.488 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:19:14.490 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:19:14.491 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:19:14.491 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:19:14.491 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:19:14.491 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:19:14.491 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:19:14.492 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:19:14.492 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:19:14.493 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:19:14.494 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:19:14.494 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:19:14.494 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:19:14.494 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:19:14.494 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:19:14.494 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:19:14.494 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:19:14.496 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:19:14.496 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:19:14.496 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:19:14.496 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:19:14.496 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:19:14.496 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:19:14.497 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:19:14.497 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:19:14.500 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:19:14.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:19:14.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:19:14.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:19:14.500 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:19:14.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:19:14.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:19:14.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:19:14.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:19:14.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:19:14.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:19:14.500 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:19:14.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:19:14.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:19:14.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:19:14.500 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:19:14.500 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:19:14.500 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:19:14.500 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:19:14.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:19:14.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:19:14.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:19:14.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:19:14.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:19:14.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:19:14.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:19:14.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:19:14.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:19:14.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:19:14.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:19:14.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:19:14.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:19:14.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:19:14.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:19:14.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:19:14.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:19:14.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:19:14.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:19:14.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:19:14.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:19:14.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:19:14.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:19:14.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:19:14.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:19:14.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:19:14.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:19:14.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:19:14.505 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:19:14.983 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:19:15.023 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:19:15.024 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:19:15.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:19:15.026 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:19:15.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:19:15.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:19:15.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:19:15.456 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:19:15.503 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:19:15.504 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:19:15.504 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:19:15.504 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:19:15.930 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:19:16.406 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:19:16.505 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:19:16.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:19:16.505 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:19:16.505 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:19:16.881 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:19:17.355 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:19:17.506 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:19:17.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:19:17.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:19:17.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:19:17.830 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:19:18.306 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:19:18.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:19:18.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:19:18.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:19:18.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:19:18.781 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:19:19.255 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:19:19.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:19:19.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:19:19.508 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:19:19.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:19:19.730 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:19:20.205 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:19:20.677 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:19:21.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:19:21.046 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:19:21.046 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:19:21.047 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:19:21.047 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:19:21.152 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:19:21.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD NOHANDOVER
2025-12-15 05:19:21.171 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:19:21.171 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:19:21.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:19:21.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:19:21.625 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:19:22.102 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:19:22.581 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:19:23.060 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:19:23.537 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:19:24.006 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:19:24.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:19:24.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:19:24.139 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:19:24.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:19:24.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:19:24.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:19:24.140 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:19:24.140 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:19:24.140 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:19:24.140 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:19:24.140 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:19:24.140 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:19:24.140 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:19:29.145 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:19:29.145 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:19:29.146 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:19:29.146 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:19:29.147 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:19:29.148 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:19:29.157 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:19:29.159 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:19:29.159 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:19:29.159 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:19:29.159 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:19:29.164 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:19:29.164 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:19:29.164 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:19:29.165 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:19:29.165 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:19:29.165 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:19:29.165 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:19:29.165 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:19:29.168 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:19:29.168 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:19:29.168 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:19:29.168 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:19:29.169 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:19:29.169 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:19:29.169 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:19:29.169 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:19:29.172 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:19:29.172 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:19:29.172 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:19:29.172 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:19:29.172 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:19:29.172 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:19:29.173 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:19:29.173 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:19:29.177 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:19:29.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:19:29.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:19:29.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:19:29.177 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:19:29.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:19:29.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:19:29.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:19:29.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:19:29.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:19:29.178 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:19:29.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:19:29.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:19:29.178 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:19:29.178 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:19:29.178 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:19:29.178 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:19:29.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:19:29.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:19:29.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:19:29.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:19:29.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:19:29.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:19:29.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:19:29.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:19:29.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:19:29.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:19:29.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:19:29.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:19:29.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:19:29.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:19:29.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:19:29.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:19:29.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:19:29.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:19:29.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:19:29.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:19:29.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:19:29.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:19:29.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:19:29.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:19:29.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:19:29.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:19:29.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:19:29.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:19:29.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:19:29.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:19:29.183 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:19:29.667 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:19:29.701 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:19:29.703 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:19:29.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:19:29.704 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:19:29.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:19:29.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:19:29.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:19:30.146 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:19:30.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:19:30.182 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:19:30.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:19:30.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:19:30.625 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:19:31.103 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:19:31.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:19:31.183 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:19:31.183 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:19:31.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:19:31.581 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:19:32.061 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:19:32.184 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:19:32.184 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:19:32.184 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:19:32.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:19:32.540 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:19:33.019 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:19:33.184 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:19:33.185 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:19:33.185 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:19:33.185 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:19:33.497 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:19:33.976 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:19:34.186 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:19:34.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:19:34.186 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:19:34.186 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:19:34.454 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:19:34.932 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:19:35.411 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:19:35.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:19:35.737 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:19:35.737 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:19:35.737 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:19:35.737 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:19:35.889 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:19:35.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD NOHANDOVER
2025-12-15 05:19:35.919 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:19:35.920 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:19:35.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:19:35.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:19:36.368 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:19:36.847 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:19:37.325 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:19:37.802 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:19:38.300 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:19:38.778 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:19:38.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:19:38.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:19:38.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:19:38.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:19:38.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:19:38.888 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:19:38.888 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:19:38.888 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:19:38.889 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:19:38.889 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:19:38.889 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:19:38.889 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:19:38.889 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:19:43.894 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:19:43.894 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:19:43.895 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:19:43.896 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:19:43.896 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:19:43.897 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:19:43.904 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:19:43.905 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:19:43.905 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:19:43.905 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:19:43.905 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:19:43.908 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:19:43.908 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:19:43.908 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:19:43.908 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:19:43.908 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:19:43.909 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:19:43.909 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:19:43.909 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:19:43.911 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:19:43.911 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:19:43.911 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:19:43.911 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:19:43.911 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:19:43.911 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:19:43.911 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:19:43.911 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:19:43.913 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:19:43.914 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:19:43.914 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:19:43.914 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:19:43.914 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:19:43.914 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:19:43.914 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:19:43.914 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:19:43.917 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:19:43.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:19:43.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:19:43.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:19:43.917 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:19:43.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:19:43.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:19:43.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:19:43.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:19:43.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:19:43.918 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:19:43.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:19:43.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:19:43.918 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:19:43.918 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:19:43.918 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:19:43.918 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:19:43.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:19:43.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:19:43.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:19:43.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:19:43.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:19:43.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:19:43.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:19:43.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:19:43.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:19:43.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:19:43.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:19:43.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:19:43.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:19:43.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:19:43.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:19:43.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:19:43.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:19:43.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:19:43.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:19:43.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:19:43.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:19:43.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:19:43.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:19:43.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:19:43.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:19:43.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:19:43.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:19:43.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:19:43.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:19:43.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:19:43.923 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:19:44.407 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:19:44.439 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:19:44.440 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:19:44.441 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:19:44.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:19:44.454 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:19:44.454 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:19:44.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:19:44.883 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:19:44.921 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:19:44.921 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:19:44.922 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:19:44.922 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:19:45.361 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:19:45.840 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:19:45.923 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:19:45.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:19:45.924 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:19:45.924 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:19:46.319 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:19:46.797 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:19:46.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:19:46.924 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:19:46.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:19:46.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:19:47.276 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:19:47.755 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:19:47.926 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:19:47.926 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:19:47.926 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:19:47.926 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:19:48.234 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:19:48.712 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:19:48.928 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:19:48.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:19:48.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:19:48.928 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:19:49.191 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:19:49.669 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:19:50.148 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:19:50.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:19:50.464 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:19:50.464 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:19:50.465 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:19:50.465 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:19:50.626 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:19:50.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD NOHANDOVER
2025-12-15 05:19:50.652 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:19:50.652 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:19:50.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:19:50.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:19:51.104 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:19:51.583 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:19:52.055 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:19:52.532 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:19:53.011 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:19:53.487 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:19:53.616 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:19:53.616 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:19:53.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:19:53.619 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:19:53.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:19:53.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:19:53.620 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:19:53.620 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:19:53.620 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:19:53.620 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:19:53.620 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:19:53.621 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:19:53.621 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:19:58.626 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:19:58.626 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:19:58.627 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:19:58.627 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:19:58.628 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:19:58.628 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:19:58.637 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:19:58.639 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:19:58.639 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:19:58.640 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:19:58.640 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:19:58.646 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:19:58.646 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:19:58.647 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:19:58.647 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:19:58.647 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:19:58.647 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:19:58.648 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:19:58.648 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:19:58.650 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:19:58.650 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:19:58.651 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:19:58.651 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:19:58.651 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:19:58.651 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:19:58.651 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:19:58.651 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:19:58.654 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:19:58.654 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:19:58.654 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:19:58.654 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:19:58.654 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:19:58.655 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:19:58.655 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:19:58.655 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:19:58.659 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:19:58.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:19:58.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:19:58.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:19:58.659 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:19:58.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:19:58.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:19:58.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:19:58.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:19:58.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:19:58.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:19:58.660 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:19:58.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:19:58.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:19:58.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:19:58.660 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:19:58.660 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:19:58.660 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:19:58.660 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:19:58.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:19:58.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:19:58.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:19:58.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:19:58.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:19:58.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:19:58.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:19:58.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:19:58.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:19:58.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:19:58.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:19:58.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:19:58.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:19:58.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:19:58.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:19:58.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:19:58.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:19:58.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:19:58.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:19:58.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:19:58.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:19:58.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:19:58.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:19:58.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:19:58.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:19:58.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:19:58.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:19:58.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:19:58.665 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:19:59.148 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:19:59.186 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:19:59.188 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:19:59.190 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:19:59.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:19:59.626 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:19:59.665 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:19:59.666 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:19:59.666 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:19:59.666 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:20:00.104 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:20:00.583 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:20:00.667 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:20:00.668 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:20:00.668 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:20:00.668 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:20:01.062 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:20:01.540 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:20:01.669 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:20:01.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:20:01.669 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:20:01.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:20:02.012 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:20:02.481 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:20:02.670 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:20:02.670 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:20:02.670 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:20:02.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:20:02.949 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:20:03.417 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:20:03.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:20:03.670 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:20:03.670 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:20:03.671 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:20:03.885 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:20:04.358 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:20:04.837 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:20:05.316 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:20:05.793 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:20:06.262 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:20:06.739 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:20:07.218 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:20:07.696 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:20:08.176 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:20:08.653 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:20:09.132 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:20:09.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:20:09.207 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:20:09.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:20:09.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:20:09.208 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:20:09.208 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:20:09.208 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:20:09.208 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:20:09.209 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2262 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:20:09.209 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:20:09.209 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:20:09.209 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:20:09.209 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2262 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:20:09.209 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2262 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:20:09.209 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2262 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:20:09.209 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2262 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:20:14.212 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:20:14.212 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:20:14.213 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:20:14.213 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:20:14.214 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:20:14.214 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:20:14.224 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:20:14.226 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:20:14.226 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:20:14.227 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:20:14.227 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:20:14.232 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:20:14.233 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:20:14.233 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:20:14.233 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:20:14.234 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:20:14.234 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:20:14.235 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:20:14.235 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:20:14.238 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:20:14.238 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:20:14.238 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:20:14.239 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:20:14.239 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:20:14.239 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:20:14.239 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:20:14.239 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:20:14.243 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:20:14.243 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:20:14.243 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:20:14.243 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:20:14.243 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:20:14.243 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:20:14.244 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:20:14.244 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:20:14.248 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:20:14.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:20:14.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:20:14.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:20:14.248 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:20:14.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:20:14.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:20:14.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:20:14.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:20:14.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:14.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:14.249 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:20:14.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:14.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:14.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:14.249 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:20:14.249 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:20:14.249 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:20:14.249 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:20:14.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:14.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:14.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:14.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:20:14.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:14.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:14.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:14.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:14.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:14.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:14.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:14.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:14.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:14.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:14.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:14.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:14.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:14.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:14.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:14.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:14.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:14.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:14.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:14.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:14.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:14.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:14.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:14.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:14.251 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:20:14.251 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:20:14.251 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:20:14.251 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:20:14.251 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:20:14.251 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:20:14.251 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:20:19.257 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:20:19.257 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:20:19.258 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:20:19.259 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:20:19.259 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:20:19.260 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:20:19.269 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:20:19.271 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:20:19.271 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:20:19.271 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:20:19.271 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:20:19.275 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:20:19.275 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:20:19.276 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:20:19.276 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:20:19.276 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:20:19.276 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:20:19.277 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:20:19.277 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:20:19.279 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:20:19.279 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:20:19.279 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:20:19.279 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:20:19.280 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:20:19.280 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:20:19.280 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:20:19.280 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:20:19.282 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:20:19.282 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:20:19.282 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:20:19.282 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:20:19.283 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:20:19.283 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:20:19.283 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:20:19.283 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:20:19.286 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:20:19.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:20:19.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:20:19.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:20:19.287 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:20:19.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:20:19.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:20:19.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:20:19.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:19.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:20:19.287 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:20:19.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:19.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:19.288 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:20:19.288 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:20:19.288 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:20:19.288 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:20:19.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:19.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:19.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:19.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:20:19.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:19.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:19.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:19.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:19.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:19.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:19.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:19.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:19.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:19.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:19.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:19.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:19.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:19.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:19.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:19.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:19.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:19.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:19.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:19.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:19.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:19.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:19.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:19.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:19.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:19.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:19.292 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:20:19.777 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:20:19.808 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:20:19.810 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:20:19.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:20:19.811 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:20:19.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:20:19.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:20:19.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:20:19.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:20:19.815 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:20:19.816 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:20:19.816 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:20:19.816 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:20:20.255 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:20:20.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:20:20.292 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:20:20.292 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:20:20.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:20:20.733 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:20:21.211 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:20:21.310 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:20:21.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:20:21.310 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:20:21.310 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:20:21.689 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:20:22.167 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:20:22.312 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:20:22.312 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:20:22.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:20:22.312 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:20:22.645 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:20:23.123 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:20:23.313 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:20:23.313 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:20:23.313 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:20:23.314 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:20:23.600 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:20:24.079 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:20:24.315 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:20:24.315 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:20:24.315 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:20:24.315 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:20:24.557 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:20:25.035 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:20:25.513 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:20:25.991 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:20:26.469 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:20:26.947 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:20:27.425 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:20:27.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:20:27.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:20:27.832 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:20:27.833 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:20:27.833 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:20:27.833 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:20:27.835 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:20:27.835 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:20:27.835 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:20:27.835 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:20:27.835 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:20:27.835 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:20:27.835 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:20:27.835 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1824 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:20:32.839 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:20:32.839 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:20:32.843 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:20:32.847 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:20:32.850 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:20:32.853 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:20:32.865 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:20:32.866 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:20:32.866 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:20:32.866 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:20:32.866 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:20:32.869 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:20:32.869 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:20:32.869 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:20:32.869 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:20:32.869 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:20:32.869 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:20:32.869 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:20:32.869 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:20:32.872 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:20:32.872 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:20:32.872 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:20:32.872 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:20:32.872 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:20:32.872 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:20:32.872 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:20:32.872 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:20:32.874 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:20:32.874 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:20:32.875 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:20:32.875 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:20:32.875 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:20:32.875 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:20:32.875 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:20:32.875 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:20:32.878 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:20:32.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:20:32.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:20:32.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:20:32.878 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:20:32.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:20:32.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:20:32.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:20:32.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:32.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:20:32.879 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:20:32.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:32.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:32.879 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:20:32.879 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:20:32.879 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:20:32.879 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:20:32.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:32.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:32.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:32.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:20:32.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:32.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:32.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:32.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:32.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:32.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:32.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:32.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:32.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:32.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:32.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:32.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:32.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:32.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:32.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:32.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:32.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:32.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:32.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:32.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:32.881 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:20:32.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:32.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:32.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:32.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:32.881 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:20:32.881 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:20:32.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:32.881 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:20:32.881 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:20:32.881 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:20:32.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:37.887 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:20:37.887 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:20:37.889 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:20:37.889 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:20:37.890 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:20:37.891 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:20:37.900 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:20:37.901 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:20:37.901 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:20:37.902 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:20:37.902 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:20:37.908 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:20:37.908 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:20:37.909 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:20:37.909 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:20:37.909 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:20:37.909 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:20:37.909 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:20:37.909 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:20:37.914 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:20:37.914 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:20:37.914 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:20:37.914 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:20:37.914 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:20:37.914 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:20:37.915 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:20:37.915 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:20:37.918 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:20:37.918 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:20:37.919 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:20:37.919 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:20:37.919 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:20:37.919 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:20:37.919 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:20:37.919 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:20:37.924 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:20:37.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:20:37.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:20:37.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:20:37.924 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:20:37.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:20:37.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:20:37.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:20:37.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:37.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:20:37.925 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:20:37.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:37.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:37.925 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:20:37.925 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:20:37.925 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:20:37.925 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:20:37.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:37.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:37.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:37.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:20:37.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:37.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:37.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:37.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:37.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:37.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:37.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:37.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:37.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:37.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:37.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:37.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:37.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:37.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:37.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:37.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:37.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:37.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:37.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:37.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:37.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:37.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:37.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:37.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:37.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:37.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:37.930 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:20:38.414 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:20:38.443 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:20:38.444 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:20:38.445 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:20:38.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:20:38.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:20:38.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:20:38.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:20:38.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:20:38.446 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:20:38.446 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:20:38.446 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:20:38.446 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:20:38.892 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:20:38.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:20:38.929 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:20:38.930 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:20:38.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:20:39.369 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:20:39.846 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:20:39.930 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:20:39.931 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:20:39.931 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:20:39.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:20:40.324 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:20:40.802 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:20:40.931 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:20:40.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:20:40.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:20:40.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:20:41.280 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:20:41.758 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:20:41.933 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:20:41.933 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:20:41.933 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:20:41.933 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:20:42.235 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:20:42.713 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:20:42.934 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:20:42.934 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:20:42.934 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:20:42.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:20:43.190 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:20:43.668 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:20:44.146 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:20:44.624 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:20:45.102 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:20:45.580 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:20:46.058 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:20:46.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:20:46.463 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:20:46.466 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:20:46.466 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:20:46.466 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:20:46.466 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:20:46.467 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:20:46.467 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:20:46.467 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:20:46.467 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:20:46.467 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:20:46.467 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:20:46.467 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:20:46.467 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1824 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:20:51.472 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:20:51.472 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:20:51.474 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:20:51.475 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:20:51.476 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:20:51.476 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:20:51.493 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:20:51.494 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:20:51.494 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:20:51.494 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:20:51.494 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:20:51.498 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:20:51.498 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:20:51.498 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:20:51.499 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:20:51.499 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:20:51.499 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:20:51.499 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:20:51.499 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:20:51.503 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:20:51.504 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:20:51.504 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:20:51.504 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:20:51.504 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:20:51.504 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:20:51.504 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:20:51.504 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:20:51.508 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:20:51.508 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:20:51.508 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:20:51.508 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:20:51.508 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:20:51.508 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:20:51.508 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:20:51.508 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:20:51.513 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:20:51.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:20:51.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:20:51.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:20:51.513 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:20:51.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:20:51.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:20:51.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:20:51.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:51.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:20:51.514 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:20:51.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:51.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:51.514 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:20:51.514 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:20:51.514 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:20:51.514 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:20:51.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:51.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:51.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:51.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:20:51.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:51.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:51.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:51.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:51.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:51.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:51.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:51.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:51.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:51.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:51.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:51.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:51.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:51.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:51.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:51.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:51.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:51.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:51.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:51.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:51.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:51.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:51.516 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:20:51.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:51.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:51.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:51.516 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:20:51.516 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:20:51.516 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:20:51.516 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:20:51.516 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:20:51.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:56.522 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:20:56.522 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:20:56.523 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:20:56.523 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:20:56.524 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:20:56.525 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:20:56.533 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:20:56.534 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:20:56.534 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:20:56.534 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:20:56.534 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:20:56.537 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:20:56.537 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:20:56.537 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:20:56.537 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:20:56.538 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:20:56.538 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:20:56.538 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:20:56.538 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:20:56.540 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:20:56.540 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:20:56.540 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:20:56.540 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:20:56.540 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:20:56.540 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:20:56.540 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:20:56.540 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:20:56.543 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:20:56.543 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:20:56.543 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:20:56.543 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:20:56.543 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:20:56.543 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:20:56.543 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:20:56.543 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:20:56.546 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:20:56.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:20:56.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:20:56.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:20:56.546 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:20:56.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:20:56.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:20:56.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:20:56.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:20:56.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:56.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:56.547 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:20:56.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:56.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:56.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:56.547 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:20:56.547 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:20:56.547 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:20:56.547 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:20:56.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:56.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:56.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:56.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:20:56.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:56.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:56.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:56.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:56.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:56.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:56.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:56.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:56.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:56.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:56.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:56.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:56.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:56.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:56.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:56.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:20:56.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:56.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:56.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:56.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:56.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:20:56.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:20:56.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:56.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:20:56.551 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:20:57.036 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:20:57.065 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:20:57.066 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:20:57.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:20:57.067 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:20:57.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:20:57.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:20:57.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:20:57.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:20:57.070 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:20:57.070 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:20:57.070 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:20:57.070 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:20:57.514 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:20:57.555 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:20:57.555 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:20:57.556 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:20:57.556 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:20:57.991 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:20:58.469 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:20:58.557 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:20:58.557 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:20:58.557 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:20:58.557 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:20:58.947 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:20:59.425 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:20:59.558 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:20:59.559 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:20:59.559 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:20:59.559 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:20:59.903 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:21:00.381 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:21:00.560 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:21:00.560 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:21:00.560 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:21:00.560 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:21:00.859 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:21:01.337 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:21:01.562 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:21:01.562 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:21:01.562 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:21:01.562 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:21:01.815 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:21:02.293 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:21:02.771 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:21:03.249 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:21:03.727 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:21:04.205 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:21:04.683 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:21:05.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:21:05.084 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:21:05.091 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:21:05.091 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:21:05.091 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:21:05.091 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:21:05.096 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:21:05.096 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:21:05.097 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:21:05.097 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:21:05.097 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:21:05.097 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:21:05.097 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:21:05.097 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1825 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:21:05.098 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1825 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:21:05.098 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1825 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:21:05.098 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1825 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:21:05.098 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1825 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:21:05.098 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1825 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:21:10.094 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:21:10.095 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:21:10.098 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:21:10.098 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:21:10.098 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:21:10.099 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:21:10.117 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:21:10.119 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:21:10.119 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:21:10.119 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:21:10.119 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:21:10.125 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:21:10.125 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:21:10.126 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:21:10.126 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:21:10.126 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:21:10.127 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:21:10.127 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:21:10.127 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:21:10.131 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:21:10.132 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:21:10.132 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:21:10.132 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:21:10.132 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:21:10.132 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:21:10.133 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:21:10.133 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:21:10.137 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:21:10.137 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:21:10.137 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:21:10.138 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:21:10.138 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:21:10.138 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:21:10.138 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:21:10.138 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:21:10.145 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:21:10.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:21:10.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:21:10.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:21:10.145 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:21:10.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:21:10.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:21:10.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:21:10.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:10.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:21:10.146 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:21:10.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:10.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:10.146 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:21:10.146 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:21:10.146 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:21:10.146 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:21:10.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:10.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:10.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:10.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:21:10.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:10.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:10.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:10.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:10.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:10.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:10.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:10.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:10.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:10.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:10.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:10.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:10.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:10.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:10.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:10.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:10.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:10.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:10.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:10.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:10.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:10.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:10.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:10.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:10.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:10.149 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:21:10.149 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:21:10.150 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:21:10.150 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:21:10.150 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:21:10.150 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:21:10.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:15.156 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:21:15.156 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:21:15.156 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:21:15.157 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:21:15.157 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:21:15.158 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:21:15.168 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:21:15.170 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:21:15.170 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:21:15.171 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:21:15.171 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:21:15.176 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:21:15.176 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:21:15.177 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:21:15.177 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:21:15.177 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:21:15.178 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:21:15.178 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:21:15.178 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:21:15.181 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:21:15.181 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:21:15.182 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:21:15.182 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:21:15.182 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:21:15.182 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:21:15.182 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:21:15.182 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:21:15.187 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:21:15.187 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:21:15.187 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:21:15.187 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:21:15.187 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:21:15.187 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:21:15.187 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:21:15.187 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:21:15.191 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:21:15.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:21:15.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:21:15.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:21:15.191 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:21:15.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:21:15.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:21:15.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:21:15.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:15.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:21:15.192 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:21:15.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:15.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:15.192 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:21:15.192 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:21:15.192 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:21:15.192 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:21:15.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:15.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:15.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:15.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:21:15.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:15.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:15.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:15.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:15.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:15.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:15.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:15.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:15.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:15.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:15.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:15.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:15.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:15.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:15.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:15.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:15.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:15.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:15.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:15.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:15.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:15.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:15.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:15.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:15.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:15.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:15.197 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:21:15.680 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:21:15.710 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:21:15.712 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:21:15.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:21:15.713 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:21:15.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:21:15.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:21:15.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:21:15.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:21:15.716 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:21:15.716 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:21:15.716 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:21:15.716 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:21:16.157 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:21:16.195 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:21:16.195 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:21:16.196 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:21:16.196 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:21:16.636 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:21:17.114 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:21:17.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:21:17.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:21:17.196 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:21:17.197 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:21:17.592 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:21:18.070 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:21:18.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:21:18.197 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:21:18.197 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:21:18.197 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:21:18.548 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:21:19.025 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:21:19.197 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:21:19.198 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:21:19.198 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:21:19.198 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:21:19.503 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:21:19.981 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:21:20.198 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:21:20.199 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:21:20.199 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:21:20.199 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:21:20.459 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:21:20.937 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:21:21.415 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:21:21.893 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:21:22.371 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:21:22.850 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:21:23.328 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:21:23.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:21:23.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:21:23.732 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:21:23.733 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:21:23.733 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:21:23.733 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:21:23.733 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:21:23.734 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:21:23.734 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:21:23.734 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:21:23.734 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:21:23.734 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:21:23.734 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:21:28.758 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:21:28.759 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:21:28.761 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:21:28.761 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:21:28.762 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:21:28.763 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:21:28.772 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:21:28.774 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:21:28.774 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:21:28.774 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:21:28.774 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:21:28.780 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:21:28.780 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:21:28.780 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:21:28.780 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:21:28.780 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:21:28.781 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:21:28.781 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:21:28.781 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:21:28.785 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:21:28.785 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:21:28.785 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:21:28.785 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:21:28.786 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:21:28.786 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:21:28.786 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:21:28.786 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:21:28.790 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:21:28.790 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:21:28.790 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:21:28.790 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:21:28.790 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:21:28.790 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:21:28.791 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:21:28.791 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:21:28.796 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:21:28.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:21:28.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:21:28.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:21:28.796 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:21:28.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:21:28.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:21:28.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:21:28.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:28.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:21:28.797 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:21:28.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:28.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:28.797 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:21:28.797 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:21:28.797 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:21:28.797 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:21:28.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:28.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:28.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:28.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:21:28.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:28.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:28.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:28.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:28.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:28.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:28.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:28.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:28.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:28.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:28.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:28.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:28.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:28.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:28.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:28.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:28.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:28.800 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:21:28.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:28.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:28.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:28.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:28.800 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:21:28.800 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:21:28.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:28.800 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:21:28.800 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:21:28.800 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:21:28.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:33.826 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:21:33.826 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:21:33.828 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:21:33.829 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:21:33.830 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:21:33.830 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:21:33.840 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:21:33.842 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:21:33.842 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:21:33.842 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:21:33.842 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:21:33.845 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:21:33.845 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:21:33.846 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:21:33.846 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:21:33.846 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:21:33.846 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:21:33.846 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:21:33.846 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:21:33.849 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:21:33.849 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:21:33.850 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:21:33.850 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:21:33.850 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:21:33.850 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:21:33.850 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:21:33.850 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:21:33.853 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:21:33.853 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:21:33.853 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:21:33.853 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:21:33.854 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:21:33.854 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:21:33.854 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:21:33.854 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:21:33.859 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:21:33.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:21:33.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:21:33.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:21:33.859 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:21:33.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:21:33.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:21:33.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:21:33.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:33.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:21:33.859 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:21:33.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:33.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:33.860 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:21:33.860 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:21:33.860 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:21:33.860 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:21:33.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:33.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:33.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:33.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:21:33.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:33.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:33.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:33.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:33.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:33.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:33.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:33.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:33.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:33.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:33.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:33.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:33.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:33.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:33.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:33.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:33.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:33.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:33.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:33.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:33.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:33.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:33.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:33.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:33.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:33.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:33.865 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:21:34.347 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:21:34.382 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:21:34.384 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:21:34.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:21:34.386 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:21:34.388 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:21:34.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:21:34.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:21:34.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:21:34.389 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:21:34.390 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:21:34.390 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:21:34.390 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:21:34.824 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:21:34.863 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:21:34.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:21:34.864 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:21:34.865 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:21:35.302 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:21:35.780 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:21:35.864 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:21:35.865 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:21:35.865 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:21:35.867 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:21:36.259 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:21:36.737 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:21:36.866 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:21:36.866 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:21:36.866 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:21:36.867 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:21:37.215 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:21:37.693 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:21:37.866 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:21:37.867 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:21:37.867 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:21:37.868 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:21:38.171 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:21:38.648 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:21:38.868 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:21:38.868 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:21:38.868 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:21:38.870 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:21:39.126 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:21:39.604 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:21:40.082 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:21:40.560 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:21:41.038 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:21:41.515 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:21:41.993 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:21:42.471 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:21:42.949 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:21:43.427 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:21:43.905 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:21:44.384 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:21:44.861 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 05:21:45.339 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 05:21:45.817 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 05:21:46.296 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 05:21:46.773 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 05:21:47.252 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 05:21:47.729 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 05:21:48.208 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 05:21:48.442 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:21:48.442 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:21:48.447 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:21:48.448 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:21:48.448 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:21:48.448 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:21:48.450 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:21:48.450 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:21:48.450 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:21:48.450 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:21:48.450 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:21:48.450 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:21:48.450 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:21:53.452 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:21:53.452 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:21:53.454 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:21:53.456 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:21:53.458 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:21:53.460 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:21:53.469 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:21:53.469 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:21:53.470 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:21:53.470 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:21:53.470 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:21:53.473 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:21:53.473 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:21:53.473 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:21:53.473 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:21:53.473 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:21:53.473 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:21:53.473 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:21:53.473 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:21:53.475 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:21:53.475 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:21:53.475 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:21:53.475 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:21:53.475 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:21:53.475 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:21:53.475 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:21:53.475 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:21:53.476 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:21:53.477 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:21:53.477 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:21:53.477 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:21:53.477 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:21:53.477 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:21:53.477 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:21:53.477 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:21:53.479 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:21:53.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:21:53.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:21:53.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:21:53.479 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:21:53.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:21:53.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:21:53.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:21:53.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:53.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:21:53.480 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:21:53.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:53.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:53.480 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:21:53.480 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:21:53.480 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:21:53.480 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:21:53.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:53.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:53.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:53.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:21:53.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:53.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:53.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:53.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:53.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:53.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:53.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:53.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:53.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:53.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:53.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:53.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:53.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:53.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:53.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:53.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:53.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:53.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:53.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:53.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:53.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:53.481 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:21:53.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:53.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:53.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:53.482 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:21:53.482 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:21:53.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:53.482 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:21:53.482 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:21:53.482 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:21:53.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:58.486 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:21:58.487 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:21:58.488 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:21:58.489 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:21:58.489 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:21:58.490 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:21:58.499 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:21:58.500 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:21:58.500 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:21:58.501 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:21:58.501 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:21:58.505 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:21:58.505 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:21:58.505 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:21:58.505 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:21:58.506 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:21:58.506 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:21:58.506 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:21:58.506 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:21:58.509 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:21:58.509 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:21:58.509 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:21:58.509 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:21:58.509 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:21:58.509 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:21:58.509 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:21:58.509 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:21:58.512 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:21:58.512 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:21:58.512 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:21:58.512 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:21:58.513 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:21:58.513 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:21:58.513 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:21:58.513 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:21:58.517 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:21:58.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:21:58.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:21:58.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:21:58.517 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:21:58.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:21:58.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:21:58.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:21:58.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:58.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:21:58.517 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:21:58.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:58.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:58.517 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:21:58.517 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:21:58.517 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:21:58.518 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:21:58.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:58.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:58.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:58.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:21:58.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:58.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:58.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:58.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:58.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:58.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:58.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:58.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:58.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:58.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:58.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:58.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:58.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:58.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:58.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:58.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:58.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:21:58.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:58.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:58.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:58.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:58.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:58.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:21:58.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:21:58.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:58.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:21:58.522 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:21:59.006 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:21:59.034 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:21:59.035 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:21:59.036 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:21:59.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:21:59.037 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:21:59.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:21:59.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:21:59.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:21:59.038 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:21:59.038 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:21:59.038 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:21:59.038 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:21:59.484 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:21:59.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:21:59.521 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:21:59.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:21:59.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:21:59.961 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:22:00.439 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:22:00.522 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:22:00.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:22:00.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:22:00.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:22:00.917 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:22:01.395 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:22:01.523 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:22:01.523 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:22:01.523 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:22:01.523 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:22:01.873 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:22:02.351 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:22:02.524 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:22:02.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:22:02.524 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:22:02.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:22:02.828 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:22:03.307 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:22:03.524 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:22:03.525 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:22:03.525 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:22:03.525 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:22:03.785 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:22:04.263 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:22:04.740 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:22:05.218 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:22:05.696 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:22:06.174 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:22:06.653 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:22:07.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:22:07.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:22:07.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:22:07.059 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:22:07.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:22:07.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:22:07.061 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:22:07.061 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:22:07.061 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:22:07.061 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:22:07.061 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:22:07.061 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:22:07.061 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:22:07.062 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1824 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:22:07.062 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1824 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:22:07.062 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1824 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:22:07.062 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1824 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:22:07.062 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1824 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:22:07.062 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1824 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:22:12.085 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:22:12.085 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:22:12.087 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:22:12.087 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:22:12.088 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:22:12.088 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:22:12.097 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:22:12.098 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:22:12.098 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:22:12.098 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:22:12.098 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:22:12.102 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:22:12.103 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:22:12.103 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:22:12.103 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:22:12.103 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:22:12.103 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:22:12.103 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:22:12.103 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:22:12.107 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:22:12.107 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:22:12.107 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:22:12.108 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:22:12.108 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:22:12.108 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:22:12.108 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:22:12.108 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:22:12.111 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:22:12.111 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:22:12.112 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:22:12.112 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:22:12.112 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:22:12.112 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:22:12.112 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:22:12.112 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:22:12.117 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:22:12.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:22:12.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:22:12.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:22:12.117 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:22:12.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:22:12.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:22:12.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:22:12.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:12.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:22:12.118 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:22:12.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:12.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:12.118 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:22:12.118 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:22:12.118 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:22:12.118 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:22:12.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:12.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:12.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:12.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:22:12.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:12.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:12.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:12.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:12.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:12.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:12.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:12.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:12.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:12.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:12.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:12.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:12.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:12.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:12.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:12.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:12.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:12.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:12.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:12.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:12.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:12.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:12.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:12.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:12.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:12.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:12.121 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:22:12.121 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:22:12.121 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:22:12.121 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:22:12.121 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:22:12.121 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:22:12.121 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:22:17.147 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:22:17.147 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:22:17.149 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:22:17.150 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:22:17.150 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:22:17.151 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:22:17.160 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:22:17.161 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:22:17.161 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:22:17.162 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:22:17.162 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:22:17.164 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:22:17.165 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:22:17.165 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:22:17.165 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:22:17.165 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:22:17.166 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:22:17.166 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:22:17.166 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:22:17.168 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:22:17.168 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:22:17.168 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:22:17.168 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:22:17.168 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:22:17.168 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:22:17.168 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:22:17.168 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:22:17.171 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:22:17.171 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:22:17.171 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:22:17.171 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:22:17.171 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:22:17.171 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:22:17.171 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:22:17.171 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:22:17.174 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:22:17.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:22:17.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:22:17.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:22:17.174 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:22:17.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:22:17.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:22:17.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:22:17.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:17.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:22:17.175 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:22:17.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:17.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:17.175 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:22:17.175 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:22:17.175 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:22:17.175 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:22:17.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:17.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:17.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:17.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:22:17.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:17.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:17.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:17.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:17.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:17.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:17.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:17.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:17.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:17.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:17.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:17.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:17.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:17.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:17.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:17.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:17.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:17.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:17.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:17.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:17.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:17.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:17.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:17.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:17.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:17.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:17.180 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:22:17.664 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:22:17.693 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:22:17.694 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:22:17.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:22:17.695 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:22:17.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:22:17.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:22:17.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:22:17.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:22:17.698 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:22:17.698 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:22:17.698 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:22:17.698 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:22:18.141 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:22:18.178 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:22:18.178 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:22:18.178 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:22:18.178 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:22:18.619 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:22:19.097 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:22:19.179 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:22:19.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:22:19.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:22:19.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:22:19.575 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:22:20.053 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:22:20.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:22:20.181 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:22:20.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:22:20.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:22:20.531 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:22:21.009 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:22:21.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:22:21.183 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:22:21.183 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:22:21.183 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:22:21.487 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:22:21.965 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:22:22.199 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:22:22.199 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:22:22.199 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:22:22.199 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:22:22.442 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:22:22.920 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:22:23.398 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:22:23.876 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:22:24.354 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:22:24.831 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:22:25.309 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:22:25.787 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:22:26.265 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:22:26.744 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:22:27.221 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:22:27.699 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:22:27.714 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:22:27.714 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:22:27.717 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:22:27.717 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:22:27.717 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:22:27.717 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:22:27.718 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:22:27.718 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:22:27.718 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:22:27.718 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:22:27.718 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:22:27.718 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:22:27.718 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:22:27.718 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2250 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:22:27.718 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2250 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:22:27.718 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2250 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:22:27.718 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2250 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:22:27.718 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2250 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:22:27.718 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2250 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:22:27.718 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2250 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:22:32.723 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:22:32.723 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:22:32.726 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:22:32.730 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:22:32.734 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:22:32.740 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:22:32.748 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:22:32.749 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:22:32.749 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:22:32.749 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:22:32.749 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:22:32.752 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:22:32.752 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:22:32.752 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:22:32.752 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:22:32.753 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:22:32.753 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:22:32.753 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:22:32.753 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:22:32.755 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:22:32.755 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:22:32.755 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:22:32.755 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:22:32.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:22:32.755 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:22:32.755 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:22:32.755 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:22:32.757 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:22:32.757 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:22:32.757 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:22:32.758 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:22:32.758 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:22:32.758 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:22:32.758 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:22:32.758 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:22:32.761 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:22:32.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:22:32.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:22:32.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:22:32.761 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:22:32.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:22:32.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:22:32.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:22:32.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:32.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:22:32.762 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:22:32.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:32.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:32.762 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:22:32.762 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:22:32.762 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:22:32.762 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:22:32.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:32.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:32.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:32.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:22:32.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:32.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:32.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:32.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:32.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:32.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:32.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:32.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:32.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:32.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:32.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:32.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:32.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:32.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:32.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:32.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:32.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:32.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:32.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:32.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:32.763 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:22:32.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:32.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:32.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:32.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:32.763 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:22:32.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:32.764 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:22:32.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:32.764 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:22:32.764 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:22:32.764 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:22:32.764 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:22:37.789 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:22:37.789 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:22:37.790 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:22:37.791 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:22:37.791 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:22:37.792 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:22:37.800 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:22:37.802 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:22:37.802 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:22:37.802 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:22:37.802 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:22:37.805 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:22:37.805 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:22:37.806 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:22:37.806 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:22:37.806 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:22:37.806 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:22:37.807 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:22:37.807 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:22:37.809 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:22:37.809 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:22:37.809 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:22:37.809 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:22:37.809 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:22:37.809 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:22:37.810 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:22:37.810 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:22:37.812 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:22:37.812 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:22:37.812 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:22:37.812 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:22:37.812 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:22:37.812 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:22:37.813 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:22:37.813 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:22:37.818 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:22:37.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:22:37.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:22:37.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:22:37.818 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:22:37.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:22:37.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:22:37.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:22:37.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:37.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:22:37.819 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:22:37.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:37.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:37.819 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:22:37.819 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:22:37.819 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:22:37.819 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:22:37.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:37.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:37.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:37.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:22:37.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:37.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:37.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:37.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:37.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:37.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:37.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:37.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:37.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:37.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:37.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:37.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:37.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:37.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:37.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:37.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:37.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:37.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:37.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:37.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:37.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:37.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:37.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:37.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:37.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:37.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:37.824 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:22:38.306 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:22:38.340 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:22:38.342 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:22:38.344 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:22:38.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:22:38.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:22:38.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:22:38.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:22:38.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:22:38.347 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:22:38.347 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:22:38.347 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:22:38.347 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:22:38.783 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:22:38.822 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:22:38.822 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:22:38.823 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:22:38.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:22:39.261 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:22:39.739 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:22:39.823 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:22:39.823 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:22:39.823 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:22:39.824 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:22:40.217 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:22:40.695 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:22:40.824 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:22:40.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:22:40.825 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:22:40.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:22:41.173 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:22:41.651 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:22:41.825 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:22:41.825 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:22:41.825 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:22:41.826 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:22:42.129 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:22:42.607 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:22:42.843 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:22:42.844 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:22:42.844 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:22:42.844 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:22:43.085 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:22:43.563 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:22:44.041 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:22:44.519 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:22:44.998 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:22:45.476 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:22:45.953 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:22:46.431 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:22:46.908 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:22:47.386 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:22:47.864 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:22:48.342 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:22:48.819 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 05:22:49.297 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 05:22:49.354 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:22:49.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:22:49.357 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:22:49.357 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:22:49.357 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:22:49.357 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:22:49.358 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:22:49.358 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:22:49.358 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:22:49.358 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:22:49.358 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:22:49.358 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:22:49.358 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:22:49.358 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2463 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:22:54.361 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:22:54.362 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:22:54.364 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:22:54.364 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:22:54.365 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:22:54.366 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:22:54.377 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:22:54.379 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:22:54.379 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:22:54.380 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:22:54.380 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:22:54.384 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:22:54.384 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:22:54.385 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:22:54.385 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:22:54.385 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:22:54.385 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:22:54.386 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:22:54.386 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:22:54.388 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:22:54.388 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:22:54.389 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:22:54.389 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:22:54.389 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:22:54.389 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:22:54.389 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:22:54.389 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:22:54.391 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:22:54.392 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:22:54.392 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:22:54.392 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:22:54.392 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:22:54.392 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:22:54.392 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:22:54.392 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:22:54.396 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:22:54.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:22:54.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:22:54.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:22:54.396 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:22:54.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:22:54.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:22:54.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:22:54.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:22:54.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:54.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:54.397 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:22:54.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:54.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:54.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:54.397 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:22:54.397 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:22:54.397 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:22:54.397 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:22:54.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:54.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:54.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:54.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:22:54.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:54.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:54.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:54.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:54.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:54.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:54.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:54.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:54.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:54.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:54.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:54.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:54.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:54.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:54.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:54.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:54.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:54.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:54.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:54.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:54.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:54.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:54.399 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:22:54.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:54.399 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:22:54.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:54.399 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:22:54.399 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:22:54.399 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:22:54.399 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:22:54.399 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:22:59.404 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:22:59.404 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:22:59.405 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:22:59.406 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:22:59.406 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:22:59.407 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:22:59.416 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:22:59.417 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:22:59.417 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:22:59.417 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:22:59.417 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:22:59.420 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:22:59.420 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:22:59.421 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:22:59.421 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:22:59.421 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:22:59.421 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:22:59.421 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:22:59.422 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:22:59.423 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:22:59.424 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:22:59.424 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:22:59.424 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:22:59.424 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:22:59.424 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:22:59.424 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:22:59.424 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:22:59.427 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:22:59.427 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:22:59.427 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:22:59.427 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:22:59.427 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:22:59.427 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:22:59.427 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:22:59.427 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:22:59.431 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:22:59.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:22:59.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:22:59.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:22:59.431 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:22:59.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:22:59.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:22:59.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:22:59.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:59.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:22:59.431 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:22:59.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:59.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:59.431 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:22:59.431 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:22:59.431 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:22:59.431 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:22:59.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:59.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:59.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:59.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:22:59.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:59.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:59.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:59.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:59.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:59.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:59.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:59.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:59.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:59.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:59.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:59.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:59.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:59.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:59.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:59.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:59.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:22:59.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:59.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:59.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:59.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:59.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:59.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:22:59.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:22:59.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:59.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:22:59.436 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:22:59.920 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:22:59.948 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:22:59.949 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:22:59.950 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:22:59.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:22:59.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:22:59.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:22:59.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:22:59.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:22:59.953 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:22:59.954 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:22:59.954 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:22:59.954 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:23:00.398 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:23:00.434 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:23:00.434 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:23:00.435 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:23:00.435 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:23:00.876 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:23:01.354 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:23:01.435 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:23:01.436 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:23:01.436 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:23:01.436 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:23:01.832 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:23:02.310 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:23:02.436 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:23:02.436 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:23:02.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:23:02.437 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:23:02.788 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:23:03.266 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:23:03.437 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:23:03.437 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:23:03.438 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:23:03.438 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:23:03.744 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:23:04.222 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:23:04.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:23:04.438 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:23:04.439 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:23:04.439 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:23:04.700 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:23:05.177 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:23:05.655 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:23:06.133 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:23:06.610 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:23:07.088 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:23:07.566 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:23:08.044 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:23:08.522 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:23:09.000 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:23:09.478 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:23:09.955 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:23:10.433 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 05:23:10.911 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 05:23:11.388 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 05:23:11.867 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 05:23:12.344 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 05:23:12.822 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 05:23:13.300 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 05:23:13.778 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 05:23:14.255 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 05:23:14.733 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 05:23:15.211 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 05:23:15.689 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 05:23:16.167 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 05:23:16.645 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 05:23:17.123 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 05:23:17.601 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 05:23:18.079 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 05:23:18.557 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 05:23:19.034 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 05:23:19.512 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 05:23:19.975 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:23:19.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:23:19.980 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:23:19.981 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:23:19.981 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:23:19.981 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:23:19.982 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:23:19.982 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:23:19.982 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:23:19.982 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:23:19.982 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:23:19.982 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:23:19.982 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:23:24.989 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:23:24.989 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:23:24.989 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:23:24.990 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:23:24.990 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:23:24.993 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:23:25.002 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:23:25.004 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:23:25.004 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:23:25.004 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:23:25.004 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:23:25.010 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:23:25.010 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:23:25.011 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:23:25.011 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:23:25.011 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:23:25.011 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:23:25.012 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:23:25.012 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:23:25.015 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:23:25.015 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:23:25.016 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:23:25.016 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:23:25.016 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:23:25.016 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:23:25.016 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:23:25.016 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:23:25.023 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:23:25.023 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:23:25.024 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:23:25.024 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:23:25.024 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:23:25.024 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:23:25.024 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:23:25.024 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:23:25.030 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:23:25.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:23:25.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:23:25.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:23:25.030 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:23:25.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:23:25.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:23:25.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:23:25.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:23:25.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:23:25.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:23:25.031 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:23:25.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:23:25.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:23:25.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:23:25.031 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:23:25.031 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:23:25.031 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:23:25.031 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:23:25.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:23:25.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:23:25.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:23:25.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:23:25.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:23:25.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:23:25.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:23:25.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:23:25.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:23:25.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:23:25.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:23:25.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:23:25.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:23:25.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:23:25.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:23:25.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:23:25.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:23:25.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:23:25.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:23:25.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:23:25.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:23:25.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:23:25.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:23:25.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:23:25.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:23:25.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:23:25.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:23:25.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:23:25.034 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:23:25.034 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:23:25.034 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:23:25.034 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:23:25.034 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:23:25.034 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:23:25.034 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:23:30.038 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:23:30.039 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:23:30.040 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:23:30.041 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:23:30.041 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:23:30.042 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:23:30.051 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:23:30.052 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:23:30.053 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:23:30.053 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:23:30.053 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:23:30.056 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:23:30.057 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:23:30.057 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:23:30.057 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:23:30.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:23:30.058 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:23:30.058 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:23:30.058 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:23:30.060 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:23:30.060 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:23:30.061 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:23:30.061 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:23:30.061 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:23:30.061 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:23:30.061 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:23:30.061 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:23:30.063 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:23:30.063 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:23:30.064 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:23:30.064 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:23:30.064 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:23:30.064 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:23:30.064 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:23:30.064 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:23:30.067 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:23:30.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:23:30.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:23:30.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:23:30.068 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:23:30.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:23:30.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:23:30.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:23:30.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:23:30.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:23:30.068 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:23:30.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:23:30.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:23:30.068 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:23:30.068 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:23:30.068 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:23:30.068 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:23:30.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:23:30.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:23:30.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:23:30.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:23:30.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:23:30.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:23:30.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:23:30.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:23:30.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:23:30.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:23:30.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:23:30.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:23:30.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:23:30.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:23:30.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:23:30.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:23:30.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:23:30.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:23:30.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:23:30.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:23:30.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:23:30.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:23:30.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:23:30.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:23:30.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:23:30.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:23:30.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:23:30.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:23:30.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:23:30.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:23:30.073 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:23:30.558 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:23:30.587 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:23:30.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:23:30.589 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:23:30.591 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:23:31.033 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:23:31.072 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:23:31.072 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:23:31.072 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:23:31.072 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:23:31.512 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:23:31.990 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:23:32.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:23:32.074 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:23:32.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:23:32.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:23:32.469 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:23:32.948 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:23:33.075 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:23:33.076 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:23:33.076 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:23:33.076 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:23:33.427 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:23:33.905 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:23:34.077 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:23:34.077 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:23:34.077 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:23:34.077 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:23:34.383 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:23:34.862 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:23:35.079 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:23:35.079 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:23:35.079 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:23:35.079 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:23:35.341 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:23:35.819 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:23:36.298 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:23:36.776 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:23:37.255 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:23:37.733 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:23:38.212 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:23:38.688 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:23:39.167 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:23:39.646 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:23:40.124 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:23:40.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:23:40.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:23:40.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:23:40.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:23:40.603 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:23:40.608 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:23:40.608 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:23:40.609 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:23:40.609 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:23:40.609 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:23:40.609 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:23:40.609 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:23:45.607 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:23:45.607 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:23:45.608 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:23:45.609 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:23:45.609 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:23:45.610 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:23:45.619 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:23:45.620 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:23:45.620 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:23:45.621 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:23:45.621 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:23:45.624 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:23:45.624 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:23:45.624 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:23:45.624 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:23:45.624 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:23:45.624 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:23:45.624 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:23:45.624 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:23:45.628 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:23:45.628 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:23:45.628 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:23:45.628 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:23:45.628 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:23:45.628 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:23:45.628 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:23:45.628 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:23:45.631 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:23:45.631 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:23:45.632 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:23:45.632 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:23:45.632 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:23:45.632 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:23:45.632 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:23:45.632 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:23:45.637 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:23:45.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:23:45.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:23:45.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:23:45.637 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:23:45.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:23:45.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:23:45.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:23:45.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:23:45.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:23:45.638 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:23:45.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:23:45.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:23:45.638 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:23:45.638 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:23:45.638 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:23:45.638 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:23:45.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:23:45.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:23:45.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:23:45.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:23:45.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:23:45.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:23:45.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:23:45.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:23:45.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:23:45.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:23:45.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:23:45.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:23:45.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:23:45.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:23:45.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:23:45.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:23:45.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:23:45.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:23:45.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:23:45.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:23:45.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:23:45.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:23:45.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:23:45.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:23:45.640 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:23:45.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:23:45.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:23:45.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:23:45.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:23:45.640 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:23:45.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:23:45.641 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:23:45.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:23:45.641 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:23:45.641 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:23:45.641 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:23:45.641 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:23:50.645 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:23:50.645 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:23:50.646 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:23:50.647 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:23:50.647 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:23:50.648 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:23:50.657 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:23:50.658 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:23:50.658 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:23:50.658 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:23:50.658 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:23:50.661 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:23:50.662 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:23:50.662 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:23:50.662 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:23:50.662 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:23:50.662 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:23:50.663 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:23:50.663 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:23:50.665 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:23:50.665 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:23:50.665 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:23:50.665 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:23:50.665 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:23:50.665 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:23:50.665 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:23:50.665 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:23:50.668 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:23:50.668 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:23:50.668 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:23:50.668 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:23:50.668 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:23:50.668 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:23:50.668 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:23:50.668 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:23:50.672 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:23:50.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:23:50.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:23:50.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:23:50.672 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:23:50.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:23:50.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:23:50.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:23:50.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:23:50.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:23:50.672 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:23:50.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:23:50.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:23:50.672 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:23:50.672 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:23:50.672 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:23:50.672 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:23:50.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:23:50.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:23:50.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:23:50.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:23:50.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:23:50.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:23:50.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:23:50.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:23:50.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:23:50.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:23:50.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:23:50.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:23:50.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:23:50.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:23:50.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:23:50.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:23:50.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:23:50.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:23:50.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:23:50.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:23:50.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:23:50.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:23:50.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:23:50.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:23:50.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:23:50.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:23:50.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:23:50.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:23:50.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:23:50.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:23:50.677 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:23:51.161 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:23:51.192 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:23:51.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:23:51.195 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:23:51.197 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:23:51.638 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:23:51.676 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:23:51.676 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:23:51.676 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:23:51.676 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:23:52.117 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:23:52.595 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:23:52.677 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:23:52.677 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:23:52.677 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:23:52.677 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:23:53.073 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:23:53.549 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:23:53.679 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:23:53.679 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:23:53.679 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:23:53.679 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:23:54.028 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:23:54.506 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:23:54.679 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:23:54.680 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:23:54.680 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:23:54.680 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:23:54.985 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:23:55.463 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:23:55.681 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:23:55.681 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:23:55.681 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:23:55.681 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:23:55.942 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:23:56.421 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:23:56.900 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:23:57.378 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:23:57.857 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:23:58.336 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:23:58.815 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:23:59.294 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:23:59.772 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:24:00.251 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:24:00.730 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:24:01.209 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:24:01.687 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 05:24:02.166 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 05:24:02.645 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 05:24:03.126 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 05:24:03.212 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:24:03.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:24:03.213 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:24:03.213 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:24:03.215 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:24:03.215 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:24:03.215 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:24:03.215 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:24:03.215 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:24:03.215 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:24:03.215 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:24:08.219 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:24:08.219 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:24:08.219 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:24:08.220 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:24:08.221 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:24:08.223 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:24:08.232 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:24:08.234 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:24:08.234 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:24:08.234 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:24:08.234 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:24:08.240 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:24:08.240 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:24:08.240 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:24:08.240 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:24:08.240 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:24:08.240 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:24:08.240 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:24:08.240 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:24:08.245 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:24:08.246 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:24:08.246 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:24:08.246 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:24:08.246 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:24:08.246 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:24:08.246 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:24:08.246 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:24:08.250 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:24:08.250 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:24:08.250 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:24:08.250 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:24:08.250 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:24:08.250 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:24:08.250 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:24:08.250 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:24:08.255 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:24:08.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:24:08.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:24:08.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:24:08.255 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:24:08.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:24:08.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:24:08.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:24:08.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:08.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:24:08.256 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:24:08.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:08.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:08.256 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:24:08.256 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:24:08.256 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:24:08.257 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:24:08.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:08.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:08.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:08.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:24:08.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:08.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:08.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:08.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:08.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:08.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:08.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:08.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:08.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:08.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:08.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:08.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:08.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:08.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:08.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:08.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:08.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:08.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:08.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:08.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:08.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:08.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:08.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:08.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:08.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:08.259 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:24:08.259 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:24:08.259 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:24:08.259 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:24:08.259 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:24:08.259 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:24:08.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:13.263 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:24:13.264 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:24:13.265 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:24:13.266 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:24:13.266 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:24:13.267 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:24:13.275 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:24:13.276 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:24:13.276 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:24:13.277 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:24:13.277 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:24:13.280 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:24:13.281 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:24:13.281 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:24:13.281 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:24:13.282 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:24:13.282 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:24:13.282 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:24:13.282 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:24:13.285 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:24:13.286 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:24:13.286 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:24:13.286 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:24:13.286 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:24:13.286 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:24:13.287 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:24:13.287 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:24:13.290 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:24:13.291 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:24:13.291 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:24:13.291 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:24:13.291 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:24:13.291 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:24:13.292 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:24:13.292 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:24:13.297 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:24:13.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:24:13.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:24:13.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:24:13.297 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:24:13.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:24:13.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:24:13.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:24:13.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:13.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:24:13.298 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:24:13.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:13.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:13.298 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:24:13.298 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:24:13.298 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:24:13.299 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:24:13.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:13.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:13.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:13.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:24:13.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:13.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:13.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:13.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:13.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:13.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:13.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:13.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:13.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:13.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:13.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:13.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:13.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:13.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:13.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:13.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:13.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:13.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:13.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:13.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:13.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:13.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:13.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:13.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:13.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:13.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:13.303 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:24:13.787 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:24:13.820 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:24:13.820 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:24:13.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:24:13.821 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:24:13.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:24:13.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:24:13.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:24:13.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:24:13.822 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:24:13.823 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:24:13.823 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:24:13.823 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:24:13.829 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:24:13.829 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-12-15 05:24:13.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:24:13.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:24:14.264 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:24:14.303 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:24:14.303 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:24:14.304 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:24:14.304 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:24:14.742 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:24:15.220 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:24:15.304 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:24:15.304 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:24:15.304 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:24:15.305 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:24:15.698 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:24:16.176 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:24:16.305 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:24:16.305 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:24:16.305 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:24:16.305 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:24:16.654 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:24:17.133 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:24:17.306 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:24:17.307 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:24:17.307 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:24:17.307 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:24:17.611 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:24:18.089 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:24:18.307 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:24:18.307 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:24:18.308 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:24:18.308 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:24:18.567 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:24:19.045 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:24:19.524 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:24:20.002 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:24:20.480 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:24:20.958 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:24:21.436 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:24:21.834 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:24:21.834 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:24:21.834 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:24:21.839 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:24:21.840 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:24:21.840 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:24:21.840 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:24:21.841 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:24:21.841 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:24:21.841 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:24:21.841 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:24:21.841 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:24:21.841 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:24:21.841 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:24:21.841 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1823 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:24:21.841 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1823 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:24:21.841 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1823 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:24:26.845 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:24:26.845 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:24:26.847 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:24:26.849 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:24:26.852 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:24:26.856 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:24:26.870 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:24:26.871 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:24:26.871 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:24:26.871 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:24:26.871 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:24:26.874 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:24:26.874 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:24:26.875 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:24:26.875 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:24:26.875 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:24:26.875 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:24:26.875 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:24:26.875 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:24:26.877 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:24:26.877 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:24:26.877 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:24:26.877 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:24:26.878 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:24:26.878 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:24:26.878 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:24:26.878 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:24:26.880 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:24:26.880 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:24:26.880 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:24:26.880 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:24:26.880 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:24:26.880 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:24:26.880 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:24:26.880 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:24:26.885 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:24:26.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:24:26.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:24:26.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:24:26.885 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:24:26.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:24:26.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:24:26.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:24:26.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:26.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:24:26.885 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:24:26.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:26.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:26.885 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:24:26.885 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:24:26.885 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:24:26.885 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:24:26.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:26.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:26.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:26.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:24:26.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:26.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:26.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:26.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:26.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:26.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:26.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:26.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:26.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:26.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:26.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:26.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:26.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:26.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:26.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:26.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:26.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:26.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:26.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:26.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:26.887 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:24:26.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:26.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:26.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:26.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:26.887 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:24:26.887 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:24:26.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:26.887 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:24:26.887 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:24:26.887 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:24:26.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:31.892 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:24:31.892 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:24:31.894 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:24:31.896 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:24:31.899 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:24:31.903 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:24:31.914 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:24:31.915 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:24:31.915 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:24:31.915 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:24:31.915 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:24:31.919 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:24:31.919 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:24:31.919 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:24:31.919 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:24:31.919 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:24:31.919 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:24:31.919 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:24:31.919 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:24:31.922 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:24:31.923 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:24:31.923 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:24:31.923 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:24:31.923 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:24:31.923 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:24:31.923 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:24:31.923 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:24:31.926 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:24:31.926 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:24:31.926 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:24:31.926 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:24:31.927 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:24:31.927 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:24:31.927 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:24:31.927 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:24:31.931 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:24:31.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:24:31.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:24:31.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:24:31.932 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:24:31.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:24:31.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:24:31.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:24:31.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:31.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:24:31.932 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:24:31.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:31.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:31.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:31.932 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:24:31.932 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:24:31.932 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:24:31.933 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:24:31.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:31.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:31.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:31.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:24:31.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:31.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:31.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:31.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:31.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:31.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:31.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:31.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:31.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:31.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:31.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:31.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:31.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:31.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:31.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:31.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:31.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:31.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:31.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:31.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:31.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:31.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:31.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:31.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:31.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:31.937 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:24:32.420 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:24:32.452 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:24:32.454 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:24:32.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:24:32.455 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:24:32.458 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:24:32.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:24:32.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:24:32.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:24:32.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:24:32.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:24:32.459 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:24:32.459 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:24:32.464 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:24:32.464 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-12-15 05:24:32.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:24:32.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:24:32.898 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:24:32.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:24:32.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:24:32.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:24:32.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:24:33.376 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:24:33.855 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:24:33.938 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:24:33.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:24:33.938 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:24:33.938 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:24:34.333 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:24:34.812 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:24:34.938 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:24:34.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:24:34.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:24:34.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:24:35.290 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:24:35.768 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:24:35.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:24:35.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:24:35.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:24:35.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:24:36.246 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:24:36.725 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:24:36.941 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:24:36.941 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:24:36.941 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:24:36.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:24:37.203 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:24:37.681 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:24:38.159 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:24:38.637 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:24:39.115 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:24:39.594 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:24:40.072 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:24:40.469 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:24:40.469 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:24:40.469 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:24:40.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:24:40.474 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:24:40.474 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:24:40.474 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:24:40.475 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:24:40.475 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:24:40.475 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:24:40.475 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:24:40.475 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:24:40.475 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:24:40.475 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:24:40.475 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1823 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:24:40.475 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1823 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:24:40.475 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1823 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:24:40.475 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1823 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:24:40.476 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1823 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:24:45.480 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:24:45.480 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:24:45.480 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:24:45.482 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:24:45.482 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:24:45.482 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:24:45.493 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:24:45.496 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:24:45.496 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:24:45.496 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:24:45.496 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:24:45.511 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:24:45.511 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:24:45.511 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:24:45.511 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:24:45.511 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:24:45.512 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:24:45.512 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:24:45.512 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:24:45.520 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:24:45.520 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:24:45.520 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:24:45.520 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:24:45.520 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:24:45.521 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:24:45.521 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:24:45.521 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:24:45.525 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:24:45.525 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:24:45.525 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:24:45.525 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:24:45.525 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:24:45.525 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:24:45.525 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:24:45.525 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:24:45.531 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:24:45.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:24:45.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:24:45.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:24:45.531 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:24:45.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:24:45.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:24:45.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:24:45.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:45.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:24:45.532 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:24:45.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:45.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:45.532 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:24:45.532 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:24:45.532 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:24:45.532 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:24:45.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:45.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:45.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:45.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:24:45.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:45.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:45.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:45.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:45.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:45.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:45.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:45.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:45.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:45.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:45.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:45.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:45.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:45.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:45.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:45.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:45.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:45.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:45.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:45.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:45.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:45.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:45.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:45.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:45.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:45.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:45.533 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:24:45.534 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:24:45.534 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:24:45.534 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:24:45.534 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:24:45.534 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:24:45.534 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:24:50.539 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:24:50.539 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:24:50.541 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:24:50.542 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:24:50.542 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:24:50.543 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:24:50.554 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:24:50.554 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:24:50.554 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:24:50.555 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:24:50.555 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:24:50.557 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:24:50.557 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:24:50.557 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:24:50.557 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:24:50.557 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:24:50.557 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:24:50.557 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:24:50.557 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:24:50.559 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:24:50.559 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:24:50.559 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:24:50.559 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:24:50.559 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:24:50.559 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:24:50.559 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:24:50.559 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:24:50.561 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:24:50.561 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:24:50.561 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:24:50.561 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:24:50.561 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:24:50.561 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:24:50.561 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:24:50.561 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:24:50.564 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:24:50.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:24:50.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:24:50.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:24:50.564 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:24:50.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:24:50.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:24:50.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:24:50.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:24:50.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:50.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:50.564 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:24:50.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:50.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:50.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:50.564 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:24:50.564 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:24:50.564 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:24:50.564 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:24:50.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:50.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:50.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:50.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:24:50.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:50.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:50.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:50.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:50.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:50.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:50.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:50.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:50.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:50.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:50.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:50.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:50.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:50.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:50.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:50.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:50.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:50.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:24:50.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:50.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:50.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:24:50.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:24:50.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:50.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:24:50.569 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:24:51.053 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:24:51.080 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:24:51.081 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:24:51.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:24:51.082 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:24:51.083 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:24:51.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:24:51.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:24:51.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:24:51.084 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:24:51.084 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:24:51.084 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:24:51.084 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:24:51.096 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:24:51.096 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-12-15 05:24:51.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:24:51.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:24:51.530 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:24:51.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:24:51.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:24:51.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:24:51.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:24:52.008 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:24:52.487 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:24:52.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:24:52.569 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:24:52.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:24:52.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:24:52.965 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:24:53.444 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:24:53.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:24:53.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:24:53.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:24:53.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:24:53.922 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:24:54.400 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:24:54.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:24:54.572 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:24:54.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:24:54.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:24:54.878 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:24:55.357 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:24:55.573 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:24:55.573 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:24:55.573 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:24:55.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:24:55.835 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:24:56.313 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:24:56.791 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:24:57.269 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:24:57.748 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:24:58.226 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:24:58.704 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:24:59.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:24:59.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:24:59.101 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:24:59.106 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:24:59.107 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:24:59.107 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:24:59.107 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:24:59.107 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:24:59.107 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:24:59.108 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:24:59.108 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:24:59.108 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:24:59.108 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:24:59.108 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:25:04.107 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:25:04.107 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:25:04.108 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:25:04.108 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:25:04.109 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:25:04.110 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:25:04.119 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:25:04.119 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:25:04.119 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:25:04.120 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:25:04.120 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:25:04.121 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:25:04.121 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:25:04.122 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:25:04.122 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:25:04.122 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:25:04.122 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:25:04.122 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:25:04.122 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:25:04.124 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:25:04.124 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:25:04.124 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:25:04.124 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:25:04.124 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:25:04.124 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:25:04.124 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:25:04.124 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:25:04.126 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:25:04.126 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:25:04.126 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:25:04.126 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:25:04.126 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:25:04.126 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:25:04.126 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:25:04.126 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:25:04.129 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:25:04.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:25:04.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:25:04.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:25:04.129 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:25:04.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:25:04.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:25:04.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:25:04.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:25:04.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:04.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:04.129 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:25:04.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:04.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:04.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:04.130 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:25:04.130 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:25:04.130 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:25:04.130 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:25:04.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:04.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:04.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:04.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:25:04.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:04.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:04.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:04.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:04.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:04.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:04.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:04.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:04.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:04.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:04.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:04.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:04.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:04.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:04.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:04.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:04.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:04.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:04.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:04.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:04.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:04.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:04.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:04.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:04.131 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:25:04.131 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:25:04.131 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:25:04.131 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:25:04.132 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:25:04.132 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:25:04.132 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:25:09.136 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:25:09.137 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:25:09.137 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:25:09.138 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:25:09.138 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:25:09.139 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:25:09.151 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:25:09.153 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:25:09.153 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:25:09.153 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:25:09.153 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:25:09.156 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:25:09.157 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:25:09.157 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:25:09.157 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:25:09.158 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:25:09.158 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:25:09.158 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:25:09.158 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:25:09.161 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:25:09.161 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:25:09.161 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:25:09.161 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:25:09.162 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:25:09.162 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:25:09.162 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:25:09.162 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:25:09.165 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:25:09.165 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:25:09.166 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:25:09.166 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:25:09.166 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:25:09.166 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:25:09.166 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:25:09.166 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:25:09.171 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:25:09.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:25:09.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:25:09.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:25:09.171 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:25:09.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:25:09.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:25:09.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:25:09.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:09.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:25:09.172 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:25:09.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:09.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:09.172 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:25:09.172 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:25:09.172 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:25:09.172 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:25:09.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:09.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:09.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:09.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:25:09.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:09.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:09.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:09.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:09.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:09.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:09.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:09.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:09.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:09.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:09.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:09.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:09.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:09.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:09.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:09.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:09.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:09.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:09.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:09.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:09.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:09.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:09.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:09.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:09.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:09.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:09.177 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:25:09.659 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:25:09.700 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:25:09.702 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:25:09.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:25:09.704 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:25:09.705 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:25:09.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:25:09.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:25:09.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:25:09.706 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:25:09.706 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:25:09.706 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:25:09.706 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:25:09.749 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:25:09.749 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-12-15 05:25:09.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:25:09.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:25:10.134 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:25:10.177 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:25:10.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:25:10.177 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:25:10.178 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:25:10.610 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:25:11.083 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:25:11.178 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:25:11.178 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:25:11.178 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:25:11.178 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:25:11.561 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:25:12.033 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:25:12.179 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:25:12.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:25:12.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:25:12.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:25:12.509 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:25:12.987 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:25:13.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:25:13.181 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:25:13.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:25:13.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:25:13.465 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:25:13.944 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:25:14.182 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:25:14.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:25:14.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:25:14.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:25:14.423 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:25:14.902 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:25:15.380 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:25:15.859 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:25:16.337 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:25:16.815 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:25:17.293 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:25:17.755 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:25:17.756 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:25:17.756 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:25:17.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:25:17.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:25:17.757 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:25:17.757 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:25:17.761 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:25:17.761 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:25:17.761 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:25:17.761 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:25:17.761 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:25:17.761 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:25:17.762 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:25:17.762 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1837 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:25:17.762 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1837 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:25:17.762 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1837 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:25:17.762 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1837 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:25:17.762 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1837 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:25:17.762 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1837 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:25:17.762 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1837 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:25:17.762 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1837 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:25:22.762 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:25:22.762 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:25:22.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:25:22.766 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:25:22.766 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:25:22.769 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:25:22.778 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:25:22.779 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:25:22.779 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:25:22.779 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:25:22.779 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:25:22.781 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:25:22.782 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:25:22.782 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:25:22.782 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:25:22.782 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:25:22.782 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:25:22.782 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:25:22.782 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:25:22.785 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:25:22.785 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:25:22.785 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:25:22.785 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:25:22.785 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:25:22.785 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:25:22.785 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:25:22.785 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:25:22.787 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:25:22.788 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:25:22.788 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:25:22.788 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:25:22.788 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:25:22.788 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:25:22.788 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:25:22.788 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:25:22.792 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:25:22.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:25:22.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:25:22.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:25:22.792 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:25:22.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:25:22.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:25:22.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:25:22.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:22.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:25:22.792 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:25:22.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:22.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:22.793 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:25:22.793 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:25:22.793 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:25:22.793 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:25:22.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:22.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:22.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:22.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:25:22.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:22.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:22.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:22.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:22.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:22.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:22.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:22.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:22.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:22.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:22.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:22.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:22.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:22.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:22.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:22.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:22.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:22.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:22.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:22.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:22.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:22.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:22.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:22.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:22.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:22.795 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:25:22.795 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:25:22.795 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:25:22.795 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:25:22.795 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:25:22.795 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:25:22.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:27.820 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:25:27.820 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:25:27.822 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:25:27.822 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:25:27.823 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:25:27.824 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:25:27.832 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:25:27.833 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:25:27.833 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:25:27.834 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:25:27.834 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:25:27.837 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:25:27.837 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:25:27.838 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:25:27.838 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:25:27.838 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:25:27.838 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:25:27.838 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:25:27.839 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:25:27.841 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:25:27.841 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:25:27.841 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:25:27.841 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:25:27.841 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:25:27.842 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:25:27.842 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:25:27.842 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:25:27.844 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:25:27.844 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:25:27.844 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:25:27.844 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:25:27.844 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:25:27.844 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:25:27.844 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:25:27.844 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:25:27.848 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:25:27.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:25:27.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:25:27.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:25:27.848 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:25:27.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:25:27.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:25:27.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:25:27.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:25:27.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:27.849 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:25:27.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:27.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:27.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:27.849 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:25:27.849 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:25:27.849 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:25:27.849 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:25:27.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:27.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:27.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:27.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:25:27.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:27.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:27.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:27.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:27.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:27.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:27.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:27.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:27.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:27.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:27.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:27.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:27.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:27.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:27.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:27.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:27.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:27.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:27.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:27.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:27.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:27.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:27.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:27.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:27.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:27.854 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:25:28.330 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:25:28.361 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:25:28.361 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:25:28.361 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:25:28.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:25:28.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:25:28.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:25:28.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:25:28.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:25:28.362 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:25:28.362 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:25:28.362 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:25:28.362 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:25:28.373 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:25:28.373 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-12-15 05:25:28.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:25:28.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:25:28.807 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:25:28.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:25:28.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:25:28.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:25:28.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:25:29.285 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:25:29.764 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:25:29.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:25:29.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:25:29.854 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:25:29.854 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:25:30.242 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:25:30.720 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:25:30.855 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:25:30.855 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:25:30.855 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:25:30.856 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:25:31.199 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:25:31.677 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:25:31.856 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:25:31.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:25:31.856 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:25:31.856 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:25:32.155 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:25:32.633 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:25:32.857 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:25:32.857 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:25:32.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:25:32.857 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:25:33.112 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:25:33.590 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:25:34.068 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:25:34.546 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:25:35.024 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:25:35.503 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:25:35.981 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:25:36.460 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:25:36.938 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:25:37.417 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:25:37.895 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:25:38.373 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:25:38.851 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 05:25:39.330 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 05:25:39.808 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 05:25:40.286 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 05:25:40.765 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 05:25:41.242 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 05:25:41.721 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 05:25:42.199 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 05:25:42.379 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:25:42.379 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:25:42.379 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:25:42.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:25:42.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:25:42.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:25:42.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:25:42.394 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:25:42.394 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:25:42.394 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:25:42.394 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:25:42.394 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:25:42.394 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:25:42.394 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:25:47.397 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:25:47.398 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:25:47.400 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:25:47.401 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:25:47.401 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:25:47.402 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:25:47.412 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:25:47.412 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:25:47.413 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:25:47.413 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:25:47.413 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:25:47.416 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:25:47.416 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:25:47.416 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:25:47.416 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:25:47.417 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:25:47.417 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:25:47.417 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:25:47.417 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:25:47.419 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:25:47.419 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:25:47.419 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:25:47.419 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:25:47.420 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:25:47.420 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:25:47.420 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:25:47.420 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:25:47.422 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:25:47.422 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:25:47.423 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:25:47.423 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:25:47.423 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:25:47.423 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:25:47.423 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:25:47.423 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:25:47.427 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:25:47.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:25:47.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:25:47.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:25:47.427 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:25:47.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:25:47.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:25:47.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:25:47.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:47.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:25:47.428 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:25:47.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:47.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:47.428 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:25:47.428 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:25:47.428 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:25:47.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:47.428 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:25:47.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:47.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:47.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:25:47.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:47.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:47.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:47.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:47.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:47.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:47.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:47.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:47.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:47.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:47.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:47.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:47.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:47.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:47.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:47.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:47.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:47.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:47.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:47.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:47.430 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:25:47.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:47.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:47.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:47.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:47.430 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:25:47.430 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:25:47.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:47.430 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:25:47.430 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:25:47.430 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:25:47.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:52.434 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:25:52.435 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:25:52.437 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:25:52.437 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:25:52.437 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:25:52.438 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:25:52.450 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:25:52.451 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:25:52.452 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:25:52.452 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:25:52.452 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:25:52.455 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:25:52.456 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:25:52.456 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:25:52.456 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:25:52.457 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:25:52.457 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:25:52.457 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:25:52.457 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:25:52.460 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:25:52.460 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:25:52.460 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:25:52.460 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:25:52.460 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:25:52.460 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:25:52.460 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:25:52.460 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:25:52.463 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:25:52.464 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:25:52.464 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:25:52.464 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:25:52.464 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:25:52.464 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:25:52.464 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:25:52.464 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:25:52.469 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:25:52.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:25:52.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:25:52.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:25:52.469 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:25:52.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:25:52.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:25:52.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:25:52.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:52.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:25:52.470 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:25:52.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:52.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:52.470 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:25:52.470 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:25:52.470 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:25:52.470 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:25:52.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:52.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:52.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:52.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:25:52.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:52.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:52.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:52.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:52.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:52.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:52.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:52.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:52.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:52.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:52.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:52.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:52.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:52.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:52.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:25:52.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:52.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:52.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:52.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:52.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:52.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:52.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:52.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:25:52.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:25:52.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:52.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:25:52.475 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:25:52.958 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:25:52.999 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:25:53.001 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:25:53.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:25:53.004 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:25:53.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:25:53.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:25:53.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:25:53.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:25:53.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:25:53.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:25:53.008 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:25:53.008 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:25:53.048 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:25:53.048 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-12-15 05:25:53.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:25:53.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:25:53.436 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:25:53.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:25:53.475 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:25:53.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:25:53.475 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:25:53.913 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:25:54.392 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:25:54.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:25:54.476 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:25:54.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:25:54.476 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:25:54.871 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:25:55.349 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:25:55.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:25:55.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:25:55.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:25:55.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:25:55.827 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:25:56.306 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:25:56.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:25:56.478 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:25:56.478 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:25:56.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:25:56.785 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:25:57.264 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:25:57.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:25:57.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:25:57.479 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:25:57.479 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:25:57.742 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:25:58.220 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:25:58.699 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:25:59.176 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:25:59.655 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:26:00.133 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:26:00.611 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:26:01.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:26:01.053 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:26:01.053 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:26:01.054 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:26:01.054 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:26:01.054 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:26:01.054 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:26:01.055 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:26:01.056 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:26:01.056 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:26:01.056 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:26:01.056 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:26:01.056 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:26:01.056 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:26:01.056 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1832 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:26:01.056 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1832 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:26:01.056 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1832 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:26:01.056 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1832 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:26:01.056 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1832 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:26:01.056 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1832 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:26:01.056 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1832 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:26:01.056 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=1832 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:26:06.060 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:26:06.060 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:26:06.063 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:26:06.064 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:26:06.064 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:26:06.065 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:26:06.081 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:26:06.083 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:26:06.083 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:26:06.083 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:26:06.083 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:26:06.089 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:26:06.089 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:26:06.089 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:26:06.089 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:26:06.090 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:26:06.090 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:26:06.090 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:26:06.090 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:26:06.096 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:26:06.096 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:26:06.096 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:26:06.096 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:26:06.097 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:26:06.097 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:26:06.097 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:26:06.097 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:26:06.102 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:26:06.102 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:26:06.102 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:26:06.102 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:26:06.102 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:26:06.102 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:26:06.103 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:26:06.103 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:26:06.114 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:26:06.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:26:06.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:26:06.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:26:06.114 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:26:06.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:26:06.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:26:06.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:26:06.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:06.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:26:06.115 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:26:06.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:06.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:06.115 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:26:06.115 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:26:06.115 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:26:06.115 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:26:06.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:06.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:06.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:06.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:26:06.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:06.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:06.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:06.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:06.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:06.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:06.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:06.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:06.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:06.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:06.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:06.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:06.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:06.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:06.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:06.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:06.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:06.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:06.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:06.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:06.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:06.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:06.117 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:26:06.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:06.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:06.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:06.117 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:26:06.117 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:26:06.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:06.118 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:26:06.118 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:26:06.118 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:26:06.118 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:26:11.123 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:26:11.123 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:26:11.125 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:26:11.126 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:26:11.126 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:26:11.127 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:26:11.137 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:26:11.138 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:26:11.138 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:26:11.138 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:26:11.138 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:26:11.141 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:26:11.141 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:26:11.142 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:26:11.142 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:26:11.142 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:26:11.142 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:26:11.143 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:26:11.143 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:26:11.145 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:26:11.145 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:26:11.146 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:26:11.146 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:26:11.146 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:26:11.146 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:26:11.146 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:26:11.146 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:26:11.148 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:26:11.149 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:26:11.149 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:26:11.149 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:26:11.149 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:26:11.149 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:26:11.149 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:26:11.149 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:26:11.153 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:26:11.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:26:11.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:26:11.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:26:11.153 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:26:11.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:26:11.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:26:11.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:26:11.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:11.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:26:11.154 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:26:11.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:11.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:11.154 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:26:11.154 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:26:11.154 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:26:11.154 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:26:11.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:11.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:11.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:11.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:26:11.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:11.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:11.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:11.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:11.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:11.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:11.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:11.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:11.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:11.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:11.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:11.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:11.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:11.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:11.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:11.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:11.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:11.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:11.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:11.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:11.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:11.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:11.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:11.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:11.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:11.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:11.159 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:26:11.643 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:26:11.675 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:26:11.677 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:26:11.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:26:11.678 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:26:11.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:26:11.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:26:11.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:26:11.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:26:11.681 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:26:11.681 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:26:11.681 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:26:11.681 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:26:12.120 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:26:12.157 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:26:12.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:26:12.158 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:26:12.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:26:12.598 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:26:13.076 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:26:13.159 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:26:13.160 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:26:13.160 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:26:13.160 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:26:13.553 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:26:14.031 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:26:14.161 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:26:14.161 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:26:14.161 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:26:14.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:26:14.509 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:26:14.987 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:26:15.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:26:15.163 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:26:15.163 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:26:15.163 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:26:15.464 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:26:15.942 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:26:16.164 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:26:16.164 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:26:16.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:26:16.164 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:26:16.420 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:26:16.898 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:26:17.376 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:26:17.854 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:26:18.332 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:26:18.811 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:26:19.288 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:26:19.765 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:26:20.244 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:26:20.722 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:26:21.200 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:26:21.678 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:26:21.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:26:21.693 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:26:21.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:26:21.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:26:21.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:26:21.696 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:26:21.697 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:26:21.697 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:26:21.697 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:26:21.697 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:26:21.697 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:26:21.697 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:26:21.697 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:26:21.697 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2250 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:26:21.697 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2250 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:26:21.697 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2250 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:26:21.697 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2250 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:26:21.697 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2250 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:26:21.697 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2250 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:26:21.697 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2250 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:26:21.697 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2250 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:26:26.701 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:26:26.701 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:26:26.702 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:26:26.703 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:26:26.703 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:26:26.704 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:26:26.714 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:26:26.715 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:26:26.715 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:26:26.715 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:26:26.715 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:26:26.718 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:26:26.719 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:26:26.719 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:26:26.719 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:26:26.719 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:26:26.719 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:26:26.719 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:26:26.719 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:26:26.723 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:26:26.723 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:26:26.723 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:26:26.723 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:26:26.723 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:26:26.723 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:26:26.723 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:26:26.723 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:26:26.727 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:26:26.727 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:26:26.727 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:26:26.727 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:26:26.727 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:26:26.727 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:26:26.727 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:26:26.727 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:26:26.732 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:26:26.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:26:26.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:26:26.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:26:26.733 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:26:26.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:26:26.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:26:26.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:26:26.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:26.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:26:26.733 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:26:26.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:26.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:26.733 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:26:26.733 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:26:26.733 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:26:26.734 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:26:26.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:26.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:26.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:26.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:26:26.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:26.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:26.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:26.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:26.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:26.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:26.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:26.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:26.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:26.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:26.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:26.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:26.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:26.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:26.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:26.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:26.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:26.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:26.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:26.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:26.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:26.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:26.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:26.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:26.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:26.737 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:26:26.737 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:26:26.737 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:26:26.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:26.737 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:26:26.737 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:26:26.737 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:26:26.737 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:26:31.742 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:26:31.742 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:26:31.743 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:26:31.744 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:26:31.744 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:26:31.745 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:26:31.754 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:26:31.755 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:26:31.755 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:26:31.756 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:26:31.756 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:26:31.760 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:26:31.760 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:26:31.760 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:26:31.760 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:26:31.761 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:26:31.761 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:26:31.761 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:26:31.761 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:26:31.763 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:26:31.764 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:26:31.764 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:26:31.764 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:26:31.764 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:26:31.764 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:26:31.764 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:26:31.764 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:26:31.767 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:26:31.767 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:26:31.767 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:26:31.767 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:26:31.767 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:26:31.767 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:26:31.767 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:26:31.767 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:26:31.771 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:26:31.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:26:31.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:26:31.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:26:31.771 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:26:31.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:26:31.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:26:31.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:26:31.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:31.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:26:31.771 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:26:31.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:31.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:31.771 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:26:31.771 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:26:31.771 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:26:31.771 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:26:31.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:31.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:31.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:31.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:26:31.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:31.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:31.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:31.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:31.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:31.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:31.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:31.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:31.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:31.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:31.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:31.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:31.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:31.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:31.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:31.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:31.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:31.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:31.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:31.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:31.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:31.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:31.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:31.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:31.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:31.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:31.776 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:26:32.260 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:26:32.295 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:26:32.297 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:26:32.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:26:32.299 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:26:32.301 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:26:32.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:26:32.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:26:32.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:26:32.302 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:26:32.302 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:26:32.302 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:26:32.302 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:26:32.303 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:26:32.304 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-12-15 05:26:32.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:26:32.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:26:32.738 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:26:32.775 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:26:32.775 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:26:32.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:26:32.775 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:26:33.216 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:26:33.695 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:26:33.776 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:26:33.776 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:26:33.777 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:26:33.777 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:26:34.173 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:26:34.651 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:26:34.777 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:26:34.777 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:26:34.777 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:26:34.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:26:35.129 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:26:35.608 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:26:35.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:26:35.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:26:35.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:26:35.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:26:36.086 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:26:36.564 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:26:36.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:26:36.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:26:36.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:26:36.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:26:37.042 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:26:37.518 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:26:37.996 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:26:38.474 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:26:38.952 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:26:39.430 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:26:39.908 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:26:40.386 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:26:40.865 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:26:41.343 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:26:41.821 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:26:42.299 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:26:42.778 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 05:26:43.256 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 05:26:43.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:26:43.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:26:43.308 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:26:43.313 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:26:43.313 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:26:43.313 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:26:43.313 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:26:43.314 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:26:43.314 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:26:43.314 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:26:43.314 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:26:43.314 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:26:43.314 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:26:43.314 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:26:43.314 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2462 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:26:43.315 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2462 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:26:43.315 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2462 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:26:43.315 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2462 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:26:43.315 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2462 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:26:48.317 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:26:48.318 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:26:48.320 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:26:48.321 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:26:48.322 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:26:48.323 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:26:48.332 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:26:48.333 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:26:48.333 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:26:48.333 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:26:48.333 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:26:48.336 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:26:48.336 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:26:48.336 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:26:48.336 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:26:48.336 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:26:48.337 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:26:48.337 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:26:48.337 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:26:48.339 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:26:48.339 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:26:48.339 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:26:48.339 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:26:48.339 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:26:48.340 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:26:48.340 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:26:48.340 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:26:48.342 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:26:48.342 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:26:48.342 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:26:48.342 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:26:48.342 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:26:48.342 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:26:48.342 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:26:48.342 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:26:48.345 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:26:48.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:26:48.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:26:48.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:26:48.345 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:26:48.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:26:48.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:26:48.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:26:48.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:48.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:26:48.346 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:26:48.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:48.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:48.346 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:26:48.346 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:26:48.346 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:26:48.346 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:26:48.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:48.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:48.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:48.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:26:48.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:48.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:48.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:48.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:48.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:48.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:48.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:48.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:48.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:48.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:48.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:48.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:48.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:48.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:48.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:48.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:48.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:48.347 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:48.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:48.347 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:48.347 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:26:48.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:48.347 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:48.347 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:48.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:48.347 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:26:48.347 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:26:48.347 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:48.348 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:26:48.348 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:26:48.348 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:26:48.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:53.354 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:26:53.354 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:26:53.355 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:26:53.355 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:26:53.355 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:26:53.356 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:26:53.365 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:26:53.366 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:26:53.367 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:26:53.367 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:26:53.367 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:26:53.371 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:26:53.371 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:26:53.372 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:26:53.372 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:26:53.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:26:53.373 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:26:53.373 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:26:53.373 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:26:53.375 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:26:53.375 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:26:53.376 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:26:53.376 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:26:53.376 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:26:53.376 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:26:53.376 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:26:53.376 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:26:53.379 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:26:53.379 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:26:53.379 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:26:53.379 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:26:53.379 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:26:53.379 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:26:53.379 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:26:53.379 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:26:53.384 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:26:53.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:26:53.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:26:53.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:26:53.384 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:26:53.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:26:53.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:26:53.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:26:53.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:53.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:26:53.385 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:26:53.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:53.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:53.385 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:26:53.385 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:26:53.385 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:26:53.385 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:26:53.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:53.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:53.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:53.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:26:53.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:53.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:53.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:53.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:53.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:53.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:53.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:53.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:53.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:53.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:53.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:53.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:53.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:53.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:53.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:26:53.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:53.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:53.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:53.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:53.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:53.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:53.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:53.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:26:53.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:26:53.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:53.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:26:53.390 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:26:53.873 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:26:53.913 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:26:53.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:26:53.916 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:26:53.919 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:26:54.350 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:26:54.389 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:26:54.390 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:26:54.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:26:54.390 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:26:54.828 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:26:55.307 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:26:55.391 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:26:55.391 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:26:55.391 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:26:55.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:26:55.785 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:26:56.264 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:26:56.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:26:56.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:26:56.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:26:56.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:26:56.743 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:26:57.222 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:26:57.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:26:57.394 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:26:57.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:26:57.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:26:57.701 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:26:58.180 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:26:58.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:26:58.396 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:26:58.396 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:26:58.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:26:58.658 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:26:59.137 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:26:59.615 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:27:00.093 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:27:00.572 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:27:01.051 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:27:01.529 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:27:02.008 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:27:02.486 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:27:02.965 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:27:03.443 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:27:03.922 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:27:03.929 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:27:03.929 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:27:03.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:27:03.929 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:27:03.930 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:27:03.930 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:27:03.930 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:27:03.930 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:27:03.930 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:27:03.930 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:27:03.930 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:27:08.936 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:27:08.936 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:27:08.936 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:27:08.937 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:27:08.937 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:27:08.938 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:27:08.947 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:27:08.949 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:27:08.949 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:27:08.949 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:27:08.949 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:27:08.953 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:27:08.953 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:27:08.953 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:27:08.954 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:27:08.954 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:27:08.954 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:27:08.955 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:27:08.955 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:27:08.958 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:27:08.958 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:27:08.958 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:27:08.958 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:27:08.958 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:27:08.958 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:27:08.959 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:27:08.959 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:27:08.962 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:27:08.962 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:27:08.962 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:27:08.963 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:27:08.963 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:27:08.963 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:27:08.963 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:27:08.963 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:27:08.968 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:27:08.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:27:08.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:27:08.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:27:08.969 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:27:08.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:27:08.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:27:08.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:27:08.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:27:08.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:27:08.969 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:27:08.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:27:08.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:27:08.970 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:27:08.970 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:27:08.970 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:27:08.970 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:27:08.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:27:08.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:27:08.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:27:08.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:27:08.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:27:08.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:27:08.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:27:08.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:27:08.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:27:08.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:27:08.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:27:08.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:27:08.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:27:08.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:27:08.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:27:08.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:27:08.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:27:08.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:27:08.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:27:08.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:27:08.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:27:08.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:27:08.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:27:08.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:27:08.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:27:08.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:27:08.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:27:08.972 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:27:08.972 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:27:08.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:27:08.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:27:08.973 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:27:08.973 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:27:08.973 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:27:08.973 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:27:08.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:27:13.978 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:27:13.978 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:27:13.979 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:27:13.980 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:27:13.980 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:27:13.981 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:27:13.988 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:27:13.989 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:27:13.989 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:27:13.990 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:27:13.990 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:27:13.992 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:27:13.993 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:27:13.993 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:27:13.993 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:27:13.993 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:27:13.993 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:27:13.994 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:27:13.994 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:27:13.998 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:27:13.998 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:27:13.998 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:27:13.998 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:27:13.998 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:27:13.998 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:27:13.999 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:27:13.999 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:27:14.001 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:27:14.001 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:27:14.001 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:27:14.001 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:27:14.002 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:27:14.002 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:27:14.002 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:27:14.002 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:27:14.005 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:27:14.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:27:14.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:27:14.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:27:14.006 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:27:14.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:27:14.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:27:14.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:27:14.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:27:14.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:27:14.006 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:27:14.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:27:14.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:27:14.006 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:27:14.006 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:27:14.006 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:27:14.006 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:27:14.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:27:14.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:27:14.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:27:14.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:27:14.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:27:14.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:27:14.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:27:14.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:27:14.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:27:14.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:27:14.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:27:14.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:27:14.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:27:14.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:27:14.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:27:14.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:27:14.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:27:14.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:27:14.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:27:14.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:27:14.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:27:14.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:27:14.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:27:14.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:27:14.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:27:14.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:27:14.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:27:14.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:27:14.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:27:14.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:27:14.011 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:27:14.495 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:27:14.523 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:27:14.524 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:27:14.525 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:27:14.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:27:14.972 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:27:15.010 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:27:15.010 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:27:15.011 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:27:15.011 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:27:15.452 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:27:15.930 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:27:16.012 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:27:16.013 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:27:16.013 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:27:16.013 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:27:16.409 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:27:16.887 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:27:17.014 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:27:17.014 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:27:17.014 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:27:17.014 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:27:17.366 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:27:17.845 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:27:18.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:27:18.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:27:18.016 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:27:18.016 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:27:18.324 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:27:18.801 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:27:19.018 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:27:19.018 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:27:19.018 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:27:19.018 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:27:19.279 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:27:19.758 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:27:20.236 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:27:20.715 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:27:21.194 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:27:21.672 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:27:22.151 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:27:22.630 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:27:23.108 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:27:23.587 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:27:24.065 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:27:24.544 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:27:25.023 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 05:27:25.500 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 05:27:25.979 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 05:27:26.458 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 05:27:26.535 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:27:26.535 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:27:26.535 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:27:26.535 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:27:26.536 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:27:26.536 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:27:26.536 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:27:26.536 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:27:26.536 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:27:26.536 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:27:26.536 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:27:26.536 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2671 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:27:26.536 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2671 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:27:26.537 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2671 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:27:26.537 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2671 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:27:26.537 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2671 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:27:26.537 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2671 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:27:26.537 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2671 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:27:26.537 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2671 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:27:31.540 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:27:31.540 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:27:31.541 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:27:31.542 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:27:31.542 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:27:31.543 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:27:31.552 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:27:31.553 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:27:31.553 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:27:31.553 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:27:31.553 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:27:31.556 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:27:31.556 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:27:31.556 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:27:31.556 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:27:31.557 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:27:31.557 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:27:31.557 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:27:31.557 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:27:31.559 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:27:31.559 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:27:31.559 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:27:31.559 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:27:31.560 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:27:31.560 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:27:31.560 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:27:31.560 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:27:31.562 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:27:31.562 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:27:31.562 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:27:31.562 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:27:31.563 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:27:31.563 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:27:31.563 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:27:31.563 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:27:31.566 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:27:31.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:27:31.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:27:31.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:27:31.566 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:27:31.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:27:31.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:27:31.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:27:31.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:27:31.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:27:31.567 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:27:31.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:27:31.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:27:31.567 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:27:31.567 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:27:31.567 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:27:31.567 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:27:31.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:27:31.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:27:31.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:27:31.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:27:31.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:27:31.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:27:31.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:27:31.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:27:31.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:27:31.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:27:31.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:27:31.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:27:31.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:27:31.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:27:31.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:27:31.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:27:31.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:27:31.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:27:31.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:27:31.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:27:31.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:27:31.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:27:31.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:27:31.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:27:31.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:27:31.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:27:31.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:27:31.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:27:31.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:27:31.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:27:31.572 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:27:32.057 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:27:32.084 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:27:32.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:27:32.086 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:27:32.088 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:27:32.090 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:27:32.090 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:27:32.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:27:32.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:27:32.090 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:27:32.091 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:27:32.091 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:27:32.091 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:27:32.534 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:27:32.571 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:27:32.571 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:27:32.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:27:32.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:27:33.012 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:27:33.490 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:27:33.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:27:33.572 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:27:33.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:27:33.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:27:33.968 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:27:34.446 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:27:34.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:27:34.574 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:27:34.574 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:27:34.574 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:27:34.924 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:27:35.402 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:27:35.574 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:27:35.575 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:27:35.575 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:27:35.575 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:27:35.882 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:27:36.360 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:27:36.575 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:27:36.575 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:27:36.576 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:27:36.576 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:27:36.838 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:27:37.316 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:27:37.794 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:27:38.272 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:27:38.750 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:27:39.228 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:27:39.706 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:27:40.184 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:27:40.662 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:27:41.140 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:27:41.618 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:27:42.096 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:27:42.574 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 05:27:43.052 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 05:27:43.106 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:27:43.106 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:27:43.112 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:27:43.112 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:27:43.112 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:27:43.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:27:43.116 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:27:43.116 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:27:43.116 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:27:43.116 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:27:43.116 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:27:43.116 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:27:43.116 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:27:43.116 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2462 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:27:43.116 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2462 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:27:43.116 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2462 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:27:43.116 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2462 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:27:43.116 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2462 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:27:43.116 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2462 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:27:43.117 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2463 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:27:43.117 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2463 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:27:43.117 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2463 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:27:43.117 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2463 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:27:43.117 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2463 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:27:43.117 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2463 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:27:43.117 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2463 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:27:43.117 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2463 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:27:48.116 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:27:48.116 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:27:48.119 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:27:48.120 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:27:48.120 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:27:48.121 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:27:48.131 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:27:48.132 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:27:48.132 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:27:48.132 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:27:48.132 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:27:48.135 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:27:48.135 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:27:48.135 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:27:48.135 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:27:48.135 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:27:48.136 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:27:48.136 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:27:48.136 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:27:48.138 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:27:48.138 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:27:48.138 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:27:48.138 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:27:48.138 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:27:48.138 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:27:48.138 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:27:48.138 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:27:48.140 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:27:48.140 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:27:48.141 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:27:48.141 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:27:48.141 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:27:48.141 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:27:48.141 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:27:48.141 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:27:48.144 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:27:48.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:27:48.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:27:48.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:27:48.144 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:27:48.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:27:48.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:27:48.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:27:48.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:27:48.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:27:48.144 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:27:48.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:27:48.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:27:48.144 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:27:48.144 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:27:48.144 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:27:48.145 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:27:48.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:27:48.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:27:48.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:27:48.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:27:48.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:27:48.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:27:48.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:27:48.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:27:48.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:27:48.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:27:48.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:27:48.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:27:48.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:27:48.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:27:48.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:27:48.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:27:48.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:27:48.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:27:48.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:27:48.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:27:48.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:27:48.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:27:48.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:27:48.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:27:48.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:27:48.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:27:48.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:27:48.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:27:48.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:27:48.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:27:48.149 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:27:48.634 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:27:48.662 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:27:48.663 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:27:48.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:27:48.664 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:27:48.665 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:27:48.665 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:27:48.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:27:48.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:27:48.665 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:27:48.666 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:27:48.666 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:27:48.666 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:27:49.111 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:27:49.148 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:27:49.148 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:27:49.148 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:27:49.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:27:49.590 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:27:50.067 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:27:50.149 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:27:50.149 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:27:50.149 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:27:50.149 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:27:50.545 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:27:51.023 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:27:51.150 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:27:51.150 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:27:51.150 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:27:51.150 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:27:51.501 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:27:51.979 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:27:52.150 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:27:52.151 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:27:52.151 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:27:52.151 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:27:52.456 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:27:52.934 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:27:53.151 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:27:53.152 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:27:53.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:27:53.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:27:53.412 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:27:53.889 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:27:54.367 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:27:54.845 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:27:55.323 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:27:55.801 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:27:56.279 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:27:56.757 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:27:57.235 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:27:57.714 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:27:58.192 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:27:58.670 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:27:59.147 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 05:27:59.625 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 05:28:00.103 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 05:28:00.580 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 05:28:01.055 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 05:28:01.529 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 05:28:02.007 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 05:28:02.485 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 05:28:02.962 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 05:28:03.440 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 05:28:03.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:28:03.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:28:03.690 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:28:03.690 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:28:03.690 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:28:03.690 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:28:03.695 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:28:03.695 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:28:03.695 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:28:03.695 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:28:03.696 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:28:03.696 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:28:03.696 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:28:08.694 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:28:08.694 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:28:08.695 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:28:08.696 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:28:08.696 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:28:08.697 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:28:08.706 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:28:08.707 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:28:08.708 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:28:08.708 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:28:08.708 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:28:08.712 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:28:08.712 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:28:08.712 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:28:08.712 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:28:08.713 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:28:08.713 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:28:08.713 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:28:08.713 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:28:08.715 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:28:08.715 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:28:08.716 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:28:08.716 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:28:08.716 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:28:08.716 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:28:08.716 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:28:08.716 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:28:08.719 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:28:08.719 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:28:08.719 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:28:08.719 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:28:08.719 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:28:08.719 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:28:08.719 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:28:08.719 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:28:08.723 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:28:08.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:28:08.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:28:08.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:28:08.723 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:28:08.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:28:08.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:28:08.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:28:08.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:28:08.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:28:08.723 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:28:08.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:28:08.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:28:08.723 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:28:08.723 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:28:08.723 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:28:08.724 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:28:08.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:28:08.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:28:08.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:28:08.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:28:08.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:28:08.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:28:08.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:28:08.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:28:08.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:28:08.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:28:08.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:28:08.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:28:08.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:28:08.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:28:08.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:28:08.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:28:08.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:28:08.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:28:08.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:28:08.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:28:08.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:28:08.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:28:08.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:28:08.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:28:08.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:28:08.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:28:08.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:28:08.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:28:08.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:28:08.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:28:08.728 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:28:09.210 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:28:09.246 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:28:09.248 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:28:09.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:28:09.250 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:28:09.256 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:28:09.256 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:28:09.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:28:09.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:09.257 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:28:09.257 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:28:09.257 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:28:09.257 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:28:09.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:28:09.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:28:09.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:28:09.314 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:28:09.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:28:09.314 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:28:09.317 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:28:09.317 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:28:09.317 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:28:09.317 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:28:09.317 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:28:09.317 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:28:09.317 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:28:14.320 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:28:14.320 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:28:14.321 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:28:14.321 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:28:14.322 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:28:14.322 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:28:14.332 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:28:14.333 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:28:14.333 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:28:14.333 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:28:14.333 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:28:14.337 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:28:14.337 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:28:14.338 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:28:14.338 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:28:14.338 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:28:14.338 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:28:14.339 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:28:14.339 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:28:14.342 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:28:14.342 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:28:14.342 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:28:14.342 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:28:14.342 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:28:14.342 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:28:14.343 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:28:14.343 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:28:14.346 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:28:14.346 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:28:14.346 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:28:14.346 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:28:14.346 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:28:14.346 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:28:14.346 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:28:14.346 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:28:14.351 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:28:14.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:28:14.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:28:14.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:28:14.352 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:28:14.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:28:14.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:28:14.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:28:14.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:28:14.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:28:14.352 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:28:14.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:28:14.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:28:14.353 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:28:14.353 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:28:14.353 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:28:14.353 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:28:14.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:28:14.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:28:14.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:28:14.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:28:14.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:28:14.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:28:14.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:28:14.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:28:14.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:28:14.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:28:14.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:28:14.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:28:14.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:28:14.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:28:14.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:28:14.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:28:14.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:28:14.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:28:14.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:28:14.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:28:14.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:28:14.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:28:14.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:28:14.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:28:14.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:28:14.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:28:14.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:28:14.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:28:14.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:28:14.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:28:14.357 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:28:14.841 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:28:14.875 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:28:14.876 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:28:14.877 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:28:14.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:28:14.887 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:28:14.887 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:28:14.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:28:14.902 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:28:14.902 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:28:14.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:28:14.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:28:14.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:14.929 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:28:14.929 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:28:14.929 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:28:14.929 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:28:14.933 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:28:14.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:28:14.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:14.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:15.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:15.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:28:15.044 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:28:15.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:28:15.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:28:15.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:28:15.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:28:15.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:28:15.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:28:15.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:28:15.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:28:15.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:15.071 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:28:15.071 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:28:15.071 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:28:15.071 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:28:15.073 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:28:15.073 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:28:15.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:15.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:15.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:15.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:28:15.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:28:15.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:28:15.244 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:28:15.262 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:28:15.262 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:28:15.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:28:15.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:28:15.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:28:15.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:28:15.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:28:15.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:15.270 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:28:15.270 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:28:15.270 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:28:15.270 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:28:15.312 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:28:15.312 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:28:15.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:15.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:15.314 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:28:15.357 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:28:15.357 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:28:15.357 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:28:15.359 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:28:15.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:15.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:28:15.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:28:15.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:28:15.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:28:15.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:28:15.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:28:15.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:28:15.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:28:15.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:28:15.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:28:15.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:15.735 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:28:15.735 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:28:15.735 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:28:15.735 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:28:15.783 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:28:15.784 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:28:15.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:15.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:15.792 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:28:16.271 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:28:16.358 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:28:16.358 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:28:16.358 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:28:16.360 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:28:16.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:16.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:28:16.595 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:28:16.595 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:28:16.595 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:28:16.607 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:28:16.607 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:28:16.608 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:28:16.608 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:28:16.614 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:28:16.614 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:28:16.615 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:28:16.615 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:28:16.615 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:28:16.615 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:28:16.615 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:28:16.615 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=483 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:28:16.615 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=483 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:28:16.616 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=483 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:28:16.616 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=483 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:28:16.616 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=483 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:28:16.616 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=483 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:28:16.616 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=484 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:28:16.616 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=484 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:28:16.616 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=484 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:28:16.616 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=484 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:28:16.616 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=484 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:28:16.616 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=484 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:28:16.617 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=484 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:28:16.617 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=484 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:28:21.612 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:28:21.612 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:28:21.612 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:28:21.613 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:28:21.613 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:28:21.614 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:28:21.624 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:28:21.625 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:28:21.625 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:28:21.625 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:28:21.625 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:28:21.628 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:28:21.629 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:28:21.629 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:28:21.629 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:28:21.629 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:28:21.629 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:28:21.629 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:28:21.629 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:28:21.632 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:28:21.633 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:28:21.633 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:28:21.633 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:28:21.633 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:28:21.633 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:28:21.633 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:28:21.633 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:28:21.636 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:28:21.636 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:28:21.636 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:28:21.637 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:28:21.637 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:28:21.637 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:28:21.637 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:28:21.637 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:28:21.641 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:28:21.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:28:21.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:28:21.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:28:21.642 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:28:21.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:28:21.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:28:21.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:28:21.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:28:21.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:28:21.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:28:21.642 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:28:21.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:28:21.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:28:21.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:28:21.642 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:28:21.642 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:28:21.642 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:28:21.643 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:28:21.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:28:21.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:28:21.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:28:21.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:28:21.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:28:21.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:28:21.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:28:21.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:28:21.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:28:21.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:28:21.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:28:21.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:28:21.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:28:21.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:28:21.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:28:21.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:28:21.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:28:21.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:28:21.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:28:21.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:28:21.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:28:21.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:28:21.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:28:21.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:28:21.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:28:21.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:28:21.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:28:21.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:28:21.647 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:28:22.131 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:28:22.168 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:28:22.171 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:28:22.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:28:22.173 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:28:22.196 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:28:22.196 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:28:22.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:28:22.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:28:22.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:28:22.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:28:22.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:28:22.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:22.219 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:28:22.219 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:28:22.219 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:28:22.219 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:28:22.222 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:28:22.222 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:28:22.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:22.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:22.609 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:28:22.646 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:28:22.647 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:28:22.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:28:22.647 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:28:23.087 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:28:23.565 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:28:23.647 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:28:23.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:28:23.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:28:23.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:28:24.042 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:28:24.520 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:28:24.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:28:24.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:28:24.649 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:28:24.649 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:28:24.998 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:28:25.473 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:28:25.649 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:28:25.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:28:25.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:28:25.650 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:28:25.948 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:28:26.427 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:28:26.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:28:26.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:28:26.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:28:26.651 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:28:26.905 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:28:27.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:27.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:28:27.230 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:28:27.230 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:28:27.248 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:28:27.248 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:28:27.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:28:27.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:28:27.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:28:27.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:28:27.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:28:27.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:27.256 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:28:27.256 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:28:27.256 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:28:27.256 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:28:27.278 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:28:27.279 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:28:27.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:27.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:27.382 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:28:27.860 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:28:28.339 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:28:28.817 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:28:29.295 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:28:29.775 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:28:30.253 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:28:30.732 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:28:31.211 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:28:31.691 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:28:32.170 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:28:32.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:32.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:28:32.288 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:28:32.289 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:28:32.289 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:28:32.307 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:28:32.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:28:32.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:28:32.313 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:28:32.313 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:28:32.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:28:32.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:28:32.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:32.315 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:28:32.315 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:28:32.315 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:28:32.315 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:28:32.354 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:28:32.354 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:28:32.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:32.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:32.647 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 05:28:33.125 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 05:28:33.603 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 05:28:34.081 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 05:28:34.558 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 05:28:35.037 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 05:28:35.515 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 05:28:35.993 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 05:28:36.471 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 05:28:36.949 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 05:28:37.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:37.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:28:37.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:28:37.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:28:37.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:28:37.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:28:37.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:28:37.418 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:28:37.418 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:28:37.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:28:37.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:28:37.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:37.422 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:28:37.422 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:28:37.422 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:28:37.422 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:28:37.426 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 05:28:37.472 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:28:37.472 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:28:37.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:37.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:37.902 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 05:28:38.379 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 05:28:38.856 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 05:28:39.334 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 05:28:39.813 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 05:28:40.291 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 05:28:40.769 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 05:28:41.248 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 05:28:41.726 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 05:28:42.205 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 05:28:42.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:42.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:28:42.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:28:42.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:28:42.483 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:28:42.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:28:42.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:28:42.493 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:28:42.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:28:42.497 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:28:42.497 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:28:42.497 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:28:42.497 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:28:42.497 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:28:42.497 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:28:42.497 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:28:47.518 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:28:47.518 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:28:47.520 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:28:47.521 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:28:47.522 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:28:47.523 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:28:47.536 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:28:47.538 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:28:47.538 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:28:47.538 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:28:47.538 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:28:47.544 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:28:47.545 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:28:47.545 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:28:47.545 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:28:47.545 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:28:47.546 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:28:47.546 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:28:47.546 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:28:47.549 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:28:47.550 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:28:47.550 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:28:47.550 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:28:47.550 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:28:47.550 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:28:47.550 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:28:47.550 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:28:47.555 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:28:47.555 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:28:47.556 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:28:47.556 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:28:47.556 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:28:47.556 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:28:47.556 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:28:47.556 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:28:47.562 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:28:47.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:28:47.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:28:47.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:28:47.562 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:28:47.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:28:47.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:28:47.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:28:47.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:28:47.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:28:47.563 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:28:47.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:28:47.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:28:47.563 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:28:47.563 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:28:47.563 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:28:47.563 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:28:47.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:28:47.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:28:47.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:28:47.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:28:47.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:28:47.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:28:47.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:28:47.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:28:47.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:28:47.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:28:47.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:28:47.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:28:47.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:28:47.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:28:47.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:28:47.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:28:47.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:28:47.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:28:47.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:28:47.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:28:47.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:28:47.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:28:47.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:28:47.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:28:47.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:28:47.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:28:47.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:28:47.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:28:47.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:28:47.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:28:47.568 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:28:48.051 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:28:48.090 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:28:48.092 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:28:48.094 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:28:48.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:28:48.117 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:28:48.117 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:28:48.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:28:48.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:28:48.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:28:48.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:28:48.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:28:48.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:48.145 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:28:48.145 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:28:48.145 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:28:48.145 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:28:48.189 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:28:48.189 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:28:48.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:48.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:48.528 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:28:48.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:28:48.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:28:48.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:28:48.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:28:49.007 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:28:49.485 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:28:49.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:28:49.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:28:49.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:28:49.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:28:49.964 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:28:50.441 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:28:50.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:28:50.569 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:28:50.569 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:28:50.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:28:50.920 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:28:51.399 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:28:51.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:28:51.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:28:51.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:28:51.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:28:51.876 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:28:52.354 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:28:52.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:28:52.571 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:28:52.571 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:28:52.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:28:52.832 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:28:53.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:53.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:28:53.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:28:53.200 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:28:53.219 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:28:53.219 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:28:53.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:28:53.224 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:28:53.224 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:28:53.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:28:53.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:28:53.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:53.226 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:28:53.226 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:28:53.226 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:28:53.226 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:28:53.251 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:28:53.251 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:28:53.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:53.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:53.309 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:28:53.786 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:28:54.265 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:28:54.743 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:28:55.222 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:28:55.700 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:28:56.179 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:28:56.658 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:28:57.137 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:28:57.615 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:28:58.094 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:28:58.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:58.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:28:58.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:28:58.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:28:58.261 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:28:58.281 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:28:58.281 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:28:58.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:28:58.287 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:28:58.287 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:28:58.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:28:58.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:28:58.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:58.289 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:28:58.289 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:28:58.289 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:28:58.289 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:28:58.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:28:58.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:28:58.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:58.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:28:58.571 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 05:28:59.049 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 05:28:59.527 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 05:29:00.005 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 05:29:00.483 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 05:29:00.960 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 05:29:01.438 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 05:29:01.916 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 05:29:02.393 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 05:29:02.871 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 05:29:03.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:29:03.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:29:03.339 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:29:03.339 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:29:03.349 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 05:29:03.357 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:29:03.357 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:29:03.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:29:03.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:29:03.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:29:03.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:29:03.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:29:03.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:29:03.365 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:29:03.365 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:29:03.365 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:29:03.365 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:29:03.395 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:29:03.395 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:29:03.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:29:03.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:29:03.827 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 05:29:04.305 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 05:29:04.784 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 05:29:05.262 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 05:29:05.741 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 05:29:06.219 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 05:29:06.697 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 05:29:07.176 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 05:29:07.654 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 05:29:08.133 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 05:29:08.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:29:08.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:29:08.405 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:29:08.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:29:08.406 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:29:08.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:29:08.412 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:29:08.412 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:29:08.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:29:08.413 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:29:08.413 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:29:08.413 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:29:08.413 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:29:08.413 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:29:08.413 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:29:08.413 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:29:13.417 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:29:13.417 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:29:13.419 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:29:13.420 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:29:13.420 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:29:13.421 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:29:13.433 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:29:13.434 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:29:13.434 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:29:13.435 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:29:13.435 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:29:13.437 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:29:13.438 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:29:13.438 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:29:13.438 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:29:13.438 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:29:13.439 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:29:13.439 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:29:13.439 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:29:13.441 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:29:13.441 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:29:13.441 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:29:13.442 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:29:13.442 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:29:13.442 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:29:13.442 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:29:13.442 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:29:13.445 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:29:13.445 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:29:13.445 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:29:13.445 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:29:13.445 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:29:13.445 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:29:13.445 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:29:13.445 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:29:13.449 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:29:13.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:29:13.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:29:13.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:29:13.449 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:29:13.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:29:13.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:29:13.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:29:13.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:29:13.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:29:13.450 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:29:13.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:29:13.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:29:13.450 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:29:13.450 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:29:13.450 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:29:13.450 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:29:13.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:29:13.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:29:13.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:29:13.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:29:13.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:29:13.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:29:13.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:29:13.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:29:13.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:29:13.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:29:13.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:29:13.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:29:13.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:29:13.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:29:13.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:29:13.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:29:13.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:29:13.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:29:13.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:29:13.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:29:13.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:29:13.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:29:13.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:29:13.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:29:13.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:29:13.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:29:13.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:29:13.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:29:13.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:29:13.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:29:13.455 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:29:13.937 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:29:13.971 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:29:13.973 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:29:13.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:29:13.974 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:29:13.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:29:13.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:29:13.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:29:13.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:29:13.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:29:13.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:29:14.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:29:14.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:29:14.026 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:29:14.026 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:29:14.026 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:29:14.026 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:29:14.076 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:29:14.077 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:29:14.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:29:14.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:29:14.414 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:29:14.453 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:29:14.453 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:29:14.453 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:29:14.454 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:29:14.892 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:29:15.370 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:29:15.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:29:15.454 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:29:15.454 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:29:15.455 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:29:15.849 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:29:16.327 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:29:16.455 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:29:16.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:29:16.456 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:29:16.456 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:29:16.805 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:29:17.283 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:29:17.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:29:17.457 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:29:17.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:29:17.457 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:29:17.761 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:29:18.239 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:29:18.457 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:29:18.458 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:29:18.458 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:29:18.458 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:29:18.717 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:29:19.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:29:19.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:29:19.086 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:29:19.087 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:29:19.105 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:29:19.105 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:29:19.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:29:19.111 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:29:19.111 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:29:19.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:29:19.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:29:19.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:29:19.113 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:29:19.113 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:29:19.113 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:29:19.113 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:29:19.136 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:29:19.136 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:29:19.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:29:19.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:29:19.194 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:29:19.669 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:29:20.147 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:29:20.626 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:29:21.105 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:29:21.583 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:29:22.062 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:29:22.541 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:29:23.020 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:29:23.497 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:29:23.975 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:29:24.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:29:24.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:29:24.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:29:24.147 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:29:24.147 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:29:24.162 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:29:24.162 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:29:24.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:29:24.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:29:24.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:29:24.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:29:24.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:29:24.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:29:24.170 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:29:24.170 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:29:24.170 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:29:24.170 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:29:24.209 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:29:24.210 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:29:24.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:29:24.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:29:24.452 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 05:29:24.930 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 05:29:25.408 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 05:29:25.886 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 05:29:26.364 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 05:29:26.842 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 05:29:27.319 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 05:29:27.797 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 05:29:28.275 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 05:29:28.753 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 05:29:29.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:29:29.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:29:29.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:29:29.220 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:29:29.230 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 05:29:29.238 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:29:29.239 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:29:29.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:29:29.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:29:29.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:29:29.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:29:29.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:29:29.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:29:29.246 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:29:29.246 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:29:29.246 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:29:29.246 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:29:29.276 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:29:29.276 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:29:29.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:29:29.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:29:29.707 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 05:29:30.185 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 05:29:30.664 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 05:29:31.143 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 05:29:31.621 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 05:29:32.099 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 05:29:32.578 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 05:29:33.057 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 05:29:33.535 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 05:29:34.013 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 05:29:34.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:29:34.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:29:34.285 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:29:34.285 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:29:34.285 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:29:34.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:29:34.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:29:34.299 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:29:34.300 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:29:34.302 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:29:34.302 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:29:34.302 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:29:34.302 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:29:34.302 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:29:34.302 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:29:34.302 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:29:39.305 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:29:39.305 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:29:39.307 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:29:39.307 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:29:39.307 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:29:39.308 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:29:39.316 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:29:39.317 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:29:39.317 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:29:39.317 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:29:39.317 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:29:39.319 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:29:39.320 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:29:39.320 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:29:39.320 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:29:39.320 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:29:39.321 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:29:39.321 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:29:39.321 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:29:39.323 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:29:39.323 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:29:39.323 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:29:39.323 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:29:39.323 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:29:39.323 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:29:39.324 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:29:39.324 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:29:39.326 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:29:39.326 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:29:39.326 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:29:39.326 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:29:39.327 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:29:39.327 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:29:39.327 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:29:39.327 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:29:39.330 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:29:39.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:29:39.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:29:39.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:29:39.330 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:29:39.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:29:39.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:29:39.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:29:39.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:29:39.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:29:39.331 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:29:39.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:29:39.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:29:39.331 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:29:39.331 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:29:39.331 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:29:39.331 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:29:39.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:29:39.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:29:39.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:29:39.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:29:39.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:29:39.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:29:39.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:29:39.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:29:39.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:29:39.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:29:39.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:29:39.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:29:39.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:29:39.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:29:39.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:29:39.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:29:39.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:29:39.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:29:39.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:29:39.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:29:39.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:29:39.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:29:39.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:29:39.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:29:39.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:29:39.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:29:39.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:29:39.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:29:39.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:29:39.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:29:39.336 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:29:39.819 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:29:39.852 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:29:39.854 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:29:39.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:29:39.855 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:29:39.874 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:29:39.874 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:29:39.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:29:39.885 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:29:39.885 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:29:39.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:29:39.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:29:39.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:29:39.905 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:29:39.905 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:29:39.905 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:29:39.906 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:29:39.911 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:29:39.912 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:29:39.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:29:39.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:29:40.297 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:29:40.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:29:40.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:29:40.334 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:29:40.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:29:40.775 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:29:41.254 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:29:41.335 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:29:41.335 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:29:41.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:29:41.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:29:41.732 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:29:42.209 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:29:42.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:29:42.336 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:29:42.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:29:42.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:29:42.688 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:29:43.166 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:29:43.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:29:43.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:29:43.338 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:29:43.338 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:29:43.644 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:29:44.123 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:29:44.339 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:29:44.339 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:29:44.340 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:29:44.340 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:29:44.600 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:29:44.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:29:44.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:29:44.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:29:44.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:29:44.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:29:44.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:29:44.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:29:44.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:29:44.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:29:44.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:29:44.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:29:44.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:29:44.947 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:29:44.947 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:29:44.947 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:29:44.947 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:29:44.975 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:29:44.976 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:29:44.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:29:44.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:29:45.077 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:29:45.556 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:29:46.035 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:29:46.513 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:29:46.992 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:29:47.471 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:29:47.950 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:29:48.429 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:29:48.908 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:29:49.387 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:29:49.866 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:29:49.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:29:49.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:29:49.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:29:49.983 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:29:49.984 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:29:50.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:29:50.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:29:50.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:29:50.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:29:50.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:29:50.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:29:50.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:29:50.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:29:50.010 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:29:50.010 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:29:50.010 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:29:50.010 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:29:50.050 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:29:50.051 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:29:50.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:29:50.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:29:50.343 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 05:29:50.821 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 05:29:51.299 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 05:29:51.777 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 05:29:52.255 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 05:29:52.732 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 05:29:53.210 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 05:29:53.686 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 05:29:54.164 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 05:29:54.642 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 05:29:55.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:29:55.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:29:55.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:29:55.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:29:55.072 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:29:55.072 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:29:55.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:29:55.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:29:55.078 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:29:55.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:29:55.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:29:55.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:29:55.080 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:29:55.080 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:29:55.080 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:29:55.080 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:29:55.114 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:29:55.114 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:29:55.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:29:55.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:29:55.119 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 05:29:55.597 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 05:29:56.075 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 05:29:56.554 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 05:29:57.032 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 05:29:57.510 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 05:29:57.988 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 05:29:58.467 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 05:29:58.946 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 05:29:59.424 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 05:29:59.903 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 05:30:00.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:30:00.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:30:00.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:30:00.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:30:00.121 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:30:00.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:30:00.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:30:00.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:30:00.127 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:30:00.128 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:30:00.128 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:30:00.128 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:30:00.128 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:30:00.128 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:30:00.128 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:30:00.128 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:30:05.131 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:30:05.131 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:30:05.133 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:30:05.134 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:30:05.134 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:30:05.135 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:30:05.145 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:30:05.147 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:30:05.147 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:30:05.148 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:30:05.148 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:30:05.154 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:30:05.155 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:30:05.155 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:30:05.155 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:30:05.155 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:30:05.155 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:30:05.155 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:30:05.156 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:30:05.160 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:30:05.160 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:30:05.160 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:30:05.160 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:30:05.161 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:30:05.161 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:30:05.161 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:30:05.161 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:30:05.165 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:30:05.165 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:30:05.166 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:30:05.166 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:30:05.166 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:30:05.166 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:30:05.166 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:30:05.166 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:30:05.172 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:30:05.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:30:05.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:30:05.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:30:05.172 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:30:05.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:30:05.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:30:05.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:30:05.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:30:05.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:30:05.173 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:30:05.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:30:05.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:30:05.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:30:05.173 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:30:05.173 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:30:05.173 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:30:05.173 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:30:05.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:30:05.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:30:05.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:30:05.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:30:05.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:30:05.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:30:05.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:30:05.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:30:05.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:30:05.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:30:05.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:30:05.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:30:05.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:30:05.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:30:05.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:30:05.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:30:05.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:30:05.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:30:05.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:30:05.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:30:05.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:30:05.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:30:05.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:30:05.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:30:05.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:30:05.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:30:05.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:30:05.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:30:05.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:30:05.178 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:30:05.662 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:30:05.695 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:30:05.696 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:30:05.698 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:30:05.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:30:05.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:30:05.719 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:30:05.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:30:05.736 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:30:05.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:30:05.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:30:05.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:30:05.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:30:05.754 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:30:05.754 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:30:05.754 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:30:05.754 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:30:05.800 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:30:05.800 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:30:05.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:30:05.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:30:06.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:30:06.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:30:06.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:30:06.045 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:30:06.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:30:06.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:30:06.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:30:06.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:30:06.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:30:06.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:30:06.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:30:06.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:30:06.071 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:30:06.071 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:30:06.071 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:30:06.071 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:30:06.079 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:30:06.079 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:30:06.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:30:06.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:30:06.138 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:30:06.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:30:06.177 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:30:06.177 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:30:06.177 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:30:06.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:30:06.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:30:06.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:30:06.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:30:06.471 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:30:06.489 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:30:06.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:30:06.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:30:06.495 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:30:06.495 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:30:06.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:30:06.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:30:06.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:30:06.497 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:30:06.497 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:30:06.497 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:30:06.497 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:30:06.510 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:30:06.510 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:30:06.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:30:06.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:30:06.616 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:30:07.093 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:30:07.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:30:07.178 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:30:07.178 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:30:07.178 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:30:07.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:30:07.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:30:07.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:30:07.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:30:07.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:30:07.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:30:07.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:30:07.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:30:07.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:30:07.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:30:07.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:30:07.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:30:07.280 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:30:07.280 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:30:07.280 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:30:07.280 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:30:07.330 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:30:07.331 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:30:07.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:30:07.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:30:07.570 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:30:07.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:30:07.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:30:07.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:30:07.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:30:07.894 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:30:07.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:30:07.908 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:30:07.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:30:07.908 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:30:07.913 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:30:07.913 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:30:07.913 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:30:07.914 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:30:07.914 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:30:07.914 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:30:07.914 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:30:12.912 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:30:12.912 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:30:12.913 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:30:12.914 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:30:12.914 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:30:12.915 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:30:12.924 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:30:12.926 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:30:12.926 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:30:12.927 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:30:12.927 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:30:12.934 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:30:12.934 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:30:12.934 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:30:12.934 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:30:12.934 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:30:12.935 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:30:12.935 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:30:12.935 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:30:12.939 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:30:12.939 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:30:12.940 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:30:12.940 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:30:12.940 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:30:12.940 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:30:12.940 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:30:12.940 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:30:12.944 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:30:12.944 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:30:12.944 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:30:12.944 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:30:12.944 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:30:12.945 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:30:12.945 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:30:12.945 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:30:12.950 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:30:12.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:30:12.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:30:12.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:30:12.950 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:30:12.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:30:12.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:30:12.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:30:12.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:30:12.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:30:12.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:30:12.951 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:30:12.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:30:12.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:30:12.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:30:12.951 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:30:12.951 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:30:12.951 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:30:12.951 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:30:12.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:30:12.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:30:12.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:30:12.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:30:12.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:30:12.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:30:12.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:30:12.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:30:12.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:30:12.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:30:12.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:30:12.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:30:12.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:30:12.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:30:12.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:30:12.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:30:12.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:30:12.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:30:12.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:30:12.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:30:12.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:30:12.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:30:12.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:30:12.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:30:12.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:30:12.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:30:12.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:30:12.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:30:12.956 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:30:13.440 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:30:13.475 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:30:13.476 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:30:13.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:30:13.477 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:30:13.493 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:30:13.493 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:30:13.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:30:13.513 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:30:13.513 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:30:13.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:30:13.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:30:13.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:30:13.529 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:30:13.529 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:30:13.529 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:30:13.529 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:30:13.578 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:30:13.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:30:13.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:30:13.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:30:13.918 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:30:13.955 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:30:13.956 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:30:13.956 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:30:13.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:30:14.396 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:30:14.874 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:30:14.957 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:30:14.957 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:30:14.957 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:30:14.957 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:30:15.352 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:30:15.830 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:30:15.958 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:30:15.958 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:30:15.959 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:30:15.959 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:30:16.308 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:30:16.787 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:30:16.959 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:30:16.959 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:30:16.959 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:30:16.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:30:17.265 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:30:17.743 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:30:17.960 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:30:17.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:30:17.960 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:30:17.960 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:30:18.222 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:30:18.700 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:30:19.179 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:30:19.657 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:30:20.140 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:30:20.619 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:30:21.097 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:30:21.575 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:30:22.053 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:30:22.531 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:30:23.009 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:30:23.487 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:30:23.964 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 05:30:24.443 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 05:30:24.921 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 05:30:25.400 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 05:30:25.878 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 05:30:26.357 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 05:30:26.835 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 05:30:27.313 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 05:30:27.792 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 05:30:28.271 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 05:30:28.749 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 05:30:29.227 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 05:30:29.705 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 05:30:30.184 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 05:30:30.662 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 05:30:31.140 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 05:30:31.619 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 05:30:32.098 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 05:30:32.576 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 05:30:33.055 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 05:30:33.533 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 05:30:33.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:30:33.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:30:33.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:30:33.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:30:33.606 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:30:33.606 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:30:33.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:30:33.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:30:33.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:30:33.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:30:33.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:30:33.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:30:33.614 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:30:33.614 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:30:33.614 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:30:33.614 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:30:33.623 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:30:33.623 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:30:33.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:30:33.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:30:34.010 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 05:30:34.489 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 05:30:34.968 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 05:30:35.446 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 05:30:35.925 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 05:30:36.404 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 05:30:36.883 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 05:30:37.361 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 05:30:37.839 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 05:30:38.316 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 05:30:38.795 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 05:30:39.273 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 05:30:39.752 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 05:30:40.231 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 05:30:40.711 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 05:30:41.190 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 05:30:41.669 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-15 05:30:42.148 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-15 05:30:42.626 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-15 05:30:43.104 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-15 05:30:43.583 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-15 05:30:44.061 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-15 05:30:44.540 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-15 05:30:45.019 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-15 05:30:45.498 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-15 05:30:45.977 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-15 05:30:46.456 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-15 05:30:46.935 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-15 05:30:47.414 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-15 05:30:47.892 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-15 05:30:48.371 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-15 05:30:48.850 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-15 05:30:49.328 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-15 05:30:49.807 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-15 05:30:50.286 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-15 05:30:50.764 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-15 05:30:51.243 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-15 05:30:51.721 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-15 05:30:52.199 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-15 05:30:52.678 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-15 05:30:53.158 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-15 05:30:53.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:30:53.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:30:53.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:30:53.631 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:30:53.631 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:30:53.636 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-15 05:30:53.647 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:30:53.647 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:30:53.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:30:53.652 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:30:53.652 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:30:53.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:30:53.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:30:53.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:30:53.654 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:30:53.654 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:30:53.654 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:30:53.654 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:30:53.681 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:30:53.681 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:30:53.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:30:53.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:30:54.113 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-15 05:30:54.591 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-15 05:30:55.069 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2025-12-15 05:30:55.546 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2025-12-15 05:30:56.024 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2025-12-15 05:30:56.502 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2025-12-15 05:30:56.979 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2025-12-15 05:30:57.457 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2025-12-15 05:30:57.934 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2025-12-15 05:30:58.412 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2025-12-15 05:30:58.890 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2025-12-15 05:30:59.368 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2025-12-15 05:30:59.846 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2025-12-15 05:31:00.324 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2025-12-15 05:31:00.802 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2025-12-15 05:31:01.280 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2025-12-15 05:31:01.758 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2025-12-15 05:31:02.236 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2025-12-15 05:31:02.713 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2025-12-15 05:31:03.191 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2025-12-15 05:31:03.669 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2025-12-15 05:31:04.147 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2025-12-15 05:31:04.625 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2025-12-15 05:31:05.103 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2025-12-15 05:31:05.580 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2025-12-15 05:31:06.058 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2025-12-15 05:31:06.536 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2025-12-15 05:31:07.013 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2025-12-15 05:31:07.491 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2025-12-15 05:31:07.969 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2025-12-15 05:31:08.447 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2025-12-15 05:31:08.925 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2025-12-15 05:31:09.402 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2025-12-15 05:31:09.880 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2025-12-15 05:31:10.359 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2025-12-15 05:31:10.837 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2025-12-15 05:31:11.315 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2025-12-15 05:31:11.793 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2025-12-15 05:31:12.271 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2025-12-15 05:31:12.748 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2025-12-15 05:31:13.226 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2025-12-15 05:31:13.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:31:13.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:13.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:31:13.693 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:31:13.703 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2025-12-15 05:31:13.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:31:13.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:31:13.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:31:13.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:31:13.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:31:13.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:31:13.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:31:13.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:13.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:31:13.717 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:31:13.717 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:31:13.717 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:31:13.749 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:31:13.749 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:31:13.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:13.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:14.180 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2025-12-15 05:31:14.659 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2025-12-15 05:31:15.138 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2025-12-15 05:31:15.616 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2025-12-15 05:31:16.094 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2025-12-15 05:31:16.572 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2025-12-15 05:31:17.050 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2025-12-15 05:31:17.528 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2025-12-15 05:31:18.006 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2025-12-15 05:31:18.484 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2025-12-15 05:31:18.963 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2025-12-15 05:31:19.441 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2025-12-15 05:31:19.919 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2025-12-15 05:31:20.397 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2025-12-15 05:31:20.875 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2025-12-15 05:31:21.353 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2025-12-15 05:31:21.832 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2025-12-15 05:31:22.310 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2025-12-15 05:31:22.789 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2025-12-15 05:31:23.267 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2025-12-15 05:31:23.745 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2025-12-15 05:31:24.223 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2025-12-15 05:31:24.701 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2025-12-15 05:31:25.179 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2025-12-15 05:31:25.657 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2025-12-15 05:31:26.136 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2025-12-15 05:31:26.614 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2025-12-15 05:31:27.092 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2025-12-15 05:31:27.570 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2025-12-15 05:31:28.048 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2025-12-15 05:31:28.527 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2025-12-15 05:31:29.004 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2025-12-15 05:31:29.482 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2025-12-15 05:31:29.961 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2025-12-15 05:31:30.439 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2025-12-15 05:31:30.918 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2025-12-15 05:31:31.396 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2025-12-15 05:31:31.874 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2025-12-15 05:31:32.353 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2025-12-15 05:31:32.831 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2025-12-15 05:31:33.310 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2025-12-15 05:31:33.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:33.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:31:33.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:31:33.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:31:33.758 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:31:33.772 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:31:33.773 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:31:33.773 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:31:33.773 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:31:33.775 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:31:33.775 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:31:33.775 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:31:33.775 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:31:33.775 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:31:33.775 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:31:33.775 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:31:38.777 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:31:38.778 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:31:38.779 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:31:38.780 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:31:38.780 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:31:38.781 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:31:38.790 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:31:38.791 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:31:38.791 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:31:38.791 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:31:38.791 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:31:38.794 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:31:38.794 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:31:38.794 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:31:38.794 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:31:38.795 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:31:38.795 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:31:38.795 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:31:38.795 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:31:38.797 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:31:38.797 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:31:38.797 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:31:38.797 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:31:38.797 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:31:38.798 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:31:38.798 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:31:38.798 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:31:38.800 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:31:38.800 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:31:38.800 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:31:38.800 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:31:38.800 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:31:38.800 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:31:38.800 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:31:38.800 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:31:38.803 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:31:38.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:31:38.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:31:38.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:31:38.803 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:31:38.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:31:38.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:31:38.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:31:38.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:31:38.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:31:38.804 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:31:38.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:31:38.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:31:38.804 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:31:38.804 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:31:38.804 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:31:38.804 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:31:38.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:31:38.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:31:38.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:31:38.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:31:38.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:31:38.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:31:38.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:31:38.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:31:38.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:31:38.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:31:38.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:31:38.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:31:38.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:31:38.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:31:38.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:31:38.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:31:38.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:31:38.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:31:38.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:31:38.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:31:38.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:31:38.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:31:38.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:31:38.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:31:38.806 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:31:38.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:31:38.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:31:38.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:31:38.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:31:38.806 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:31:38.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:31:38.806 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:31:38.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:31:38.806 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:31:38.806 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:31:38.806 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:31:38.806 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:31:43.810 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:31:43.811 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:31:43.812 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:31:43.812 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:31:43.813 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:31:43.814 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:31:43.824 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:31:43.825 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:31:43.825 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:31:43.825 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:31:43.825 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:31:43.829 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:31:43.829 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:31:43.829 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:31:43.829 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:31:43.830 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:31:43.830 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:31:43.830 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:31:43.830 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:31:43.832 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:31:43.833 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:31:43.833 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:31:43.833 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:31:43.833 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:31:43.833 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:31:43.833 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:31:43.833 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:31:43.836 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:31:43.836 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:31:43.836 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:31:43.836 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:31:43.837 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:31:43.837 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:31:43.837 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:31:43.837 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:31:43.841 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:31:43.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:31:43.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:31:43.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:31:43.841 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:31:43.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:31:43.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:31:43.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:31:43.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:31:43.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:31:43.842 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:31:43.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:31:43.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:31:43.842 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:31:43.842 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:31:43.842 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:31:43.842 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:31:43.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:31:43.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:31:43.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:31:43.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:31:43.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:31:43.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:31:43.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:31:43.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:31:43.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:31:43.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:31:43.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:31:43.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:31:43.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:31:43.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:31:43.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:31:43.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:31:43.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:31:43.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:31:43.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:31:43.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:31:43.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:31:43.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:31:43.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:31:43.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:31:43.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:31:43.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:31:43.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:31:43.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:31:43.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:31:43.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:31:43.847 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:31:44.331 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:31:44.369 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:31:44.371 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:31:44.373 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:31:44.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:31:44.396 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:31:44.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:31:44.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:31:44.413 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:31:44.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:31:44.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:31:44.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:31:44.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:44.429 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:31:44.429 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:31:44.429 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:31:44.429 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:31:44.469 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:31:44.470 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:31:44.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:44.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:44.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:44.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:31:44.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:31:44.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:31:44.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:31:44.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:31:44.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:31:44.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:31:44.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:44.689 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:31:44.689 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:31:44.689 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:31:44.689 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:31:44.702 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:31:44.702 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:31:44.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:44.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:44.807 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:31:44.846 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:31:44.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:31:44.846 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:31:44.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:31:44.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:44.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:31:44.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:31:44.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:31:44.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:31:44.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:31:44.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:31:44.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:31:44.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:44.934 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:31:44.934 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:31:44.934 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:31:44.934 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:31:44.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:31:44.943 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:31:44.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:44.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:45.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:45.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:31:45.157 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:31:45.157 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:31:45.177 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:31:45.177 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:31:45.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:31:45.183 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:31:45.183 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:31:45.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:31:45.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:31:45.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:45.185 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:31:45.185 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:31:45.186 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:31:45.186 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:31:45.244 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:31:45.244 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:31:45.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:45.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:45.280 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:31:45.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:45.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:31:45.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:31:45.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:31:45.537 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:31:45.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:31:45.556 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:31:45.556 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:31:45.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:31:45.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:45.559 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:31:45.559 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:31:45.559 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:31:45.559 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:31:45.605 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:31:45.606 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:31:45.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:45.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:45.757 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:31:45.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:31:45.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:31:45.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:31:45.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:31:45.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:45.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:31:45.904 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:31:45.905 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:31:45.905 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:31:45.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:31:45.921 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:31:45.921 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:31:45.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:31:45.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:45.923 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:31:45.923 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:31:45.923 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:31:45.923 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:31:45.939 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:31:45.940 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:31:45.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:45.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:46.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:46.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:31:46.228 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:31:46.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:31:46.229 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:31:46.235 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:31:46.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:31:46.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:31:46.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:31:46.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:31:46.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:31:46.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:31:46.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:31:46.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:46.253 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:31:46.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:31:46.253 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:31:46.253 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:31:46.280 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:31:46.281 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:31:46.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:46.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:46.712 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:31:46.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:31:46.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:31:46.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:31:46.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:31:47.190 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:31:47.667 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:31:47.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:31:47.849 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:31:47.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:31:47.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:31:48.146 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:31:48.623 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:31:48.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:48.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:31:48.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:31:48.784 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:31:48.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:31:48.794 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:31:48.794 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:31:48.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:31:48.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:48.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:31:48.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:31:48.795 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:31:48.795 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:31:48.806 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:31:48.806 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:31:48.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:48.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:48.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:31:48.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:31:48.850 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:31:48.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:31:49.100 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:31:49.578 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:31:50.056 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:31:50.535 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:31:51.013 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:31:51.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:51.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:31:51.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:31:51.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:31:51.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:31:51.425 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:31:51.425 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:31:51.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:31:51.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:51.427 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:31:51.427 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:31:51.427 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:31:51.427 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:31:51.429 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:31:51.429 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:31:51.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:51.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:51.489 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:31:51.967 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:31:52.445 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:31:52.923 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:31:53.401 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:31:53.879 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:31:54.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:54.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:31:54.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:31:54.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:31:54.052 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:31:54.052 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:31:54.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:31:54.058 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:31:54.058 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:31:54.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:31:54.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:31:54.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:54.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:31:54.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:31:54.060 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:31:54.060 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:31:54.114 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:31:54.114 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:31:54.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:54.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:54.356 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:31:54.835 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 05:31:55.313 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 05:31:55.791 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 05:31:56.270 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 05:31:56.748 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 05:31:56.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:56.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:31:56.837 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:31:56.837 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:31:56.837 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:31:56.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:31:56.854 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:31:56.854 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:31:56.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:31:56.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:56.856 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:31:56.856 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:31:56.856 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:31:56.856 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:31:56.886 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:31:56.886 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:31:56.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:56.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:57.227 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 05:31:57.705 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 05:31:58.183 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 05:31:58.661 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 05:31:59.140 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 05:31:59.618 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 05:31:59.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:59.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:31:59.706 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:31:59.706 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:31:59.706 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:31:59.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:31:59.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:31:59.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:31:59.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:31:59.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:59.716 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:31:59.716 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:31:59.716 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:31:59.716 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:31:59.757 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:31:59.757 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:31:59.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:31:59.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:00.096 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 05:32:00.574 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 05:32:01.053 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 05:32:01.531 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 05:32:02.008 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 05:32:02.487 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 05:32:02.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:02.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:32:02.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:32:02.575 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:32:02.575 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:32:02.588 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:32:02.589 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:32:02.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:32:02.589 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:32:02.590 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:32:02.590 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:32:02.590 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:32:02.590 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:32:02.590 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:32:02.590 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:32:02.590 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:32:02.590 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4001 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:32:02.590 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4001 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:32:02.590 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4001 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:32:02.590 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4001 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:32:02.590 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4001 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:32:02.590 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4001 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:32:02.590 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4002 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:32:02.590 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4002 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:32:02.590 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4002 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:32:02.590 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4002 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:32:02.590 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4002 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:32:02.590 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4002 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:32:02.590 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4002 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:32:02.590 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=4002 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:32:07.595 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:32:07.595 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:32:07.596 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:32:07.596 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:32:07.597 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:32:07.598 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:32:07.606 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:32:07.607 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:32:07.607 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:32:07.607 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:32:07.607 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:32:07.610 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:32:07.611 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:32:07.611 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:32:07.611 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:32:07.611 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:32:07.612 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:32:07.612 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:32:07.612 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:32:07.614 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:32:07.614 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:32:07.614 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:32:07.614 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:32:07.614 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:32:07.614 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:32:07.615 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:32:07.615 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:32:07.617 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:32:07.617 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:32:07.617 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:32:07.617 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:32:07.617 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:32:07.617 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:32:07.617 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:32:07.617 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:32:07.620 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:32:07.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:32:07.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:32:07.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:32:07.621 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:32:07.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:32:07.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:32:07.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:32:07.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:32:07.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:32:07.621 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:32:07.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:32:07.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:32:07.621 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:32:07.621 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:32:07.621 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:32:07.621 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:32:07.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:32:07.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:32:07.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:32:07.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:32:07.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:32:07.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:32:07.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:32:07.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:32:07.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:32:07.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:32:07.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:32:07.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:32:07.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:32:07.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:32:07.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:32:07.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:32:07.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:32:07.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:32:07.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:32:07.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:32:07.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:32:07.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:32:07.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:32:07.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:32:07.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:32:07.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:32:07.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:32:07.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:32:07.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:32:07.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:32:07.626 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:32:08.110 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:32:08.136 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:32:08.137 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:32:08.138 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:32:08.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:32:08.152 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:32:08.152 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:32:08.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:32:08.171 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:32:08.171 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:32:08.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:32:08.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:32:08.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:08.188 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:32:08.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:32:08.188 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:32:08.188 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:32:08.202 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:32:08.203 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:32:08.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:08.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:08.585 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:32:08.624 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:32:08.624 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:32:08.625 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:32:08.625 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:32:09.064 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:32:09.542 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:32:09.626 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:32:09.626 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:32:09.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:32:09.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:32:10.021 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:32:10.498 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:32:10.627 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:32:10.628 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:32:10.628 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:32:10.628 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:32:10.977 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:32:11.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:11.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:32:11.324 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:32:11.324 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:32:11.342 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:32:11.342 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:32:11.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:32:11.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:32:11.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:32:11.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:32:11.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:32:11.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:11.350 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:32:11.350 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:32:11.350 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:32:11.350 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:32:11.396 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:32:11.397 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:32:11.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:11.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:11.454 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:32:11.628 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:32:11.628 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:32:11.629 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:32:11.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:32:11.934 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:32:12.412 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:32:12.629 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:32:12.630 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:32:12.630 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:32:12.630 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:32:12.892 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:32:13.371 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:32:13.850 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:32:14.323 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:32:14.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:14.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:32:14.581 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:32:14.581 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:32:14.582 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:32:14.599 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:32:14.599 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:32:14.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:32:14.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:32:14.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:32:14.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:32:14.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:32:14.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:14.607 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:32:14.607 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:32:14.607 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:32:14.607 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:32:14.648 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:32:14.648 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:32:14.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:14.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:14.796 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:32:15.274 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:32:15.752 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:32:16.224 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:32:16.702 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:32:17.181 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:32:17.659 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:32:17.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:17.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:32:17.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:32:17.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:32:17.797 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:32:17.797 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:32:17.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:32:17.802 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:32:17.802 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:32:17.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:32:17.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:32:17.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:17.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:32:17.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:32:17.804 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:32:17.804 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:32:17.844 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:32:17.844 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:32:17.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:17.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:18.136 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:32:18.614 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 05:32:19.093 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 05:32:19.571 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 05:32:20.050 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 05:32:20.527 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 05:32:21.006 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 05:32:21.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:21.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:32:21.051 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:32:21.051 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:32:21.051 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:32:21.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:32:21.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:32:21.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:32:21.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:32:21.061 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:32:21.061 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:32:21.061 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:32:21.061 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:32:21.061 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:32:21.061 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:32:21.062 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:32:26.064 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:32:26.065 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:32:26.067 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:32:26.069 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:32:26.072 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:32:26.076 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:32:26.085 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:32:26.086 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:32:26.086 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:32:26.086 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:32:26.086 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:32:26.089 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:32:26.089 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:32:26.090 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:32:26.090 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:32:26.090 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:32:26.090 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:32:26.090 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:32:26.090 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:32:26.092 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:32:26.092 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:32:26.092 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:32:26.092 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:32:26.092 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:32:26.093 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:32:26.093 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:32:26.093 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:32:26.095 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:32:26.095 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:32:26.095 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:32:26.095 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:32:26.095 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:32:26.095 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:32:26.095 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:32:26.095 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:32:26.098 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:32:26.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:32:26.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:32:26.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:32:26.098 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:32:26.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:32:26.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:32:26.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:32:26.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:32:26.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:32:26.098 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:32:26.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:32:26.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:32:26.098 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:32:26.098 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:32:26.098 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:32:26.098 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:32:26.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:32:26.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:32:26.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:32:26.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:32:26.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:32:26.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:32:26.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:32:26.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:32:26.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:32:26.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:32:26.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:32:26.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:32:26.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:32:26.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:32:26.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:32:26.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:32:26.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:32:26.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:32:26.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:32:26.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:32:26.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:32:26.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:32:26.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:32:26.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:32:26.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:32:26.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:32:26.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:32:26.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:32:26.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:32:26.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:32:26.103 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:32:26.587 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:32:26.618 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:32:26.619 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:32:26.621 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:32:26.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:32:26.639 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:32:26.639 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:32:26.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:32:26.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:32:26.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:32:26.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:32:26.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:32:26.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:26.673 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:32:26.673 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:32:26.673 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:32:26.673 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:32:26.679 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:32:26.679 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:32:26.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:26.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:27.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:27.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:32:27.006 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:32:27.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:32:27.024 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:32:27.024 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:32:27.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:32:27.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:32:27.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:32:27.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:32:27.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:32:27.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:27.032 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:32:27.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:32:27.032 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:32:27.033 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:32:27.058 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:32:27.059 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:32:27.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:27.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:27.064 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:32:27.101 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:32:27.102 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:32:27.102 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:32:27.102 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:32:27.543 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:32:27.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:27.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:32:27.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:32:27.561 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:32:27.561 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:32:27.581 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:32:27.581 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:32:27.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:32:27.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:32:27.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:32:27.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:32:27.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:32:27.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:27.588 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:32:27.588 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:32:27.588 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:32:27.588 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:32:27.635 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:32:27.635 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:32:27.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:27.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:28.021 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:32:28.103 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:32:28.103 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:32:28.103 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:32:28.104 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:32:28.499 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:32:28.977 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:32:29.104 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:32:29.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:32:29.105 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:32:29.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:32:29.455 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:32:29.933 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:32:30.105 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:32:30.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:32:30.106 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:32:30.106 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:32:30.411 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:32:30.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:30.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:32:30.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:32:30.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:32:30.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:32:30.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:32:30.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:32:30.598 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:32:30.598 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:32:30.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:32:30.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:32:30.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:30.600 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:32:30.600 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:32:30.600 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:32:30.600 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:32:30.666 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:32:30.666 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:32:30.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:30.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:30.888 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:32:31.106 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:32:31.106 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:32:31.106 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:32:31.107 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:32:31.366 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:32:31.845 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:32:32.323 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:32:32.802 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:32:33.281 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:32:33.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:33.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:32:33.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:32:33.606 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:32:33.606 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:32:33.618 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:32:33.618 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:32:33.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:32:33.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:32:33.621 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:32:33.621 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:32:33.621 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:32:33.621 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:32:33.621 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:32:33.621 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:32:33.621 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:32:38.624 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:32:38.624 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:32:38.625 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:32:38.626 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:32:38.626 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:32:38.627 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:32:38.636 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:32:38.638 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:32:38.638 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:32:38.638 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:32:38.638 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:32:38.642 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:32:38.642 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:32:38.642 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:32:38.642 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:32:38.643 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:32:38.643 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:32:38.643 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:32:38.643 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:32:38.646 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:32:38.647 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:32:38.647 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:32:38.647 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:32:38.647 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:32:38.647 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:32:38.647 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:32:38.647 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:32:38.651 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:32:38.651 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:32:38.651 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:32:38.651 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:32:38.651 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:32:38.651 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:32:38.651 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:32:38.651 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:32:38.657 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:32:38.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:32:38.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:32:38.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:32:38.657 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:32:38.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:32:38.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:32:38.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:32:38.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:32:38.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:32:38.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:32:38.658 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:32:38.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:32:38.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:32:38.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:32:38.658 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:32:38.658 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:32:38.658 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:32:38.658 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:32:38.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:32:38.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:32:38.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:32:38.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:32:38.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:32:38.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:32:38.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:32:38.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:32:38.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:32:38.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:32:38.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:32:38.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:32:38.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:32:38.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:32:38.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:32:38.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:32:38.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:32:38.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:32:38.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:32:38.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:32:38.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:32:38.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:32:38.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:32:38.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:32:38.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:32:38.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:32:38.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:32:38.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:32:38.663 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:32:39.147 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:32:39.183 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:32:39.185 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:32:39.186 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:32:39.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:32:39.204 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:32:39.204 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:32:39.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:32:39.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:32:39.222 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:32:39.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:32:39.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:32:39.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:39.225 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:32:39.225 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:32:39.225 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:32:39.225 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:32:39.239 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:32:39.239 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:32:39.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:39.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:39.624 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:32:39.662 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:32:39.663 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:32:39.666 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:32:39.667 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:32:40.102 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:32:40.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:32:40.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:40.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:32:40.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:32:40.559 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:32:40.559 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:32:40.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:32:40.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:32:40.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:32:40.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:32:40.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:32:40.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:40.567 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:32:40.567 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:32:40.567 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:32:40.567 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:32:40.569 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:32:40.569 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:32:40.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:40.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:40.579 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:32:40.663 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:32:40.664 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:32:40.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:32:40.673 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:32:41.056 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:32:41.536 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:32:41.664 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:32:41.674 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:32:41.675 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:32:41.675 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:32:42.015 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:32:42.493 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:32:42.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:32:42.675 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:32:42.676 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:32:42.676 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:32:42.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:42.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:32:42.740 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:32:42.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:32:42.741 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:32:42.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:32:42.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:32:42.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:32:42.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:32:42.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:32:42.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:32:42.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:32:42.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:42.765 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:32:42.765 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:32:42.765 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:32:42.765 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:32:42.772 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:32:42.772 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:32:42.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:42.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:42.970 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:32:43.448 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:32:43.666 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:32:43.676 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:32:43.676 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:32:43.677 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:32:43.927 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:32:44.405 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:32:44.883 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:32:45.361 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:32:45.839 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:32:46.317 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:32:46.795 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:32:47.273 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:32:47.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:47.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:32:47.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:32:47.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:32:47.751 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:32:47.751 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:32:47.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:32:47.751 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:32:47.756 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:32:47.756 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:32:47.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:32:47.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:32:47.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:47.758 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:32:47.758 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:32:47.758 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:32:47.758 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:32:47.797 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:32:47.797 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:32:47.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:47.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:32:48.228 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:32:48.706 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:32:49.185 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:32:49.664 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 05:32:50.142 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 05:32:50.621 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 05:32:51.099 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 05:32:51.577 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 05:32:52.056 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 05:32:52.534 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 05:32:53.013 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 05:32:53.491 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 05:32:53.970 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 05:32:54.448 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 05:32:54.926 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 05:32:55.404 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 05:32:55.883 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 05:32:56.361 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 05:32:56.840 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 05:32:57.319 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 05:32:57.797 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 05:32:58.276 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 05:32:58.754 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 05:32:59.233 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 05:32:59.711 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 05:33:00.189 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 05:33:00.667 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 05:33:01.145 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 05:33:01.624 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 05:33:02.103 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 05:33:02.581 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 05:33:03.060 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 05:33:03.538 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 05:33:04.017 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 05:33:04.495 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 05:33:04.973 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 05:33:05.451 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 05:33:05.930 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 05:33:06.409 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 05:33:06.887 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 05:33:07.366 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-15 05:33:07.754 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:33:07.754 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:33:07.754 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:33:07.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:33:07.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:33:07.758 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:33:07.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:33:07.760 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:33:07.760 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:33:07.760 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:33:07.760 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:33:07.760 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:33:07.760 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:33:07.760 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:33:12.764 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:33:12.764 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:33:12.764 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:33:12.765 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:33:12.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:33:12.766 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:33:12.776 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:33:12.778 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:33:12.778 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:33:12.778 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:33:12.778 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:33:12.784 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:33:12.784 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:33:12.785 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:33:12.785 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:33:12.785 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:33:12.786 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:33:12.786 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:33:12.786 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:33:12.789 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:33:12.789 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:33:12.790 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:33:12.790 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:33:12.790 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:33:12.790 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:33:12.790 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:33:12.790 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:33:12.794 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:33:12.794 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:33:12.794 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:33:12.794 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:33:12.794 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:33:12.794 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:33:12.794 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:33:12.794 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:33:12.803 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:33:12.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:33:12.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:33:12.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:33:12.803 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:33:12.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:33:12.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:33:12.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:33:12.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:33:12.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:33:12.804 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:33:12.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:33:12.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:33:12.804 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:33:12.804 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:33:12.804 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:33:12.804 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:33:12.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:33:12.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:33:12.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:33:12.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:33:12.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:33:12.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:33:12.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:33:12.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:33:12.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:33:12.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:33:12.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:33:12.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:33:12.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:33:12.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:33:12.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:33:12.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:33:12.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:33:12.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:33:12.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:33:12.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:33:12.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:33:12.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:33:12.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:33:12.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:33:12.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:33:12.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:33:12.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:33:12.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:33:12.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:33:12.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:33:12.809 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:33:13.293 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:33:13.333 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:33:13.335 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:33:13.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:33:13.337 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:33:13.358 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:33:13.358 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:33:13.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:33:13.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:33:13.373 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:33:13.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:33:13.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:33:13.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:33:13.388 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:33:13.388 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:33:13.388 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:33:13.388 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:33:13.431 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:33:13.432 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:33:13.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:33:13.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:33:13.769 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:33:13.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:33:13.808 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:33:13.809 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:33:13.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:33:14.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:33:14.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:33:14.059 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:33:14.060 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:33:14.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:33:14.078 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:33:14.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:33:14.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:33:14.084 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:33:14.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:33:14.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:33:14.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:33:14.086 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:33:14.086 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:33:14.086 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:33:14.086 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:33:14.095 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:33:14.095 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:33:14.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:33:14.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:33:14.248 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:33:14.726 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:33:14.809 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:33:14.809 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:33:14.809 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:33:14.811 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:33:15.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:33:15.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:33:15.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:33:15.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:33:15.036 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:33:15.056 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:33:15.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:33:15.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:33:15.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:33:15.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:33:15.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:33:15.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:33:15.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:33:15.065 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:33:15.065 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:33:15.065 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:33:15.065 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:33:15.099 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:33:15.100 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:33:15.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:33:15.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:33:15.204 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:33:15.681 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:33:15.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:33:15.811 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:33:15.811 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:33:15.812 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:33:16.159 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:33:16.638 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:33:16.811 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:33:16.812 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:33:16.812 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:33:16.813 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:33:17.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:33:17.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:33:17.034 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:33:17.034 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:33:17.047 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:33:17.047 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:33:17.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:33:17.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:33:17.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:33:17.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:33:17.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:33:17.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:33:17.056 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:33:17.056 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:33:17.056 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:33:17.056 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:33:17.111 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:33:17.111 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:33:17.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:33:17.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:33:17.115 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:33:17.594 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:33:17.813 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:33:17.813 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:33:17.813 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:33:17.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:33:18.072 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:33:18.551 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:33:19.030 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:33:19.508 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:33:19.987 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:33:20.465 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:33:20.942 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:33:21.421 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:33:21.899 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:33:22.378 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:33:22.856 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:33:23.334 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:33:23.811 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 05:33:24.290 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 05:33:24.769 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 05:33:25.247 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 05:33:25.725 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 05:33:26.204 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 05:33:26.683 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 05:33:27.161 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 05:33:27.640 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 05:33:28.118 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 05:33:28.596 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 05:33:29.074 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 05:33:29.553 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 05:33:30.031 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 05:33:30.509 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 05:33:30.987 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 05:33:31.465 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 05:33:31.944 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 05:33:32.423 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 05:33:32.902 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 05:33:33.380 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 05:33:33.859 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 05:33:34.338 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 05:33:34.816 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 05:33:35.295 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 05:33:35.774 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 05:33:36.253 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 05:33:36.731 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 05:33:37.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:33:37.051 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:33:37.051 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:33:37.056 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:33:37.056 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:33:37.056 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:33:37.056 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:33:37.057 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:33:37.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:33:37.057 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:33:37.057 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:33:37.057 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:33:37.057 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:33:37.057 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:33:42.060 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:33:42.060 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:33:42.062 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:33:42.062 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:33:42.063 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:33:42.064 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:33:42.072 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:33:42.073 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:33:42.074 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:33:42.074 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:33:42.074 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:33:42.077 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:33:42.078 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:33:42.078 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:33:42.078 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:33:42.078 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:33:42.079 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:33:42.079 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:33:42.079 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:33:42.081 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:33:42.081 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:33:42.081 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:33:42.081 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:33:42.082 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:33:42.082 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:33:42.082 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:33:42.082 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:33:42.084 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:33:42.084 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:33:42.084 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:33:42.084 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:33:42.085 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:33:42.085 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:33:42.085 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:33:42.085 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:33:42.088 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:33:42.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:33:42.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:33:42.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:33:42.088 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:33:42.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:33:42.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:33:42.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:33:42.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:33:42.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:33:42.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:33:42.088 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:33:42.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:33:42.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:33:42.088 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:33:42.088 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:33:42.088 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:33:42.089 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:33:42.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:33:42.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:33:42.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:33:42.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:33:42.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:33:42.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:33:42.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:33:42.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:33:42.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:33:42.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:33:42.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:33:42.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:33:42.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:33:42.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:33:42.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:33:42.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:33:42.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:33:42.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:33:42.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:33:42.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:33:42.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:33:42.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:33:42.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:33:42.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:33:42.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:33:42.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:33:42.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:33:42.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:33:42.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:33:42.093 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:33:42.577 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:33:42.606 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:33:42.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:33:42.608 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:33:42.609 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:33:42.623 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:33:42.623 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:33:42.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:33:42.633 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:33:42.633 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:33:42.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:33:42.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:33:42.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:33:42.661 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:33:42.661 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:33:42.661 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:33:42.661 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:33:42.669 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:33:42.669 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:33:42.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:33:42.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:33:43.053 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:33:43.091 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:33:43.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:33:43.092 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:33:43.092 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:33:43.531 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:33:44.010 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:33:44.092 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:33:44.093 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:33:44.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:33:44.093 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:33:44.487 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:33:44.966 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:33:45.094 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:33:45.094 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:33:45.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:33:45.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:33:45.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:33:45.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:33:45.132 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:33:45.132 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:33:45.151 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:33:45.151 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:33:45.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:33:45.157 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:33:45.157 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:33:45.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:33:45.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:33:45.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:33:45.159 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:33:45.159 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:33:45.159 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:33:45.159 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:33:45.202 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:33:45.202 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:33:45.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:33:45.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:33:45.444 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:33:45.923 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:33:46.095 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:33:46.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:33:46.095 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:33:46.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:33:46.402 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:33:46.881 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:33:47.096 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:33:47.097 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:33:47.097 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:33:47.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:33:47.360 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:33:47.838 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:33:47.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:33:47.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:33:47.903 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:33:47.903 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:33:47.903 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:33:47.922 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:33:47.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:33:47.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:33:47.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:33:47.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:33:47.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:33:47.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:33:47.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:33:47.930 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:33:47.930 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:33:47.930 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:33:47.930 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:33:47.976 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:33:47.977 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:33:47.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:33:47.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:33:48.316 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:33:48.793 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:33:49.271 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:33:49.749 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:33:50.227 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:33:50.704 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:33:51.182 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:33:51.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:33:51.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:33:51.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:33:51.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:33:51.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:33:51.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:33:51.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:33:51.368 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:33:51.368 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:33:51.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:33:51.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:33:51.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:33:51.370 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:33:51.370 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:33:51.370 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:33:51.370 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:33:51.417 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:33:51.417 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:33:51.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:33:51.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:33:51.659 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:33:52.138 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:33:52.616 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:33:53.095 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 05:33:53.573 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 05:33:54.051 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 05:33:54.529 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 05:33:55.007 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 05:33:55.486 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 05:33:55.965 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 05:33:56.443 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 05:33:56.922 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 05:33:57.401 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 05:33:57.879 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 05:33:58.358 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 05:33:58.837 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 05:33:59.315 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 05:33:59.794 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 05:34:00.272 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 05:34:00.751 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 05:34:01.230 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 05:34:01.709 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 05:34:02.187 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 05:34:02.666 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 05:34:03.144 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 05:34:03.623 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 05:34:04.101 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 05:34:04.580 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 05:34:05.058 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 05:34:05.536 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 05:34:06.015 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 05:34:06.493 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 05:34:06.972 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 05:34:07.450 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 05:34:07.928 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 05:34:08.407 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 05:34:08.885 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 05:34:09.363 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 05:34:09.841 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 05:34:10.320 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 05:34:10.799 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-15 05:34:11.278 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-15 05:34:11.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:34:11.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:34:11.367 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:34:11.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:34:11.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:34:11.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:34:11.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:34:11.371 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:34:11.371 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:34:11.371 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:34:11.371 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:34:11.371 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:34:11.371 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:34:11.371 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:34:11.371 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6244 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:34:11.371 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6244 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:34:11.371 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6244 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:34:11.371 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6244 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:34:11.371 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6244 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:34:11.371 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6244 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:34:11.372 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=6244 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:34:16.377 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:34:16.377 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:34:16.378 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:34:16.378 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:34:16.379 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:34:16.379 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:34:16.390 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:34:16.392 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:34:16.392 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:34:16.392 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:34:16.393 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:34:16.398 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:34:16.398 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:34:16.399 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:34:16.399 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:34:16.399 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:34:16.399 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:34:16.399 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:34:16.399 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:34:16.404 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:34:16.404 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:34:16.404 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:34:16.404 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:34:16.404 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:34:16.405 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:34:16.405 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:34:16.405 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:34:16.410 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:34:16.410 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:34:16.410 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:34:16.410 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:34:16.411 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:34:16.411 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:34:16.411 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:34:16.411 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:34:16.417 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:34:16.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:34:16.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:34:16.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:34:16.417 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:34:16.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:34:16.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:34:16.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:34:16.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:34:16.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:34:16.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:34:16.418 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:34:16.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:34:16.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:34:16.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:34:16.418 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:34:16.418 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:34:16.418 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:34:16.419 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:34:16.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:34:16.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:34:16.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:34:16.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:34:16.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:34:16.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:34:16.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:34:16.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:34:16.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:34:16.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:34:16.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:34:16.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:34:16.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:34:16.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:34:16.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:34:16.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:34:16.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:34:16.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:34:16.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:34:16.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:34:16.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:34:16.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:34:16.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:34:16.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:34:16.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:34:16.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:34:16.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:34:16.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:34:16.423 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:34:16.907 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:34:16.943 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:34:16.945 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:34:16.947 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:34:16.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:34:16.959 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:34:16.959 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:34:16.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:34:16.970 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:34:16.971 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:34:16.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:34:16.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:34:17.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:34:17.002 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:34:17.002 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:34:17.002 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:34:17.002 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:34:17.045 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:34:17.045 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:34:17.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:34:17.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:34:17.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:34:17.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:34:17.266 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:34:17.266 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:34:17.285 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:34:17.285 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:34:17.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:34:17.291 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:34:17.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:34:17.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:34:17.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:34:17.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:34:17.293 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:34:17.293 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:34:17.293 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:34:17.293 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:34:17.327 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:34:17.327 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:34:17.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:34:17.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:34:17.384 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:34:17.422 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:34:17.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:34:17.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:34:17.425 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:34:17.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:34:17.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:34:17.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:34:17.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:34:17.674 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:34:17.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:34:17.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:34:17.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:34:17.698 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:34:17.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:34:17.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:34:17.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:34:17.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:34:17.699 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:34:17.699 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:34:17.699 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:34:17.700 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:34:17.708 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:34:17.709 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:34:17.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:34:17.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:34:17.861 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:34:18.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:34:18.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:34:18.257 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:34:18.257 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:34:18.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:34:18.276 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:34:18.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:34:18.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:34:18.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:34:18.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:34:18.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:34:18.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:34:18.285 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:34:18.285 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:34:18.285 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:34:18.285 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:34:18.332 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:34:18.332 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:34:18.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:34:18.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:34:18.339 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:34:18.423 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:34:18.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:34:18.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:34:18.425 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:34:18.817 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:34:18.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:34:18.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:34:18.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:34:18.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:34:18.906 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:34:18.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:34:18.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:34:18.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:34:18.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:34:18.914 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:34:18.914 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:34:18.914 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:34:18.914 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:34:18.914 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:34:18.914 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:34:18.914 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:34:23.921 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:34:23.921 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:34:23.922 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:34:23.922 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:34:23.923 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:34:23.923 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:34:23.934 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:34:23.936 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:34:23.936 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:34:23.936 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:34:23.936 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:34:23.941 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:34:23.941 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:34:23.942 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:34:23.942 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:34:23.942 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:34:23.942 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:34:23.943 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:34:23.943 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:34:23.946 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:34:23.946 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:34:23.947 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:34:23.947 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:34:23.947 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:34:23.947 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:34:23.947 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:34:23.947 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:34:23.950 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:34:23.950 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:34:23.950 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:34:23.950 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:34:23.950 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:34:23.950 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:34:23.951 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:34:23.951 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:34:23.954 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:34:23.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:34:23.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:34:23.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:34:23.955 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:34:23.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:34:23.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:34:23.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:34:23.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:34:23.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:34:23.955 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:34:23.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:34:23.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:34:23.955 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:34:23.955 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:34:23.955 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:34:23.955 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:34:23.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:34:23.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:34:23.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:34:23.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:34:23.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:34:23.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:34:23.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:34:23.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:34:23.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:34:23.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:34:23.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:34:23.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:34:23.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:34:23.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:34:23.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:34:23.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:34:23.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:34:23.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:34:23.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:34:23.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:34:23.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:34:23.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:34:23.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:34:23.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:34:23.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:34:23.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:34:23.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:34:23.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:34:23.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:34:23.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:34:23.960 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:34:24.442 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:34:24.480 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:34:24.481 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:34:24.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:34:24.483 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:34:24.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:34:24.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:34:24.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:34:24.527 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:34:24.527 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:34:24.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:34:24.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:34:24.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:34:24.534 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:34:24.534 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:34:24.534 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:34:24.534 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:34:24.580 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:34:24.581 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:34:24.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:34:24.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:34:24.918 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:34:24.958 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:34:24.959 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:34:24.959 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:34:24.959 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:34:25.396 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:34:25.874 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:34:25.959 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:34:25.959 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:34:25.959 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:34:25.960 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:34:26.352 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:34:26.831 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:34:26.960 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:34:26.961 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:34:26.961 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:34:26.961 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:34:27.309 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:34:27.787 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:34:27.962 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:34:27.963 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:34:27.963 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:34:27.963 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:34:28.265 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:34:28.743 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:34:28.963 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:34:28.963 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:34:28.964 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:34:28.964 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:34:29.221 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:34:29.700 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:34:30.178 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:34:30.656 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:34:31.135 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:34:31.614 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:34:32.092 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:34:32.571 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:34:33.049 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:34:33.527 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:34:34.005 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:34:34.484 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:34:34.962 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 05:34:35.440 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 05:34:35.918 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 05:34:36.397 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 05:34:36.875 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 05:34:37.353 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 05:34:37.832 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 05:34:38.310 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 05:34:38.787 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 05:34:39.265 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 05:34:39.743 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 05:34:40.220 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 05:34:40.698 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 05:34:41.176 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 05:34:41.654 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 05:34:42.133 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 05:34:42.611 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 05:34:43.089 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 05:34:43.568 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 05:34:44.047 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 05:34:44.525 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 05:34:45.003 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 05:34:45.481 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 05:34:45.960 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 05:34:46.438 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 05:34:46.917 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 05:34:47.395 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 05:34:47.873 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 05:34:48.351 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 05:34:48.829 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 05:34:49.307 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 05:34:49.785 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 05:34:50.264 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 05:34:50.742 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 05:34:51.220 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 05:34:51.698 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 05:34:52.177 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 05:34:52.655 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-15 05:34:53.133 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-15 05:34:53.611 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-15 05:34:54.089 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-15 05:34:54.568 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-15 05:34:55.046 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-15 05:34:55.524 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-15 05:34:56.002 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-15 05:34:56.480 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-15 05:34:56.959 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-15 05:34:57.437 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-15 05:34:57.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:34:57.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:34:57.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:34:57.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:34:57.600 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:34:57.600 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:34:57.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:34:57.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:34:57.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:34:57.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:34:57.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:34:57.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:34:57.607 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:34:57.607 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:34:57.607 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:34:57.607 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:34:57.619 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:34:57.619 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:34:57.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:34:57.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:34:57.914 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-15 05:34:58.393 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-15 05:34:58.872 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-15 05:34:59.351 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-15 05:34:59.830 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-15 05:35:00.309 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-15 05:35:00.788 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-15 05:35:01.267 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-15 05:35:01.745 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-15 05:35:02.224 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-15 05:35:02.702 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-15 05:35:03.181 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-15 05:35:03.660 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-15 05:35:04.139 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-15 05:35:04.619 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-15 05:35:05.098 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-15 05:35:05.577 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-15 05:35:06.056 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2025-12-15 05:35:06.532 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2025-12-15 05:35:07.011 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2025-12-15 05:35:07.489 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2025-12-15 05:35:07.968 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2025-12-15 05:35:08.446 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2025-12-15 05:35:08.925 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2025-12-15 05:35:09.403 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2025-12-15 05:35:09.882 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2025-12-15 05:35:10.361 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2025-12-15 05:35:10.839 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2025-12-15 05:35:11.318 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2025-12-15 05:35:11.797 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2025-12-15 05:35:12.276 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2025-12-15 05:35:12.756 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2025-12-15 05:35:13.235 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2025-12-15 05:35:13.714 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2025-12-15 05:35:14.192 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2025-12-15 05:35:14.672 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2025-12-15 05:35:15.151 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2025-12-15 05:35:15.630 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2025-12-15 05:35:16.109 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2025-12-15 05:35:16.588 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2025-12-15 05:35:17.066 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2025-12-15 05:35:17.546 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2025-12-15 05:35:18.025 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2025-12-15 05:35:18.503 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2025-12-15 05:35:18.983 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2025-12-15 05:35:19.460 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2025-12-15 05:35:19.939 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2025-12-15 05:35:20.418 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2025-12-15 05:35:20.897 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2025-12-15 05:35:21.376 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2025-12-15 05:35:21.855 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2025-12-15 05:35:22.333 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2025-12-15 05:35:22.810 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2025-12-15 05:35:23.289 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2025-12-15 05:35:23.766 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2025-12-15 05:35:24.245 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2025-12-15 05:35:24.724 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2025-12-15 05:35:25.202 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2025-12-15 05:35:25.681 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2025-12-15 05:35:26.160 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2025-12-15 05:35:26.638 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2025-12-15 05:35:27.118 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2025-12-15 05:35:27.597 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2025-12-15 05:35:28.075 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2025-12-15 05:35:28.554 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2025-12-15 05:35:29.032 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2025-12-15 05:35:29.512 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2025-12-15 05:35:29.991 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2025-12-15 05:35:30.469 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2025-12-15 05:35:30.948 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2025-12-15 05:35:31.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:35:31.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:35:31.175 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:35:31.175 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:35:31.175 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:35:31.188 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:35:31.188 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:35:31.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:35:31.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:35:31.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:35:31.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:35:31.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:35:31.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:35:31.194 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:35:31.194 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:35:31.194 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:35:31.194 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:35:31.229 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:35:31.230 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:35:31.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:35:31.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:35:31.425 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2025-12-15 05:35:31.903 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2025-12-15 05:35:32.381 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2025-12-15 05:35:32.859 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2025-12-15 05:35:33.337 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2025-12-15 05:35:33.815 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2025-12-15 05:35:34.292 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2025-12-15 05:35:34.771 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2025-12-15 05:35:35.249 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2025-12-15 05:35:35.727 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2025-12-15 05:35:36.205 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2025-12-15 05:35:36.682 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2025-12-15 05:35:37.160 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2025-12-15 05:35:37.637 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2025-12-15 05:35:38.115 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2025-12-15 05:35:38.593 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2025-12-15 05:35:39.070 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2025-12-15 05:35:39.548 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2025-12-15 05:35:40.027 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2025-12-15 05:35:40.505 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2025-12-15 05:35:40.983 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2025-12-15 05:35:41.461 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2025-12-15 05:35:41.938 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2025-12-15 05:35:42.416 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2025-12-15 05:35:42.893 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2025-12-15 05:35:43.372 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2025-12-15 05:35:43.850 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2025-12-15 05:35:44.328 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2025-12-15 05:35:44.806 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2025-12-15 05:35:45.284 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2025-12-15 05:35:45.761 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2025-12-15 05:35:46.240 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2025-12-15 05:35:46.717 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2025-12-15 05:35:47.196 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2025-12-15 05:35:47.674 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2025-12-15 05:35:48.152 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2025-12-15 05:35:48.629 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2025-12-15 05:35:49.107 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2025-12-15 05:35:49.585 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2025-12-15 05:35:50.063 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2025-12-15 05:35:50.541 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2025-12-15 05:35:51.018 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2025-12-15 05:35:51.496 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2025-12-15 05:35:51.973 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2025-12-15 05:35:52.451 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2025-12-15 05:35:52.929 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2025-12-15 05:35:53.407 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2025-12-15 05:35:53.885 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2025-12-15 05:35:54.363 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2025-12-15 05:35:54.841 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2025-12-15 05:35:55.319 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2025-12-15 05:35:55.797 [DEBUG] clck_gen.py:113 IND CLOCK 19584
2025-12-15 05:35:56.274 [DEBUG] clck_gen.py:113 IND CLOCK 19686
2025-12-15 05:35:56.753 [DEBUG] clck_gen.py:113 IND CLOCK 19788
2025-12-15 05:35:57.231 [DEBUG] clck_gen.py:113 IND CLOCK 19890
2025-12-15 05:35:57.708 [DEBUG] clck_gen.py:113 IND CLOCK 19992
2025-12-15 05:35:58.186 [DEBUG] clck_gen.py:113 IND CLOCK 20094
2025-12-15 05:35:58.664 [DEBUG] clck_gen.py:113 IND CLOCK 20196
2025-12-15 05:35:59.142 [DEBUG] clck_gen.py:113 IND CLOCK 20298
2025-12-15 05:35:59.620 [DEBUG] clck_gen.py:113 IND CLOCK 20400
2025-12-15 05:36:00.097 [DEBUG] clck_gen.py:113 IND CLOCK 20502
2025-12-15 05:36:00.575 [DEBUG] clck_gen.py:113 IND CLOCK 20604
2025-12-15 05:36:01.053 [DEBUG] clck_gen.py:113 IND CLOCK 20706
2025-12-15 05:36:01.531 [DEBUG] clck_gen.py:113 IND CLOCK 20808
2025-12-15 05:36:02.009 [DEBUG] clck_gen.py:113 IND CLOCK 20910
2025-12-15 05:36:02.487 [DEBUG] clck_gen.py:113 IND CLOCK 21012
2025-12-15 05:36:02.965 [DEBUG] clck_gen.py:113 IND CLOCK 21114
2025-12-15 05:36:03.443 [DEBUG] clck_gen.py:113 IND CLOCK 21216
2025-12-15 05:36:03.921 [DEBUG] clck_gen.py:113 IND CLOCK 21318
2025-12-15 05:36:04.399 [DEBUG] clck_gen.py:113 IND CLOCK 21420
2025-12-15 05:36:04.877 [DEBUG] clck_gen.py:113 IND CLOCK 21522
2025-12-15 05:36:05.355 [DEBUG] clck_gen.py:113 IND CLOCK 21624
2025-12-15 05:36:05.833 [DEBUG] clck_gen.py:113 IND CLOCK 21726
2025-12-15 05:36:06.311 [DEBUG] clck_gen.py:113 IND CLOCK 21828
2025-12-15 05:36:06.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:36:06.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:36:06.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:36:06.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:36:06.718 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:36:06.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:36:06.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:36:06.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:36:06.723 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:36:06.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:36:06.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:36:06.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:36:06.725 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:36:06.725 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:36:06.725 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:36:06.725 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:36:06.727 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:36:06.727 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:36:06.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:36:06.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:36:06.788 [DEBUG] clck_gen.py:113 IND CLOCK 21930
2025-12-15 05:36:07.266 [DEBUG] clck_gen.py:113 IND CLOCK 22032
2025-12-15 05:36:07.745 [DEBUG] clck_gen.py:113 IND CLOCK 22134
2025-12-15 05:36:08.224 [DEBUG] clck_gen.py:113 IND CLOCK 22236
2025-12-15 05:36:08.702 [DEBUG] clck_gen.py:113 IND CLOCK 22338
2025-12-15 05:36:09.180 [DEBUG] clck_gen.py:113 IND CLOCK 22440
2025-12-15 05:36:09.658 [DEBUG] clck_gen.py:113 IND CLOCK 22542
2025-12-15 05:36:10.137 [DEBUG] clck_gen.py:113 IND CLOCK 22644
2025-12-15 05:36:10.616 [DEBUG] clck_gen.py:113 IND CLOCK 22746
2025-12-15 05:36:11.094 [DEBUG] clck_gen.py:113 IND CLOCK 22848
2025-12-15 05:36:11.108 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:36:11.108 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:36:11.109 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:36:11.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:36:11.111 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:36:11.111 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:36:11.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:36:11.113 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:36:11.113 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:36:11.113 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:36:11.113 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:36:11.113 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:36:11.113 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:36:11.113 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:36:11.113 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=22854 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:36:11.113 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=22854 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:36:11.113 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=22854 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:36:11.113 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=22854 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:36:11.113 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=22854 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:36:11.113 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=22854 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:36:11.113 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=22854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:36:11.113 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=22854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:36:16.115 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:36:16.116 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:36:16.117 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:36:16.118 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:36:16.118 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:36:16.119 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:36:16.128 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:36:16.129 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:36:16.129 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:36:16.130 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:36:16.130 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:36:16.134 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:36:16.134 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:36:16.134 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:36:16.134 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:36:16.135 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:36:16.135 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:36:16.135 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:36:16.135 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:36:16.137 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:36:16.138 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:36:16.138 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:36:16.138 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:36:16.138 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:36:16.138 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:36:16.138 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:36:16.138 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:36:16.141 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:36:16.141 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:36:16.141 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:36:16.141 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:36:16.141 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:36:16.141 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:36:16.141 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:36:16.141 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:36:16.145 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:36:16.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:36:16.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:36:16.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:36:16.145 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:36:16.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:36:16.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:36:16.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:36:16.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:36:16.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:36:16.146 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:36:16.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:36:16.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:36:16.146 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:36:16.146 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:36:16.146 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:36:16.146 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:36:16.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:36:16.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:36:16.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:36:16.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:36:16.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:36:16.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:36:16.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:36:16.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:36:16.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:36:16.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:36:16.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:36:16.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:36:16.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:36:16.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:36:16.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:36:16.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:36:16.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:36:16.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:36:16.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:36:16.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:36:16.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:36:16.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:36:16.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:36:16.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:36:16.148 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:36:16.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:36:16.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:36:16.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:36:16.148 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:36:16.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:36:16.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:36:16.148 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:36:16.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:36:16.148 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:36:16.148 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:36:16.148 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:36:16.148 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:36:21.152 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:36:21.153 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:36:21.154 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:36:21.155 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:36:21.155 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:36:21.156 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:36:21.164 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:36:21.165 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:36:21.166 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:36:21.166 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:36:21.166 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:36:21.169 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:36:21.169 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:36:21.169 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:36:21.169 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:36:21.170 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:36:21.170 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:36:21.170 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:36:21.170 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:36:21.172 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:36:21.173 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:36:21.173 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:36:21.173 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:36:21.173 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:36:21.173 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:36:21.173 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:36:21.173 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:36:21.176 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:36:21.176 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:36:21.176 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:36:21.176 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:36:21.176 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:36:21.176 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:36:21.176 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:36:21.176 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:36:21.180 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:36:21.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:36:21.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:36:21.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:36:21.180 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:36:21.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:36:21.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:36:21.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:36:21.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:36:21.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:36:21.180 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:36:21.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:36:21.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:36:21.180 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:36:21.180 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:36:21.180 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:36:21.181 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:36:21.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:36:21.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:36:21.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:36:21.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:36:21.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:36:21.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:36:21.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:36:21.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:36:21.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:36:21.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:36:21.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:36:21.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:36:21.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:36:21.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:36:21.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:36:21.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:36:21.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:36:21.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:36:21.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:36:21.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:36:21.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:36:21.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:36:21.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:36:21.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:36:21.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:36:21.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:36:21.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:36:21.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:36:21.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:36:21.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:36:21.185 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:36:21.671 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:36:21.698 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:36:21.700 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:36:21.701 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:36:21.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:36:21.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:36:21.719 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:36:21.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:36:21.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:36:21.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:36:21.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:36:21.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:36:21.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:36:21.758 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:36:21.758 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:36:21.759 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:36:21.759 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:36:21.763 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:36:21.763 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:36:21.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:36:21.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:36:22.147 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:36:22.184 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:36:22.184 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:36:22.184 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:36:22.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:36:22.624 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:36:23.103 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:36:23.184 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:36:23.185 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:36:23.185 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:36:23.185 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:36:23.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:36:23.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:36:23.231 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:36:23.231 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:36:23.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:36:23.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:36:23.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:36:23.255 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:36:23.255 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:36:23.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:36:23.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:36:23.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:36:23.257 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:36:23.257 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:36:23.257 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:36:23.257 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:36:23.287 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:36:23.287 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:36:23.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:36:23.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:36:23.576 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:36:24.051 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:36:24.185 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:36:24.186 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:36:24.186 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:36:24.186 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:36:24.529 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:36:25.008 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:36:25.187 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:36:25.187 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:36:25.187 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:36:25.188 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:36:25.487 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:36:25.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:36:25.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:36:25.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:36:25.561 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:36:25.561 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:36:25.581 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:36:25.581 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:36:25.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:36:25.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:36:25.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:36:25.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:36:25.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:36:25.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:36:25.588 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:36:25.588 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:36:25.588 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:36:25.588 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:36:25.626 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:36:25.626 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:36:25.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:36:25.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:36:25.965 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:36:26.188 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:36:26.188 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:36:26.189 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:36:26.189 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:36:26.442 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:36:26.921 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:36:27.399 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:36:27.876 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:36:28.355 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:36:28.832 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:36:28.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:36:28.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:36:28.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:36:28.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:36:29.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:36:29.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:36:29.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:36:29.019 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:36:29.019 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:36:29.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:36:29.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:36:29.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:36:29.020 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:36:29.020 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:36:29.020 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:36:29.021 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:36:29.067 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:36:29.068 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:36:29.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:36:29.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:36:29.309 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:36:29.788 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:36:30.266 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:36:30.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:36:30.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:36:30.350 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:36:30.354 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:36:30.354 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:36:30.354 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:36:30.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:36:30.355 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:36:30.355 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:36:30.355 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:36:30.355 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:36:30.355 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:36:30.355 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:36:30.355 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:36:35.360 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:36:35.360 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:36:35.361 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:36:35.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:36:35.362 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:36:35.363 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:36:35.371 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:36:35.371 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:36:35.371 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:36:35.372 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:36:35.372 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:36:35.376 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:36:35.376 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:36:35.376 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:36:35.376 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:36:35.377 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:36:35.377 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:36:35.377 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:36:35.377 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:36:35.380 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:36:35.380 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:36:35.381 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:36:35.381 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:36:35.381 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:36:35.381 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:36:35.382 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:36:35.382 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:36:35.384 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:36:35.385 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:36:35.385 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:36:35.385 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:36:35.385 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:36:35.385 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:36:35.385 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:36:35.385 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:36:35.390 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:36:35.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:36:35.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:36:35.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:36:35.390 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:36:35.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:36:35.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:36:35.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:36:35.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:36:35.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:36:35.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:36:35.390 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:36:35.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:36:35.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:36:35.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:36:35.391 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:36:35.391 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:36:35.391 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:36:35.391 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:36:35.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:36:35.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:36:35.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:36:35.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:36:35.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:36:35.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:36:35.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:36:35.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:36:35.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:36:35.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:36:35.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:36:35.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:36:35.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:36:35.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:36:35.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:36:35.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:36:35.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:36:35.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:36:35.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:36:35.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:36:35.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:36:35.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:36:35.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:36:35.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:36:35.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:36:35.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:36:35.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:36:35.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:36:35.395 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:36:35.880 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:36:35.913 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:36:35.914 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:36:35.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:36:35.916 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:36:35.937 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:36:35.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:36:35.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:36:35.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:36:35.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:36:35.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:36:35.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:36:35.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:36:35.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:36:35.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:36:35.963 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:36:35.963 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:36:35.972 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:36:35.972 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:36:35.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:36:35.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:36:36.358 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:36:36.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:36:36.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:36:36.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:36:36.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:36:36.836 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:36:37.314 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:36:37.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:36:37.396 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:36:37.396 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:36:37.396 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:36:37.792 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:36:38.271 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:36:38.397 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:36:38.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:36:38.397 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:36:38.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:36:38.748 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:36:39.226 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:36:39.398 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:36:39.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:36:39.398 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:36:39.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:36:39.704 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:36:40.183 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:36:40.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:36:40.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:36:40.400 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:36:40.400 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:36:40.660 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:36:41.139 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:36:41.617 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:36:42.095 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:36:42.573 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:36:43.052 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:36:43.530 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:36:44.009 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:36:44.487 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:36:44.966 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:36:45.444 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:36:45.922 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:36:46.400 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 05:36:46.879 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 05:36:47.357 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 05:36:47.836 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 05:36:48.315 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 05:36:48.793 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 05:36:49.271 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 05:36:49.749 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 05:36:50.228 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 05:36:50.706 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 05:36:50.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:36:50.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:36:50.997 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:36:50.997 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:36:51.014 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:36:51.014 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:36:51.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:36:51.019 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:36:51.019 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:36:51.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:36:51.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:36:51.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:36:51.021 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:36:51.021 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:36:51.021 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:36:51.021 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:36:51.031 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:36:51.031 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:36:51.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:36:51.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:36:51.181 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 05:36:51.660 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 05:36:52.139 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 05:36:52.618 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 05:36:53.096 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 05:36:53.574 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 05:36:54.053 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 05:36:54.532 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 05:36:55.011 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 05:36:55.490 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 05:36:55.966 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 05:36:56.445 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 05:36:56.924 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 05:36:57.403 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 05:36:57.881 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 05:36:58.360 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 05:36:58.839 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 05:36:59.317 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 05:36:59.796 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 05:37:00.275 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 05:37:00.753 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 05:37:01.232 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 05:37:01.711 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 05:37:02.189 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 05:37:02.668 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 05:37:03.148 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 05:37:03.627 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 05:37:04.106 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-15 05:37:04.585 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-15 05:37:05.064 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-15 05:37:05.543 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-15 05:37:06.022 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-15 05:37:06.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:37:06.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:37:06.372 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:37:06.372 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:37:06.372 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:37:06.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:37:06.391 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:37:06.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:37:06.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:37:06.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:37:06.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:37:06.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:37:06.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:37:06.399 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:37:06.399 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:37:06.399 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:37:06.399 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:37:06.441 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:37:06.442 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:37:06.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:37:06.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:37:06.499 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-15 05:37:06.977 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-15 05:37:07.455 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-15 05:37:07.933 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-15 05:37:08.411 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-15 05:37:08.889 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-15 05:37:09.366 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-15 05:37:09.844 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-15 05:37:10.322 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-15 05:37:10.800 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-15 05:37:11.278 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-15 05:37:11.756 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-15 05:37:12.234 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-15 05:37:12.712 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-15 05:37:13.190 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-15 05:37:13.668 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-15 05:37:14.146 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-15 05:37:14.624 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-15 05:37:15.102 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-15 05:37:15.580 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-15 05:37:16.058 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-15 05:37:16.535 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-15 05:37:17.013 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-15 05:37:17.492 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2025-12-15 05:37:17.969 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2025-12-15 05:37:18.447 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2025-12-15 05:37:18.925 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2025-12-15 05:37:19.403 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2025-12-15 05:37:19.882 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2025-12-15 05:37:20.360 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2025-12-15 05:37:20.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:37:20.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:37:20.803 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:37:20.803 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:37:20.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:37:20.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:37:20.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:37:20.819 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:37:20.819 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:37:20.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:37:20.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:37:20.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:37:20.820 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:37:20.820 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:37:20.821 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:37:20.821 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:37:20.827 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:37:20.827 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:37:20.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:37:20.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:37:20.837 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2025-12-15 05:37:21.314 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2025-12-15 05:37:21.792 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2025-12-15 05:37:22.271 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2025-12-15 05:37:22.749 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2025-12-15 05:37:23.227 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2025-12-15 05:37:23.705 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2025-12-15 05:37:24.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:37:24.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:37:24.099 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:37:24.102 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:37:24.102 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:37:24.102 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:37:24.102 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:37:24.103 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:37:24.103 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:37:24.103 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:37:24.103 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:37:24.103 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:37:24.103 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:37:24.103 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:37:24.103 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=10390 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:37:24.103 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=10390 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:37:24.103 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=10390 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:37:24.103 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=10390 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:37:24.103 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=10390 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:37:24.103 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=10390 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:37:24.103 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=10390 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:37:24.103 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=10390 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:37:29.107 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:37:29.107 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:37:29.109 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:37:29.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:37:29.110 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:37:29.110 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:37:29.120 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:37:29.121 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:37:29.121 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:37:29.121 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:37:29.121 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:37:29.125 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:37:29.125 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:37:29.125 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:37:29.125 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:37:29.125 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:37:29.125 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:37:29.126 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:37:29.126 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:37:29.129 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:37:29.130 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:37:29.130 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:37:29.130 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:37:29.130 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:37:29.130 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:37:29.130 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:37:29.130 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:37:29.133 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:37:29.134 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:37:29.134 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:37:29.134 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:37:29.134 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:37:29.134 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:37:29.134 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:37:29.134 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:37:29.138 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:37:29.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:37:29.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:37:29.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:37:29.139 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:37:29.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:37:29.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:37:29.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:37:29.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:37:29.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:37:29.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:37:29.139 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:37:29.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:37:29.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:37:29.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:37:29.139 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:37:29.139 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:37:29.140 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:37:29.140 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:37:29.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:37:29.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:37:29.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:37:29.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:37:29.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:37:29.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:37:29.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:37:29.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:37:29.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:37:29.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:37:29.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:37:29.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:37:29.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:37:29.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:37:29.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:37:29.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:37:29.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:37:29.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:37:29.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:37:29.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:37:29.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:37:29.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:37:29.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:37:29.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:37:29.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:37:29.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:37:29.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:37:29.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:37:29.144 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:37:29.629 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:37:29.659 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:37:29.660 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:37:29.662 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:37:29.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:37:29.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:37:29.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:37:29.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:37:29.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:37:29.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:37:29.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:37:29.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:37:29.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:37:29.719 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:37:29.719 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:37:29.720 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:37:29.720 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:37:29.767 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:37:29.768 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:37:29.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:37:29.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:37:30.107 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:37:30.143 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:37:30.144 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:37:30.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:37:30.144 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:37:30.585 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:37:31.063 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:37:31.144 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:37:31.145 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:37:31.145 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:37:31.145 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:37:31.541 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:37:32.019 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:37:32.145 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:37:32.146 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:37:32.146 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:37:32.146 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:37:32.498 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:37:32.977 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:37:33.146 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:37:33.146 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:37:33.146 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:37:33.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:37:33.455 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:37:33.934 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:37:34.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:37:34.147 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:37:34.148 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:37:34.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:37:34.411 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:37:34.890 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:37:35.368 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:37:35.846 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:37:36.324 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:37:36.803 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:37:37.280 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:37:37.759 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:37:38.237 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:37:38.714 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:37:39.192 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:37:39.671 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:37:40.149 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 05:37:40.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:37:40.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:37:40.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:37:40.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:37:40.379 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:37:40.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:37:40.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:37:40.385 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:37:40.385 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:37:40.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:37:40.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:37:40.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:37:40.387 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:37:40.387 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:37:40.387 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:37:40.387 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:37:40.431 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:37:40.431 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:37:40.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:37:40.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:37:40.625 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 05:37:41.104 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 05:37:41.583 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 05:37:42.061 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 05:37:42.540 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 05:37:43.019 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 05:37:43.498 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 05:37:43.977 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 05:37:44.456 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 05:37:44.935 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 05:37:45.414 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 05:37:45.893 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 05:37:46.372 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 05:37:46.851 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 05:37:47.330 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 05:37:47.809 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 05:37:48.288 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 05:37:48.767 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 05:37:49.246 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 05:37:49.725 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 05:37:50.202 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 05:37:50.681 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 05:37:50.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:37:50.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:37:50.855 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:37:50.855 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:37:50.855 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:37:50.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:37:50.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:37:50.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:37:50.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:37:50.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:37:50.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:37:50.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:37:50.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:37:50.877 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:37:50.877 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:37:50.877 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:37:50.877 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:37:50.916 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:37:50.916 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:37:50.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:37:50.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:37:51.159 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 05:37:51.636 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 05:37:52.115 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 05:37:52.592 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-15 05:37:53.070 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-15 05:37:53.547 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-15 05:37:54.025 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-15 05:37:54.503 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-15 05:37:54.981 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-15 05:37:55.458 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-15 05:37:55.936 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-15 05:37:56.414 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-15 05:37:56.891 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-15 05:37:57.369 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-15 05:37:57.846 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-15 05:37:57.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:37:57.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:37:57.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:37:57.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:37:57.909 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:37:57.909 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:37:57.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:37:57.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:37:57.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:37:57.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:37:57.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:37:57.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:37:57.916 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:37:57.916 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:37:57.916 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:37:57.916 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:37:57.938 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:37:57.938 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:37:57.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:37:57.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:37:58.325 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-15 05:37:58.803 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-15 05:37:59.282 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-15 05:37:59.760 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-15 05:38:00.239 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-15 05:38:00.717 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-15 05:38:01.195 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-15 05:38:01.674 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-15 05:38:02.152 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-15 05:38:02.631 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-15 05:38:03.109 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-15 05:38:03.587 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-15 05:38:04.065 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-15 05:38:04.544 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-15 05:38:05.023 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-15 05:38:05.501 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-15 05:38:05.980 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-15 05:38:06.458 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-15 05:38:06.936 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-15 05:38:07.415 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-15 05:38:07.893 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-15 05:38:08.372 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-15 05:38:08.850 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-15 05:38:09.329 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-15 05:38:09.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:09.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:38:09.378 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:38:09.378 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:38:09.378 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:38:09.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:38:09.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:38:09.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:38:09.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:38:09.399 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:38:09.399 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:38:09.399 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:38:09.399 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:38:09.399 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:38:09.399 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:38:09.399 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:38:14.399 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:38:14.399 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:38:14.399 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:38:14.400 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:38:14.400 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:38:14.401 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:38:14.411 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:38:14.413 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:38:14.413 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:38:14.414 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:38:14.414 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:38:14.419 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:38:14.419 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:38:14.420 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:38:14.420 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:38:14.420 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:38:14.421 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:38:14.421 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:38:14.421 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:38:14.424 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:38:14.424 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:38:14.424 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:38:14.425 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:38:14.425 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:38:14.425 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:38:14.425 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:38:14.425 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:38:14.428 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:38:14.429 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:38:14.429 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:38:14.429 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:38:14.429 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:38:14.429 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:38:14.429 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:38:14.429 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:38:14.434 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:38:14.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:38:14.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:38:14.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:38:14.434 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:38:14.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:38:14.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:38:14.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:38:14.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:38:14.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:38:14.435 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:38:14.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:38:14.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:38:14.435 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:38:14.435 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:38:14.435 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:38:14.435 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:38:14.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:38:14.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:38:14.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:38:14.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:38:14.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:38:14.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:38:14.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:38:14.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:38:14.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:38:14.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:38:14.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:38:14.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:38:14.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:38:14.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:38:14.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:38:14.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:38:14.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:38:14.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:38:14.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:38:14.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:38:14.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:38:14.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:38:14.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:38:14.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:38:14.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:38:14.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:38:14.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:38:14.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:38:14.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:38:14.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:38:14.440 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:38:14.924 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:38:14.953 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:38:14.954 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:38:14.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:38:14.955 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:38:14.967 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:38:14.967 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:38:14.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:38:14.986 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:38:14.986 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:38:14.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:38:14.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:38:15.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:15.005 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:38:15.005 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:38:15.005 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:38:15.005 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:38:15.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:38:15.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:38:15.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:15.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:15.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:15.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:38:15.327 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:38:15.327 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:38:15.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:38:15.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:38:15.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:38:15.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:38:15.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:38:15.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:38:15.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:38:15.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:15.354 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:38:15.354 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:38:15.354 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:38:15.354 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:38:15.395 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:38:15.396 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:38:15.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:15.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:15.399 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:38:15.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:38:15.439 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:38:15.439 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:38:15.440 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:38:15.878 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:38:15.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:15.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:38:15.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:38:15.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:38:15.885 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:38:15.904 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:38:15.904 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:38:15.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:38:15.911 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:38:15.911 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:38:15.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:38:15.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:38:15.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:15.912 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:38:15.912 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:38:15.912 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:38:15.912 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:38:15.922 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:38:15.922 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:38:15.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:15.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:16.355 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:38:16.439 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:38:16.440 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:38:16.440 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:38:16.440 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:38:16.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:16.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:38:16.753 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:38:16.753 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:38:16.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:38:16.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:38:16.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:38:16.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:38:16.773 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:38:16.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:38:16.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:38:16.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:16.775 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:38:16.775 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:38:16.775 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:38:16.775 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:38:16.826 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:38:16.826 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:38:16.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:16.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:16.832 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:38:17.310 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:38:17.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:38:17.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:38:17.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:38:17.441 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:38:17.788 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:38:18.267 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:38:18.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:38:18.443 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:38:18.443 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:38:18.443 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:38:18.746 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:38:19.224 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:38:19.443 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:38:19.444 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:38:19.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:38:19.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:38:19.703 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:38:20.181 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:38:20.659 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:38:20.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:20.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:38:20.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:38:20.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:38:20.878 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:38:20.890 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:38:20.890 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:38:20.891 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:38:20.891 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:38:20.897 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:38:20.897 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:38:20.897 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:38:20.898 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:38:20.899 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:38:20.899 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:38:20.899 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:38:25.892 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:38:25.892 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:38:25.893 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:38:25.894 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:38:25.895 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:38:25.895 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:38:25.901 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:38:25.901 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:38:25.901 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:38:25.901 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:38:25.901 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:38:25.903 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:38:25.904 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:38:25.904 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:38:25.904 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:38:25.904 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:38:25.904 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:38:25.904 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:38:25.904 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:38:25.906 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:38:25.906 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:38:25.906 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:38:25.906 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:38:25.906 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:38:25.906 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:38:25.906 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:38:25.906 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:38:25.908 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:38:25.908 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:38:25.908 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:38:25.908 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:38:25.908 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:38:25.908 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:38:25.908 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:38:25.908 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:38:25.911 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:38:25.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:38:25.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:38:25.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:38:25.911 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:38:25.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:38:25.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:38:25.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:38:25.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:38:25.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:38:25.911 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:38:25.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:38:25.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:38:25.911 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:38:25.911 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:38:25.911 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:38:25.911 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:38:25.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:38:25.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:38:25.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:38:25.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:38:25.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:38:25.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:38:25.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:38:25.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:38:25.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:38:25.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:38:25.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:38:25.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:38:25.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:38:25.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:38:25.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:38:25.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:38:25.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:38:25.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:38:25.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:38:25.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:38:25.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:38:25.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:38:25.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:38:25.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:38:25.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:38:25.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:38:25.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:38:25.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:38:25.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:38:25.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:38:25.916 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:38:26.384 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:38:26.425 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:38:26.425 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:38:26.426 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:38:26.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:38:26.431 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:38:26.431 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:38:26.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:38:26.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:38:26.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:38:26.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:38:26.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:38:26.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:26.470 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:38:26.470 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:38:26.470 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:38:26.470 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:38:26.472 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:38:26.473 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:38:26.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:26.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:26.853 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:38:26.914 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:38:26.914 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:38:26.914 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:38:26.915 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:38:27.324 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:38:27.793 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:38:27.914 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:38:27.914 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:38:27.914 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:38:27.915 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:38:28.262 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:38:28.731 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:38:28.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:38:28.915 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:38:28.915 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:38:28.916 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:38:29.200 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:38:29.670 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:38:29.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:29.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:38:29.686 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:38:29.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:38:29.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:38:29.693 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:38:29.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:38:29.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:38:29.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:38:29.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:38:29.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:38:29.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:29.701 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:38:29.701 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:38:29.701 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:38:29.701 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:38:29.708 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:38:29.708 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:38:29.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:29.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:29.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:38:29.915 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:38:29.915 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:38:29.916 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:38:30.138 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:38:30.607 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:38:30.916 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:38:30.916 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:38:30.916 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:38:30.916 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:38:31.076 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:38:31.548 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:38:32.018 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:38:32.490 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:38:32.960 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:38:33.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:33.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:38:33.042 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:38:33.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:38:33.042 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:38:33.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:38:33.050 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:38:33.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:38:33.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:38:33.056 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:38:33.056 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:38:33.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:38:33.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:33.057 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:38:33.057 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:38:33.057 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:38:33.057 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:38:33.091 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:38:33.091 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:38:33.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:33.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:33.431 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:38:33.903 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:38:34.372 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:38:34.843 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:38:35.315 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:38:35.785 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:38:36.255 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:38:36.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:36.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:38:36.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:38:36.643 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:38:36.652 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:38:36.652 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:38:36.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:38:36.657 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:38:36.658 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:38:36.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:38:36.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:38:36.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:36.659 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:38:36.660 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:38:36.660 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:38:36.660 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:38:36.668 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:38:36.668 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:38:36.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:36.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:36.726 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 05:38:37.196 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 05:38:37.665 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 05:38:38.134 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 05:38:38.604 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 05:38:39.074 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 05:38:39.545 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 05:38:40.016 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 05:38:40.488 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 05:38:40.960 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 05:38:41.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:41.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:38:41.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:38:41.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:38:41.041 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:38:41.048 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:38:41.048 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:38:41.048 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:38:41.048 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:38:41.049 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:38:41.049 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:38:41.049 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:38:41.049 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:38:41.049 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:38:41.049 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:38:41.049 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3285 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:38:41.049 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:38:41.050 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3285 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:38:41.050 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3285 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:38:41.050 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3285 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:38:41.050 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3285 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:38:46.050 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:38:46.050 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:38:46.050 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:38:46.051 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:38:46.052 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:38:46.053 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:38:46.059 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:38:46.059 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:38:46.060 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:38:46.060 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:38:46.060 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:38:46.062 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:38:46.062 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:38:46.062 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:38:46.062 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:38:46.063 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:38:46.063 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:38:46.063 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:38:46.063 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:38:46.064 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:38:46.064 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:38:46.065 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:38:46.065 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:38:46.065 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:38:46.065 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:38:46.065 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:38:46.065 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:38:46.066 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:38:46.067 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:38:46.067 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:38:46.067 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:38:46.067 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:38:46.067 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:38:46.067 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:38:46.067 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:38:46.070 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:38:46.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:38:46.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:38:46.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:38:46.070 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:38:46.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:38:46.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:38:46.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:38:46.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:38:46.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:38:46.070 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:38:46.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:38:46.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:38:46.070 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:38:46.070 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:38:46.070 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:38:46.070 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:38:46.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:38:46.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:38:46.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:38:46.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:38:46.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:38:46.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:38:46.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:38:46.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:38:46.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:38:46.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:38:46.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:38:46.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:38:46.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:38:46.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:38:46.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:38:46.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:38:46.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:38:46.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:38:46.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:38:46.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:38:46.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:38:46.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:38:46.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:38:46.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:38:46.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:38:46.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:38:46.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:38:46.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:38:46.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:38:46.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:38:46.075 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:38:46.545 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:38:46.587 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:38:46.588 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:38:46.589 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:38:46.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:38:46.599 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:38:46.599 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:38:46.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:38:46.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:38:46.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:38:46.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:38:46.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:38:46.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:46.640 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:38:46.640 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:38:46.640 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:38:46.640 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:38:46.679 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:38:46.680 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:38:46.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:46.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:47.015 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:38:47.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:47.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:38:47.037 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:38:47.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:38:47.044 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:38:47.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:38:47.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:38:47.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:38:47.050 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:38:47.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:38:47.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:38:47.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:47.053 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:38:47.053 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:38:47.053 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:38:47.053 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:38:47.072 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:38:47.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:38:47.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:38:47.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:38:47.101 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:38:47.101 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:38:47.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:47.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:47.484 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:38:47.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:47.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:38:47.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:38:47.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:38:47.655 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:38:47.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:38:47.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:38:47.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:38:47.667 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:38:47.667 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:38:47.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:38:47.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:38:47.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:47.669 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:38:47.669 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:38:47.669 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:38:47.669 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:38:47.714 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:38:47.714 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:38:47.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:47.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:47.954 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:38:48.073 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:38:48.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:38:48.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:38:48.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:38:48.426 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:38:48.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:48.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:38:48.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:38:48.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:38:48.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:38:48.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:38:48.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:38:48.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:38:48.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:38:48.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:38:48.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:38:48.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:48.830 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:38:48.830 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:38:48.830 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:38:48.830 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:38:48.840 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:38:48.840 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:38:48.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:48.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:38:48.895 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:38:49.074 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:38:49.075 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:38:49.075 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:38:49.075 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:38:49.366 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:38:49.834 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:38:50.075 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:38:50.076 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:38:50.076 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:38:50.076 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:38:50.303 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:38:50.774 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:38:51.075 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:38:51.076 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:38:51.076 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:38:51.076 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:38:51.246 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:38:51.720 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:38:52.191 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:38:52.661 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:38:53.131 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:38:53.601 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:38:54.073 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:38:54.542 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:38:55.011 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:38:55.480 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:38:55.952 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:38:56.423 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:38:56.893 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 05:38:57.363 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 05:38:57.831 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 05:38:58.298 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 05:38:58.766 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 05:38:59.243 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 05:38:59.721 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 05:39:00.199 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 05:39:00.677 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 05:39:01.156 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 05:39:01.634 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 05:39:02.113 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-15 05:39:02.590 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-15 05:39:03.068 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-15 05:39:03.546 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-15 05:39:04.024 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-15 05:39:04.503 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-15 05:39:04.982 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-15 05:39:05.461 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-15 05:39:05.939 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-15 05:39:06.418 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-15 05:39:06.896 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-15 05:39:07.373 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-15 05:39:07.846 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-15 05:39:08.324 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-15 05:39:08.802 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-15 05:39:08.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:39:08.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:39:08.825 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:39:08.830 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:39:08.830 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:39:08.830 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:39:08.830 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:39:08.831 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:39:08.832 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:39:08.832 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:39:08.832 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:39:08.832 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:39:08.832 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:39:08.832 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:39:13.835 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:39:13.835 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:39:13.836 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:39:13.837 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:39:13.837 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:39:13.838 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:39:13.847 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:39:13.848 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:39:13.848 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:39:13.848 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:39:13.849 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:39:13.852 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:39:13.852 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:39:13.852 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:39:13.852 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:39:13.852 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:39:13.852 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:39:13.853 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:39:13.853 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:39:13.857 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:39:13.857 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:39:13.857 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:39:13.857 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:39:13.857 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:39:13.857 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:39:13.857 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:39:13.857 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:39:13.861 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:39:13.862 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:39:13.862 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:39:13.862 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:39:13.862 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:39:13.862 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:39:13.862 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:39:13.862 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:39:13.867 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:39:13.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:39:13.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:39:13.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:39:13.867 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:39:13.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:39:13.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:39:13.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:39:13.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:39:13.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:39:13.868 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:39:13.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:39:13.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:39:13.868 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:39:13.868 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:39:13.868 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:39:13.868 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:39:13.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:39:13.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:39:13.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:39:13.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:39:13.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:39:13.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:39:13.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:39:13.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:39:13.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:39:13.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:39:13.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:39:13.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:39:13.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:39:13.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:39:13.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:39:13.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:39:13.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:39:13.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:39:13.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:39:13.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:39:13.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:39:13.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:39:13.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:39:13.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:39:13.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:39:13.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:39:13.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:39:13.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:39:13.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:39:13.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:39:13.873 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:39:14.359 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:39:14.385 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:39:14.386 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:39:14.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:14.386 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:39:14.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:39:14.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:39:14.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:39:14.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:39:14.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:39:14.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:39:14.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:14.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:39:14.437 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:39:14.437 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:39:14.437 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:39:14.437 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:39:14.451 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:39:14.452 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:39:14.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:39:14.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:39:14.835 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:39:14.872 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:39:14.872 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:39:14.872 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:39:14.874 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:39:15.314 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:39:15.792 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:39:15.874 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:39:15.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:39:15.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:39:15.874 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:39:16.270 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:39:16.748 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:39:16.875 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:39:16.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:39:16.875 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:39:16.875 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:39:17.227 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:39:17.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:39:17.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:17.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:39:17.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:39:17.341 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:39:17.341 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:39:17.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:39:17.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:39:17.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:39:17.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:39:17.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:17.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:39:17.351 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:39:17.351 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:39:17.351 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:39:17.351 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:39:17.365 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:39:17.365 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:39:17.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:39:17.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:39:17.703 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:39:17.876 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:39:17.876 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:39:17.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:39:17.876 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:39:18.181 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:39:18.660 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:39:18.877 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:39:18.877 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:39:18.878 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:39:18.878 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:39:19.138 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:39:19.617 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:39:20.097 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:39:20.576 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:39:21.055 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:39:21.534 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:39:21.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:39:21.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:21.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:39:21.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:39:21.956 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:39:21.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:39:21.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:39:21.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:39:21.980 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:39:21.980 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:39:21.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:39:21.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:21.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:39:21.982 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:39:21.982 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:39:21.982 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:39:21.982 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:39:22.006 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:39:22.007 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:39:22.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:39:22.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:39:22.012 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:39:22.489 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:39:22.967 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:39:23.444 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:39:23.921 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:39:24.400 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:39:24.877 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 05:39:25.355 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 05:39:25.834 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 05:39:26.311 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 05:39:26.789 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 05:39:27.267 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 05:39:27.745 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 05:39:28.223 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 05:39:28.701 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 05:39:28.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:39:28.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:28.862 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:39:28.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:39:28.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:39:28.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:39:28.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:39:28.888 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:39:28.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:39:28.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:39:28.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:28.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:39:28.890 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:39:28.890 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:39:28.890 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:39:28.890 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:39:28.936 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:39:28.936 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:39:28.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:39:28.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:39:29.178 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 05:39:29.656 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 05:39:29.740 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:39:29.740 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:39:29.741 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:39:29.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:39:29.744 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:39:29.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:39:29.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:39:29.745 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:39:29.745 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:39:29.745 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:39:29.745 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:39:29.745 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:39:29.745 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:39:29.745 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:39:34.748 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:39:34.749 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:39:34.750 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:39:34.751 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:39:34.751 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:39:34.752 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:39:34.761 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:39:34.762 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:39:34.762 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:39:34.762 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:39:34.762 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:39:34.765 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:39:34.766 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:39:34.766 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:39:34.766 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:39:34.766 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:39:34.766 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:39:34.766 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:39:34.766 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:39:34.770 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:39:34.771 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:39:34.771 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:39:34.771 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:39:34.771 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:39:34.771 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:39:34.771 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:39:34.771 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:39:34.775 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:39:34.775 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:39:34.775 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:39:34.775 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:39:34.775 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:39:34.775 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:39:34.775 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:39:34.775 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:39:34.780 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:39:34.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:39:34.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:39:34.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:39:34.781 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:39:34.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:39:34.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:39:34.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:39:34.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:39:34.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:39:34.781 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:39:34.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:39:34.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:39:34.782 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:39:34.782 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:39:34.782 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:39:34.782 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:39:34.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:39:34.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:39:34.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:39:34.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:39:34.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:39:34.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:39:34.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:39:34.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:39:34.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:39:34.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:39:34.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:39:34.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:39:34.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:39:34.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:39:34.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:39:34.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:39:34.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:39:34.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:39:34.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:39:34.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:39:34.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:39:34.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:39:34.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:39:34.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:39:34.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:39:34.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:39:34.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:39:34.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:39:34.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:39:34.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:39:34.787 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:39:35.271 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:39:35.305 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:39:35.309 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:39:35.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:35.311 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:39:35.334 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:39:35.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:39:35.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:39:35.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:39:35.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:39:35.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:39:35.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:35.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:39:35.359 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:39:35.359 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:39:35.360 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:39:35.360 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:39:35.409 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:39:35.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:39:35.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:39:35.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:39:35.748 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:39:35.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:39:35.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:39:35.787 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:39:35.787 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:39:36.227 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:39:36.705 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:39:36.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:39:36.787 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:39:36.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:39:36.787 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:39:37.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:39:37.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:37.175 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:39:37.175 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:39:37.183 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:39:37.194 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:39:37.194 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:39:37.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:39:37.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:39:37.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:39:37.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:39:37.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:37.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:39:37.203 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:39:37.203 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:39:37.203 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:39:37.203 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:39:37.229 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:39:37.229 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-15 05:39:37.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:39:37.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:39:37.659 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:39:37.788 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:39:37.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:39:37.788 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:39:37.788 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:39:38.138 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:39:38.613 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:39:38.789 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:39:38.789 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:39:38.790 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:39:38.790 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:39:39.091 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:39:39.570 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:39:39.791 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:39:39.791 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:39:39.792 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:39:39.792 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:39:39.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:39:39.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:39.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:39:39.977 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:39:39.977 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:39:39.996 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:39:39.996 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:39:39.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:39:40.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:39:40.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:39:40.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:39:40.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:40.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:39:40.004 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:39:40.004 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:39:40.005 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:39:40.005 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:39:40.041 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:39:40.041 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:39:40.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:39:40.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:39:40.048 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:39:40.526 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:39:41.004 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:39:41.483 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:39:41.961 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:39:42.440 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:39:42.918 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:39:43.396 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:39:43.874 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:39:44.351 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:39:44.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:39:44.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:44.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:39:44.513 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:39:44.529 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:39:44.529 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:39:44.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:39:44.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:39:44.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:39:44.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:39:44.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:44.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:39:44.537 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:39:44.537 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:39:44.537 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:39:44.537 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:39:44.586 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.144.22:6700) Recv SETFH cmd
2025-12-15 05:39:44.586 [INFO] transceiver.py:201 (MS@172.18.144.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-15 05:39:44.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:39:44.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:39:44.828 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:39:45.306 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:39:45.785 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 05:39:46.263 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 05:39:46.739 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 05:39:46.823 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:39:46.823 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:39:46.823 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:39:46.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:39:46.824 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:39:46.824 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:39:46.824 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:39:46.824 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:39:46.824 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:39:46.824 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:39:46.824 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=2571 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:39:46.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:39:46.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:39:46.826 [INFO] transceiver.py:205 (MS@172.18.144.22:6700) Frequency hopping disabled
2025-12-15 05:39:46.826 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:39:51.828 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:39:51.828 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:39:51.829 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:39:51.830 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:39:51.830 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:39:51.831 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:39:51.843 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:39:51.843 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:39:51.843 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:39:51.843 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:39:51.843 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:39:51.845 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:39:51.845 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:39:51.845 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:39:51.845 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:39:51.846 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:39:51.846 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:39:51.846 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:39:51.846 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:39:51.847 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:39:51.848 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:39:51.848 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:39:51.848 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:39:51.848 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:39:51.848 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:39:51.848 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:39:51.848 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:39:51.850 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:39:51.850 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:39:51.850 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:39:51.850 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:39:51.850 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:39:51.850 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:39:51.850 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:39:51.850 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:39:51.853 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:39:51.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:39:51.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:39:51.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:39:51.853 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:39:51.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:39:51.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:39:51.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:39:51.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:39:51.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:39:51.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:39:51.853 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:39:51.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:39:51.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:39:51.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:39:51.853 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:39:51.853 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:39:51.853 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:39:51.853 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:39:51.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:39:51.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:39:51.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:39:51.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:39:51.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:39:51.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:39:51.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:39:51.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:39:51.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:39:51.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:39:51.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:39:51.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:39:51.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:39:51.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:39:51.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:39:51.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:39:51.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:39:51.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:39:51.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:39:51.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:39:51.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:39:51.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:39:51.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:39:51.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:39:51.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:39:51.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:39:51.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:39:51.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:39:51.858 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:39:52.341 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:39:52.372 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:39:52.373 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:39:52.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:52.374 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:39:52.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:52.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:52.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:52.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:52.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:52.818 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:39:52.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:39:52.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:39:52.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:39:52.858 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:39:53.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:53.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:53.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:53.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:53.295 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:39:53.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:53.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:53.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:53.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:53.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:53.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:53.718 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:39:53.719 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:39:53.719 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:39:53.719 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:39:53.724 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:39:53.724 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:39:53.724 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:39:53.724 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:39:53.724 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:39:53.725 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:39:53.725 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:39:53.725 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=401 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:39:53.725 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=401 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:39:53.725 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=401 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:39:53.725 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=401 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:39:53.726 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=401 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:39:53.726 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=401 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:39:53.726 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=401 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:39:53.726 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=401 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:39:58.724 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:39:58.724 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:39:58.725 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:39:58.726 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:39:58.726 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:39:58.727 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:39:58.736 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:39:58.736 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:39:58.737 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:39:58.737 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:39:58.737 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:39:58.739 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:39:58.740 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:39:58.740 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:39:58.740 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:39:58.740 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:39:58.740 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:39:58.741 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:39:58.741 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:39:58.743 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:39:58.743 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:39:58.743 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:39:58.743 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:39:58.743 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:39:58.743 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:39:58.743 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:39:58.743 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:39:58.745 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:39:58.745 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:39:58.745 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:39:58.745 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:39:58.746 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:39:58.746 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:39:58.746 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:39:58.746 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:39:58.749 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:39:58.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:39:58.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:39:58.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:39:58.749 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:39:58.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:39:58.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:39:58.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:39:58.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:39:58.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:39:58.749 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:39:58.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:39:58.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:39:58.750 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:39:58.750 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:39:58.750 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:39:58.750 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:39:58.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:39:58.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:39:58.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:39:58.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:39:58.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:39:58.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:39:58.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:39:58.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:39:58.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:39:58.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:39:58.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:39:58.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:39:58.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:39:58.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:39:58.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:39:58.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:39:58.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:39:58.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:39:58.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:39:58.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:39:58.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:39:58.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:39:58.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:39:58.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:39:58.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:39:58.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:39:58.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:39:58.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:39:58.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:39:58.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:39:58.754 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:39:59.239 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:39:59.265 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:39:59.266 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:39:59.266 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:39:59.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:59.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:59.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:59.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:59.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:59.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:59.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:59.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:59.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:59.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:59.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:59.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:59.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:59.715 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:39:59.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:39:59.773 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:39:59.773 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:39:59.773 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:39:59.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:59.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:59.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:59.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:59.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:59.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:59.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:39:59.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:00.193 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:40:00.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:00.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:00.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:00.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:00.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:00.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:00.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:00.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:00.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:00.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:00.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:00.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:00.632 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:40:00.633 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:40:00.633 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:40:00.633 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:40:00.634 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:40:00.634 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:40:00.634 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:40:00.634 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:40:00.634 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:40:00.634 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:40:00.634 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:40:05.638 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:40:05.638 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:40:05.640 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:40:05.641 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:40:05.642 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:40:05.642 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:40:05.652 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:40:05.653 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:40:05.653 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:40:05.653 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:40:05.653 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:40:05.656 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:40:05.657 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:40:05.657 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:40:05.657 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:40:05.657 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:40:05.658 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:40:05.658 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:40:05.658 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:40:05.660 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:40:05.660 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:40:05.660 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:40:05.660 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:40:05.660 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:40:05.660 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:40:05.660 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:40:05.660 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:40:05.663 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:40:05.663 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:40:05.663 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:40:05.663 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:40:05.663 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:40:05.663 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:40:05.663 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:40:05.663 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:40:05.668 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:40:05.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:40:05.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:40:05.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:40:05.668 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:40:05.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:40:05.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:40:05.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:40:05.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:40:05.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:05.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:05.669 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:40:05.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:05.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:05.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:05.669 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:40:05.669 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:40:05.669 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:40:05.669 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:40:05.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:05.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:05.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:05.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:40:05.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:05.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:05.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:05.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:05.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:05.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:05.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:05.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:05.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:05.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:05.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:05.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:05.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:05.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:05.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:05.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:05.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:05.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:05.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:05.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:05.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:05.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:05.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:05.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:05.674 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:40:06.156 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:40:06.187 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:40:06.188 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:40:06.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:06.190 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:40:06.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:06.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:06.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:06.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:06.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:06.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:06.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:06.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:06.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:06.633 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:40:06.673 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:40:06.673 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:40:06.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:40:06.673 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:40:06.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:06.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:06.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:06.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:06.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:06.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:07.110 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:40:07.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:07.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:07.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:07.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:07.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:07.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:07.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:07.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:07.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:07.527 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:40:07.527 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:40:07.527 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:40:07.527 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:40:07.528 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:40:07.528 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:40:07.528 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:40:07.528 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:40:07.528 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:40:07.528 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=398 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:40:07.528 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:40:07.528 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:40:07.528 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=398 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:40:07.528 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=398 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:40:07.528 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=398 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:40:07.528 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=398 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:40:12.533 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:40:12.533 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:40:12.537 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:40:12.539 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:40:12.541 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:40:12.543 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:40:12.551 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:40:12.553 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:40:12.553 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:40:12.553 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:40:12.553 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:40:12.556 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:40:12.557 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:40:12.557 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:40:12.557 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:40:12.557 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:40:12.557 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:40:12.557 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:40:12.557 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:40:12.560 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:40:12.560 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:40:12.560 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:40:12.560 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:40:12.560 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:40:12.560 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:40:12.560 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:40:12.560 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:40:12.563 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:40:12.563 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:40:12.563 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:40:12.563 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:40:12.563 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:40:12.563 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:40:12.563 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:40:12.563 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:40:12.569 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:40:12.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:40:12.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:40:12.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:40:12.569 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:40:12.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:40:12.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:40:12.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:40:12.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:12.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:40:12.569 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:40:12.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:12.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:12.569 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:40:12.569 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:40:12.569 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:40:12.570 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:40:12.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:12.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:12.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:12.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:40:12.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:12.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:12.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:12.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:12.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:12.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:12.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:12.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:12.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:12.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:12.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:12.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:12.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:12.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:12.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:12.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:12.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:12.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:12.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:12.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:12.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:12.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:12.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:12.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:12.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:12.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:12.574 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:40:13.058 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:40:13.089 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:40:13.091 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:40:13.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:13.093 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:40:13.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:13.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:13.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:13.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:13.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:13.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:13.535 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:40:13.573 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:40:13.573 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:40:13.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:40:13.573 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:40:13.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:13.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:13.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:13.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:14.013 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:40:14.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:14.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:14.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:14.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:14.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:14.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:14.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:40:14.394 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:40:14.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:40:14.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:40:14.395 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:40:14.395 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:40:14.395 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:40:14.395 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:40:14.395 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:40:14.395 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:40:14.395 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:40:19.399 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:40:19.399 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:40:19.400 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:40:19.400 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:40:19.401 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:40:19.401 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:40:19.411 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:40:19.413 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:40:19.413 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:40:19.414 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:40:19.414 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:40:19.418 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:40:19.418 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:40:19.418 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:40:19.419 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:40:19.419 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:40:19.419 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:40:19.420 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:40:19.420 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:40:19.423 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:40:19.423 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:40:19.423 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:40:19.423 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:40:19.423 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:40:19.423 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:40:19.424 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:40:19.424 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:40:19.427 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:40:19.427 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:40:19.427 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:40:19.427 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:40:19.427 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:40:19.427 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:40:19.427 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:40:19.427 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:40:19.432 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:40:19.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:40:19.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:40:19.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:40:19.432 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:40:19.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:40:19.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:40:19.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:40:19.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:19.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:40:19.432 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:40:19.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:19.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:19.433 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:40:19.433 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:40:19.433 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:40:19.433 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:40:19.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:19.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:19.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:19.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:40:19.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:19.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:19.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:19.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:19.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:19.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:19.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:19.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:19.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:19.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:19.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:19.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:19.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:19.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:19.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:19.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:19.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:19.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:19.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:19.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:19.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:19.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:19.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:19.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:19.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:19.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:19.437 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:40:19.921 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:40:19.953 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:40:19.954 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:40:19.956 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:40:19.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:19.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:19.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:19.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:20.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:20.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:20.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:20.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:20.395 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:40:20.436 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:40:20.437 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:40:20.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:40:20.437 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:40:20.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:20.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:20.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:20.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:20.872 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:40:20.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:20.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:20.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:20.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:21.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:21.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:21.268 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:40:21.268 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:40:21.268 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:40:21.268 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:40:21.269 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:40:21.269 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:40:21.269 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:40:21.269 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:40:21.269 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:40:21.269 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:40:21.269 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:40:26.274 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:40:26.274 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:40:26.274 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:40:26.275 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:40:26.276 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:40:26.277 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:40:26.285 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:40:26.287 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:40:26.287 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:40:26.288 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:40:26.288 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:40:26.292 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:40:26.293 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:40:26.293 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:40:26.293 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:40:26.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:40:26.293 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:40:26.293 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:40:26.294 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:40:26.298 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:40:26.298 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:40:26.298 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:40:26.298 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:40:26.299 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:40:26.299 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:40:26.299 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:40:26.299 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:40:26.303 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:40:26.303 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:40:26.303 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:40:26.303 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:40:26.303 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:40:26.303 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:40:26.303 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:40:26.303 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:40:26.309 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:40:26.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:40:26.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:40:26.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:40:26.309 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:40:26.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:40:26.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:40:26.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:40:26.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:26.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:40:26.310 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:40:26.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:26.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:26.310 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:40:26.310 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:40:26.310 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:40:26.310 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:40:26.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:26.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:26.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:26.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:40:26.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:26.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:26.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:26.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:26.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:26.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:26.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:26.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:26.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:26.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:26.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:26.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:26.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:26.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:26.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:26.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:26.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:26.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:26.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:26.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:26.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:26.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:26.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:26.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:26.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:26.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:26.315 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:40:26.796 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:40:26.833 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:40:26.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:26.836 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:40:26.837 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:40:26.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:26.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:26.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:26.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:26.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:27.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:27.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:27.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:27.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:27.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:27.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:27.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:27.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:27.272 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:40:27.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:40:27.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:40:27.334 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:40:27.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:40:27.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:27.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:27.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:27.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:27.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:27.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:27.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:27.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:27.749 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:40:27.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:27.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:27.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:27.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:27.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:27.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:27.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:27.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:28.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:28.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:28.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:28.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:28.170 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:40:28.170 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:40:28.170 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:40:28.170 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:40:28.171 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:40:28.171 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:40:28.171 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:40:28.172 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:40:28.172 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:40:28.172 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:40:28.172 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:40:33.176 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:40:33.176 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:40:33.177 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:40:33.178 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:40:33.178 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:40:33.179 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:40:33.187 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:40:33.189 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:40:33.189 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:40:33.189 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:40:33.189 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:40:33.192 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:40:33.193 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:40:33.193 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:40:33.193 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:40:33.193 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:40:33.193 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:40:33.193 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:40:33.193 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:40:33.196 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:40:33.197 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:40:33.197 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:40:33.197 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:40:33.197 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:40:33.197 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:40:33.197 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:40:33.197 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:40:33.200 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:40:33.200 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:40:33.200 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:40:33.200 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:40:33.200 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:40:33.200 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:40:33.200 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:40:33.200 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:40:33.204 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:40:33.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:40:33.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:40:33.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:40:33.204 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:40:33.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:40:33.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:40:33.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:40:33.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:33.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:40:33.205 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:40:33.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:33.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:33.205 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:40:33.205 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:40:33.205 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:40:33.205 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:40:33.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:33.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:33.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:33.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:40:33.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:33.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:33.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:33.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:33.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:33.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:33.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:33.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:33.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:33.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:33.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:33.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:33.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:33.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:33.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:33.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:33.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:33.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:33.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:33.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:33.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:33.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:33.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:33.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:33.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:33.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:33.210 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:40:33.693 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:40:33.724 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:40:33.726 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:40:33.727 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:40:33.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:33.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:33.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:33.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:33.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:34.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:34.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:34.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:34.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:34.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:34.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:34.169 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:40:34.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:40:34.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:40:34.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:40:34.209 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:40:34.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:34.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:34.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:34.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:34.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:34.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:34.644 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:40:34.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:34.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:34.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:34.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:34.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:34.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:35.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:35.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:35.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:35.078 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:40:35.079 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:40:35.079 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:40:35.079 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:40:35.085 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:40:35.085 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:40:35.085 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:40:35.085 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:40:35.086 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:40:35.086 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:40:35.086 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:40:40.085 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:40:40.085 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:40:40.085 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:40:40.086 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:40:40.087 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:40:40.088 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:40:40.103 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:40:40.104 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:40:40.104 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:40:40.104 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:40:40.104 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:40:40.108 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:40:40.108 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:40:40.108 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:40:40.108 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:40:40.108 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:40:40.108 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:40:40.109 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:40:40.109 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:40:40.111 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:40:40.111 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:40:40.111 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:40:40.111 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:40:40.112 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:40:40.112 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:40:40.112 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:40:40.112 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:40:40.114 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:40:40.114 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:40:40.114 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:40:40.114 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:40:40.114 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:40:40.114 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:40:40.115 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:40:40.115 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:40:40.119 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:40:40.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:40:40.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:40:40.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:40:40.119 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:40:40.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:40:40.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:40:40.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:40:40.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:40.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:40:40.120 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:40:40.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:40.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:40.120 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:40:40.120 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:40:40.120 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:40:40.120 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:40:40.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:40.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:40.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:40.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:40:40.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:40.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:40.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:40.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:40.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:40.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:40.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:40.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:40.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:40.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:40.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:40.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:40.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:40.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:40.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:40.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:40.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:40.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:40.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:40.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:40.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:40.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:40.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:40.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:40.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:40.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:40.125 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:40:40.608 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:40:40.645 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:40:40.646 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:40:40.647 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:40:40.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:40.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:40.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:40.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:40.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:40.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:40.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:40.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:40.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:40.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:40.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:40.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:40.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:40.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:40.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:40.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:40.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:40.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:40.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:40.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:40.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:40.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:40.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:40.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:40.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:40.733 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:40:40.733 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:40:40.733 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:40:40.733 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:40:40.735 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:40:40.735 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:40:40.735 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:40:40.735 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:40:40.735 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:40:40.735 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:40:40.736 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:40:45.739 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:40:45.739 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:40:45.740 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:40:45.740 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:40:45.741 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:40:45.742 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:40:45.751 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:40:45.754 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:40:45.754 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:40:45.755 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:40:45.755 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:40:45.765 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:40:45.765 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:40:45.765 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:40:45.765 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:40:45.766 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:40:45.766 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:40:45.766 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:40:45.766 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:40:45.774 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:40:45.774 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:40:45.774 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:40:45.774 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:40:45.774 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:40:45.775 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:40:45.775 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:40:45.775 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:40:45.783 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:40:45.783 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:40:45.783 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:40:45.783 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:40:45.783 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:40:45.783 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:40:45.783 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:40:45.783 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:40:45.790 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:40:45.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:40:45.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:40:45.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:40:45.790 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:40:45.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:40:45.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:40:45.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:40:45.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:45.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:40:45.791 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:40:45.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:45.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:45.791 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:40:45.791 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:40:45.792 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:40:45.792 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:40:45.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:45.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:45.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:45.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:40:45.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:45.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:45.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:45.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:45.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:45.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:45.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:45.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:45.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:45.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:45.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:45.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:45.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:45.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:45.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:45.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:45.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:45.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:45.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:45.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:45.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:45.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:45.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:45.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:45.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:45.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:45.796 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:40:46.279 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:40:46.322 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:40:46.324 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:40:46.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.326 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:40:46.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:46.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:40:46.456 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:40:46.456 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:40:46.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:40:46.457 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:40:46.457 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:40:46.457 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:40:46.457 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:40:46.457 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:40:46.457 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:40:46.457 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:40:51.462 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:40:51.462 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:40:51.464 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:40:51.465 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:40:51.465 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:40:51.466 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:40:51.477 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:40:51.477 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:40:51.477 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:40:51.477 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:40:51.477 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:40:51.479 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:40:51.479 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:40:51.479 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:40:51.480 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:40:51.480 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:40:51.480 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:40:51.480 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:40:51.480 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:40:51.481 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:40:51.481 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:40:51.482 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:40:51.482 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:40:51.482 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:40:51.482 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:40:51.482 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:40:51.482 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:40:51.483 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:40:51.483 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:40:51.483 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:40:51.483 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:40:51.484 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:40:51.484 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:40:51.484 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:40:51.484 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:40:51.486 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:40:51.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:40:51.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:40:51.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:40:51.487 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:40:51.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:40:51.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:40:51.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:40:51.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:51.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:40:51.487 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:40:51.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:51.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:51.487 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:40:51.487 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:40:51.487 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:40:51.487 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:40:51.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:51.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:51.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:51.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:40:51.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:51.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:51.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:51.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:51.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:51.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:51.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:51.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:51.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:51.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:51.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:51.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:51.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:51.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:51.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:51.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:51.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:51.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:51.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:51.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:51.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:51.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:51.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:51.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:51.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:51.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:51.492 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:40:51.976 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:40:52.006 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:40:52.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:52.008 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:40:52.009 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:40:52.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:52.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:52.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:52.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:52.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:52.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:52.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:52.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:52.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:52.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:52.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:52.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:52.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:52.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:52.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:52.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:52.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:52.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:52.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:52.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:52.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:52.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:52.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:52.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:52.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:52.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:52.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:52.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:52.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:52.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:52.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:52.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:52.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:52.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:52.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:52.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:52.122 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:40:52.122 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:40:52.122 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:40:52.122 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:40:52.123 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:40:52.123 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:40:52.123 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:40:52.123 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:40:52.123 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:40:52.123 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:40:52.124 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:40:57.129 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:40:57.129 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:40:57.130 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:40:57.131 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:40:57.131 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:40:57.132 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:40:57.140 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:40:57.141 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:40:57.141 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:40:57.141 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:40:57.141 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:40:57.148 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:40:57.148 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:40:57.148 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:40:57.148 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:40:57.148 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:40:57.148 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:40:57.148 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:40:57.148 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:40:57.152 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:40:57.152 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:40:57.152 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:40:57.153 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:40:57.153 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:40:57.153 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:40:57.153 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:40:57.153 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:40:57.156 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:40:57.156 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:40:57.156 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:40:57.156 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:40:57.156 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:40:57.156 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:40:57.156 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:40:57.156 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:40:57.160 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:40:57.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:40:57.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:40:57.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:40:57.161 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:40:57.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:40:57.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:40:57.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:40:57.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:57.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:40:57.161 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:40:57.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:57.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:57.161 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:40:57.161 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:40:57.161 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:40:57.161 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:40:57.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:57.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:57.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:57.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:40:57.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:57.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:57.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:57.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:57.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:57.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:57.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:57.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:57.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:57.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:57.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:57.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:57.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:57.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:57.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:57.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:57.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:40:57.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:57.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:57.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:57.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:57.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:57.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:40:57.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:40:57.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:57.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:40:57.166 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:40:57.651 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:40:57.683 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:40:57.684 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:40:57.686 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:40:57.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:57.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:57.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:57.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:57.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:57.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:57.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:57.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:57.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:57.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:57.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:57.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:57.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:57.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:57.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:57.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:57.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:57.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:57.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:57.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:57.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:57.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:57.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:40:57.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:40:57.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:40:57.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:40:57.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:40:57.795 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:40:57.795 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:40:57.795 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:40:57.795 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:40:57.795 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:40:57.796 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:40:57.796 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:40:57.796 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=135 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:40:57.796 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=135 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:40:57.796 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=135 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:40:57.796 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=135 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:40:57.796 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=135 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:40:57.796 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=135 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:40:57.796 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=135 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:40:57.796 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=135 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:41:02.800 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:41:02.800 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:41:02.800 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:41:02.801 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:41:02.802 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:41:02.803 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:41:02.810 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:41:02.811 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:41:02.811 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:41:02.811 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:41:02.811 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:41:02.814 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:41:02.814 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:41:02.814 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:41:02.814 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:41:02.814 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:41:02.814 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:41:02.814 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:41:02.814 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:41:02.817 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:41:02.817 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:41:02.817 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:41:02.817 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:41:02.817 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:41:02.817 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:41:02.817 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:41:02.817 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:41:02.819 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:41:02.819 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:41:02.819 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:41:02.819 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:41:02.819 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:41:02.819 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:41:02.819 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:41:02.819 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:41:02.822 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:41:02.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:41:02.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:41:02.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:41:02.822 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:41:02.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:41:02.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:41:02.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:41:02.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:02.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:41:02.822 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:41:02.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:02.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:02.822 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:41:02.822 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:41:02.822 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:41:02.822 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:41:02.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:02.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:02.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:02.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:41:02.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:02.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:02.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:02.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:02.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:02.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:02.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:02.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:02.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:02.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:02.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:02.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:02.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:02.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:02.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:02.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:02.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:02.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:02.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:02.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:02.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:02.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:02.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:02.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:02.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:02.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:02.827 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:41:03.309 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:41:03.339 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:41:03.340 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:41:03.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:03.342 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:41:03.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:03.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:03.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:03.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:03.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:03.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:03.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:03.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:03.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:03.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:03.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:03.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:03.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:03.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:03.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:03.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:03.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:03.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:03.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:03.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:03.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:03.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:03.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:03.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:03.451 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:41:03.451 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:41:03.451 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:41:03.451 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:41:03.453 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:41:03.453 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:41:03.453 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:41:03.453 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:41:03.453 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:41:03.453 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:41:03.453 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:41:03.453 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=135 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:41:03.453 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=135 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:41:03.453 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=135 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:41:03.453 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=135 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:41:03.453 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=135 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:41:03.453 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=135 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:41:08.457 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:41:08.457 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:41:08.458 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:41:08.459 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:41:08.460 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:41:08.460 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:41:08.467 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:41:08.468 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:41:08.468 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:41:08.468 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:41:08.468 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:41:08.470 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:41:08.470 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:41:08.470 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:41:08.470 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:41:08.470 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:41:08.470 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:41:08.470 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:41:08.470 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:41:08.472 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:41:08.472 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:41:08.472 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:41:08.472 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:41:08.472 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:41:08.472 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:41:08.472 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:41:08.472 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:41:08.474 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:41:08.474 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:41:08.474 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:41:08.474 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:41:08.474 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:41:08.474 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:41:08.474 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:41:08.474 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:41:08.477 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:41:08.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:41:08.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:41:08.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:41:08.477 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:41:08.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:41:08.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:41:08.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:41:08.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:08.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:41:08.478 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:41:08.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:08.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:08.478 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:41:08.478 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:41:08.478 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:41:08.478 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:41:08.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:08.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:08.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:08.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:41:08.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:08.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:08.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:08.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:08.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:08.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:08.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:08.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:08.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:08.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:08.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:08.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:08.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:08.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:08.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:08.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:08.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:08.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:08.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:08.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:08.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:08.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:08.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:08.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:08.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:08.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:08.483 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:41:08.967 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:41:08.998 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:41:08.999 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:41:09.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.001 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:41:09.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:09.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:09.118 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:41:09.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:41:09.118 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:41:09.118 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:41:09.119 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:41:09.119 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:41:09.119 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:41:09.119 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:41:09.119 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:41:09.119 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:41:09.119 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:41:14.127 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:41:14.127 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:41:14.127 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:41:14.128 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:41:14.128 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:41:14.129 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:41:14.145 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:41:14.148 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:41:14.148 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:41:14.149 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:41:14.149 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:41:14.164 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:41:14.165 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:41:14.166 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:41:14.166 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:41:14.166 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:41:14.167 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:41:14.167 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:41:14.167 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:41:14.176 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:41:14.176 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:41:14.176 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:41:14.176 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:41:14.176 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:41:14.176 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:41:14.177 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:41:14.177 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:41:14.179 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:41:14.179 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:41:14.180 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:41:14.180 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:41:14.180 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:41:14.180 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:41:14.180 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:41:14.180 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:41:14.187 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:41:14.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:41:14.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:41:14.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:41:14.187 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:41:14.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:41:14.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:41:14.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:41:14.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:41:14.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:14.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:14.188 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:41:14.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:14.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:14.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:14.189 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:41:14.189 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:41:14.189 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:41:14.189 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:41:14.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:14.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:14.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:14.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:41:14.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:14.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:14.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:14.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:14.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:14.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:14.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:14.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:14.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:14.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:14.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:14.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:14.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:14.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:14.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:14.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:14.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:14.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:14.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:14.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:14.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:14.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:14.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:14.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:14.194 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:41:14.678 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:41:14.718 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:41:14.721 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:41:14.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:14.724 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:41:14.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:14.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:14.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:14.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:14.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:14.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:14.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:14.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:14.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:14.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:14.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:14.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:14.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:14.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:14.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:14.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:14.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:14.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:14.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:14.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:14.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:14.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:14.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:14.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:14.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:14.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:14.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:14.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:14.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:14.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:14.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:14.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:14.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:14.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:14.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:14.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:14.841 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:41:14.841 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:41:14.841 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:41:14.841 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:41:14.842 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:41:14.842 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:41:14.842 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:41:14.842 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:41:14.842 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:41:14.842 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:41:14.842 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:41:14.842 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=139 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:41:14.842 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=139 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:41:14.842 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=139 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:41:14.842 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=139 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:41:19.847 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:41:19.847 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:41:19.848 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:41:19.848 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:41:19.849 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:41:19.850 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:41:19.860 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:41:19.861 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:41:19.861 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:41:19.861 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:41:19.861 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:41:19.864 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:41:19.864 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:41:19.864 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:41:19.864 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:41:19.864 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:41:19.864 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:41:19.865 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:41:19.865 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:41:19.867 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:41:19.868 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:41:19.868 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:41:19.868 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:41:19.868 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:41:19.868 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:41:19.868 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:41:19.868 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:41:19.871 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:41:19.871 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:41:19.871 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:41:19.871 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:41:19.871 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:41:19.871 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:41:19.871 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:41:19.871 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:41:19.876 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:41:19.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:41:19.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:41:19.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:41:19.876 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:41:19.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:41:19.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:41:19.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:41:19.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:41:19.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:19.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:19.877 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:41:19.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:19.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:19.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:19.877 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:41:19.877 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:41:19.877 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:41:19.877 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:41:19.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:19.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:19.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:19.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:41:19.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:19.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:19.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:19.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:19.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:19.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:19.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:19.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:19.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:19.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:19.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:19.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:19.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:19.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:19.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:19.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:19.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:19.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:19.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:19.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:19.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:19.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:19.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:19.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:19.881 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:41:20.364 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:41:20.395 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:41:20.396 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:41:20.396 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:41:20.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:20.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:41:20.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:41:20.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:41:20.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:41:20.398 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:41:20.398 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:41:20.398 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:41:20.398 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:41:20.841 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:41:20.880 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:41:20.880 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:41:20.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:41:20.881 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:41:21.319 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:41:21.796 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:41:21.881 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:41:21.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:41:21.882 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:41:21.882 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:41:22.275 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:41:22.753 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:41:22.882 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:41:22.882 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:41:22.882 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:41:22.883 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:41:23.231 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:41:23.708 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:41:23.880 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:41:23.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:41:23.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:41:23.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:41:23.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:41:23.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:41:23.888 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:41:23.888 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:41:23.888 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:41:23.888 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:41:23.888 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:41:23.888 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:41:23.888 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:41:28.892 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:41:28.892 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:41:28.894 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:41:28.894 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:41:28.895 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:41:28.895 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:41:28.905 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:41:28.907 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:41:28.907 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:41:28.908 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:41:28.908 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:41:28.913 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:41:28.914 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:41:28.914 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:41:28.914 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:41:28.915 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:41:28.915 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:41:28.916 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:41:28.916 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:41:28.919 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:41:28.919 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:41:28.919 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:41:28.919 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:41:28.919 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:41:28.920 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:41:28.920 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:41:28.920 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:41:28.923 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:41:28.923 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:41:28.924 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:41:28.924 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:41:28.924 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:41:28.924 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:41:28.924 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:41:28.924 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:41:28.928 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:41:28.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:41:28.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:41:28.929 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:41:28.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:41:28.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:41:28.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:41:28.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:41:28.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:41:28.929 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:41:28.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:28.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:28.929 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:41:28.929 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:41:28.929 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:41:28.930 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:41:28.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:28.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:28.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:28.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:41:28.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:28.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:28.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:28.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:28.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:28.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:28.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:28.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:28.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:28.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:28.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:28.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:28.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:28.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:28.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:28.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:28.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:28.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:28.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:28.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:28.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:28.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:28.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:28.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:28.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:28.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:28.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:28.934 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:41:29.418 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:41:29.449 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:41:29.450 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:41:29.450 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:41:29.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:29.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:41:29.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:41:29.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:41:29.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:41:29.462 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:41:29.462 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:41:29.462 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:41:29.462 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:41:29.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 05:41:29.522 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:41:29.523 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:41:29.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:41:29.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:41:29.895 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:41:29.933 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:41:29.934 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:41:29.934 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:41:29.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:41:30.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:41:30.042 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:41:30.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:41:30.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:41:30.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:41:30.043 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:41:30.044 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:41:30.044 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:41:30.044 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:41:30.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:30.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:41:30.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:41:30.088 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:41:30.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:41:30.088 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:41:30.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:41:30.089 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:41:30.089 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:41:30.089 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:41:30.089 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:41:30.089 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:41:30.089 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:41:30.089 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:41:35.092 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:41:35.092 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:41:35.094 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:41:35.095 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:41:35.095 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:41:35.096 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:41:35.113 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:41:35.114 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:41:35.114 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:41:35.115 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:41:35.115 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:41:35.117 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:41:35.117 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:41:35.117 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:41:35.117 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:41:35.117 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:41:35.117 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:41:35.117 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:41:35.117 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:41:35.119 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:41:35.119 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:41:35.119 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:41:35.119 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:41:35.120 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:41:35.120 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:41:35.120 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:41:35.120 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:41:35.122 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:41:35.122 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:41:35.122 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:41:35.122 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:41:35.122 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:41:35.122 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:41:35.122 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:41:35.122 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:41:35.125 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:41:35.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:41:35.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:41:35.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:41:35.125 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:41:35.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:41:35.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:41:35.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:41:35.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:41:35.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:35.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:35.125 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:41:35.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:35.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:35.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:35.125 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:41:35.125 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:41:35.125 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:41:35.126 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:41:35.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:35.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:35.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:35.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:41:35.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:35.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:35.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:35.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:35.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:35.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:35.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:35.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:35.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:35.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:35.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:35.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:35.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:35.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:35.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:35.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:35.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:35.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:35.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:35.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:35.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:35.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:35.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:35.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:35.130 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:41:35.614 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:41:35.646 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:41:35.648 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:41:35.649 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:41:35.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:35.665 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:41:35.665 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:41:35.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:41:35.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:41:35.667 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:41:35.667 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:41:35.667 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:41:35.668 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:41:35.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 05:41:35.718 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:41:35.718 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:41:35.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:41:35.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:41:35.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:35.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:41:35.830 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:41:35.830 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:41:35.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:41:35.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:41:35.831 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:41:35.831 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:41:35.832 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:41:35.832 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:41:36.091 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:41:36.145 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:41:36.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:41:36.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:41:36.148 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:41:36.569 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:41:37.047 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:41:37.148 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:41:37.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:41:37.148 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:41:37.148 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:41:37.525 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:41:38.003 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-15 05:41:38.148 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:41:38.149 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:41:38.149 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:41:38.149 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:41:38.481 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-15 05:41:38.959 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-15 05:41:39.149 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:41:39.150 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:41:39.150 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:41:39.150 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:41:39.436 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-15 05:41:39.915 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-15 05:41:40.150 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:41:40.151 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:41:40.151 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:41:40.151 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:41:40.394 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-15 05:41:40.871 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-15 05:41:41.349 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-15 05:41:41.828 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-15 05:41:42.306 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-15 05:41:42.784 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-15 05:41:43.262 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-15 05:41:43.740 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-15 05:41:44.218 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-15 05:41:44.696 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-15 05:41:45.174 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-15 05:41:45.652 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-15 05:41:46.131 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-15 05:41:46.627 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-15 05:41:47.105 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-15 05:41:47.583 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-15 05:41:48.062 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-15 05:41:48.539 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-15 05:41:49.017 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-15 05:41:49.495 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-15 05:41:49.973 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-15 05:41:50.451 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-15 05:41:50.929 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-15 05:41:51.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:41:51.228 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:41:51.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:41:51.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:41:51.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:41:51.236 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:41:51.236 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:41:51.237 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:41:51.237 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:41:51.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:51.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:41:51.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:41:51.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:41:51.269 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:41:51.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:41:51.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:41:51.271 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:41:51.271 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:41:51.271 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:41:51.271 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:41:51.271 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:41:51.271 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:41:51.271 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:41:51.271 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3442 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:41:51.271 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3442 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:41:51.271 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3442 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:41:51.271 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3442 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:41:51.271 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3442 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:41:51.271 [WARNING] transceiver.py:250 (BTS@172.18.144.20:5700) RX TRXD message (ver=1 fn=3442 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-15 05:41:56.276 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:41:56.276 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:41:56.277 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:41:56.277 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:41:56.278 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:41:56.279 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:41:56.287 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:41:56.288 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:41:56.289 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:41:56.289 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:41:56.289 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:41:56.292 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:41:56.292 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:41:56.292 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:41:56.292 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:41:56.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:41:56.293 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:41:56.293 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:41:56.293 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:41:56.295 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:41:56.295 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:41:56.295 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:41:56.295 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:41:56.295 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:41:56.295 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:41:56.296 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:41:56.296 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:41:56.298 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:41:56.298 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:41:56.298 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:41:56.298 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:41:56.298 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:41:56.298 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:41:56.298 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:41:56.298 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:41:56.302 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:41:56.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:41:56.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:41:56.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:41:56.302 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:41:56.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:41:56.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:41:56.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:41:56.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:41:56.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:56.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:56.303 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:41:56.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:56.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:56.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:56.303 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:41:56.303 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:41:56.303 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:41:56.303 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:41:56.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:56.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:56.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:56.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:41:56.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:56.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:56.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:56.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:56.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:56.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:56.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:56.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:56.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:56.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:56.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:56.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:56.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:56.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:56.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:41:56.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:56.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:56.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:56.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:41:56.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:56.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:56.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:56.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:41:56.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:41:56.307 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:41:56.786 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:41:56.826 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:41:56.828 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:41:56.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:56.830 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:41:56.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:41:56.849 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:41:56.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:41:56.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:41:56.852 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:41:56.852 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:41:56.852 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:41:56.852 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:41:56.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 05:41:56.889 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:41:56.890 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:41:56.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:41:56.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:41:56.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:57.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 05:41:57.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:41:57.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:41:57.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:41:57.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:41:57.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:41:57.182 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:41:57.182 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:41:57.183 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:41:57.183 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:41:57.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:41:57.208 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:41:57.208 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:41:57.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:41:57.215 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:41:57.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:41:57.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:41:57.216 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:41:57.216 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:41:57.216 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:41:57.216 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:41:57.216 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:41:57.216 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:41:57.216 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:42:02.222 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:42:02.222 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:42:02.223 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:42:02.224 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:42:02.225 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:42:02.226 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:42:02.231 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:42:02.232 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:42:02.232 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:42:02.232 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:42:02.232 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:42:02.234 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:42:02.234 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:42:02.234 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:42:02.234 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:42:02.235 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:42:02.235 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:42:02.235 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:42:02.235 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:42:02.236 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:42:02.236 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:42:02.237 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:42:02.237 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:42:02.237 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:42:02.237 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:42:02.237 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:42:02.237 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:42:02.238 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:42:02.238 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:42:02.239 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:42:02.239 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:42:02.239 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:42:02.239 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:42:02.239 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:42:02.239 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:42:02.241 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:42:02.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:42:02.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:42:02.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:42:02.241 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:42:02.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:42:02.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:42:02.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:42:02.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:42:02.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:42:02.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:42:02.242 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:42:02.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:42:02.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:42:02.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:42:02.242 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:42:02.242 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:42:02.242 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:42:02.242 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:42:02.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:42:02.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:42:02.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:42:02.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:42:02.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:42:02.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:42:02.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:42:02.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:42:02.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:42:02.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:42:02.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:42:02.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:42:02.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:42:02.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:42:02.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:42:02.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:42:02.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:42:02.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:42:02.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:42:02.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:42:02.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:42:02.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:42:02.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:42:02.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:42:02.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:42:02.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:42:02.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:42:02.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:42:02.247 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-15 05:42:02.730 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-15 05:42:02.760 [DEBUG] fake_trx.py:273 (BTS@172.18.144.20:5700) Recv FAKE_TOA cmd
2025-12-15 05:42:02.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:42:02.763 [DEBUG] fake_trx.py:292 (BTS@172.18.144.20:5700) Recv FAKE_RSSI cmd
2025-12-15 05:42:02.765 [DEBUG] fake_trx.py:317 (BTS@172.18.144.20:5700) Recv FAKE_CI cmd
2025-12-15 05:42:02.785 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:42:02.785 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:42:02.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:42:02.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:42:02.787 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:42:02.787 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:42:02.787 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:42:02.788 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:42:02.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD HANDOVER
2025-12-15 05:42:02.831 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:42:02.831 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:42:02.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:42:02.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:42:03.206 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-15 05:42:03.244 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:42:03.245 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:42:03.245 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:42:03.245 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:42:03.684 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-15 05:42:04.162 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-15 05:42:04.246 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:42:04.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:42:04.246 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:42:04.246 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:42:04.641 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-15 05:42:04.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:42:04.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:42:04.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:42:04.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD ECHO
2025-12-15 05:42:04.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.144.22:6700) Ignore CMD SETSLOT
2025-12-15 05:42:04.858 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.144.22:6700) Recv RXTUNE cmd
2025-12-15 05:42:04.858 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.144.22:6700) Recv TXTUNE cmd
2025-12-15 05:42:04.858 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.144.22:6700) Recv POWERON CMD
2025-12-15 05:42:04.859 [INFO] ctrl_if_trx.py:109 (MS@172.18.144.22:6700) Starting transceiver...
2025-12-15 05:42:04.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD NOHANDOVER
2025-12-15 05:42:04.879 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.144.22:6700) Recv POWEROFF cmd
2025-12-15 05:42:04.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.144.22:6700) Stopping transceiver...
2025-12-15 05:42:04.888 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.144.20:5700) Recv SETPOWER cmd
2025-12-15 05:42:04.889 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.144.20:5700/1) Recv SETPOWER cmd
2025-12-15 05:42:04.889 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.144.20:5700/2) Recv SETPOWER cmd
2025-12-15 05:42:04.889 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.144.20:5700/3) Recv SETPOWER cmd
2025-12-15 05:42:04.895 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:42:04.895 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:42:04.895 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:42:04.895 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:42:04.895 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:42:04.895 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:42:04.895 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:42:09.894 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:42:09.894 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:42:09.896 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:42:09.898 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:42:09.900 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:42:09.901 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:42:09.906 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:42:09.907 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:42:09.907 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:42:09.907 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:42:09.907 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:42:09.908 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:42:09.908 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:42:09.908 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:42:09.908 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:42:09.908 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:42:09.908 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:42:09.908 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:42:09.908 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:42:09.909 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:42:09.909 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:42:09.909 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:42:09.909 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:42:09.910 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:42:09.910 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:42:09.910 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:42:09.910 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:42:09.911 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:42:09.911 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:42:09.911 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:42:09.911 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:42:09.911 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:42:09.911 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:42:09.911 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:42:09.911 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:42:09.913 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:42:09.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:42:09.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:42:09.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:42:09.914 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:42:09.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:42:09.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:42:09.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:42:09.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:42:09.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:42:09.914 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:42:09.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:42:09.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:42:09.914 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:42:09.914 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:42:09.914 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:42:09.914 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:42:09.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:42:09.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:42:09.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:42:09.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:42:09.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:42:09.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:42:09.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:42:09.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:42:09.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:42:09.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:42:09.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:42:09.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:42:09.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:42:09.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:42:09.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:42:09.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:42:09.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:42:09.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:42:09.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:42:09.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:42:09.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:42:09.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:42:09.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:42:09.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:42:09.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:42:09.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:42:09.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:42:09.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:42:09.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:42:09.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:42:09.916 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:42:09.916 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:42:09.916 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:42:09.916 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:42:09.916 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:42:09.916 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:42:09.916 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:42:14.918 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:42:14.918 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:42:14.920 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:42:14.921 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:42:14.922 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:42:14.923 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:42:14.928 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:42:14.928 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:42:14.928 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.144.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:42:14.928 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.144.20:5700) Recv SETFORMAT cmd
2025-12-15 05:42:14.928 [INFO] ctrl_if_trx.py:201 (BTS@172.18.144.20:5700) TRXD header version 1 -> 1
2025-12-15 05:42:14.929 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.144.20:5700/1) Recv RXTUNE cmd
2025-12-15 05:42:14.929 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.144.20:5700/1) Recv TXTUNE cmd
2025-12-15 05:42:14.929 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:42:14.929 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.144.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:42:14.930 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:42:14.930 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.144.20:5700/1) Recv NOMTXPOWER cmd
2025-12-15 05:42:14.930 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.144.20:5700/1) Recv SETFORMAT cmd
2025-12-15 05:42:14.930 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.144.20:5700/1) TRXD header version 1 -> 1
2025-12-15 05:42:14.931 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.144.20:5700/2) Recv RXTUNE cmd
2025-12-15 05:42:14.931 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.144.20:5700/2) Recv TXTUNE cmd
2025-12-15 05:42:14.931 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:42:14.931 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.144.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:42:14.931 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:42:14.931 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.144.20:5700/2) Recv NOMTXPOWER cmd
2025-12-15 05:42:14.931 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.144.20:5700/2) Recv SETFORMAT cmd
2025-12-15 05:42:14.931 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.144.20:5700/2) TRXD header version 1 -> 1
2025-12-15 05:42:14.932 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.144.20:5700/3) Recv RXTUNE cmd
2025-12-15 05:42:14.933 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.144.20:5700/3) Recv TXTUNE cmd
2025-12-15 05:42:14.933 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:42:14.933 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.144.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-15 05:42:14.933 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.144.20:5700/3) Recv RFMUTE cmd
2025-12-15 05:42:14.933 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.144.20:5700/3) Recv NOMTXPOWER cmd
2025-12-15 05:42:14.933 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.144.20:5700/3) Recv SETFORMAT cmd
2025-12-15 05:42:14.933 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.144.20:5700/3) TRXD header version 1 -> 1
2025-12-15 05:42:14.936 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.144.20:5700) Recv RXTUNE cmd
2025-12-15 05:42:14.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETTSC
2025-12-15 05:42:14.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETTSC
2025-12-15 05:42:14.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETTSC
2025-12-15 05:42:14.936 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.144.20:5700) Recv TXTUNE cmd
2025-12-15 05:42:14.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETRXGAIN
2025-12-15 05:42:14.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETRXGAIN
2025-12-15 05:42:14.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETTSC
2025-12-15 05:42:14.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:42:14.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETRXGAIN
2025-12-15 05:42:14.936 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.144.20:5700) Recv NOMTXPOWER cmd
2025-12-15 05:42:14.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:42:14.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:42:14.936 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.144.20:5700) Recv POWERON CMD
2025-12-15 05:42:14.936 [INFO] ctrl_if_trx.py:109 (BTS@172.18.144.20:5700) Starting transceiver...
2025-12-15 05:42:14.936 [INFO] transceiver.py:236 Starting clock generator
2025-12-15 05:42:14.936 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-15 05:42:14.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:42:14.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:42:14.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:42:14.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETRXGAIN
2025-12-15 05:42:14.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:42:14.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:42:14.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:42:14.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:42:14.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:42:14.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:42:14.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:42:14.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:42:14.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:42:14.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:42:14.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:42:14.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:42:14.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:42:14.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:42:14.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:42:14.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:42:14.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:42:14.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:42:14.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.144.20:5700/1) Ignore CMD SETSLOT
2025-12-15 05:42:14.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:42:14.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:42:14.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:42:14.938 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.144.20:5700/1) Recv RFMUTE cmd
2025-12-15 05:42:14.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.144.20:5700) Ignore CMD SETSLOT
2025-12-15 05:42:14.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.144.20:5700/2) Ignore CMD SETSLOT
2025-12-15 05:42:14.938 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.144.20:5700) Recv RFMUTE cmd
2025-12-15 05:42:14.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT
2025-12-15 05:42:14.938 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.144.20:5700) Recv POWEROFF cmd
2025-12-15 05:42:14.938 [INFO] ctrl_if_trx.py:117 (BTS@172.18.144.20:5700) Stopping transceiver...
2025-12-15 05:42:14.938 [INFO] transceiver.py:239 Stopping clock generator
2025-12-15 05:42:14.938 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.144.20:5700/2) Recv RFMUTE cmd
2025-12-15 05:42:14.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.144.20:5700/3) Ignore CMD SETSLOT